Monitoring structure and preparation method thereof, display mother board, and test method of lap joint resistance
By designing monitoring structures for the substrate, insulating layer, isolation structure, and electrode layer in OLED display products, the problem of inaccurate electrical testing was solved, enabling precise monitoring of the electrode layer overlap resistance and improving testing accuracy.
Patent Information
- Application Number
- CN202411382424.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-29
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2044-09-29
AI Technical Summary
Existing OLED display products have insufficiently accurate electrical testing capabilities, making it impossible to accurately monitor the bonding impedance of the electrode layers.
A monitoring structure is provided, including a substrate, an insulating layer, an isolation structure, and a first electrode layer. The isolation structure provides electrical conductivity with the power supply and monitoring terminals. Combined with the design and testing methods of the display motherboard, the overlap resistance of the electrode layer can be accurately monitored.
It enables precise monitoring of electrode layer overlap resistance, improving the accuracy of electrical testing for OLED display products.
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Figure CN119905490B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of display, in particular to a monitoring structure and a preparation method thereof, a display mother board and a test method of lap joint resistance. BACKGROUND
[0002] Organic light emitting diode (OLED) and flat display panel based on light emitting diode (LED) technology have been widely applied to mobile phones, televisions, notebook computers, desktop computers and other consumer electronic products due to their high image quality, power saving, thin body and wide application range, and have become the mainstream in the display panel field.
[0003] However, the electrical property test of the current OLED display product is not accurate enough. SUMMARY
[0004] The present application mainly solves the technical problem of providing a monitoring structure and a preparation method thereof, a display mother board and a test method of lap joint resistance, and accurately monitoring the lap joint impedance of the first electrode layer.
[0005] To solve the above technical problem, one technical solution adopted by the present application is to provide a monitoring structure, which comprises a substrate, an insulating layer, an isolation structure and a first electrode layer; the insulating layer is located on one side of the substrate, and a first opening is provided on the insulating layer; the isolation structure is at least partially arranged on the side of the insulating layer away from the substrate, and the isolation structure defines a second opening communicating with the first opening; the first electrode layer comprises a first part, a second part and a third part, the first part is arranged in the first opening; the second part is connected to one side of the first part, and the second part extends to the side surface of the isolation structure at the edge of the second opening and is electrically conductive with the first power supply end and the first monitoring end through the isolation structure; the third part is connected to the other side of the first part and is electrically conductive with the second power supply end and the second monitoring end.
[0006] Preferably, the monitoring structure further comprises a second electrode layer arranged between the substrate and the insulating layer, and at least part of the second electrode layer is exposed to the first opening.
[0007] Preferably, the first part of the first electrode layer is lap jointed with the second electrode layer.
[0008] Preferably, the thickness of the third part of the first electrode layer is equal to the thickness of the first part of the first electrode layer.
[0009] Preferably, an organic material layer is further included and arranged at least in the first opening and between the first portion of the first electrode layer and the second electrode layer.
[0010] Preferably, the third portion of the first electrode layer has a thickness smaller than that of the first portion of the first electrode layer.
[0011] Preferably, in a direction in which the substrate is directed to the first electrode layer, the substrate comprises a metal layer and a planarization layer arranged in sequence; the metal layer comprises a first trace, a second trace, a third trace and a fourth trace; the planarization layer and the insulating layer are provided with third and fourth openings penetrating to the metal layer, one end of the first trace and one end of the second trace are at least partially exposed from the third opening to form the first power supply end and the first monitoring end respectively, the third trace and the fourth trace are connected to the third portion of the first electrode layer through the third opening and the fourth opening respectively.
[0012] Preferably, the isolation structure comprises a first isolation layer and a second isolation layer arranged in sequence in a direction perpendicular to the thickness direction of the substrate, and a projection of the first isolation layer on the substrate is located within a projection of the second isolation layer on the substrate.
[0013] Preferably, the metal layer further comprises four test pads connected to the first trace, the second trace, the third trace and the fourth trace respectively.
[0014] To solve the above technical problems, another technical solution adopted by the present application is to provide a display mother board, the display mother board is divided into a first area and a second area, the first area corresponds to a display panel, the second area at least partially surrounds the first area, and the second area is provided with the monitoring structure of any one of the embodiments.
[0015] The substrate, the isolation structure, the first electrode layer, the insulating layer, the metal layer and the second electrode layer of the monitoring structure all correspond to film layers of the display panel.
[0016] The metal layer of the display panel is electrically connected to the first electrode layer of the display panel.
[0017] The display panel further comprises a light-emitting layer located between the first electrode layer and the second electrode layer.
[0018] To solve the above technical problems, another technical solution adopted by the present application is: a preparation method of a monitoring structure, the preparation method of the monitoring structure comprising: forming an insulating layer on one side of a substrate, wherein the insulating layer is formed with a first opening; forming an isolation structure on the side of the insulating layer away from the substrate, wherein the isolation structure defines a second opening that is communicated with the first opening; and forming a first electrode layer on the side of the insulating layer away from the substrate, wherein the first electrode layer comprises a first part corresponding to the first opening, a second part connected to one side of the first part and corresponding to the edge of the second opening and extending to the side surface of the isolation structure, and a third part connected to the other side of the first part and directly electrically connected to the second power supply end and the second monitoring end, and the second part is electrically connected to the first power supply end and the first monitoring end through the isolation structure.
[0019] Preferably, the step of forming the insulating layer on one side of the substrate further comprises: forming a metal layer on one side of the substrate, the metal layer comprising a first trace, a second trace, a third trace and a fourth trace arranged at intervals; forming a planarization layer on the side of the metal layer away from the substrate; the step of forming the isolation structure on the side of the insulating layer away from the substrate further comprises: forming a third opening and a fourth opening penetrating through the insulating layer and the planarization layer, wherein one end of the first trace and one end of the second trace are at least partially exposed to the third opening to form the first power supply end and the first monitoring end respectively, and one end of the third trace and one end of the fourth trace are at least partially exposed to the fourth opening to form the second monitoring end and the second power supply end respectively; the step of forming the isolation structure on the side of the insulating layer away from the substrate comprises: forming the isolation structure on the side of the insulating layer away from the planarization layer, wherein the isolation structure fills the third opening and is connected to the first trace and the second trace; and the step of forming the first electrode layer on the side of the insulating layer away from the substrate comprises: the third part of the first electrode layer is connected to one end of the third trace and one end of the fourth trace.
[0020] Preferably, the step of forming the isolation structure on the side of the insulating layer away from the substrate comprises: forming an isolation film layer in an integral layer on the side of the insulating layer away from the substrate; and removing at least part of the isolation film layer corresponding to a sub-region to form the isolation structure, wherein the sub-region comprises a region corresponding to the first opening and a region at least partially surrounding the first opening; and the step of forming the first electrode layer on the side of the insulating layer away from the substrate further comprises: forming a second electrode layer on the side of the substrate facing the insulating layer, wherein at least part of the second electrode layer is exposed to the first opening.
[0021] Preferably, the step of forming the first electrode layer on the side of the insulating layer away from the substrate further comprises: forming a second electrode layer on the side of the substrate facing the insulating layer, wherein at least part of the second electrode layer is exposed to the first opening; and evaporating an organic material layer on the side of the second electrode layer of the monitoring structure away from the substrate, wherein the orthographic projection of the organic material layer on the substrate is outside the orthographic projection of the fourth opening on the substrate.
[0022] To solve the above technical problems, another technical solution adopted by the present application is: a test method of a lap joint resistance, applied to the monitoring structure of any embodiment, the test method comprising: connecting the first power supply end and the second power supply end to a constant current source respectively, and connecting the first monitoring end and the second monitoring end to a probe to measure the voltage difference between the first monitoring end and the second monitoring end; and calculating the ratio of the voltage difference to the current intensity of the constant current source to obtain the lap joint resistance. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 is a structural schematic diagram of an embodiment of a display mother board of the present application;
[0024] Figure 2 is a structural schematic diagram of an embodiment of a monitoring structure of the present application;
[0025] Figure 3 is Figure 2 is a sectional view in the direction of A-A in FIG. 8;
[0026] Figure 4 is a structural schematic diagram of an embodiment of a display panel of the present application;
[0027] Figure 5 is a structural schematic diagram of another embodiment of a monitoring structure of the present application;
[0028] Figure 6 is a flow schematic diagram of an embodiment of a preparation method of a monitoring structure of the present application;
[0029] Figure 7 is a flow schematic diagram of another embodiment of a preparation method of a monitoring structure of the present application;
[0030] Figure 8 is a flow schematic diagram of step S260. DETAILED DESCRIPTION
[0031] For the purpose, technical solutions and effects of the present application to be clearer, more explicit, the present application is further described in detail below with reference to the drawings and examples. Obviously, the described examples are only some of the embodiments of the present application, rather than all the embodiments. Based on the examples in the present application, all other examples obtained by a person of ordinary skill in the art without creative labor fall within the scope of the present application.
[0032] Referring to Figure 1 , Figure 1 is a structural schematic diagram of an embodiment of the display motherboard of the present application. The display motherboard 100 is divided into a first area 110 and a second area 120, the first area 110 corresponds to a display panel 10, and the second area 120 at least partially surrounds the first area 110 and corresponds to a monitoring structure. Specifically, the display motherboard 100 includes a plurality of arrayed first areas 110, one first area 110 corresponds to form one display panel 10, and the second area 120 between adjacent first areas 110 is used to form a monitoring structure 20 and other functional structures, for electrical and other tests on the display panel 10 located on the same display motherboard 100. After the process of the display motherboard 100 is completed, the second area 120 can be cut to form the display panel 10 corresponding to the first area 110.
[0033] In the electrical test of the display panel 10, the lap joint resistance of the electrode layer is an important test parameter, but the inventors have found through research that the existing monitoring structure 20 cannot accurately monitor the lap joint resistance of the electrode layer (such as the cathode) in the display panel 10.
[0034] Therefore, the present application provides a monitoring structure 20, referring to Figure 2 and Figure 3 , Figure 2 is a structural schematic diagram of an embodiment of the monitoring structure of the present application, Figure 3 is Figure 2A-A direction. The monitoring structure 20 comprises a substrate 21, an insulation layer 23, an isolation structure 24 and a first electrode layer 25, and optionally, the monitoring structure 20 further comprises a second electrode layer 22 between the substrate 21 and the insulation layer 23. In other embodiments, the monitoring structure 20 can not comprise the second electrode layer 22. In some embodiments, the first electrode layer 25 can be a cathode, and the second electrode layer 22 can be an anode. The insulation layer 23 is located on one side of the substrate 21, and the insulation layer 23 is provided with a first opening 23a. The isolation structure 24 is at least partially disposed on the side of the insulation layer 23 away from the substrate 21, and the isolation structure 24 defines a second opening 24a communicating with the first opening 23a, and the second opening 24a defined by the isolation structure 24 covers the orthographic projection of the first opening 23a on the substrate 21. The first electrode layer 25 comprises a first portion 251, a second portion 252 and a third portion 253, the first portion 251 is disposed in the first opening 23a; the second portion 252 is connected to at least one side of the first portion 251, and the second portion 252 extends to the side surface of the isolation structure 24 at the edge of the second opening 24a, and is electrically conductive with the first power supply end 2121 and the first monitoring end 2122 through the isolation structure 24; the third portion 253 is connected to the other side of the first portion 251, and is used for being directly electrically conductive with the second power supply end 2124 and the second monitoring end 2123.
[0035] Optionally, refer to Figure 4 , Figure 4is a structural schematic diagram of an embodiment of the display panel of the present application. The substrate 21, the insulating layer 23, the isolation structure 24 and the first electrode layer 25 and the second electrode layer 22 correspond to the first substrate part 11, the first insulating part 13, the first isolation part 14, the first electrode part 15 and the second electrode part 12 in the display panel 10 located in the first area 110 respectively. Among them, the first insulating part 13 is a pixel definition layer, the first opening corresponding to the pixel definition layer is a pixel opening 13a, and at least part of the second electrode part 12 is exposed to the pixel opening 13a. The first isolation part 14 extending to the first area 110 and located in the display panel 10 is arranged on the side of the pixel definition layer away from the first substrate part 11, for defining an isolation opening 14a and cutting off the evaporation film layer. It should be noted that the first isolation part 14 located in the display panel 10 is a mesh structure, defining a plurality of isolation openings 14a, while the isolation structure 24 located in the monitoring structure 20 can only have a frame structure, defining a second opening 24a, since the monitoring structure 20 is only for monitoring. Specifically, the isolation structure 24 can include a first isolation layer 241 and a second isolation layer 242 arranged in a stack along the Z direction, the orthographic projection of the first isolation layer 241 on the substrate 21 is located within the orthographic projection of the second isolation layer 242 on the substrate 21, the material of the first isolation layer 241 can be aluminum, and the material of the second isolation layer 242 can be titanium. It should be noted that the isolation structure 24 can also include a third isolation layer (not shown in the figure), which is located on the side of the first isolation layer close to the substrate, and the material of the third isolation layer can be titanium or molybdenum. As can be seen from Figure 4 , the first electrode part 15 of the display panel 10 covers the isolation opening 14a and at the same time covers the pixel opening 13a, and the outer ring edge is lapped on the side wall of the first isolation part 14, so there is a lap resistance between the first electrode part 15 and the first isolation part 14. As can be seen from Figure 2 and Figure 3 , the first electrode layer 25 of the monitoring structure 20 includes a second part 252, a first part 251 and a third part 253 connected in turn from the outside to the inside, wherein the edge of the second part 252 located in the outermost ring is lapped with the side wall of the isolation structure 24, the isolation structure 24 is electrically conductive with the first power supply end 2121 and the first monitoring end 2122, the second part 252 covers the first opening 23a, and the third part 253 located in the innermost part is directly electrically conductive with the second power supply end 2124 and the second monitoring end 2123. The thickness of the third part 253 is equal to the thickness of the first part 251, so as to facilitate the preparation of the first electrode layer 25. The first electrode layer 25 in the monitoring structure 20 provided by the present application is only lapped with the isolation structure 24 in the outermost ring, which is the same as the first electrode part 15 in the display panel 10, so the lap resistance measured by the monitoring structure 20 is equivalent to the lap impedance in the display panel 10, and the measured lap resistance is more accurate.
[0036] Optionally, please continue reading Figure 2 and Figure 3 In some embodiments, in the direction of the substrate 21 pointing towards the first electrode layer 25 ( Figure 3 In the Z-direction (i.e., perpendicular to the thickness direction of the substrate 21), the substrate 21 includes a metal layer 212 and a planarization layer 213 stacked sequentially. Specifically, in the Z-direction, the substrate 21 includes a substrate 211 and an array layer stacked sequentially. The metal layer 212 in the monitoring structure 20 includes a first trace 212a, a second trace 212b, a third trace 212c, and a fourth trace 212d spaced apart. The planarization layer 213 and the insulating layer 23 are provided with a third opening 23b and a fourth opening 23c that extend to the metal layer 212. One end of the first trace 212a and one end of the second trace 212b are exposed in the third opening 23b to form a first power supply terminal 2121 and a first monitoring terminal 2122, respectively. They are connected to the isolation structure 24 through the third opening 23b. One end of the third trace 212c and one end of the fourth trace 212d are exposed in the fourth opening 23c to form a second monitoring terminal 2123 and a second power supply terminal 2124, respectively, and are directly connected to the third part 253 of the first electrode layer 25. Specifically, the third opening 23b is located outside the second opening 24a. The third opening 23b penetrates the insulating layer 23 and the planarization layer 213, so that the ends of the first trace 212a and the second trace 212b are exposed in the third opening 23b, forming the first power supply terminal 2121 and the first monitoring terminal 2122. The isolation structure 24 is partly located on the side of the insulating layer 23 away from the substrate 21 and partly located in the third opening 23b. The material of the isolation structure 24 is metal, so the isolation structure 24 is electrically connected to the first power supply terminal 2121 and the first monitoring terminal 2122. The fourth opening 23c is located within the orthographic projection of the second opening 24a onto the substrate 21, and is situated within the enclosure of the first opening 23a. The fourth opening 23c penetrates the insulating layer 23 and the planarization layer 213. Furthermore, the insulating layer 23 covers the sidewalls of the planarization layer 213 to ensure the ability to isolate water and oxygen. The ends of the third trace 212c and the fourth trace 212d are at least partially exposed in the fourth opening 23c, forming the second monitoring terminal 2123 and the second power supply terminal 2124. After the first electrode layer 25 is deposited, a portion of the first electrode layer 25 is located within the fourth opening 23c, directly electrically connected to the second monitoring terminal 2123 and the second power supply terminal 2124. Optionally, as... Figure 4As shown, the substrate 211 corresponds to the first substrate 111 in the display panel 10, the metal layer 212 in the array layer corresponds to the first metal part 112 in the display panel 10, and the planarization layer 213 corresponds to the first planarization part 113 in the display panel 10. In this application, the wire for providing constant current source and monitoring current is formed in the array layer, which facilitates monitoring the contact resistance between the first electrode layer 25 and the isolation structure 24. In this structure, the third part 253 of the first electrode layer 25 is directly connected to the second monitoring terminal 2123 and the second power supply terminal 2124, and the second part 252 of the first electrode layer 25 is connected to the first monitoring terminal 2122 and the first power supply terminal 2121 through the isolation structure 24, so that the contact resistance between the first electrode layer 25 and the isolation structure 24 can be accurately monitored through the first wire 212a, the second wire 212b, the third wire 212c and the fourth wire 212d. Alternatively, the other end of the first wire 212a, the second wire 212b, the third wire 212c and the fourth wire 212d away from the first power supply terminal 2121, the first monitoring terminal 2122, the second monitoring terminal 2123 and the second power supply terminal 2124 can have a test pad exposed on the surface, which facilitates electrical connection with the power supply and monitoring probe.
[0037] Alternatively, referring to Figure 5 , Figure 5 is a structural schematic diagram of another embodiment of the monitoring structure of the present application. In another embodiment, the monitoring structure 20 further comprises an organic material layer 26, which is arranged at least in the first opening 23a and between the first part 251 of the first electrode layer 25 and the second electrode layer 22. The thickness of the third part 253 is smaller than that of the first part 251, so as to realize direct contact of the third wire 212c and the fourth wire 212d exposed by the third opening 23c. The monitoring structure 20 of the present embodiment is different from the monitoring structure 20 shown in Figure 3 in that the first electrode layer 25 and the second electrode layer 22 in the first opening 23a have the organic material layer 26 therebetween. Since the first electrode part 15 and the second electrode part 12 in the pixel opening 13a in the display panel 10 also have the light-emitting layer 16 made of organic material therebetween, which has the same material as the organic material layer 26 of the present embodiment, the contact impedance obtained by monitoring through this structure is more accurate. However, since the organic material layer 26 is an insulating material, in order to ensure the conduction of the monitoring circuit, the organic material layer 26 cannot extend into the fourth opening 23c.
[0038] The application further provides a test method of the lap joint resistance, comprising: connecting the first power supply end 2121 and the second power supply end 2124 to a constant current source (i.e. constant current) through the first wire 212a and the fourth wire 212d respectively, providing stable current flow, connecting the first monitoring end 2122 and the second monitoring end 2123 to a probe through the second wire 212b and the third wire 212c respectively to measure the voltage difference U between the first monitoring end 2122 and the second monitoring end 2123; and obtaining the lap joint resistance by calculating the ratio of the voltage difference U to the current intensity I of the constant current source.
[0039] Referring to Figure 6 , Figure 6 is a flowchart of an embodiment of a preparation method of the monitoring structure of the application. The preparation method comprises the following steps:
[0040] Step S110: forming an insulating layer 23 on one side of the substrate 21, wherein the insulating layer 23 is formed with a first opening 23a. Optionally, the insulating layer 23 corresponding to the display panel 10 and the monitoring structure 20 is synchronously prepared and formed, specifically, the insulating layer 23 comprises a first insulating part corresponding to the display panel 10 and a second insulating part corresponding to the monitoring structure 20, and the first insulating part 13 is a pixel definition layer, and the pixel definition layer is formed with a pixel opening 13a. The material of the insulating layer 23 can be inorganic material, and the first opening 23a can be formed by etching.
[0041] Step S120: forming an isolation structure 24 on the side of the insulating layer 23 away from the substrate 21, wherein the isolation structure 24 defines a second opening 24a, and the second opening 24a is communicated with the first opening 23a. The isolation structure 24 surrounds outside the first opening 23a and encloses the second opening 24a. Optionally, the isolation structure 24 can be formed simultaneously with the monitoring structure 20 and the display panel 10. The isolation structure 24 can be formed by first forming an isolation layer and then etching through a mask plate.
[0042] Step S130: forming a first electrode layer 25 on the side of the insulating layer 23 away from the substrate 21, wherein the first electrode layer 25 comprises a first part 251 corresponding to the first opening 23a, a second part 252 connected to one side of the first part 251 and corresponding to the edge of the second opening 24a and extending to the side surface of the isolation structure 24, and a third part 253 connected to the other side of the first part 251 and directly electrically connected with the second power supply end 2124 and the second monitoring end 2123, and the second part 252 is electrically connected with the first power supply end 2121 and the first monitoring end 2122 through the isolation structure 24. Specifically, the first electrode layer 25 is formed by evaporation of an entire layer, and due to the isolation structure 24 which is wide at the top and narrow at the bottom, the first electrode layer 25 is blocked by the isolation structure 24 and only the edge thereof is lap jointed to the side wall of the isolation structure 24. Optionally, the first electrode layer 25 can be formed by evaporation simultaneously on the monitoring structure 20 and the display panel 10.
[0043] Optionally, referring to Figure 7 , Figure 7 is a flowchart of another embodiment of the method for manufacturing the monitoring structure of the present application, which specifically comprises:
[0044] Step S210: forming a metal layer 212 on one side of the substrate 21, the metal layer 212 comprising the first trace 212a, the second trace 212b, the third trace 212c and the fourth trace 212d arranged at intervals. Compared with the previous embodiment, the present embodiment comprises forming the traces in the substrate 21. Optionally, the metal layer 212 can also be formed in the display panel 10 at the same time.
[0045] Step S220: forming a planarization layer 213 on the side of the metal layer 212 away from the substrate 21. The planarization layer 213 can also be formed in the display panel 10 at the same time.
[0046] Step S230: forming a second electrode layer 22 on the side of the planarization layer 213 away from the substrate 21.
[0047] Step S240: forming an insulating layer 23 on the side of the planarization layer 213 away from the substrate 21, the second electrode layer 22 being exposed at the first opening 23a.
[0048] Step S250: forming a third opening 23b and a fourth opening 23c through the insulating layer 23 and the planarization layer 213, wherein one end of the first trace 212a and one end of the second trace 212b are at least partially exposed at the third opening 23b to form the first power supply end 2121 and the first monitoring end 2122, respectively, and one end of the third trace 212c and one end of the fourth trace 212d are at least partially exposed at the fourth opening 23c to form the second monitoring end 2123 and the second power supply end 2124, respectively. The openings on the insulating layer 23 and the openings on the planarization layer 213 can also be formed respectively.
[0049] Step S260: forming an isolation structure 24 on the side of the insulating layer 23 away from the planarization layer 213, wherein the isolation structure 24 fills the third opening 23b and is connected with the first trace 212a and the second trace 212b.
[0050] Optionally, referring to Figure 8 , Figure 8 is a flowchart of step S260. The present step further specifically comprises:
[0051] Step S261: forming an integral isolation film layer on the side of the insulating layer 23 away from the substrate 21. Specifically, a plurality of isolation film layers can be formed in sequence.
[0052] Step S262: removing at least part of the isolation film layer corresponding to the sub-region, to form the isolation structure 24, wherein the sub-region includes the region corresponding to the first opening 23a and the region enclosed by at least part of the first opening 23a. The isolation structure 24 formed in this step is annular and hollow inside, so that the first electrode layer 25 formed by subsequent evaporation can only be connected to the inner sidewall of the annular isolation structure 24, i.e., the first electrode layer 25 and the isolation structure 24 are connected by only one annular resistance, which is equivalent to the connection resistance of the display panel 10.
[0053] Step S270: forming the first electrode layer 25 on the side of the insulating layer 23 away from the substrate 21, wherein the third part 253 of the first electrode layer 25 is connected to one end of the third trace 212c and one end of the fourth trace 212d. Finally, a structure as shown in FIG. 8A is formed. Figure 3
[0054] Optionally, the display panel and the monitoring structure can be prepared synchronously, and therefore, the step S270 can further include the following steps before the step S270:
[0055] After the second region 120 is shielded, an organic material layer is evaporated on the side of the second electrode layer 22 corresponding to the first region 110 away from the substrate 21, to form the light-emitting layer 16 in the pixel opening 13a of the first insulating part 13. Since the second region 120 is shielded, the organic material layer cannot be formed in the second region 120, so as to avoid the influence of the organic material layer 26 on the conduction of the monitoring circuit. Meanwhile, the light-emitting layer is formed in the display panel 10 of the first region 110.
[0056] Optionally, the organic material layer is evaporated on the side of the second electrode layer of the display panel 10 and the monitoring structure 20 away from the substrate 21, to form the light-emitting layer in at least the first opening 23a of the first insulating part, and the orthogonal projection of the organic material layer 26 on the substrate 21 is located outside the orthogonal projection of the fourth opening 23c on the substrate 21. Different from the previous embodiment, the organic material layer 26 in the monitoring structure 20 is patterned and evaporated in this embodiment, which can be formed by using a mask plate, to form a structure as shown in FIG. 8B. Figure 5
[0057] The above is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation using the content of the specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A monitoring structure, characterized by, The monitoring structure comprises: a substrate; an insulating layer on one side of the substrate, the insulating layer being provided with a first opening; an isolation structure at least partially disposed on the side of the insulating layer away from the substrate, the isolation structure defining a second opening communicating with the first opening; a first electrode layer comprising a first portion, a second portion and a third portion, the first portion being disposed in the first opening; the second portion being connected to one side of the first portion, the second portion extending to the side surface of the isolation structure at the edge of the second opening and being electrically conductive with a first power supply end and a first monitoring end through the isolation structure; the third portion being connected to the other side of the first portion and being electrically conductive with a second power supply end and a second monitoring end.
2. The monitoring structure of claim 1, wherein, Further comprising: a second electrode layer disposed between the substrate and the insulating layer, at least part of the second electrode layer being exposed to the first opening.
3. The monitoring structure of claim 2, wherein, The first portion of the first electrode layer overlaps the second electrode layer.
4. The monitoring structure of claim 3, wherein, The thickness of the third portion of the first electrode layer is equal to the thickness of the first portion of the first electrode layer.
5. The monitoring structure of claim 2, wherein, Further comprising: an organic material layer disposed at least in the first opening and between the first portion of the first electrode layer and the second electrode layer.
6. The monitoring structure of claim 5, wherein, The thickness of the third portion of the first electrode layer is less than the thickness of the first portion of the first electrode layer.
7. The monitoring structure according to any one of claims 1 to 6, wherein, in the direction of the substrate pointing to the first electrode layer, the substrate comprises a metal layer and a planarization layer disposed in sequence; the metal layer comprises a first trace, a second trace, a third trace and a fourth trace; the planarization layer and the insulating layer are provided with third and fourth openings penetrating to the metal layer, one end of the first trace and one end of the second trace are at least partially exposed to the third opening to form the first power supply end and the first monitoring end respectively, and are connected to the isolation structure through the third opening, one end of the third trace and one end of the fourth trace are at least partially exposed to the fourth opening to form the second monitoring end and the second power supply end respectively and are directly connected to the third portion of the first electrode layer.
8. The monitoring structure of claim 7, wherein, The isolation structure comprises a first isolation layer and a second isolation layer disposed in sequence in the thickness direction perpendicular to the substrate, the orthographic projection of the first isolation layer on the substrate is within the orthographic projection of the second isolation layer on the substrate.
9. The monitoring structure of claim 7, wherein, The metal layer further comprises four test pads connected to the first trace, the second trace, the third trace and the fourth trace respectively.
10. A display motherboard, characterized by The display mother board is divided into a first area and a second area, the first area corresponds to a display panel, the second area at least partially surrounds the first area, and the second area is provided with the monitoring structure according to any one of claims 1 to 9; The substrate, the isolation structure, the first electrode layer, the insulating layer and the metal layer of the monitoring structure are correspondingly provided with the film layer of the display panel; The metal layer of the display panel is electrically connected to the first electrode layer of the display panel.
11. The display mother board according to claim 10, wherein, The monitoring structure further comprises a second electrode layer, which is arranged between the substrate and the insulating layer, and at least part of the second electrode layer is exposed to the first opening; the second electrode layer is arranged corresponding to the film layer of the display panel; The display panel further comprises a light-emitting layer between the first electrode layer and the second electrode layer.
12. A method of monitoring the production of a structure, characterized by, The preparation method of the monitoring structure comprises: forming an insulating layer on one side of a substrate, wherein the insulating layer is formed with a first opening; forming an isolation structure on the side of the insulating layer away from the substrate, wherein the isolation structure defines a second opening, and the second opening is communicated with the first opening; forming a first electrode layer on the side of the insulating layer away from the substrate, wherein the first electrode layer comprises a first part corresponding to the first opening, a second part connected to one side of the first part and corresponding to the edge of the second opening and extending to the side surface of the isolation structure, and a third part connected to the other side of the first part and directly electrically connected to the second power supply end and the second monitoring end, and the second part is electrically connected to the first power supply end and the first monitoring end through the isolation structure.
13. The method of claim 12, wherein, The step of forming an insulating layer on one side of a substrate further comprises: forming a metal layer on one side of the substrate, wherein the metal layer comprises a first trace, a second trace, a third trace and a fourth trace arranged at intervals; forming a planarization layer on the side of the metal layer away from the substrate; The step of forming an isolation structure on the side of the insulating layer away from the substrate further comprises: forming a third opening and a fourth opening penetrating through the insulating layer and the planarization layer, wherein one end of the first trace and one end of the second trace are at least partially exposed to the third opening to form the first power supply end and the first monitoring end respectively, and one end of the third trace and one end of the fourth trace are at least partially exposed to the fourth opening to form the second monitoring end and the second power supply end respectively; The step of forming an isolation structure on the side of the insulating layer away from the substrate comprises: forming the isolation structure on the side of the insulating layer away from the planarization layer, wherein the isolation structure fills the third opening and is connected to the first trace and the second trace; The step of forming a first electrode layer on the side of the insulating layer away from the substrate comprises: the third part of the first electrode layer is connected to one end of the third trace and one end of the fourth trace.
14. The method of claim 13, wherein, The step of forming an isolation structure on the side of the insulating layer away from the substrate comprises: forming an isolation film layer on the side of the insulating layer away from the substrate; removing at least part of the isolation film layer corresponding to a sub-region to form the isolation structure, wherein the sub-region comprises a region corresponding to the first opening and a region enclosed by at least part of the first opening; The step of forming a first electrode layer on the side of the insulating layer away from the substrate further comprises: forming a second electrode layer on the side of the substrate facing the insulating layer, wherein at least part of the second electrode layer is exposed to the first opening.
15. The preparation method according to claim 13, characterized in that, The method further comprises, before the step of forming the first electrode layer on the side of the insulating layer away from the substrate, the steps of: forming a second electrode layer on the side of the substrate facing the insulating layer, wherein at least part of the second electrode layer is exposed to the first opening; evaporating an organic material layer on the side of the second electrode layer of the monitoring structure away from the substrate, wherein the orthographic projection of the organic material layer on the substrate is outside the orthographic projection of the fourth opening on the substrate.
16. A method of testing for a lap resistance, characterized by, The test method is applied to the monitoring structure according to any one of claims 1 to 9, and the test method comprises: the first power supply end and the second power supply end are respectively connected to a constant current source, and the first monitoring end and the second monitoring end are respectively connected to a probe to measure a voltage difference between the first monitoring end and the second monitoring end; a ratio of the voltage difference to a current intensity of the constant current source is calculated to obtain the lap joint resistance.
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