Gallium nitride switching circuit and driving circuit for gallium nitride switching circuit

Abstract

The invention discloses a gallium nitride switching circuit and a driving circuit used for the gallium nitride switching circuit, the switching circuit comprises a high-side gallium nitride switch and a low-side gallium nitride switch, power voltage conversion is realized by controlling on and off of the gallium nitride switches, and the driving circuit comprises a first switching tube, a second switching tube, a third switching tube and a fourth switching tube, the control end receives a first control signal and is switched on or switched off based on the first control signal; the first end of the second switch tube is coupled to the second end of the first switch tube, and the control end receives a second control signal and is switched on or off based on the second control signal; the first end of the capacitor is coupled to the second end of the second switch tube, and the second end of the capacitor is coupled to the common end of the high-side gallium nitride switch and the low-side gallium nitride switch. The voltage of the switch node is the voltage of the switch node. When the low-side gallium nitride switch is turned off, the first switching tube is turned off; when the low-side gallium nitride switch is turned on, the first switch tube is turned on; when the low-side gallium nitride switch is turned on and the voltage of the switch node is smaller than the reference voltage, the second switch tube is turned on.

Description

Technical Field

[0001] The present application relates to the technical field of drive circuits, and in particular to a gallium nitride switch circuit and a drive circuit for the gallium nitride switch circuit. Background Art

[0002] Compared with metal oxide semiconductor field effect transistors (MOSFETs), gallium nitride field effect transistors (GaNFETs) have faster switching speeds and lower switching losses, and are suitable for high switching frequency system applications. For power systems, the use of GaN FETs, on the one hand, will greatly optimize the volume and weight of magnetic components due to the increase in switching frequency, thereby helping to reduce the volume and weight of the system. On the other hand, in power systems with the same switching frequency, the use of GaNFETs will also help improve system efficiency.

[0003] Another significant advantage of GaN FET is that there is no intrinsic body diode between the source and drain. The absence of the intrinsic body diode eliminates the reverse recovery loss caused by it, allowing GaN FET to further improve system efficiency when used in half-bridge circuits.

[0004] However, although GaN FET has outstanding performance advantages over MOSFET, its sensitive gate structure places higher requirements on practical applications. When the gate drive voltage is too high, it will affect the device life and even bring the risk of gate breakdown. Therefore, a driving circuit is needed to solve the problem of too high gate drive voltage of GaN transistors reducing circuit reliability. Summary of the invention

[0005] The present application provides a gallium nitride switch circuit and a driving circuit for the gallium nitride switch circuit, aiming to solve the problem that the gate of the gallium nitride transistor is easily damaged when the gate driving voltage of the gallium nitride transistor is too high.

[0006] According to a first aspect of the present application, the present application provides a driving circuit for a gallium nitride switch circuit, the gallium nitride switch circuit comprising a high-side gallium nitride switch and a low-side gallium nitride switch, and power voltage conversion is achieved by controlling the on and off of the high-side gallium nitride switch and the low-side gallium nitride switch, the driving circuit comprising: a first switch tube having a first end, a second end and a control end, wherein the first end receives a power supply voltage, the control end receives a first control signal, and the first switch tube is turned on or off based on the first control signal; a second switch tube having a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube, Two ends, the control end receives the second control signal, and the second switch tube is turned on or off based on the second control signal; the capacitor has a first end and a second end, wherein the first end is coupled to the second end of the second switch tube, and the second end is coupled to the common end of the high-side gallium nitride switch and the low-side gallium nitride switch, wherein the voltage of the common end of the high-side gallium nitride switch and the low-side gallium nitride switch is the switch node voltage; wherein, when the low-side gallium nitride switch is turned off, the first switch tube is turned off; when the low-side gallium nitride switch is turned on, the first switch tube is turned on; when the low-side gallium nitride switch is turned on and the switch node voltage is less than the reference voltage, the second switch tube is turned on.

[0007] According to a second aspect of the present application, the present application provides a gallium nitride switching circuit, comprising a driving circuit as described in any one of the first aspects above, and further comprising: a high-side gallium nitride switch having a source terminal, a drain terminal and a gate terminal, a low-side gallium nitride switch having a source terminal, a drain terminal and a gate terminal, wherein the drain terminal of the low-side gallium nitride is coupled to the source terminal of the high-side gallium nitride switch, and an inductor, one end of the inductor being coupled to a common terminal of the high-side gallium nitride switch and the low-side gallium nitride switch.

[0008] Through one or more of the above embodiments of the present invention, at least the following technical effects can be achieved:

[0009] The present application controls the charging time of the capacitor by controlling the conduction of the first switch tube and the second switch tube connected in series in the charging loop of the capacitor, effectively solving the capacitor overcharging problem existing in the half-bridge circuit working in Buck mode and protecting the gate of the high-side gallium nitride transistor. At the same time, the on and off of the charging path are controlled according to the reference voltage, preventing the charging voltage on the capacitor from being fed back to the power supply voltage, thereby improving the reliability of the driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0011] Figure 1 A schematic structural diagram of an existing driving circuit for a gallium nitride switch circuit is provided;

[0012] Figure 2 A schematic diagram of the circuit structure of a driving circuit for a gallium nitride switch circuit according to an embodiment of the present invention is provided;

[0013] Figure 3 A circuit structure schematic diagram of a charging control circuit according to an embodiment of the present invention is given;

[0014] Figure 4 A circuit diagram of a buck-type gallium nitride switch circuit according to an embodiment of the present invention is provided;

[0015] Figure 5 Given Figure 4 Waveform diagram of each signal in the buck-type GaN switch circuit shown;

[0016] Figure 6 A circuit diagram of a boost-type gallium nitride switch circuit according to an embodiment of the present invention is provided;

[0017] Figure 7 Given Figure 6 The waveform diagram of each signal in the boost-type GaN switching circuit shown. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0019] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0020] It should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0021] Figure 1 A schematic diagram of the structure of an existing driving circuit for a gallium nitride switch circuit is provided. The gallium nitride switch circuit includes a high-side gallium nitride switch Q1 and a low-side gallium nitride switch Q2 connected in series. The power supply voltage VDD supplies power to the low-side gate driver 160, and the power supply voltage VDD is generally 5V. The output of the low-side gate driver 160 is connected to the gate of the low-side gallium nitride switch Q2. The output of the high-side gate driver 150 is connected to the gate of the high-side gallium nitride switch Q1, and the power supply voltage VDD supplies power to the high-side gate driver 150 through the driving circuit. Figure 1 The driving circuit in the embodiment includes a capacitor 170 and a diode 180, a supply voltage VDD is coupled to the anode of the diode 180, a cathode of the diode 180 is connected to one end of the capacitor 170, and the other end of the capacitor 170 is connected to the switch node SW. The supply level of the high-side gate driver 150 is generated by the driving circuit. When the low-side GaN switch Q2 is turned on, the voltage of the switch node SW is pulled to a low potential, and the supply voltage VDD charges the capacitor 170 through the diode 180. When the voltage of the switch node SW is pulled to a high potential, the diode 180 is reversely cut off, and the charging path is blocked.

[0022] like Figure 1 The driving circuit of the GaN switch circuit shown in the figure sets a dead time to prevent the high-side GaN switch Q1 and the low-side GaN switch Q2 from being turned on at the same time. During the dead time, the high-side driving signal V GS_H and the low-side drive signal V GS_L is low level, and the high-side GaN switch Q1 and the low-side GaN switch Q2 are turned off at the same time. During the dead time, since the inductor current on the inductor 140 cannot change suddenly, it will be continued through the low-side GaN switch Q2. After the low-side GaN switch Q2 channel is reversely turned on, the voltage of the switch node SW is clamped to a negative voltage that can maintain the inductor current, generally around -2V. The capacitor 170 is charged during the conduction period of the low-side GaN switch Q2. The charging voltage on the capacitor 170 is the voltage difference between the power supply voltage VDD and the switch node SW. Since the switch node voltage SW is a negative voltage (about -2V), if the power supply voltage VDD is 5V, the charging voltage on the capacitor C may reach more than 7V, which will damage the gate of the high-side GaN switch Q1.

[0023] Figure 2 A schematic diagram of the circuit structure of a driving circuit for a gallium nitride switch circuit according to an embodiment of the present invention is given. The gallium nitride switch circuit includes a high-side gallium nitride switch Q1 and a low-side gallium nitride switch Q2, and the input voltage is converted into an output voltage by controlling the conduction and disconnection of the high-side gallium nitride switch Q1 and the low-side gallium nitride switch Q2. Figure 2 In the embodiment shown, the low-side GaN switch Q2 and the high-side GaN switch Q1 are both N-type switch tubes. The low-side GaN switch Q2 is GS_L The high-side GaN switch Q1 is turned on or off under the control of the high-side drive signal V GS_H When the high-side drive signal V GS_H When the high-side drive signal V GS_H When the low-side drive signal V GS_L When the low-side drive signal V GS_L When it is high, the low-side GaN switch Q2 is turned on. Figure 2 In the illustrated embodiment, the input voltage may be the first bus voltage VBUS1, and the output voltage may be the second bus voltage VBUS2, that is, the gallium nitride switch circuit converts the first bus voltage VBUS1 into the second bus voltage VBUS2, at which point the second bus voltage VBUS2 is less than the first bus voltage VBUS1. The input voltage may also be the second bus voltage VBUS2, and the output voltage may be the first bus voltage VBUS1, that is, the gallium nitride switch circuit converts the second bus voltage VBUS2 into the first bus voltage VBUS1, at which point the first bus voltage VBUS1 is greater than the second bus voltage VBUS2. The drive circuit 200 includes a first switch tube 308, a second switch tube 309, and a capacitor C, wherein the first switch tube 308 has a first terminal, a second terminal, and a control terminal, wherein the first terminal receives a power supply voltage VDD, and the control terminal receives a first control signal G1, and the first switch tube 308 is turned on or off based on the first control signal G1. The second switch tube 309 has a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube 308, the control end receives the second control signal G2, and the second switch tube 309 is turned on or off based on the second control signal G2. The capacitor C has a first end and a second end, wherein the first end is coupled to the second end of the second switch tube 309, and the second end is coupled to the common node SW of the high-side gallium nitride switch Q1 and the low-side gallium nitride switch Q2, wherein the voltage of the common node SW of the high-side gallium nitride switch Q1 and the low-side gallium nitride switch Q2 is the switch node voltage V SW Among them, when the low-side drive signal V GS_LWhen the low-side driving signal V GS_L When the low-side driving signal V GS_L is high, and the switch node voltage V SW Less than the reference voltage V ref When the second switch tube 309 is turned on, the second switch tube 309 is turned on. In one embodiment, the power supply voltage VDD and the driving circuit 200 are integrated into the same chip. In another embodiment, the power supply voltage VDD is an external power supply that provides working power for the driving circuit 200. In some embodiments, the reference voltage V ref It is 2V-3V.

[0024] exist Figure 2 In the illustrated embodiment, the first switch tube 308 is a P-type field effect transistor, and the second switch tube 309 is an N-type field effect transistor. It should be noted that, in one embodiment, the first field effect transistor 308 is a P-type gallium nitride field effect transistor, and the second field effect transistor 309 is an N-type gallium nitride field effect transistor. In one embodiment, the first field effect transistor 308 and the second field effect transistor 309 are integrated with the driving circuit 200 in the same chip. In one embodiment, the first field effect transistor 308 and the second field effect transistor 309 are separate devices. Figure 2 In the embodiment shown, when the low-side drive signal V GS_L When the low-side driving signal V GS_L When the low-side driving signal V GS_L is high, and the switch node voltage V SW Less than the reference voltage V ref When the second control signal G2 is at a high level, the second switch tube 309 is turned on.

[0025] The driving circuit 200 further includes a charging control circuit 311, which receives a reference voltage V ref , switch node voltage V SW and the low-side drive signal V GS_L , and according to the reference voltage V ref , switch node voltage V SW and the low-side drive signal V GS_L Generate a first control signal G1 and a second control signal G2 to control the on and off of the first switch tube 308 and the second switch tube 309 respectively. GS_LWhen the low-side driving signal V GS_L When the low-side driving signal V GS_L is high and the switch node voltage V SW Less than the reference voltage V ref When , the low-side GaN switch Q2 is turned on, the second control signal G2 is at a high level, and the second switch tube 309 is turned on.

[0026] Figure 2 The gallium nitride switch circuit shown can be a buck circuit or a boost circuit depending on the application scenario. For example, when the gallium nitride switch circuit is applied to the step-down requirement, that is, the gallium nitride switch circuit is a buck switch circuit, the gallium nitride switch circuit converts the first bus voltage VBUS1 into the second bus voltage VBUS2, wherein the value of the second bus voltage VBUS2 is less than the value of the first bus voltage VBUS1. When the gallium nitride switch circuit is applied to the step-up requirement, that is, the gallium nitride switch circuit is a boost switch circuit, the gallium nitride switch circuit converts the second bus voltage VBUS2 into the first bus voltage VBUS1, wherein the value of the first bus voltage VBUS1 is greater than the value of the second bus voltage VBUS2. It should be noted that the driving circuit protected by the present invention is applicable to any switch circuit composed of gallium nitride switches, including but not limited to full-bridge or half-bridge circuits such as BUCK, BOOST, LLC, etc.

[0027] Figure 3 The circuit structure diagram of the charging control circuit 311 according to an embodiment of the present invention is given. The charging control circuit 311 includes a comparison circuit 320, a logic circuit 321, a first inverter 322 and a second inverter 323. The comparison circuit 320 has a first input terminal receiving a reference voltage V ref , the second input terminal receives the switch node voltage V SW , the output terminal provides a comparison signal V SWL , the comparison circuit 320 is based on the reference voltage V ref and the switch node voltage V SW Generate comparison signal V SWL The logic circuit 321 has a first input terminal receiving a comparison signal V SWL The second input terminal receives the low-side drive signal V GS_L , the logic circuit 321 is based on the comparison signal V SWL and the low-side drive signal V GS_LGenerate a first signal V1. The first inverter 322 has an input terminal receiving the first signal V1 and an output terminal providing a control signal V2, wherein the control signal V2 and the second control signal G2 are different in amplitude and have the same phase. The second inverter 323 has an input terminal receiving the low-side drive signal V GS_L , having an output terminal providing a first control signal G1. The working principle of the charging control circuit 311 is that when the switch node voltage V SW Less than the reference voltage V ref When the comparison signal V SWL When the switch node voltage V SW Greater than the reference voltage V ref When the comparison signal V SWL is low level. When the comparison signal V SWL and the low-side drive signal V GS_L When both are high level, the first signal V1 is low level. SWL and / or low-side drive signal V GS_L When the first signal V1 is at a low level, the second control signal G2 is inverted with the first signal V1. The first control signal G1 is inverted with the low-side drive signal V GS_L Invert. Figure 3 In the illustrated embodiment, the charging control circuit 311 may further include a Pump circuit 324 for boosting the control signal V2 output by the first inverter 322 to form a second control signal G2 to drive the second switch tube 309, that is, the control signal V2 and the second control signal G2 are different in amplitude but have the same phase.

[0028] Figure 4 A circuit diagram of a buck-type gallium nitride switch circuit according to an embodiment of the present invention is given. Figure 4 In the embodiment shown, the output voltage VOUT is less than the input voltage VIN, the withstand voltage of the first switch tube 308 is 5V-10V, and the withstand voltage of the second switch tube 309 is greater than the input voltage VIN (the first bus voltage V BUS1 ).exist Figure 4 In the embodiment shown, the first switch tube 308 is turned on and off synchronously with the low-side GaN switch Q2, that is, when the low-side GaN switch Q2 is turned on, the first switch tube 308 is turned on, and when the low-side GaN switch Q2 is turned off, the first switch tube 308 is turned off, and the power supply voltage VDD cannot charge the capacitor C, and the charging path is turned off. Therefore, the problem of gate breakdown of the high-side GaN switch Q1 caused by excessive charging voltage on the capacitor C due to the reverse channel of the low-side GaN switch Q2 turning on during the dead time in the existing driving circuit is solved.

[0029] Figure 5 Given Figure 4The waveform diagram of each signal in the buck-type GaN switch circuit shown in FIG. Figure 4 The buck-type GaN switch circuit shown is Figure 5 The waveforms of the signals in the figure are explained below. In the period before time t0, the low-side drive signal V GS_L is low, the low-side GaN switch Q2 remains off, and the high-side drive signal V GS_H Drive the high-side GaN switch Q1 to keep conducting. Ignoring the on-state voltage of the high-side GaN switch Q1 when it is turned on, the switch node voltage V SW is the input voltage VIN. The first control signal G1 is at a high level, the first switch tube 308 is turned off, and the second control signal G2 is at a low level, the second switch tube 309 is turned off.

[0030] At time t0, the high-side drive signal V GS_H Switching from high level to low level, the high-side GaN switch Q1 is turned off, and the switch node voltage V SW The voltage of the buck GaN switch drops rapidly and enters the dead time.

[0031] At time t1, the switch node voltage V SW drops below the reference voltage V ref , comparison signal V SWL Switches from low level to high level. Low side drive signal V GS_L Maintaining a low level, the first switch tube 308 remains off, and the second switch tube 309 is turned off. During this time, the low-side GaN switch Q2 reverses and opens the channel to allow the inductor L to continue current flow, and the switch node voltage V SW Continue to reduce to negative pressure.

[0032] At time t2, the low-side drive signal V GS_L Switches to high level, the low-side GaN switch Q2 is turned on, and the switch node voltage V SW Close to zero voltage; the first control signal G1 switches to a low level, the first switch tube 308 is turned on, at this time due to the switch node voltage V SW Less than the reference voltage V ref , comparison signal V SWL and the low-side drive signal V GS_L The first signal V1 is at a low level, the second control signal G2 turns to a high level, and the second switch tube 309 is turned on. After the first switch tube 308 and the second switch tube 309 are both turned on, the power supply voltage VDD charges the capacitor C through the channel of the first switch tube 308 and the second switch tube 309, and the high-side voltage Vboot is close to the value of the power supply voltage VDD.

[0033] At time t3, the low-side drive signal V GS_LSwitches from high level to low level, and the low-side GaN switch Q2 is turned off. The first control signal G1 switches to high level, the first switch tube 308 is turned off, and the charging path is blocked. The first signal V1 turns to high level, the second control signal G2 is low level, and the second switch tube 309 is turned off. After that, during the dead time, the low-side GaN switch Q2 reverses and opens the channel to continue the inductor current, and the switch node voltage V SW Reduce to negative pressure.

[0034] At time t4, the low-side drive signal V GS_L The first control signal G1 is high, the first switch tube 308 remains off, the second control signal G2 is low, the second switch tube 309 remains off, and the high-side drive signal V GS_H Drive the high-side GaN switch Q1 to turn on, and the low-side GaN switch Q2 to keep off. Ignoring the channel voltage drop when the high-side GaN switch Q1 is turned on, the switch node voltage V SW Increases to equal the input voltage VIN.

[0035] In the buck-type GaN switch circuit of the present application, during the dead time, the high-side GaN switch Q1 and the low-side GaN switch Q2 are turned off, and the buck-type GaN switch circuit uses the low-side GaN switch Q2 to open the reverse channel to continue the inductor current. In the buck-type GaN switch circuit of the present application, the first switch tube 308 is synchronously turned on and off with the low-side GaN switch Q2. When the low-side GaN switch Q2 is turned on, the first switch tube 308 is synchronously turned on. When the low-side GaN switch Q2 is turned off, the first switch tube 308 is synchronously turned off, and the charging path of the power supply voltage VDD to the capacitor C is blocked. Therefore, when the low-side GaN switch Q2 continues to flow, the power supply voltage VDD stops charging the capacitor C, avoiding the situation where the gate drive voltage of the GaN switch is greater than the power supply voltage VDD. At the same time, the power supply voltage VDD charges the capacitor C through the first switch tube 308 and the second switch tube 309, which minimizes the on-resistance of the charging path and increases the value of the high-side voltage Vboot.

[0036] Figure 6 A circuit diagram of a boost-type gallium nitride switch circuit according to an embodiment of the present invention is given. Figure 6 In the illustrated embodiment, the driving circuit 600 converts the input voltage VIN into an output voltage VOUT by controlling the on and off of the high-side GaN switch Q1 and the low-side GaN switch Q2, wherein the output voltage VOUT is greater than the input voltage VIN. In one embodiment, the withstand voltage of the first switch tube 308 is 5V-10V, and the withstand voltage of the second switch tube 309 is greater than the output voltage VOUT (the first bus voltage VBUS1).

[0037] Figure 6The boost-type GaN switch circuit shown can solve the problem of the high-side voltage Vboot flowing back to the power supply voltage VDD in the existing drive circuit because it takes a certain time for the switch node voltage VSW to drop. During the dead time of the boost-type GaN switch circuit, the high-side GaN switch Q1 reverse channel is turned on to continue the inductor current, and the switch node voltage VSW is generally approximately equal to the output voltage VOUT. In the present application, by detecting the switch node voltage VSW and turning off the second switch tube 309 when the switch node voltage VSW is greater than the reference voltage Vref, the problem of the high-side voltage Vboot flowing back to the power supply voltage VDD in the existing drive circuit is avoided.

[0038] Figure 7 Given Figure 6 The waveform diagram of each signal of the boost-type GaN switch circuit shown in FIG. Figure 6 The boost topology circuit shown is for Figure 7 The waveform of each signal is described below.

[0039] Before t0, the low-side drive signal V GS_L is low, the low-side GaN switch Q2 remains off, and the high-side drive signal V GS_H is high, the high-side GaN switch Q1 is turned on, the first control signal G1 is high, and the first switch tube 308 is turned off. At this time, the switch node voltage V SW (ignore the on-state voltage of the high-side GaN switch Q1 when it is on) is equal to the output voltage VOUT, which is greater than the reference voltage V ref Therefore, the second control signal G2 is at a low level, and the second switch tube 309 is turned off.

[0040] From t0 to t1, the high-side GaN switch Q1 is turned off, and the reverse channel of the high-side GaN switch Q1 is turned on for the inductor current to continue to flow. The switch node voltage V SW Slightly higher than the output voltage VOUT.

[0041] At time t1, the low-side drive signal V GS_L is switched to a high level, so the first control signal G1 is switched to a low level, and the first switch tube 308 is turned on. At this time, the switch node voltage V SW Gradually decreases, at this time due to the switch node voltage V SW Greater than the reference voltage V ref , the second control signal G2 is at a low level, and the second switch tube 309 is turned off.

[0042] At time t2, the switch node voltage V SW Down to the reference voltage V ref Next, the comparison signal V SWL and the low-side drive signal V GS_LThe first signal V1 is at a low level, the second control signal G2 is switched from a low level to a high level, the second switch tube 309 is turned on, and the charging circuit for the power supply voltage VDD to charge the capacitor C is turned on.

[0043] During the period from time t2 to time t3 , the capacitor C is continuously charged by the supply voltage VDD.

[0044] At time t3, the low-side drive signal V GS_L Switches to low level, and the low-side GaN switch Q2 is turned off. Correspondingly, the first control signal G1 switches from low level to high level, and the first switch tube 308 is turned off. The first signal V1 switches to high level, the second control signal G2 is low level, and the second switch tube 309 is turned off. After this moment, the switch node voltage V SW Gradually increases to slightly higher than the output voltage VOUT.

[0045] After t4, the low-side drive signal V GS_L is low, the low-side GaN switch Q2 remains off, and the high-side drive signal V GS_H Drive the high-side GaN switch Q1 to turn on. Because the low-side drive signal V GS_L is low level, the first control signal G1 is high level, the first switch tube 308 is turned off, the second control signal G2 is low level, and the second switch tube 309 is turned off.

[0046] In the boost-type GaN switch circuit of the present application, the switch node voltage V SW is the output voltage VOUT. When the low-side GaN switch Q2 is turned on, due to the switch node voltage V SW The voltage drop exists for a certain period of time, and the high-side voltage Vboot is the switch node voltage V SW and the value of the supply voltage VDD. At this time, due to the switch node voltage V SW Higher than the preset reference voltage V ref , so the second switch tube 309 is still in the off state. Even if the first switch tube 308 is turned on by timing control, the body diode of the second switch tube 309 can also achieve reverse blocking, thereby preventing the high-side voltage Vboot from backflowing to the power supply voltage VDD. In some embodiments, the reference voltage V ref It is 2V-3V.

[0047] The present application provides a switch node voltage V SW The method and boost type GaN switch circuit for preventing the high side voltage Vboot from backflowing to the power supply voltage VDD provide a method for preventing the power supply voltage VDD from backflowing, because the switch node voltage V SW With reference voltage V refThe comparison is only used to control the on or off of the second switch tube 309, and does not control the on or off of the first switch tube 308, so the effective time for charging the capacitor C can be maximized. In the high-frequency power application system where the gallium nitride switch is located, the safety, efficiency and performance of the application are improved.

[0048] The charging path for the capacitor C provided in the present application is to charge through the channel of the first switch tube 308 and the second switch tube 309. Since the on-state voltage of the first switch tube 308 and the second switch tube 309 is smaller than the voltage drop of the existing diode, the high-side voltage Vboot is closer to the power supply voltage VDD, and the charging efficiency is higher.

[0049] In addition, the driving circuit provided in the present application is conducive to internal integration of the chip. The first switch tube 308 can be a low-voltage MOS device, and the second switch tube 309 can be a high-voltage MOS device. By adjusting the on-resistance of the first switch tube 308 and the second switch tube 309, the charging loop impedance of the driving circuit can be adjusted.

[0050] The present application also provides a gallium nitride switch circuit, including the above-mentioned driving circuit, the gallium nitride switch circuit also includes a high-side gallium nitride switch Q1, a low-side gallium nitride switch Q2 and an inductor L, the high-side gallium nitride switch Q1 has a source terminal, a drain terminal and a gate terminal, the low-side gallium nitride switch Q2 has a source terminal, a drain terminal and a gate terminal, wherein the drain terminal of the low-side gallium nitride is coupled to the source terminal of the high-side gallium nitride switch Q1, and one end of the inductor L is coupled to the common terminal SW of the high-side gallium nitride switch and the low-side gallium nitride switch.

[0051] In some embodiments, according to the connection relationship between the GaN switch circuit and the subsequent load, the low-side GaN switch Q2 and the inductor L form a buck circuit.

[0052] In some embodiments, according to the connection relationship between the GaN switch circuit and the subsequent load, the high-side GaN switch Q1, the low-side GaN switch Q2 and the inductor L form a boost circuit.

[0053] In some embodiments, the high-side GaN switch Q1 is an N-type field effect transistor.

[0054] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A driving circuit for a gallium nitride switch circuit, the gallium nitride switch circuit comprising a high-side gallium nitride switch and a low-side gallium nitride switch, the driving circuit providing a high-side driving signal and a low-side driving signal to respectively control the on and off of the high-side gallium nitride switch and the low-side gallium nitride switch to convert an input voltage into an output voltage, the driving circuit comprising: A first switch tube has a first end, a second end and a control end, wherein the first end receives a power supply voltage, the control end receives a first control signal, and the first switch tube is turned on or off based on the first control signal; A second switch tube has a first end, a second end and a control end, wherein the first end is coupled to the second end of the first switch tube, the control end receives a second control signal, and the second switch tube is turned on or off based on the second control signal; as well as A capacitor having a first end and a second end, wherein the first end is coupled to the second end of the second switch tube, and the second end is coupled to a common end of the high-side gallium nitride switch and the low-side gallium nitride switch, wherein a voltage of the common end of the high-side gallium nitride switch and the low-side gallium nitride switch is a switch node voltage; Wherein, when the low-side driving signal is at a low level, the first switch tube is turned off; When the low-side driving signal is at a high level, the first switch tube is turned on; When the low-side driving signal is at a high level and the switch node voltage is less than the reference voltage, the second switch tube is turned on. 2 . The driving circuit according to claim 1 , wherein the first switch tube is a P-type field effect transistor, and the second switch tube is an N-type field effect transistor.

3. The driving circuit according to claim 1, further comprising: The charging control circuit receives a reference voltage, a switch node voltage and a low-side drive signal, and generates a first control signal and a second control signal according to the reference voltage, the switch node voltage and the low-side drive signal to control the on and off of the first switch tube and the second switch tube respectively.

4. The driving circuit according to claim 3, wherein the charging control circuit comprises: A comparison circuit having a first input terminal for receiving a reference voltage, a second input terminal for receiving a switch node voltage, and an output terminal for providing a comparison signal, wherein the comparison circuit generates a comparison signal according to the reference voltage and the switch node voltage; A logic circuit having a first input terminal for receiving a comparison signal and a second input terminal for receiving a low-side drive signal, wherein the logic circuit generates a first signal according to the comparison signal and the low-side drive signal; A first inverter having an input terminal for receiving a first signal and an output terminal for providing a second control signal; as well as The second inverter has an input terminal for receiving the low-side driving signal and an output terminal for providing the first control signal. The driving circuit according to claim 1 , wherein the reference voltage is 2V-3V. 6 . The driving circuit according to claim 1 , wherein the output voltage is lower than the input voltage, the withstand voltage of the first switch tube is 5V-10V, and the withstand voltage of the second switch tube is higher than the input voltage.

7. The driving circuit according to claim 1, wherein the output voltage is greater than the input voltage, the withstand voltage of the first switch tube is 5V-10V, and the withstand voltage of the second switch tube is greater than the output voltage.

8. A gallium nitride switching circuit, comprising: A high-side GaN switch having a source terminal, a drain terminal and a gate terminal; A low-side GaN switch having a source terminal, a drain terminal and a gate terminal, wherein the drain terminal of the low-side GaN is coupled to the source terminal of the high-side GaN switch; An inductor, one end of the inductor is coupled to a common end of the high-side gallium nitride switch and the low-side gallium nitride switch; And a driving circuit as claimed in any one of claims 1 to 7. 9 . The switch circuit according to claim 8 , wherein the high-side gallium nitride switch, the low-side gallium nitride switch and the inductor form a buck circuit or a boost circuit.

10. The switch circuit of claim 8, wherein the high-side GaN switch is an N-type field effect transistor.

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