System and method for testing analog switch and ADC unit of mixed signal processing microsystem

Abstract

The invention discloses a system and a method for testing an analog switch and an ADC unit of a mixed signal processing microsystem, and belongs to the field of integrated circuit testing. Comprising an upper computer and a test board. The test board comprises a power supply module, a test signal source module, a display module, a microsystem auxiliary circuit, an external storage module and a mixed signal processing microsystem; the mixed signal processing microsystem comprises an analog switch, an ADC unit, a storage unit and an FPGA unit. The analog switch controls a channel for the ADC unit to receive analog signals; the ADC unit collects an analog signal generated by the test signal source module and converts the analog signal into a digital signal; the FPGA unit controls the analog switch and the ADC unit, reads state information of the ADC unit and collects and processes digital signals output by the ADC unit; the storage unit is used for storing an FPGA configuration program; the external storage module stores test data; the display module displays the test state information; the upper computer controls the test process, reads and processes data in the external storage module, and obtains performance parameters of the ADC unit and the analog switch.

Description

Technical Field

[0001] The invention relates to the field of integrated circuit testing, in particular to a testing system and method for analog switches and ADC units of a mixed signal processing microsystem. Background Art

[0002] With the increasing demand for miniaturization, low power consumption and high reliability of space systems and aircraft, the architecture of using discrete circuits for separate packaging and then board-level interconnection cannot meet the needs of small size, high precision, high density and high reliability of the new generation of aerospace systems. Mixed signal processing microsystems integrating functions such as analog switches, ADCs and FPGAs have become a development trend in this field. With the increase in packaging integration density, the accessibility of internal nodes of the microsystem has decreased, and how to achieve high coverage of internal chip testing after microsystem integration has become a difficult problem. Analog switches and ADC units are both important modules in mixed signal processing microsystems. As interfaces between analog circuits and digital circuits, the performance of analog switches and ADC units directly determines the performance of the microsystem. Therefore, the performance test of analog switches and ADC units in mixed signal processing microsystems is particularly important. Existing patents have not yet conducted research on the performance test of analog switches and ADC units in mixed signal processing microsystems. The performance test of analog switches and ADC units is carried out using ATE equipment, etc., and only analog switches or ADC units can be tested separately. It is difficult to test analog switches and ADC units at the same time, so the test results are not ideal. In addition, ATE equipment is generally large in size, has portability issues, is difficult to move around, can only be tested in fixed locations, and has low flexibility in use. Summary of the invention

[0003] The technical problem solved by the present application is: to overcome the deficiencies of the prior art and propose a test system for analog switches and ADC units of a mixed signal processing microsystem, using the FPGA unit integrated inside the microsystem to complete the test of the performance of the microsystem ADC unit and the analog switch, thus solving the problem of poor accessibility of nodes inside the microsystem and difficulty in conducting tests.

[0004] The patent discloses a test system for analog switches and ADC units of a mixed signal processing microsystem. The analog switch in the microsystem controls the channel through which the ADC receives analog signals. The ADC unit of the microsystem collects the test signal generated by the test signal source module and converts the input signal from an analog signal to a digital signal. The FPGA unit of the microsystem outputs control information to control the analog switch and the ADC unit, reads the status information of the ADC unit of the microsystem, and collects and processes the digital signal output by the ADC unit of the microsystem. The external storage module of the microsystem stores the test data. The display module briefly displays the test status information. The host computer outputs control instructions to control the FPGA unit of the microsystem to complete the test process, reads, stores, displays and further processes the data in the storage unit and the external storage module, and thereby obtains the performance parameters of the ADC unit and the analog switch of the microsystem.

[0005] The technical solutions provided by this application are as follows:

[0006] A test system for analog switches and ADC units of a mixed signal processing microsystem, comprising a host computer and a test board, wherein the test board comprises a test signal source module and an external storage module, and a mixed signal processing microsystem to be tested is connected to the test board, wherein the mixed signal processing microsystem comprises an analog switch, an ADC unit, a storage unit and an FPGA unit;

[0007] The host computer is used to output control instructions to the FPGA unit, to receive test data from the FPGA unit or to read test data stored in an external storage module and to process the test data to obtain performance parameters of the ADC unit and the analog switch;

[0008] The test signal source module is used to generate an analog signal for testing and send the signal to the analog switch;

[0009] The analog switch is used to control the opening and closing of the signal link between the ADC unit and the test signal source module;

[0010] The ADC unit is used to receive the test analog signal transmitted by the test signal source module, perform analog-to-digital conversion, generate a digital signal, and send the digital signal to the FPGA unit;

[0011] A storage unit, connected to the FPGA unit, storing the FPGA configuration program;

[0012] The FPGA unit is used to output analog switch control information to control the opening and closing of the signal channel of the analog switch according to the control instructions issued by the host computer or the preset instructions in the configuration program, and output ADC control information to control the ADC unit to perform analog-to-digital conversion. It is used to collect the digital signal data output by the microsystem ADC unit and the working status data of the ADC unit, and process the digital signal data and the working status data to obtain the performance parameter test data of the microsystem ADC unit and the analog switch and send it to the external storage module for storage, or send the test data directly to the host computer.

[0013] Different mixed signal processing microsystems to be tested are connected to the test board in sequence to achieve the detection of a large batch of mixed signal processing microsystems.

[0014] The test board also includes a display module connected to the FPGA unit. The display module is controlled by the FPGA unit to display test status information on whether the configuration program is successfully loaded and the amount of data stored in the external storage module.

[0015] The test board also includes a microsystem auxiliary circuit, which is used to provide an auxiliary signal for the FPGA unit to enable the FPGA unit to work normally.

[0016] The test board also includes a communication module, which is used for communication between the FPGA unit and the host computer.

[0017] The test board also includes a power supply module, which is used to supply power to the test signal source module, the external storage module, the mixed signal processing microsystem, the display module, the communication module and the microsystem auxiliary circuit.

[0018] A test method for a test system of an analog switch and an ADC unit of a mixed signal processing microsystem, comprising:

[0019] S1, the host computer and the test board are powered on and started;

[0020] S2, the FPGA unit loads the configuration program in the storage unit and prepares for testing;

[0021] S3, the host computer outputs an erase command to erase the external storage module;

[0022] S4, the host computer outputs control instructions to the FPGA, and the FPGA controls the analog switch to open the specified channel;

[0023] S5, the test signal source module outputs a test signal;

[0024] S6, the test signal reaches the ADC unit through the specified channel of the analog switch;

[0025] S7, the ADC unit converts the test signal into a digital signal and sends it to the FPGA unit;

[0026] S8, the FPGA unit performs preliminary processing on the digital signal, reads the ADC status information, generates test data, and stores it in the external memory module;

[0027] S9, check whether the display module shows that the capacity of the external memory module is full. If it is full, the host computer outputs a control instruction to the FPGA to control the analog switch to close the channel. The host computer reads the data in the external memory module and stores it, and then jumps back to S3; if it is not full, proceed to S10;

[0028] S10, judging whether the amount of collected data is sufficient according to the amount of data in the external memory module displayed by the display module, if not, jumping back to S5, if sufficient, entering S11;

[0029] S11, the host computer outputs a control instruction to the FPGA, and the FPGA controls the analog switch to close the channel;

[0030] S12, the host computer reads the data in the external storage module;

[0031] S13, judging whether it is necessary to test other channels of the analog switch, if it is necessary to test other channels, jumping to S3, if it is not necessary to test other channels, jumping to S14;

[0032] S14, the test signal source module stops outputting, and the test system is powered off;

[0033] S15. The host computer further processes the read data and analyzes and compares it with the output signal of the test signal source module to obtain the performance parameters of the ADC unit and the analog switch.

[0034] The beneficial effects of the present invention compared with the prior art are:

[0035] (1) The present invention uses the FPGA unit integrated inside the microsystem to complete the test of the microsystem ADC unit and analog switch performance, which solves the problem that the internal nodes of the microsystem have poor accessibility and are difficult to carry out testing;

[0036] (2) The present invention proposes a test system for analog switches and ADC units of a mixed signal processing microsystem. The system has a display module and a storage module, which can be selected according to needs during use. When the test requirements are low, the display module provided on the test board can be used to briefly display the test status information. When the test requirements are high, the display module can be combined with the host computer to process the test data stored in the storage module, thereby improving the flexibility of the test system. Only the test system and the host computer are required to carry out the test, which is easy to carry and more flexible and portable than ATE equipment, making it convenient to carry out the test work. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 Schematic diagram of the performance testing system of the present invention.

[0038] Figure 2 The present invention is a flow chart of a testing method of a testing system for analog switches and ADC units of a mixed signal processing microsystem according to an embodiment of the present invention. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments disclosed in the present invention will be further described in detail below with reference to the accompanying drawings.

[0040] The present application embodiment discloses a test system for analog switches and ADC units of a mixed signal processing microsystem, such as Figure 1 As shown, the test system includes a test board and a host computer; the test board is responsible for receiving host computer instructions, generating test signals, storing test data, briefly displaying test status information, etc. The test signal is generated by the test signal source, and the test signal is sent to the ADC unit through the analog switch. The ADC unit completes analog-to-digital conversion of the test signal and sends it to the FPGA unit. The FPGA unit controls the on and off of the analog switch and the working state of the ADC unit, reads the microsystem ADC unit state information, receives and processes the digital signal output by the ADC unit, sends the test data to the microsystem storage unit or the external storage unit for storage, and controls the display module to briefly display the test status information; the host computer is responsible for outputting control instructions to control the test process, and reading, storing, displaying and further processing the stored test data, thereby obtaining the performance parameters of the microsystem ADC unit and the analog switch.

[0041] The present invention utilizes the FPGA unit integrated inside the microsystem to complete the test of the ADC unit and the analog switch, thereby solving the problem that the internal nodes of the microsystem have poor accessibility and are difficult to test. In addition, the present invention has its own display module and storage module, and the test status information can be directly displayed by the test board. The test data in the storage module can be read by the host computer for further processing, thereby greatly improving the flexibility of the test.

[0042] like Figure 1 As shown, a performance test system for analog switches and ADC units of a mixed signal processing microsystem mainly includes a host computer and a test board, wherein: the test board includes a power module, a test signal source module, a display module, a microsystem auxiliary circuit, an external storage module and a mixed signal processing microsystem; the mixed signal processing microsystem includes an analog switch, an ADC unit, a storage unit and an FPGA unit.

[0043] Host computer: outputs control instructions to control the test process during the test, receives test data, reads the test data stored in the external storage module, and processes the test data;

[0044] Power module: provides power to other modules and microsystems on the test board;

[0045] Test signal source module: generates analog signals for testing and sends the signals to analog switches;

[0046] Display module: connected to the FPGA unit and controlled by the FPGA unit, briefly displays test status information such as whether the configuration program is loaded successfully and the amount of data stored in the external storage module;

[0047] Microsystem auxiliary circuit: provides auxiliary signals required for the operation of the microsystem, such as clock source and reset signal, and controls the configuration mode of the microsystem FPGA unit when it is working.

[0048] Analog switch: controls the opening and closing of the signal link between the ADC unit and the test signal source module, controls the channel through which the ADC unit receives the analog signal for testing, and turns off the ADC unit when it is not in use to protect the ADC unit;

[0049] ADC unit: receives the test analog signal from the test signal source module, performs analog-to-digital conversion, generates a digital signal, and sends the digital signal to the FPGA unit;

[0050] Storage unit: connected to the FPGA unit to store the FPGA configuration program;

[0051] FPGA unit: During the test, the FPGA unit outputs analog switch control information to control the opening and closing of the analog switch signal channel according to the control instructions issued by the host computer or the preset instructions in the configuration program, outputs ADC control information such as ADC clock and ADC enable signal to control the ADC unit to perform analog-to-digital conversion, collects the digital signal data output by the microsystem ADC unit and the working status data of the ADC unit, and processes the digital signal data and working status data to obtain the performance parameter test data of the microsystem ADC unit and the analog switch and send it to the external storage module for storage, or directly send the test data to the host computer. The FPGA unit can control the display module to briefly display the test status information. When the host computer reads the data in the external storage module, the FPGA unit sends the data in the external storage module to the host computer through the communication module.

[0052] Communication module: connected to the FPGA unit, the communication module is responsible for receiving the control instructions of the host computer to the microsystem, and conveying the control instructions to the microsystem, and is responsible for uploading the performance parameter test data of the microsystem ADC unit and analog switch stored in the external storage module to the host computer through the communication interface for display and storage;

[0053] External storage module: connected to the FPGA unit and used to store test data.

[0054] The test process is controlled by the test instructions output by the host computer;

[0055] The test signal source module contains a 555 timer circuit and an SMA interface. It can generate a test analog signal through the 555 timer circuit, and can also connect an external signal source through the SMA interface to generate a test analog signal.

[0056] The test analog signal may be a sine wave or sawtooth wave signal.

[0057] The communication interface used by the communication module to communicate with the host computer can be an RS422 serial communication interface.

[0058] The storage unit and the external storage module may adopt Flash memory;

[0059] The communication between the FPGA unit and the ADC unit can adopt protocols such as SPI and I2C;

[0060] The display module can use multiple LED lights to display the test status information by turning on and off the LED lights;

[0061] After the FPGA unit obtains the performance parameter test data, it can be directly stored in the external storage module, and the host computer reads the data in the external storage module for processing.

[0062] Based on the above performance testing system, the performance testing method flow chart of the mixed signal processing microsystem analog switch and ADC unit provided by the present invention is as follows: Figure 2 As shown, the specific steps are as follows:

[0063] S1. Power on the test system and start it.

[0064] S2. The FPGA unit loads the configuration program in the storage unit and prepares for testing.

[0065] S3. The host computer outputs an erase instruction to erase the external storage module to ensure that there is no residual data from the previous time in the external storage module.

[0066] S4. The host computer outputs control instructions to the FPGA, and the FPGA controls the analog switch to open the specified channel.

[0067] S5. The test signal source module outputs a sine wave signal as a test signal.

[0068] S6. The test signal reaches the ADC unit through the specified channel of the analog switch.

[0069] S7. The ADC unit converts the test signal into a digital signal and sends it to the FPGA unit.

[0070] S8, FPGA unit performs preliminary processing on the digital signal, reads the ADC status information, generates test data, and stores it in the external memory module.

[0071] S9. Check whether the capacity of the external memory module is full by the display module. If it is full, the host computer outputs a control instruction to the FPGA to control the analog switch to close the channel. The host computer reads the data in the external memory module and stores it, and then jumps back to S3. If it is not full, proceed to S10.

[0072] S10, judging whether the amount of collected data is sufficient according to the amount of data in the external memory module displayed by the display module, if not, jumping back to S5, if sufficient, entering S11.

[0073] S11, the host computer outputs a control instruction to the FPGA, and the FPGA controls the analog switch to close the channel.

[0074] S12, the host computer reads the data in the external storage module.

[0075] S13, judging whether it is necessary to test other channels of the analog switch, if it is necessary to test other channels, jumping to S3, if it is not necessary to test other channels, jumping to S14.

[0076] S14, the test signal source module stops outputting and the test system is powered off.

[0077] S15. The host computer further processes the read data and analyzes and compares it with the output signal of the test signal source module to obtain parameters such as INL, DNL, ​​SNR, SFDR, THD, etc. of the ADC unit, as well as parameters such as the resistivity of the analog switch channel.

[0078] Note: Figure 2 Before the test process shown in the figure begins, the FPGA configuration program has been solidified in the storage unit. During the test, the LED light on the display module must be observed to determine whether the test system is working properly and to obtain test status information such as the amount of data in the external storage module. If there is any abnormality in the system such as the program not being loaded successfully, the test will be terminated immediately.

[0079] The contents not described in detail in this application specification belong to the common knowledge of those skilled in the art.

[0080] The present application is described in detail above in conjunction with specific implementation methods and exemplary examples, but these descriptions cannot be understood as limiting the present application. Those skilled in the art understand that, without departing from the spirit and scope of the present application, a variety of equivalent replacements, modifications or improvements can be made to the technical solution of the present application and its implementation methods, all of which fall within the scope of the present application. The scope of protection of the present application shall be subject to the attached claims.

Claims

1. Test system for analog switches and ADC units of mixed signal processing microsystems, characterized by: It includes a host computer and a test board, the test board includes a test signal source module and an external storage module, and the mixed signal processing microsystem to be tested includes an analog switch, an ADC unit, a storage unit and an FPGA unit; The host computer outputs control instructions to the FPGA unit, receives test data from the FPGA unit or reads test data stored in an external storage module and processes the test data to obtain performance parameters of the ADC unit and the analog switch; The test signal source module generates a test analog signal and sends the test analog signal to the analog switch; the analog switch receives the analog switch control information and controls the opening and closing of the signal link between the ADC unit and the test signal source module according to the analog switch control information; receives the test analog signal and sends the test analog signal to the ADC unit; The ADC unit receives the test analog signal and the ADC control information of the FPGA unit, performs analog-to-digital conversion on the test analog signal according to the ADC control information, generates a digital signal, and sends the digital signal to the FPGA unit; A storage unit, connected to the FPGA unit, storing the FPGA configuration program; The FPGA unit receives the control instructions sent by the host computer, outputs the analog switch control information to the analog switch according to the control instructions or the preset instructions in the configuration program, and outputs the ADC control information to the ADC unit; collects the digital signal data output by the ADC unit and the working status data of the ADC unit, and processes the digital signal data and the working status data to obtain the performance parameter test data of the ADC unit and the analog switch and send it to the external storage module for storage, or sends the test data directly to the host computer.

2. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test board also includes a display module connected to the FPGA unit. The display module is controlled by the FPGA unit to display test status information on whether the configuration program is successfully loaded and the amount of data stored in the external storage module.

3. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test board also includes a microsystem auxiliary circuit, which is used to provide an auxiliary signal for the FPGA unit to enable the FPGA unit to work normally.

4. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test board also includes a communication module, which is used for communication between the FPGA unit and the host computer.

5. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test board also includes a power supply module, which is used to supply power to the test signal source module, the external storage module, the mixed signal processing microsystem, the display module, the communication module and the microsystem auxiliary circuit.

6. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test signal source module includes a 555 timer circuit and an SMA interface, and can generate a test analog signal through the 555 timer circuit, and can also generate a test analog signal by connecting an external signal source through the SMA interface.

7. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The test analog signal is a sine wave and / or a sawtooth wave signal.

8. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The communication module communicates with the host computer using an RS422 serial communication interface; the FPGA unit and the ADC unit communicate using an SPI or I2C protocol.

9. The test system for analog switches and ADC units of a mixed signal processing microsystem according to claim 1, characterized in that: The storage unit and the external storage module adopt Flash memory.

10. The test method of the test system of the mixed signal processing microsystem analog switch and ADC unit according to any one of claims 1 to 9, characterized in that: include: S1, the host computer and the test board are powered on and started; S2, the FPGA unit loads the configuration program in the storage unit and prepares for testing; S3, the host computer outputs an erase command to erase the external storage module; S4, the host computer outputs control instructions to the FPGA, and the FPGA controls the analog switch to open the specified channel; S5, the test signal source module outputs a test signal; S6, the test signal reaches the ADC unit through the specified channel of the analog switch; S7, the ADC unit converts the test signal into a digital signal and sends it to the FPGA unit; S8, the FPGA unit performs preliminary processing on the digital signal, reads the ADC status information, generates test data, and stores it in the external memory module; S9, check whether the display module shows that the capacity of the external memory module is full. If it is full, the host computer outputs a control instruction to the FPGA to control the analog switch to close the channel. The host computer reads the data in the external memory module and stores it, and then jumps back to S3; if it is not full, proceed to S10; S10, judging whether the amount of collected data is sufficient according to the amount of data in the external memory module displayed by the display module, if not, jumping back to S5, if sufficient, entering S11; S11, the host computer outputs a control instruction to the FPGA, and the FPGA controls the analog switch to close the channel; S12, the host computer reads the data in the external storage module; S13, judging whether it is necessary to test other channels of the analog switch, if it is necessary to test other channels, jumping to S3, if it is not necessary to test other channels, jumping to S14; S14, the test signal source module stops outputting, and the test system is powered off; S15. The host computer further processes the read data and analyzes and compares it with the output signal of the test signal source module to obtain the performance parameters of the ADC unit and the analog switch.

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