Substrate structure and preparation method thereof

By providing the substrate structure of the first metal layer, the first material layer and the second semiconductor material layer on the silicon-based substrate, the problem of alloy eutectic during the epitaxial growth of GaN-based materials on the silicon-based substrate is solved, and high-quality epitaxial growth of GaN-based materials is achieved.

CN119920762APending Publication Date: 2025-05-02JADE BIRD DISPLAY (SHANGHAI) LTD
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Patent Information

Application Number
CN202510128537.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-27
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

During the epitaxial growth of GaN-based materials on silicon-based substrates, the alloy eutectic phenomenon of silicon and gallium elements seriously affects the epitaxial growth quality.

Method used

A substrate structure is adopted, including a first metal layer, a first material layer and a second semiconductor material layer. The arrangement of the first material layer can fix the position of the first metal layer on the substrate surface, suppress its migration, thereby avoiding atomic agglomeration and improving the growth quality of the second semiconductor material layer.

Benefits of technology

By fixing the first metal layer, its migration and atomic agglomeration are suppressed, the epitaxial growth quality of the GaN-based material is significantly improved, and the problem of back-melt etching is effectively overcome.

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Abstract

The invention relates to a base structure and a preparation method thereof. The base structure comprises a substrate; the first metal layer is located on the surface of the substrate; the first material layer is located on the surface of the first metal layer; the second semiconductor material layer covers the surface of the first material layer; wherein the material of the first material layer is different from that of the second semiconductor material layer. Through arrangement of the first material layer, the position of the first metal layer on the surface of the substrate can be fixed, migration of the first metal layer on the surface of the substrate can be inhibited, atom aggregation of the first metal layer material can be effectively inhibited, and then the growth quality of the second semiconductor material layer can be effectively guaranteed; and the formation of the high-quality second semiconductor material layer is facilitated, and the remelting etching problem is solved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a substrate structure and a preparation method thereof. Background Art

[0002] GaN-based materials (GaN, InGaN, AlGaN, etc.) are widely used in various electronic devices such as high temperature, high frequency, high power and optoelectronic devices due to their large bandgap (3.37eV) and high breakdown field strength (3.3MV / cm). Therefore, the epitaxial growth of GaN-based materials has attracted much attention.

[0003] Epitaxial growth technology requires a suitable epitaxial substrate. The single crystal material preparation process of GaN-based materials is difficult and the technical cost is high; therefore, the epitaxial growth of GaN-based materials adopts heteroepitaxial growth technology. Currently, the substrates suitable for GaN-based materials mainly include sapphire substrates, silicon carbide substrates, and silicon substrates.

[0004] Among them, silicon-based substrates have the advantages of low price, high quality, good thermal and electrical conductivity, etc., and the single crystal preparation technology of silicon is mature and easy to obtain large size. In addition, silicon-based substrates match the current silicon-based integration process and are easy to integrate with existing semiconductor processes. Therefore, silicon-based growth of GaN-based materials has attracted much attention.

[0005] However, the alloy eutectic phenomenon between silicon and gallium elements seriously affects the epitaxial growth quality of GaN-based materials on silicon-based substrates. Summary of the invention

[0006] The problem solved by the invention is how to reduce defects of GaN-based materials epitaxially grown on a silicon-based substrate to improve the epitaxial growth quality of the GaN-based materials.

[0007] In order to solve the above problems, the present invention provides a substrate structure, comprising:

[0008] A first metal layer;

[0009] A first material layer, located on a surface of the first metal layer;

[0010] The second semiconductor material layer covers the surface of the first material layer; wherein the material of the first material layer is different from the material of the second semiconductor material layer.

[0011] Optionally, the structure of the first material layer is a plurality of first island structures.

[0012] Optionally, adjacent first island structures are separated to expose a portion of the first metal layer.

[0013] Optionally, the material of the first material layer is at least one of silicon nitride, aluminum nitride, magnesium nitride and silicon carbide.

[0014] Optionally, the thickness of the first material layer ranges from 1 nm to 5 nm.

[0015] Optionally, the second semiconductor material layer extends from a surface of the first metal layer exposed by the first island structure to a surface of the first island structure.

[0016] Optionally, the second semiconductor material layer includes a lower layer and an upper layer; the lower layer is embedded in the gap between the first island structures and is at least located on the surface of the first metal layer exposed by the first island structures; and the upper layer is located on the lower layer.

[0017] Optionally, the lower layer includes a plurality of second island structures; the second island structures are located in gaps between adjacent first island structures.

[0018] Optionally, the second island structure protrudes from the top of the first island structure; and the upper layer is also located on the surface of the first island structure.

[0019] Optionally, the second island structure extends in a direction perpendicular to the surface of the first material layer; and the upper layer grows and extends laterally in a direction parallel to the surface of the first material layer.

[0020] Optionally, at least one of the lower layer and the upper layer has a thickness ranging from 1.0 μm to 3.0 μm.

[0021] Optionally, the second semiconductor material layer is made of aluminum nitride or magnesium nitride.

[0022] Optionally, the structure formed by the lower layer and the upper layer is at least one of an aluminum nitride stack, an aluminum nitride / aluminum gallium nitride superlattice stack, an aluminum nitride / gallium nitride superlattice stack, an aluminum nitride / silicon nitride stack, a magnesium nitride stack, a magnesium nitride / magnesium gallium nitride superlattice stack, a magnesium nitride / gallium nitride superlattice stack, and a magnesium nitride / silicon nitride stack.

[0023] Optionally, the first metal layer is at least one of an aluminum layer and a magnesium layer.

[0024] Optionally, the thickness of the first metal layer ranges from 0.3 nm to 1.0 nm.

[0025] Optionally, the base structure further includes:

[0026] A third semiconductor material layer, located on the second semiconductor material layer;

[0027] The fourth semiconductor material layer is located on the third semiconductor material layer; the material of the third semiconductor material layer is different from that of the fourth semiconductor material layer.

[0028] Optionally, the third semiconductor material layer is at least one of an aluminum gallium nitride layer, an aluminum nitride / gallium nitride superlattice layer, an aluminum nitride / aluminum gallium nitride superlattice layer, an aluminum gallium nitride / silicon nitride / magnesium gallium nitride layer, a magnesium nitride / gallium nitride superlattice layer, a magnesium nitride / magnesium gallium nitride superlattice layer, and a magnesium gallium nitride / silicon nitride combined layer.

[0029] Optionally, the third semiconductor material layer contains aluminum, and the aluminum or magnesium content on the side close to the second semiconductor material layer is greater than the aluminum or magnesium content on the side close to the fourth semiconductor material layer.

[0030] Optionally, the thickness of the third semiconductor material layer ranges from 0.2 μm to 0.5 μm; the thickness of the fourth semiconductor material layer ranges from 1.0 μm to 4.0 μm.

[0031] Accordingly, the present invention also provides a method for preparing a substrate structure, comprising:

[0032] providing a first metal layer;

[0033] growing a first material layer on a surface of the first metal layer;

[0034] A second semiconductor material layer is grown on the surface of the first material layer; wherein the material of the first material layer is different from the material of the second semiconductor material layer.

[0035] Optionally, the step of growing a first material layer on the surface of the first metal layer includes: using a silicon source and a nitrogen source.

[0036] Optionally, the step of growing a first material layer on the surface of the first metal layer includes: uniformly growing a plurality of first island structures on the surface of the first metal layer, wherein adjacent first island structures are separated to expose a portion of the first metal layer;

[0037] The step of growing the second semiconductor material layer includes: growing the second semiconductor material layer on the surface of the first metal layer exposed by the first island structure and on the surface of the first island structure;

[0038] The step of growing a second semiconductor material layer on the surface of the first material layer includes:

[0039] growing a layer at least on the surface of the first metal layer exposed by the first island structure;

[0040] growing an upper layer on the surface of the lower layer;

[0041] At least in the step of growing a lower layer on the surface of the first metal layer exposed by the first island structure, the process gas includes: using an aluminum source and a nitrogen source, or a magnesium source and a nitrogen source, so that the upper layer grows in an island shape;

[0042] In the step of growing an upper layer on the surface of the lower layer, the process gas includes: an aluminum source and a nitrogen source, or a magnesium source or a nitrogen source, so that the upper layer grows laterally in a direction parallel to the surface of the substrate.

[0043] Optionally, in the step of growing the first metal layer on the surface of the substrate, the process gas includes: an aluminum source or a magnesium source.

[0044] Optionally, the preparation method further comprises:

[0045] Growing a third semiconductor material layer on the surface of the second semiconductor material layer;

[0046] A fourth semiconductor material layer is grown on the surface of the third semiconductor material layer.

[0047] Optionally, in the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the process gas includes: a gallium source and an aluminum source, or at least one of a gallium source and a magnesium source, and a nitrogen source;

[0048] In the step of growing the fourth semiconductor material layer on the surface of the third semiconductor material layer, the process gas includes: a gallium source and a nitrogen source.

[0049] Optionally, in the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the amount of aluminum source provided at the first moment is greater than the amount of aluminum source provided at the second moment.

[0050] Optionally, in the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the amount of aluminum source introduced is gradually reduced.

[0051] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0052] In the technical solution of the present invention, the base structure includes a substrate, a first metal layer, a first material layer and a second semiconductor material layer; wherein the provision of the first material layer can fix the position of the first metal layer on the substrate surface and inhibit the migration of the first metal layer on the substrate surface, thereby effectively inhibiting the agglomeration of atoms of the first metal layer material, and further effectively ensuring the growth quality of the second semiconductor material layer, which is conducive to the formation of a high-quality second semiconductor material layer and is conducive to overcoming the problem of melt-back etching.

[0053] In the optional solution of the present invention, the thickness of the first material layer ranges from 1nm to 5nm. If the thickness of the first material layer is too small, the number of first island structures in the first material layer is too small and unevenly distributed, which may affect its function of fixing the position of the first metal layer and inhibiting the migration of the first metal layer; if the thickness of the first material layer is too large, the number of first island structures in the first material layer is too large, the distance between adjacent first island structures is too small, or even adjacent first island structures are connected, the first metal layer cannot be exposed, and a uniform nucleation point cannot be provided for the subsequent growth of the second semiconductor material layer, which may affect the nucleation and growth of the second semiconductor material layer on the surface of the first material layer.

[0054] In the optional scheme of the present invention, the material of the first material layer includes at least one of silicon nitride, magnesium nitride and silicon carbide; the second semiconductor material layer is at least one of aluminum nitride, aluminum nitride / aluminum gallium nitride superlattice stacking, aluminum nitride / gallium nitride superlattice stacking, aluminum nitride / silicon nitride stacking, magnesium nitride stacking, magnesium nitride / magnesium gallium nitride superlattice stacking, magnesium nitride / gallium nitride superlattice stacking, and magnesium nitride / silicon nitride stacking. The material of the first material layer is determined based on the materials of the first metal layer and the second semiconductor material layer, so that when forming the first material layer, the introduction of impurity elements is avoided, the process is simple, and on the premise of providing a high-quality growth foundation, the process risk can be effectively reduced and the device stability can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The technical solutions and other beneficial effects of the present invention will be made apparent by describing the specific embodiments of the present invention in detail below in conjunction with the accompanying drawings.

[0056] Figure 1 is a schematic cross-sectional structure diagram of an embodiment of a substrate structure of the present invention;

[0057] Figure 2 yes Figure 1 An enlarged structural schematic diagram of the interface between the first metal layer, the first material layer and the second semiconductor material layer in the substrate structure embodiment shown;

[0058] Figure 3 It is a schematic flow chart of a method for preparing a substrate structure according to an embodiment of the present invention.

[0059] Reference numerals: 110 —substrate, 120 —first metal layer, 130 —first material layer, 131 —first island structure, 140 —second semiconductor material layer, 141 —lower layer, 141a —second island structure, 142 —upper layer, 150 —third semiconductor material layer, and 160 —fourth semiconductor material layer. DETAILED DESCRIPTION

[0060] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0061] The disclosure of the present application provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described in the present application. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0062] Typically, the term can be understood at least in part according to the usage of the above application. For example, the term "one or more" used in the present application depends at least in part on the above application, and can be used to describe any component, structure or feature in the singular, or can be used to describe the combination of components, structures or features in the plural. Similarly, terms such as "one", "one" or "the" can also be understood at least in part to convey singular usage or convey plural usage depending on the above application. In addition, the term "based on..." can be understood as not necessarily intended to convey a set of exclusive factors, but at least in part depending on the above application can instead allow the presence of additional factors that do not necessarily have to be clearly described.

[0063] It should be easily understood that the meaning of “on,” “over,” and “on” in the present application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween, and “on something” or “on something” not only means “on something” or “on something,” but also includes the meaning of “on something” or “on something” without any intermediate components or layers therebetween.

[0064] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component as shown in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented, rotated 90 degrees or at other orientations, and the spatially relative descriptors used herein may be likewise interpreted accordingly.

[0065] The term "layer" as used in this application refers to a material portion including an area with a certain thickness. A layer may extend over the entire underlying or superstructure, or may have a degree less than the extent of the underlying or superstructure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers.

[0066] As can be seen from the background technology, in the prior art, epitaxial growth of GaN-based materials on silicon-based substrates is prone to serious alloy eutectic phenomenon, which affects the quality of epitaxial growth.

[0067] Silicon (Si) and gallium (Ga) are prone to alloy eutectic under high temperature conditions (about 850°C), which is also called "melt-back etching" reaction. This "melt-back etching" reaction is due to the eutectic melting of silicon and gallium under high temperature conditions, making it impossible for the two to maintain a crystalline state under high temperature conditions, thus causing the quality of the epitaxial structure to deteriorate.

[0068] In order to overcome the problem of melt-back etching, a transition layer that does not contain gallium elements needs to be set on the silicon-based substrate on which the GaN-based material is epitaxially grown. At the same time, the transition layer can also play a role in defect control and stress control. Among them, aluminum nitride is considered to be the most suitable transition layer material. A key technology for growing an aluminum nitride transition layer on a silicon-based substrate is the pre-aluminum (Pre-Al) technology, which is to form an auxiliary growth aluminum layer between the substrate and the transition layer, while isolating the silicon-based substrate from the nitrogen source introduced by the growth of aluminum nitride, and acting as a nucleation center.

[0069] However, aluminum elements tend to migrate rapidly on the substrate surface under high temperature conditions, resulting in atomic agglomeration. The atomically agglomerated aluminum layer can hardly provide a good surface for the growth of the aluminum nitride transition layer, resulting in deterioration of the quality of the aluminum nitride transition layer and the quality of the epitaxial film layer.

[0070] In order to solve the technical problem, the present invention provides a base structure, comprising: a first metal layer, located on the surface of the substrate; a first material layer, located on the surface of the first metal layer; a second semiconductor material layer, covering the surface of the first material layer; wherein the material of the first material layer is different from the material of the second semiconductor material layer. Here, any substrate may also be included for carrying the first metal layer;

[0071] According to the technical solution of the present invention, the setting of the first material layer can fix the position of the first metal layer and inhibit the migration of the first metal layer. For example, the position of the first metal layer on the surface of the substrate can be fixed to inhibit the migration of the first metal layer on the surface of the substrate, thereby effectively inhibiting the agglomeration of atoms of the first metal layer material, and further effectively ensuring the growth quality of the second semiconductor material layer, which is conducive to the formation of a high-quality second semiconductor material layer and overcoming the problem of melt-back etching.

[0072] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0073] refer to Figure 1 , showing a schematic cross-sectional structure diagram of an embodiment of a substrate structure of the present invention.

[0074] The base structure includes:

[0075] A first metal layer 120;

[0076] The first material layer 130 is located on the surface of the first metal layer 120;

[0077] The second semiconductor material layer 140 covers the surface of the first material layer 130; wherein the material of the first material layer 130 is different from the material of the second semiconductor material layer 140. Figure 1 In the example, the first metal layer 120 is located on a surface of a substrate 110 .

[0078] In some embodiments, in conjunction with reference Figure 2 , showing Figure 1 The enlarged structural diagram of the interface between the first metal layer 120, the first material layer 130 and the second semiconductor material layer 140 in the substrate structure embodiment is shown. The first material layer 130 is located on the surface of the first metal layer 120, and the first material layer 130 is in direct contact with the surface of the first metal layer 120 to fix the position of the first metal layer 120, inhibit the migration of the material of the first metal layer 120 on the surface of the substrate 110, and avoid the agglomeration of the material of the first metal layer 120, thereby ensuring the flat state of the first metal layer 120, for example, flat on the surface of the substrate 110, providing a high-quality growth foundation for the subsequent growth of materials.

[0079] The technical solution of the substrate structure embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

[0080] The substrate 110 is used to provide mechanical support.

[0081] In some embodiments, the substrate 110 can be any substrate, such as a silicon-based substrate, a glass-based substrate, an organic substrate, and the like. The preparation technology of silicon single crystals is mature, so silicon-based substrates are low-priced and high-quality, and silicon-based substrates also have advantages such as good thermal conductivity and electrical conductivity, easy to achieve large size, and easy to be removed. In some embodiments, the substrate 110 is a silicon (111) substrate, that is, the surface of the substrate 110 is the (111) plane of silicon. The (111) plane of silicon is an atomically densely packed plane with a lattice arrangement similar to that of GaN-based materials. The first metal layer 120 can provide a nucleation center for subsequent material growth. Furthermore, the first metal layer 120 can also be used to isolate the surface of the substrate 110 to prevent the material of the substrate 110 from being exposed to the growth environment of the subsequent material.

[0082] In some embodiments, the first metal layer 120 is fully covered, and the first metal layer 120 completely covers the surface of the substrate 110, so as to prevent the surface of the substrate 110 from being exposed to the growth environment of subsequent materials.

[0083] In some embodiments, the first metal layer 120 is at least one of an aluminum layer and a magnesium layer.

[0084] In an example, the first metal layer 120 is at least one or two of an aluminum layer and a magnesium layer; the substrate structure is configured as a growth substrate containing a Ga-based epitaxial structure; the epitaxial structure is a Ga-based epitaxial structure; and a first material layer 130 and a second semiconductor material layer 140 are arranged on the first metal layer 120.

[0085] In some embodiments, the thickness of the first metal layer 120 is in the range of 0.3 nm to 1.0 nm. If the thickness of the first metal layer 120 is too small, it is difficult to ensure that the first metal layer 120 covers the surface of the substrate 110 and it is difficult to ensure the isolation of the surface of the substrate 110; if the thickness of the first metal layer 120 is too large, the material of the first metal layer 120 is prone to rapid migration on the surface of the substrate 110 at high temperature, and the first metal layer 120 is prone to atomic agglomeration, resulting in deterioration of the surface structure.

[0086] The first material layer 130 is used to inhibit the migration of the material of the first metal layer 120 on the surface of the substrate 110 to prevent the material of the first metal layer 120 from agglomerating atoms.

[0087] refer to Figure 2 In some embodiments, the first material layer 130 (reference Figure 1) includes: a plurality of first island structures 131, the plurality of first island structures 131 are evenly or unevenly distributed on the surface of the first metal layer 120, and adjacent first island structures 131 are separated to expose a portion of the first metal layer 120.

[0088] In some embodiments, the first island structure 131 is located on the surface of the first metal layer 120 and is in direct contact with the first metal layer 120 to fix the position of the first metal layer 120 on the surface of the substrate 110 and inhibit the migration of the material of the first metal layer 120 on the surface of the substrate 110 .

[0089] In some embodiments, at least part or all of the adjacent first island structures 131 are separated to expose part of the first metal layer 120 . The exposed first metal layer 120 can provide a nucleation point for the subsequent growth of the second semiconductor material layer 140 , thereby preventing the first material layer 130 from affecting the nucleation of the subsequent second semiconductor material layer 140 .

[0090] For example, the first island structures 131 are evenly distributed on the surface of the first metal layer 120, so that the gaps between adjacent first island structures 131 are also evenly distributed, and the first metal layer 120 exposed by the first island structures 131 is also evenly distributed, which can provide evenly distributed nucleation points for the subsequent growth of the second semiconductor material layer 140, and can effectively improve the quality of the formed second semiconductor material layer 140.

[0091] In some embodiments, the material of the first material layer 130 includes at least one of silicon nitride, aluminum nitride, magnesium nitride, and silicon carbide.

[0092] For example, the material of the first material layer 130 is silicon nitride; the material of the first material layer 130 is set based on the materials of the substrate 110 and the second semiconductor material layer 140, which can avoid introducing impurity elements while forming the first material layer 130. The process is simple and can effectively reduce process risks and improve device stability while providing a high-quality growth foundation.

[0093] In some embodiments, the thickness of the first material layer 130 is in the range of 1 nm to 5 nm. If the thickness of the first material layer is too small, the number of the first island structures 131 in the first material layer 130 is too small and unevenly distributed, which may affect its function of fixing the position of the first metal layer 120 and inhibiting the migration of the first metal layer 120; if the thickness of the first material layer 130 is too large, the number of the first island structures 131 in the first material layer 130 is too large, the distance between adjacent first island structures 131 is too small, or even adjacent first island structures 131 are connected, and the first metal layer 120 cannot be exposed, and uniformly distributed nucleation points cannot be provided for the subsequent growth of the second semiconductor material layer 140, which may affect the growth of the nucleation points of the second semiconductor material layer 140.

[0094] refer to Figure 2 In some embodiments, in the first material layer 130, at least part or all of the adjacent first island structures 131 are separated to expose part of the first metal layer 120; the second semiconductor material layer 140 extends from the surface of the first metal layer 120 exposed by the first island structure 131 to the surface of the first island structure 131.

[0095] In some embodiments, the portion of the first metal layer 120 exposed by the first island structure 131 can provide a nucleation point for the growth of the second semiconductor material layer 140 .

[0096] For example, the first island structure 131 is evenly distributed on the surface of the first metal layer 120, and the portion of the first metal layer 120 exposed by the first island structure 131 is also evenly distributed, thereby providing evenly distributed nucleation points for the growth of the second semiconductor material layer 140, effectively improving the growth quality of the second semiconductor material layer 140, and effectively reducing the occurrence of melt-back etching problems.

[0097] The second semiconductor material layer 140 does not contain gallium element, so as to achieve isolation between the substrate 110 material and the epitaxial structure material; in addition, the second semiconductor material layer 140 can also play a role in defect control and stress control.

[0098] For example, when the second semiconductor material layer 140 is formed, the first material layer 130 is formed on the first metal layer 120, and the first metal layer 120 is fixed to the surface of the substrate 110 by the first material layer 130. The first metal layer 120 is difficult to migrate on the surface of the substrate 110, and the first metal layer 120 is not prone to atomic agglomeration; the second semiconductor material layer 140 has a better growth surface, and the second semiconductor material layer 140 has better quality, which can provide a good growth foundation for the subsequent growth of the epitaxial structure.

[0099] In some embodiments, the material of the second semiconductor material layer 140 is aluminum nitride or magnesium nitride.

[0100] In other embodiments, the second semiconductor material layer 140 includes: a lower layer 141 and an upper layer 142 , the lower layer 141 is located below the upper layer 142 . In this embodiment, the upper layer 142 is located between the lower layer 141 and the first material layer 130 .

[0101] The lower layer 141 can provide a growth basis for the formation of the upper layer 142 , and the lower layer 141 can also achieve defect control and stress control through structural relaxation and stress release.

[0102] In some embodiments, the first material layer 130 (refer to Figure 1 ) has a plurality of island structures separated from each other. Preferably, the first island structures 131 are evenly distributed and separated from each other.

[0103] refer to Figure 2 The lower layer 141 is embedded in the gaps between the first island structures 131 and is at least located on the surface of the first metal layer 120 exposed by the first island structures 131 .

[0104] In some embodiments, the lower layer 141 includes: a plurality of second island structures 141a, the second island structures 141a are located in the gaps between adjacent first island structures 131, that is, the second island structures 141a are at least located in the surface gaps of the first metal layer 120 between adjacent first island structures 131. The second island structures 141a grow in an island-like pattern with the first metal layer 120 exposed by the first island structures 131 as nucleation points.

[0105] Example, reference Figure 2 The second island structure 141a is located on the surface of the first metal layer 120 exposed by the first island structure 131 and directly contacts the surface of the first metal layer 120. The lower layer 141 and the first material layer 130 (reference Figure 1 ) are meshed with each other.

[0106] It should be noted that Figure 2 In the illustrated embodiment, the plurality of second island structures 141a of the lower layer 141 are separated from each other, the second island structures 141a do not contact each other on the side away from the first metal layer 120, and the first island structures 131 and the second island structures 141a are alternately distributed. In other embodiments of the present invention, the second island structures 141a may also extend onto the first island structures 131, and even on the side away from the first metal layer 120, adjacent second island structures 141a may contact and connect with each other.

[0107] The upper layer 142 can fill the undulations on the surface of the lower layer 141 and provide a better growth surface for subsequent materials.

[0108] In some embodiments, the second island structure 141a protrudes from the top of the first island structure 131, that is, the height of the second island structure 141a along the direction vertical to the surface of the substrate 110 is higher than the height of the protruding first island structure 131, and the upper layer is also located on the surface of the first island structure.

[0109] In some embodiments, the lower layer 141 has a plurality of second island structures 141a that are in direct contact with the surface of the first metal layer 120 exposed by the first island structures 131; Figure 2 The upper layer 142 is located on the plurality of second island structures 141 a and extends onto the first island structures 131 .

[0110] For example, Figure 2In the illustrated embodiment, the plurality of second island structures 141a of the lower layer 141 are separated from each other; the upper layer 142 extends from the surface of the second island structure 141a to the surface of the first island structure 131, and is in direct contact with the surface of the second island structure 141a and the surface of the first island structure 131. In other embodiments of the present invention, the second island structure 141a extends to the first island structure 131, and even adjacent second island structures 141a may be connected to each other, and the upper layer 142 extends from the surface of the second island structure 141a to cover the entire substrate 110.

[0111] In some embodiments, the second island structure 141 a extends in a direction perpendicular to the surface of the first material layer 130 ; the upper layer 142 grows and extends in a lateral direction parallel to the surface of the first material layer 130 .

[0112] For example, the second island structure 141a in the lower layer 141 extends in a direction perpendicular to the surface of the first material layer 130. The second island structure 141a is perpendicular to the first material layer 130 (refer to Figure 1 ) of the surface direction island-shaped coarse structure; the upper layer 142 is parallel to the first material layer 130 (reference Figure 1 ) is a smooth layer extending transversely to the surface direction of the .

[0113] In some embodiments, at least one of the lower layer 141 and the upper layer 142 has a thickness ranging from 1.0 μm to 3.0 μm. The thickness of the lower layer 141 is appropriate, which can provide a sufficient growth surface for the growth of the upper layer 142, and can also effectively achieve structural relaxation and stress release, and can effectively ensure its defect control and stress control functions. The thickness of the upper layer 142 is appropriate, which can effectively reduce the undulations on the surface of the lower layer 141, and provide a flat and good growth foundation for the growth of subsequent materials.

[0114] In some embodiments, the structure formed by the second semiconductor material layer 140, i.e., the lower layer 141 and the upper layer 142, is at least one of an aluminum nitride stack, an aluminum nitride / aluminum gallium nitride superlattice stack, an aluminum nitride / gallium nitride superlattice stack, an aluminum nitride / silicon nitride stack, a magnesium nitride stack, a magnesium nitride / magnesium gallium nitride superlattice stack, a magnesium nitride / gallium nitride superlattice stack, and a magnesium nitride / silicon nitride stack.

[0115] For example, the material of the second semiconductor material layer 140 is aluminum nitride. The second semiconductor material layer 140 uses an aluminum nitride stack, and the in-plane lattice constant of the aluminum nitride stack is smaller than that of gallium nitride. The lattice mismatch between the aluminum nitride stack and gallium nitride can introduce a certain compressive stress to offset the tensile stress generated in the subsequent cooling process, thereby playing a role in defect control and stress control.

[0116] The second semiconductor material layer 140 and the first material layer 130 are made of different materials. The second semiconductor material layer 140 and the first material layer 130 are made of different materials, the first material layer blocks the metal elements in the first metal layer from diffusing into the second semiconductor material layer, and the material of the second semiconductor material layer contains the metal elements of the first metal layer.

[0117] Continue to refer Figure 1 In some embodiments, the substrate structure also includes: a third semiconductor material layer 150 and a fourth semiconductor material layer 160; the third semiconductor material layer 150 is located on the surface of the second semiconductor material layer 140 away from the first material layer 130; the fourth semiconductor material layer 160 is located on the surface of the third semiconductor material layer 150 away from the second semiconductor material layer 140, and the material of the third semiconductor material layer 150 is different from that of the fourth semiconductor material layer 160.

[0118] A substrate 110 , a first metal layer 120 , a first material layer 130 , a second semiconductor material layer 140 , a third semiconductor material layer 150 , and a fourth semiconductor material layer 160 arranged from bottom to top are formed.

[0119] The third semiconductor material layer 150 is used to achieve transition and relaxation of the composition and structure of the second semiconductor material layer 140 to the subsequent epitaxial structure.

[0120] In some embodiments, the aluminum content of the third semiconductor material layer 150 near the second semiconductor material layer 140 is greater than the aluminum content near the fourth semiconductor material layer 160. The greater aluminum content allows the third semiconductor material layer 150 near the second semiconductor material layer 140 to be better connected with the second semiconductor material layer 140, thereby achieving transition and relaxation between different components and structures.

[0121] Preferably, the third semiconductor material layer 150 is at least one of an aluminum gallium nitride layer, an aluminum nitride / gallium nitride superlattice layer, an aluminum nitride / aluminum gallium nitride superlattice layer, an aluminum gallium nitride / silicon nitride, a magnesium gallium nitride layer, a magnesium nitride / gallium nitride superlattice layer, a magnesium nitride / magnesium gallium nitride superlattice layer, and a magnesium gallium nitride / silicon nitride combination layer.

[0122] For example, the third semiconductor material layer 150 is an aluminum gallium nitride layer; the substrate structure serves as a growth substrate for a GaN-based epitaxial structure; the second semiconductor material layer 140 is an aluminum nitride stack; the aluminum gallium nitride layer can achieve transition and relaxation of composition and materials between the second semiconductor material layer 140 and the epitaxial structure.

[0123] For example, in some embodiments, in the third semiconductor material layer 150 , the aluminum content gradually decreases along a direction away from the second semiconductor material layer 140 .

[0124] In some embodiments, the third semiconductor material layer 150 can achieve good structural relaxation between the growth substrate and the epitaxial structure, reducing the dislocation density in the epitaxial structure; it can also achieve stress release during the process and reduce the occurrence of cracking in the epitaxial structure.

[0125] In some embodiments, the thickness of the third semiconductor material layer 150 is in the range of 0.2 μm to 0.5 μm. The thickness of the third semiconductor material layer 150 is appropriate to ensure its quality and the effects of structural relaxation and stress release.

[0126] The fourth semiconductor material layer 160 can well realize the transition between the third semiconductor material layer 150 and the subsequent epitaxial structure. The fourth semiconductor material layer 160 has a relatively high thermal expansion coefficient and can reduce the mismatch caused by the cooling of the epitaxial structure growth.

[0127] In some embodiments, the fourth semiconductor material layer 160 is an epitaxial material required according to different requirements. In some embodiments, the fourth semiconductor material layer 160 is a semiconductor material containing gallium, which can achieve good structural relaxation between the growth substrate and the epitaxial structure, reduce the dislocation density in the epitaxial structure; and can also achieve stress release during the process and reduce the occurrence of cracking of the epitaxial structure. For example, the fourth semiconductor material layer 160 is but not limited to a gallium nitride layer; the substrate structure serves as a growth substrate for a GaN-based epitaxial structure; the gallium nitride layer can achieve transition and relaxation of components and materials between the third semiconductor material layer 150 and the epitaxial structure.

[0128] In some embodiments, the thickness of the fourth semiconductor material layer 160 ranges from 1.0 μm to 4.0 μm. The thickness of the fourth semiconductor material layer 160 is appropriate, which can ensure the structural transition between the epitaxial structure and the epitaxial structure while ensuring its own quality, and improve the mismatch problem caused by reducing the temperature of the epitaxial structure growth. Figure 3 , Figure 3 The schematic flow diagram of the preparation method of the above substrate structure is shown in FIG. It should be noted that the following only takes one material of each layer as an example, which is not intended to limit the protection scope of the present invention. The following method of the present invention can be applied to any of the above substrate structures.

[0129] Combined with reference Figure 1 , the preparation method comprises:

[0130] Step S110, providing a first metal layer 120;

[0131] Step S120 , growing a first material layer 130 on the surface of the first metal layer 120 ;

[0132] In step S130 , a second semiconductor material layer 140 is grown on the surface of the first material layer 130 ; wherein the material of the first material layer 130 is different from the material of the second semiconductor material layer 140 .

[0133] In some embodiments, step S110 further includes providing a substrate 110 and forming a first metal layer 120 on the substrate 110. In some embodiments, the substrate 110 is a silicon-based substrate. The preparation technology of silicon single crystals is mature, so silicon-based substrates are low-priced and high-quality, and silicon-based substrates also have advantages such as good thermal conductivity and electrical conductivity, easy to achieve large size, and easy to be removed. In some embodiments, the silicon-based substrate 110 is a silicon (111) substrate, that is, the surface of the substrate 110 is the (111) plane of silicon. The (111) plane of silicon is an atomically densely packed plane with a lattice arrangement similar to that of GaN-based materials. For a more specific description of the substrate 110, please refer to the description of the above-mentioned base structure, which will not be repeated here.

[0134] The first metal layer 120 is used to isolate the surface of the substrate 110 to prevent the material of the substrate 110 from being exposed to the growth environment of the subsequent material; in addition, the first metal layer 120 can also provide a nucleation center for the subsequent material growth. The process gas may include, but is not limited to: an aluminum source or a magnesium source. The temperature can be set in the range of 1000°C to 1060°C, and the pressure can be set in the range of 50Torr to 200Torr. The first metal layer 120 is at least one of an aluminum layer and a magnesium layer.

[0135] In some embodiments, in the step of growing the first metal layer 120 on the surface of the substrate 110, the process time is in the range of 7s to 15s. The process time of growing the first metal layer 120 on the surface of the substrate 110 is set appropriately, so that the grown first metal layer 120 can completely cover the surface of the substrate 110, avoid the surface of the substrate 110 from being exposed to the growth environment of subsequent materials, and can also reduce the migration of the material of the first metal layer 120 on the surface of the substrate 110, and reduce the atomic agglomeration phenomenon in the first metal layer 120. Preferably, the process time is in the range of 7s to 15s, so that the thickness of the first metal layer 120 is formed in the range of 0.3nm to 1.0nm.

[0136] Continue to refer Figures 1 to 3 After growing the first metal layer 120 , step S120 is performed to grow a first material layer 130 on the surface of the first metal layer 120 to inhibit the migration of the material of the first metal layer 120 and to avoid atomic agglomeration of the material of the first metal layer 120 .

[0137] For example, the first material layer 130 is grown on the surface of the first metal layer 120, and the first material layer 130 is in direct contact with the surface of the first metal layer 120 to fix the position of the first metal layer 120, inhibit the migration of the material of the first metal layer 120 on the surface of the substrate 110, avoid the agglomeration of the material of the first metal layer 120, and ensure that the first metal layer 120 is flat, for example, flat on the surface of the substrate 110, to provide a high-quality growth foundation for the growth of subsequent materials.

[0138] refer to Figure 2 In some embodiments, step S120, the step of growing the first material layer 130 on the surface of the first metal layer 120 includes: uniformly growing a plurality of first island structures 131 on the surface of the first metal layer 120, and adjacent first island structures 131 are separated to expose a portion of the first metal layer 120.

[0139] The first island structure 131 is grown on the surface of the first metal layer 120 and is in direct contact with the first metal layer 120 to fix the position of the first metal layer 120 and inhibit the migration of the material of the first metal layer 120 .

[0140] At least part or all of the adjacent first island structures 131 are separated to expose part of the first metal layer 120 . The exposed first metal layer 120 can provide a nucleation point for the subsequent growth of the second semiconductor material layer 140 , thereby preventing the first material layer 130 from affecting the nucleation of the subsequent second semiconductor material layer 140 .

[0141] Moreover, the first island structures 131 grow uniformly on the surface of the first metal layer 120, so that the gaps between adjacent first island structures 131 are also uniformly distributed. The first metal layer 120 exposed by the first island structures 131 is uniformly distributed, which can provide uniformly distributed nucleation points for the subsequent growth of the second semiconductor material layer 140, and can effectively improve the quality of the formed second semiconductor material layer 140.

[0142] In some embodiments, in step S120, in the step of growing the first material layer 130 on the surface of the first metal layer 120, the process time is in the range of 15s to 5min. The process time setting of growing the first material layer 130 on the surface of the first metal layer 120 is appropriate, the number of the grown first island structures 131 is appropriate, and the distribution is uniform, which can effectively ensure its function of fixing the position of the first metal layer 120 and inhibiting the migration of the first metal layer 120; the gap size between adjacent first island structures 131 is appropriate and evenly distributed, and the exposed first metal layer 120 is of appropriate size and evenly distributed, which can well provide uniformly distributed nucleation points for the subsequent growth of the second semiconductor material layer 140, and can effectively ensure the nucleation and growth of the subsequent second semiconductor material layer 140.

[0143] For example, in the step of growing the first material layer 130 on the surface of the first metal layer 120 , the process time is in the range of 15 s to 5 min, so that the thickness of the first material layer 130 is in the range of 1 nm to 5 nm.

[0144] In some embodiments, in step S130, in the step of growing the first material layer 130 on the surface of the first metal layer 120, the process gas includes: a silicon source and a nitrogen source, the temperature is set in the range of 1000° C. to 1100° C., and the pressure is set in the range of 50 Torr to 200 Torr. The material of the first material layer 130 includes at least one of silicon nitride, magnesium nitride and silicon carbide.

[0145] For example, the material of the first material layer 130 is silicon nitride; the first material layer 130 made of silicon nitride is grown by a silicon source and a nitrogen source, which can avoid introducing impurity elements while forming the first material layer, and the process is simple. On the premise of providing a high-quality growth foundation, it can effectively reduce process risks and improve device stability. In addition, the growth process conditions are reasonably controlled to make the first material layer 130 grow in an island mode on the surface of the first metal layer 120, forming a first material layer 130 having a plurality of uniformly distributed first island structures 131.

[0146] Continue to refer Figures 1 to 3 After the first material layer 130 is grown on the surface of the first metal layer 120 , step S130 is performed to grow a second semiconductor material layer 140 on the surface of the first material layer 130 .

[0147] The second semiconductor material layer 140 does not contain gallium element, so as to achieve isolation between the substrate 110 material and the epitaxial structure material; in addition, the second semiconductor material layer 140 can also play a role in defect control and stress control.

[0148] Execute step S140. During the process of growing the second semiconductor material layer 140 on the surface of the first material layer 130, the first material layer 130 is grown on the first metal layer 120. The first metal layer 120 is fixed to the surface of the substrate 110 by the first material layer 130. The first metal layer 120 is difficult to migrate on the surface of the substrate 110, and atomic agglomeration is not easy to occur in the first metal layer 120. The second semiconductor material layer 140 has a better growth surface, and the second semiconductor material layer 140 has better quality, which can provide a good growth foundation for the subsequent growth of the epitaxial structure.

[0149] refer to Figure 2In some embodiments, in the step of growing the first material layer 130, the grown first island structure 131 exposes a portion of the first metal layer 120; step S140 is executed, and in the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130, the second semiconductor material layer 140 is grown on the surface of the first metal layer 120 exposed by the first island structure 131 and on the surface of the first island structure 131.

[0150] Step S140, in the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130, the first metal layer 120 exposed by the first island structure 131 is used as a nucleation point for growth. The first island structure 131 is evenly distributed on the surface of the first metal layer 120, and the first metal layer 120 exposed by the first island structure 131 is also evenly distributed. In the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130, the growth is carried out with evenly distributed nucleation points, which can effectively improve the growth quality of the second semiconductor material layer 140 and effectively reduce the occurrence of melt-back etching problems.

[0151] In some embodiments, step S140 is performed, and in the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130, an aluminum source and a nitrogen source, or a magnesium source and a nitrogen source, so that the second semiconductor material layer 140 formed is at least one of an aluminum nitride stack, an aluminum nitride / aluminum gallium nitride superlattice stack, an aluminum nitride / gallium nitride superlattice stack, an aluminum nitride / silicon nitride stack, a magnesium nitride stack, a magnesium nitride / magnesium gallium nitride superlattice stack, a magnesium nitride / gallium nitride superlattice stack, and a magnesium nitride / silicon nitride stack.

[0152] For example, the in-plane lattice constant mismatch in the second semiconductor material layer 140 stack produces a lattice mismatch between the interfaces of the stack, which can introduce a certain compressive stress to offset the tensile stress generated in the subsequent cooling process, thereby playing a role in defect control and stress control.

[0153] In some embodiments, step S130 is performed, and in the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130, the second semiconductor material layer 140 is formed by MOCVD (Metal-organic Chemical Vapor Deposition). The subsequent epitaxial structure can be grown in the same MOCVD system to achieve in-situ growth, which can effectively reduce time and process costs, and can also effectively ensure process stability and growth quality; and the first metal layer 120 is fixed to the surface of the substrate 110 by the first material layer 130. In the process of forming the second semiconductor material layer 140 by MOCVD, the first metal layer 120 is difficult to migrate and atom agglomeration occurs even under the high temperature conditions of MOCVD, so that the first metal layer 120, the first material layer 130 and the second semiconductor material layer 140 are all of high quality.

[0154] In some embodiments, in step S130, the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130 includes:

[0155] Growing a lower layer 141 on the first material layer 130;

[0156] The upper layer 142 is grown on the lower layer 141 .

[0157] The lower layer 141 can provide a growth basis for the formation of the upper layer 142 , and the lower layer 141 can also achieve defect control and stress control through structural relaxation and stress release.

[0158] refer to Figure 2 In some embodiments, in the step of growing the second semiconductor material layer 140, the portion of the first metal layer 120 exposed by the first island structure 131 is used as a nucleation point for growth; step S140, the step of growing the second semiconductor material layer 140 on the surface of the first material layer 130 includes: growing a lower layer 141 at least on the surface of the first metal layer 120 exposed by the first island structure 131, that is, the lower layer 141 is embedded in the gap between the first island structures 131; and growing an upper layer 142 on the surface of the lower layer 141.

[0159] Example, reference Figure 2 The step of growing the lower layer 141 at least on the surface of the first metal layer 120 exposed by the first island structure 131 includes: forming a plurality of second island structures 141a with the first metal layer 120 exposed by the first island structure 131 as the nucleation point, and the second island structure 141a is located at least on the surface of the first metal layer 120 between adjacent first island structures 131.

[0160] Example, reference Figure 2, the first metal layer 120 exposed by the first island structure 131 is used as a nucleation point to grow the second island structure 141a; the lower layer 141 and the first material layer 130 (reference Figure 1 ) The opposing surfaces mesh with each other.

[0161] It should be noted that Figure 2 In the illustrated embodiment, the grown multiple second island structures 141a are separated from each other, the second island structures 141a are not in contact with each other on the side away from the first metal layer 120, and the first island structures 131 and the second island structures 141a are staggered. In other embodiments of the present invention, the second island structures 141a may also extend onto the first island structures 131, and even on the side away from the first metal layer 120, adjacent second island structures 141a may be in contact with each other.

[0162] In some embodiments, at least in the step of growing the lower layer 141 on the surface of the first metal layer 120 exposed by the first island structure 131, the process gas includes: an aluminum source and a nitrogen source, or a magnesium source and a nitrogen source, the temperature is set in the range of 1030° C. to 1100° C., and the pressure is set in the range of 50 Torr to 200 Torr, so that the roughened layer grows in an island shape along the surface direction perpendicular to the substrate 110. By setting the process temperature and pressure, the roughened layer grows in an island shape along the surface direction perpendicular to the first material layer 130.

[0163] The upper layer 142 can fill the undulations on the surface of the lower layer 141 and provide a better growth surface for subsequent materials.

[0164] In some embodiments, the step of growing the lower layer 141 includes: growing a plurality of second island structures 141 a using the first metal layer 120 exposed by the first island structure 131 as a nucleation point; in the step of growing the upper layer 142 on the surface of the lower layer 141 , growing the upper layer 142 on both the second island structure 141 a and the first island structure 131 .

[0165] In some embodiments, the second island structure 141 a protrudes from the top of the first island structure 131 , that is, the height of the second island structure 141 a in a direction vertical to the surface of the substrate 110 is higher than the height of the second island structure 141 a protruding from the first island structure 131 .

[0166] For example, Figure 2 In the embodiment shown, the grown multiple second island structures 141a are separated from each other; the upper layer 142 extends from the surface of the second island structure 141a to the surface of the first island structure 131, and is in direct contact with the surface of the second island structure 141a and the surface of the first island structure 131. In other embodiments of the present invention, the second island structure 141a extends to the first island structure 131, and even adjacent second island structures 141a can be connected to each other, and the upper layer 142 extends from the surface of the second island structure 141a to cover the first material layer 130.

[0167] In some embodiments, in the step of growing the upper layer 142 on the surface of the lower layer 141, the process gas includes: an aluminum source and a nitrogen source, the temperature is set in the range of 1030° C. to 1100° C., and the pressure is set in the range of 50 Torr to 200 Torr, so that the aluminum nitride smoothing layer grows laterally parallel to the surface direction of the first material layer 130. By setting the process temperature and pressure, the aluminum nitride smoothing layer grows laterally parallel to the surface direction of the first material layer 130.

[0168] Continue to refer Figure 3 In some embodiments, the preparation method further includes: step S150, growing a third semiconductor material layer 150 on the surface of the second semiconductor material layer 140; step S160, growing a fourth semiconductor material layer 160 on the surface of the third semiconductor material layer 150.

[0169] The third semiconductor material layer 150 is used to achieve transition and relaxation of the composition and structure of the second semiconductor material layer 140 to the subsequent epitaxial structure.

[0170] In some embodiments, step S150, in the step of growing the third semiconductor material layer 150 on the surface of the second semiconductor material layer 140, the process gas includes: at least one of a gallium source and an aluminum source and a nitrogen source, or at least one of a gallium source and a magnesium source and a nitrogen source. Preferably, the temperature range used is within 1030°C to 1100°C, and the pressure setting range is within 50Torr to 200Torr. The third semiconductor material layer 150 is at least one of an aluminum gallium nitride layer, an aluminum nitride / gallium nitride superlattice layer, an aluminum nitride / aluminum gallium nitride superlattice layer, an aluminum gallium nitride / silicon nitride, a magnesium gallium nitride layer, a magnesium nitride / gallium nitride superlattice layer, and a magnesium gallium nitride / silicon nitride combination layer. The third semiconductor material layer 150 can achieve transition and relaxation of components and materials between the second semiconductor material layer 140 and the epitaxial structure.

[0171] In some embodiments, in the step of growing the third semiconductor material layer 150 on the surface of the second semiconductor material layer 140, the amount of aluminum source or magnesium source provided at the first moment is greater than the amount of aluminum source or magnesium source provided at the second moment. The first-formed third semiconductor material layer 150 is grown with a larger amount of aluminum source or magnesium source and a smaller amount of gallium source, and the later-formed third semiconductor material layer 150 is grown with a smaller amount of aluminum source or magnesium source and a larger amount of gallium source, so that in the formed third semiconductor material layer 150, the aluminum or magnesium content on the side close to the second semiconductor material layer 140 is greater than the aluminum or magnesium content on the side close to the fourth semiconductor material layer 160. A larger aluminum or magnesium content allows the third semiconductor material layer 150 on the side close to the second semiconductor material layer 140 to be better connected with the second semiconductor material layer 140; a larger gallium content allows the third semiconductor material layer 150 on the side away from the second semiconductor material layer 140 to be better connected with the second semiconductor material layer 140, thereby achieving transition and relaxation between different components and structures.

[0172] For example, in the step of growing the third semiconductor material layer 150 on the surface of the second semiconductor material layer 140 , the amount of aluminum source or magnesium source introduced is gradually reduced so that the aluminum or magnesium content in the third semiconductor material layer 150 gradually decreases along the direction away from the second semiconductor material layer 140 .

[0173] In some embodiments, the third semiconductor material layer 150 can achieve good structural relaxation between the growth substrate and the epitaxial structure, reducing the dislocation density in the epitaxial structure; it can also achieve stress release during the process and reduce the occurrence of cracking in the epitaxial structure.

[0174] In some embodiments, the thickness of the third semiconductor material layer 150 is in a range of 0.2 μm to 0.5 μm. The thickness of the third semiconductor material layer 150 is appropriate to ensure its quality and the effects of structural relaxation and stress release.

[0175] The fourth semiconductor material layer 160 can well realize the transition between the third semiconductor material layer 150 and the subsequent epitaxial structure. The fourth semiconductor material layer 160 has a relatively high thermal expansion coefficient and can reduce the mismatch caused by the cooling of the epitaxial structure growth.

[0176] In some embodiments, in the step of growing the fourth semiconductor material layer 160 on the surface of the third semiconductor material layer 150, process gases may include: a gallium source and a nitrogen source, the temperature is set in the range of 950°C to 1100°C, and the pressure is set in the range of 100 Torr to 200 Torr.

[0177] In some embodiments, the thickness of the fourth semiconductor material layer 160 ranges from 1.0 μm to 4.0 μm. The thickness of the fourth semiconductor material layer 160 is appropriate to ensure its own quality while ensuring the structural transition with the epitaxial structure and improving the mismatch problem caused by cooling the epitaxial structure growth.

[0178] In summary, the base structure includes a substrate 110, a first metal layer 120, a first material layer 130 and a second semiconductor material layer 140; wherein the setting of the first material layer 130 can fix the position of the first metal layer 120 on the surface of the substrate 110, inhibit the migration of the first metal layer 120 on the surface of the substrate 110, can effectively inhibit the atomic agglomeration of the first metal layer 120 material, effectively ensure the growth quality of the second semiconductor material layer 140, is conducive to the formation of a high-quality second semiconductor material layer 140, and is conducive to overcoming the problem of melt-back etching.

[0179] Moreover, the thickness of the first material layer 130 is in the range of 1 nm to 5 nm. If the thickness of the first material layer 130 is too small, the number of the first island structures 131 in the first material layer 130 is too small and unevenly distributed, which may affect its function of fixing the position of the first metal layer 120 and inhibiting the migration of the first metal layer 120; if the thickness of the first material layer 130 is too large, the number of the first island structures 131 in the first material layer 130 is too large, the distance between adjacent first island structures 131 is too small, or even adjacent first island structures 131 are connected, and the first metal layer 120 cannot be exposed, and a uniform nucleation point cannot be provided for the subsequent growth of the second semiconductor material layer 140, which may affect the nucleation and growth of the second semiconductor material layer 140 on the surface of the first material layer 130.

[0180] The material of the first material layer 130 is different from that of the second semiconductor material layer 140 , so that the introduction of impurity elements can be avoided while forming the first material layer 130 . The process is simple and can effectively reduce process risks and improve device stability while providing a high-quality growth foundation.

[0181] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A base structure, characterized in that: include: A first metal layer; A first material layer, located on a surface of the first metal layer; The second semiconductor material layer covers the surface of the first material layer; wherein the material of the first material layer is different from the material of the second semiconductor material layer.

2. The base structure according to claim 1, characterized in that The structure of the first material layer is a plurality of first island structures.

3. The base structure according to claim 2, characterized in that Adjacent first island structures are separated to expose a portion of the first metal layer.

4. The base structure according to claim 1, characterized in that The material of the first material layer is at least one of silicon nitride, aluminum nitride, magnesium nitride and silicon carbide.

5. The base structure according to claim 1, characterized in that The thickness of the first material layer is in a range of 1 nm to 5 nm.

6. The base structure according to claim 2, characterized in that The second semiconductor material layer extends from a surface of the first metal layer exposed by the first island structure to a surface of the first island structure.

7. The base structure according to claim 6, characterized in that The second semiconductor material layer includes a lower layer and an upper layer; the lower layer is embedded in the gaps between the first island structures and is at least located on the surface of the first metal layer exposed by the first island structures; and the upper layer is located on the lower layer.

8. The base structure according to claim 7, characterized in that The lower layer includes a plurality of second island structures; the second island structures are located in gaps between adjacent first island structures.

9. The base structure according to claim 8, characterized in that The second island structure protrudes from the top of the first island structure; and the upper layer is also located on the surface of the first island structure.

10. The base structure according to claim 8, characterized in that The second island structure extends in a direction perpendicular to the surface of the first material layer; the upper layer grows and extends laterally parallel to the surface of the first material layer.

11. The base structure according to claim 7, characterized in that At least one of the lower layer and the upper layer has a thickness ranging from 1.0 μm to 3.0 μm.

12. The base structure according to claim 1, characterized in that The material of the second semiconductor material layer is aluminum nitride or magnesium nitride.

13. The base structure according to claim 7, characterized in that The structure formed by the lower layer and the upper layer is at least one of an aluminum nitride stack, an aluminum nitride / aluminum gallium nitride superlattice stack, an aluminum nitride / gallium nitride superlattice stack, an aluminum nitride / silicon nitride stack, a magnesium nitride stack, a magnesium nitride / magnesium gallium nitride superlattice stack, a magnesium nitride / gallium nitride superlattice stack, and a magnesium nitride / silicon nitride stack.

14. The base structure according to claim 1, wherein: The first metal layer is at least one of an aluminum layer and a magnesium layer.

15. The base structure according to claim 1, wherein: The thickness of the first metal layer is in a range of 0.3 nm to 1.0 nm.

16. The base structure according to claim 1, characterized in that Also includes: A third semiconductor material layer, located on the second semiconductor material layer; a fourth semiconductor material layer, located on the third semiconductor material layer; The material of the third semiconductor material layer is different from that of the fourth semiconductor material layer.

17. The base structure according to claim 16, characterized in that The third semiconductor material layer is at least one of an aluminum gallium nitride layer, an aluminum nitride / gallium nitride superlattice layer, an aluminum nitride / aluminum gallium nitride superlattice layer, an aluminum gallium nitride / silicon nitride, a magnesium gallium nitride layer, a magnesium nitride / gallium nitride superlattice layer, a magnesium nitride / magnesium gallium nitride superlattice layer, and a magnesium gallium nitride / silicon nitride combination layer.

18. The base structure according to claim 16, characterized in that The third semiconductor material layer contains aluminum or magnesium, and the aluminum or magnesium content on the side close to the second semiconductor material layer is greater than the aluminum or magnesium content on the side close to the fourth semiconductor material layer.

19. The base structure according to claim 16, characterized in that The thickness of the third semiconductor material layer ranges from 0.2 μm to 0.5 μm; the thickness of the fourth semiconductor material layer ranges from 1.0 μm to 4.0 μm.

20. A method for preparing a substrate structure, characterized in that: At least the following steps are included: providing a first metal layer; growing a first material layer on a surface of the first metal layer; A second semiconductor material layer is grown on the surface of the first material layer; wherein the material of the first material layer is different from the material of the second semiconductor material layer.

21. The preparation method according to claim 20, characterized in that: The step of growing the first material layer on the surface of the first metal layer includes: using a silicon source and a nitrogen source.

22. The preparation method according to claim 21, characterized in that: The step of growing a first material layer on the surface of the first metal layer includes: uniformly growing a plurality of first island structures on the surface of the first metal layer, wherein adjacent first island structures are separated to expose a portion of the first metal layer; The step of growing the second semiconductor material layer includes: growing the second semiconductor material layer on the surface of the first metal layer exposed by the first island structure and on the surface of the first island structure; The step of growing a second semiconductor material layer on the surface of the first material layer includes: growing a layer at least on the surface of the first metal layer exposed by the first island structure; growing an upper layer on the surface of the lower layer; At least in the step of growing a lower layer on the surface of the first metal layer exposed by the first island structure, the process gas includes: using an aluminum source and a nitrogen source, or a magnesium source and a nitrogen source to make the upper layer grow in an island shape; In the step of growing an upper layer on the surface of the lower layer, the process gas includes: an aluminum source and a nitrogen source, or a magnesium source or a nitrogen source to make the upper layer grow laterally in a direction parallel to the surface of the substrate.

23. The preparation method according to claim 20, characterized in that: In the step of growing the first metal layer on the surface of the substrate, the process gas includes: an aluminum source or a magnesium source.

24. The preparation method according to claim 20, characterized in that: Also includes: Growing a third semiconductor material layer on the surface of the second semiconductor material layer; A fourth semiconductor material layer is grown on the surface of the third semiconductor material layer.

25. The preparation method according to claim 24, characterized in that: In the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the process gas includes: a gallium source and an aluminum source, or at least one of a gallium source and a magnesium source, and a nitrogen source; In the step of growing the fourth semiconductor material layer on the surface of the third semiconductor material layer, the process gas includes: a gallium source and a nitrogen source.

26. The preparation method according to claim 25, characterized in that: In the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the amount of the aluminum source provided at the first moment is greater than the amount of the aluminum source provided at the second moment.

27. The preparation method according to claim 26, characterized in that: In the step of growing the third semiconductor material layer on the surface of the second semiconductor material layer, the amount of aluminum source introduced is gradually reduced.