Circuit breaker topology suitable for suppressing DC fault and control method thereof

Abstract

The invention discloses a circuit breaker topology suitable for suppressing a direct current fault and a control method thereof. The circuit breaker topology comprises a pre-charging capacitor CU discharging branch, a voltage limiting branch and a voltage limiting branch composed of a first thyristor SCR1 and a second thyristor SCR2. The current limiting branch comprises a current limiting reactor Llim and a resistor Rlim; the transfer branch circuit is formed by connecting first semiconductor switch IGBTT units in series and in parallel; the energy absorption branch circuit comprises a metal oxide varistor (MOV); the main branch circuit comprises an ultra-fast isolation switch (UFD); the main branch circuit, the transfer branch circuit, the energy absorption branch circuit and the voltage limiting branch circuit are connected in parallel and then are connected in series with the current limiting branch circuit. The current-limiting branch circuit designed by the invention can be quickly started at the initial stage of a fault, and the overcurrent amplitude at the initial stage is effectively reduced. Meanwhile, through the synergistic effect with the voltage limiting branch circuit, the overvoltage problem in the fault isolation process is remarkably relieved, the breaking capacity, safety, reliability and economical efficiency of the circuit breaker are improved, and a powerful guarantee is provided for stable operation of a power grid.

Description

Technical Field

[0001] The present invention relates to the technical field of power distribution system protection, and in particular to a circuit breaker topology suitable for suppressing direct current faults and a control method thereof. Background Art

[0002] With the increasing demand for renewable energy, DC grids based on modular multi-level converters (MMC) have obvious advantages in reliable power supply and distributed energy access. However, when a DC short circuit occurs in a DC grid, the fault current rises sharply, so DC circuit breakers are required to quickly isolate the DC fault. The higher the DC voltage level and the larger the transmission capacity, the higher the isolation capability requirement for the DC circuit breaker.

[0003] The widespread access to distributed energy systems (such as solar energy and wind energy) has made the operation of power systems more complicated. The volatility and instability of these systems may cause current and voltage anomalies in the power grid. A large number of power electronic devices are used in AC and DC power distribution systems. These devices are very sensitive to overcurrent and overvoltage. Once a fault occurs, it may cause damage to the equipment or even paralysis of the system. At the same time, with the increase of DC voltage level and capacity, the peak current of DC circuit breakers also increases. Therefore, overcurrent and overvoltage protection functions are particularly important for reducing the voltage and current stress of DC circuit breakers. To this end, technicians in this field urgently need to develop a circuit breaker topology and use method with DC fault suppression capability. Ensure that distributed circuit breakers complete DC disconnection within milliseconds, further improve the economy, safety and reliability of circuit breakers, and enhance the operation stability and power supply efficiency of power systems. Summary of the invention

[0004] The purpose of this section is to summarize some aspects of embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the specification abstract and the invention title of this application to avoid blurring the purpose of this section, the specification abstract and the invention title, and such simplifications or omissions cannot be used to limit the scope of the present invention.

[0005] In view of the above existing problems, the present invention is proposed.

[0006] Therefore, the present invention provides a circuit breaker topology suitable for suppressing DC faults and a control method thereof to solve the problem of excessive current and voltage stress faced by existing DC circuit breakers when handling faults.

[0007] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0008] In a first aspect, an embodiment of the present invention provides a circuit breaker topology suitable for suppressing DC faults, including: a pre-charge capacitor C U The discharge branch, the voltage limiting branch and the voltage limiting branch composed of the first thyristor SCR1 and the second thyristor SCR2; the current limiting branch includes a current limiting reactor L lim and resistor R lim ; The first semiconductor switch IGBT T A transfer branch composed of unit series and parallel connection, an energy absorption branch including a metal oxide varistor MOV, and a main branch including an ultra-fast disconnect switch UFD;

[0009] The main branch, transfer branch, energy absorption branch and voltage limiting branch are connected in parallel with each other and then connected in series with the current limiting branch.

[0010] As a preferred solution of the circuit breaker topology suitable for suppressing DC faults described in the present invention, the pre-charge capacitor C U The discharge branch is connected in series with the resistor R U and the second semiconductor switch IGBT U With the pre-charge capacitor C U Connect in parallel, the pre-charge capacitor C U Also with diode D U The voltage limiting branch is formed by connecting in series, wherein one side of the voltage limiting branch is connected in series with the first thyristor SCR1 , and the other side of the voltage limiting branch is connected in series with the second thyristor SCR2 .

[0011] As a preferred solution of the circuit breaker topology suitable for suppressing DC faults described in the present invention, the current limiting branch also includes: a third semiconductor switch IGBT Lim , the third semiconductor switch IGBT Lim With the current limiting reactor L in series lim And the resistor R lim They are connected in parallel to form a current limiting branch.

[0012] As a preferred solution of the circuit breaker topology suitable for suppressing DC faults according to the present invention, the first semiconductor switch IGBT of the transfer branch T Unit and inductor L com and the inductor C com are connected in series, the inductor C com Connected in parallel to the switch S and the series branch of the DC power supply.

[0013] In a second aspect, the present invention provides a control method for a circuit breaker topology suitable for suppressing DC faults, comprising: when the DC system operates normally, current flows through a main branch and a current limiting branch;

[0014] When a fault is detected in the DC system, the fault current growth is suppressed through the current limiting branch, and the fault current is commutated to the transfer branch, so that the voltage at both ends of the energy absorption branch and the voltage limiting branch increases;

[0015] The voltage-limiting branch absorbs fault energy and provides the transient voltage required for the MOV to operate. When the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy-absorbing branch for energy consumption, thereby completing fault isolation.

[0016] As a preferred solution of the control method of the circuit breaker topology suitable for suppressing DC faults described in the present invention, it also includes: when the DC system is operating normally, the current flows through the ultra-fast disconnector UFD of the main branch and the third semiconductor switch IGBT of the current limiting branch Lim ;

[0017] When a fault in the DC system is detected, the third semiconductor switch IGBT Lim In the off state, the current flows through the current limiting inductor L of the current limiting branch lim With resistor R lim , in order to suppress the growth of fault current.

[0018] As a preferred solution of the control method of the circuit breaker topology suitable for suppressing DC faults described in the present invention, when a fault in the DC system is detected, the growth of the fault current is suppressed by the current limiting branch, and the fault current is commutated to the transfer branch, including: the ultra-fast disconnector UFD of the main branch performs a tripping operation to disconnect the fault current and allow the current to flow through the transfer branch.

[0019] As a preferred solution of the control method of the circuit breaker topology suitable for suppressing DC faults described in the present invention, wherein: the voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV action, including: the thyristors on both sides of the voltage limiting branch receive the conduction signal, and the pre-charge capacitor C U Charging provides a starting voltage for the metal oxide varistor MOV and slows down the voltage rise rate.

[0020] As a preferred solution of the control method of the circuit breaker topology suitable for suppressing DC faults described in the present invention, when the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy absorption branch for energy consumption, including: when the voltage of the MOV exceeds its rated threshold, its internal resistance decreases, allowing a large amount of current to pass and converting overvoltage energy into heat energy, limiting the voltage increase through nonlinear characteristics, and controlling the voltage within a safe threshold.

[0021] As a preferred solution of the control method of the circuit breaker topology suitable for suppressing DC faults described in the present invention, when the energy consumption of the fault current is 0, the DC fault isolation is completed.

[0022] Compared with the prior art, the present invention has the following beneficial effects: the present invention realizes fast and effective DC fault isolation and energy consumption by designing a topological structure in which multiple branches work together, thereby improving the breaking capacity, safety and economy of the circuit breaker; the present invention utilizes current limiting and voltage limiting branches while improving the DC circuit breaker, effectively reducing the voltage and current stress during the interruption of the DC fault current and the difficulty of isolating the DC fault, significantly improving the operating efficiency and reliability of the circuit breaker, and providing technical support for a more miniaturized, efficient and economical circuit breaker. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor. Among them:

[0024] Figure 1 A schematic diagram of a circuit breaker topology for suppressing DC faults and a control method thereof according to an embodiment of the present invention;

[0025] Figure 2 A schematic diagram of a low-voltage DC distribution network topology structure of a circuit breaker topology and a control method thereof suitable for suppressing DC faults according to an embodiment of the present invention;

[0026] Figure 3 A schematic diagram of voltage and current waveforms during the opening process of a DC circuit breaker of a circuit breaker topology suitable for suppressing DC faults and a control method thereof according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in the art without creative work should fall within the scope of protection of the present invention.

[0028] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0029] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0030] The present invention is described in detail with reference to schematic diagrams. When describing the embodiments of the present invention, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0031] At the same time, in the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "upper, lower, inner and outer" are based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first, second or third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0032] In the present invention, unless otherwise clearly specified and limited, the terms "install, connect, connect" should be understood in a broad sense, for example: it can be a fixed connection, a detachable connection or an integral connection; it can also be a mechanical connection, an electrical connection or a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] Example 1

[0034] Reference Figure 1 , is an embodiment of the present invention, which provides a circuit breaker topology suitable for suppressing DC faults, including:

[0035] Pre-charge capacitor C U The discharge branch, the voltage limiting branch and the voltage limiting branch composed of the first thyristor SCR1 and the second thyristor SCR2; the current limiting branch includes a current limiting reactor L lim and resistor R lim ; The first semiconductor switch IGBT T A transfer branch composed of unit series and parallel connection, an energy absorption branch including a metal oxide varistor MOV, and a main branch including an ultra-fast disconnect switch UFD;

[0036] The main branch, the transfer branch, the energy absorption branch and the voltage limiting branch are connected in parallel with each other and then connected in series with the current limiting branch.

[0037] It should be noted that with the increase of DC voltage level and transmission power, the flexible DC power grid has higher and higher requirements on the breaking capacity of DC switch cabinets, which also brings a high cost burden. In order to solve the problem of excessive voltage and current stress of existing DC circuit breakers during fault interruption. Based on the mechanical DC circuit breaker, this application designs a current-limiting and voltage-limiting branch topology with DC fault suppression capability and provides corresponding usage methods. The current-limiting branch can start quickly at the beginning of the fault and effectively reduce the overcurrent amplitude in the initial stage. At the same time, through the synergistic effect with the voltage-limiting branch, the overvoltage problem in the fault isolation process is significantly reduced. These improvements greatly improve the breaking capacity, safety, reliability, and economy of the circuit breaker, and provide a strong guarantee for the stable operation of the power grid.

[0038] In the embodiment of the present application, the pre-charge capacitor C U The discharge branch is connected in series with the resistor R U and the second semiconductor switch IGBT U With the pre-charge capacitor C U Connect in parallel, pre-charge capacitor C U Also with diode D U The voltage limiting branch is formed by connecting in series, wherein one side of the voltage limiting branch is connected in series with the first thyristor SCR1, and the other side of the voltage limiting branch is connected in series with the second thyristor SCR2.

[0039] In the embodiment of the present application, the current limiting branch further includes: a third semiconductor switch IGBT Lim , the third semiconductor switch IGBT Lim With the current limiting reactor L in series lim And the resistor R lim They are connected in parallel to form a current limiting branch.

[0040] It should be noted that when a fault overcurrent is detected, the third semiconductor switch IGBT Lim is bypassed, causing the fault current to flow through the current limiting inductor L lim With resistor R lim , limiting the rise rate and peak value of the fault current.

[0041] In the embodiment of the present application, the first semiconductor switch IGBT of the transfer branch T Unit and inductor L com and the inductor C com Connect in series, inductor C com Connected in parallel to the switch S and the series branch of the DC power supply.

[0042] In terms of control methods, this application realizes effective suppression of overcurrent and overvoltage during fault isolation by innovatively designing a multi-branch collaborative topology structure, including main branches, transfer branches, energy absorption branches, current limiting branches and voltage limiting branches; through the dynamic response and collaborative control of current limiting and voltage limiting branches, rapid isolation and energy consumption of DC faults are achieved, significantly improving the operating efficiency and reliability of circuit breakers, and providing technical support for the realization of miniaturized, efficient and economical circuit breakers.

[0043] In the embodiment of the present application, when the DC system operates normally, the current flows through the main branch and the current limiting branch;

[0044] When a fault is detected in the DC system, the fault current growth is suppressed through the current limiting branch, and the fault current is commutated to the transfer branch, so that the voltage at both ends of the energy absorption branch and the voltage limiting branch increases;

[0045] The voltage-limiting branch absorbs fault energy and provides the transient voltage required for the MOV to operate. When the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy-absorbing branch for energy consumption, thus completing fault isolation.

[0046] It should be noted that the voltage at both ends of the energy absorption branch and the voltage limiting branch rises, and the pre-charge capacitor C U Charging, and has a specific limiting effect on the overvoltage generated during the transfer branch shutdown. In addition, the voltage limiting branch can absorb the short-circuit fault energy and provide the transient voltage required for the MOV to operate. At this stage, if the voltage is within the normal operating range of the MOV, the MOV exhibits a high impedance state and the impact on the circuit can be ignored.

[0047] In the embodiment of the present application, it also includes: when the DC system operates normally, the current flows through the ultra-fast isolating switch UFD of the main branch and the third semiconductor switch IGBT of the current limiting branch. Lim ;

[0048] When a fault in the DC system is detected, the third semiconductor switch IGBT Lim In the off state, the current flows through the current limiting inductor L of the current limiting branch lim With resistor R lim , in order to suppress the growth of fault current.

[0049] In an embodiment of the present application, when a fault is detected in the DC system, the growth of the fault current is suppressed by a current limiting branch, and the fault current is commutated to a transfer branch, including: an ultra-fast disconnecting switch UFD of the main branch performs a tripping operation to disconnect the fault current and allow the current to flow through the transfer branch.

[0050] In the embodiment of the present application, the voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV action, including: the thyristors on both sides of the voltage limiting branch receive the conduction signal, and the pre-charge capacitor C U Charging provides a starting voltage for the metal oxide varistor MOV and slows down the voltage rise rate.

[0051] In the embodiment of the present application, when the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy absorption branch for energy consumption, including: when the voltage of the MOV exceeds its rated threshold, its internal resistance decreases, allowing a large amount of current to pass and converting overvoltage energy into heat energy, limiting the voltage increase through nonlinear characteristics, controlling the voltage within a safe threshold, and protecting circuits and electrical equipment from damage.

[0052] In the embodiment of the present application, when the energy consumption of the fault current is 0, the DC fault isolation is completed.

[0053] It should be noted that, based on the mechanical DC circuit breaker, this application designs a current-limiting and voltage-limiting branch topology with overcurrent and overvoltage suppression capabilities and provides corresponding methods of use. The current-limiting branch can start quickly at the initial stage of a fault, effectively reducing the overcurrent amplitude in the initial stage. At the same time, through the synergy with the voltage-limiting branch, the overvoltage problem in the fault isolation process is significantly reduced. These improvements greatly improve the circuit breaker's breaking capacity, safety, reliability, and economy, and provide a strong guarantee for the stable operation of the power grid.

[0054] Example 2

[0055] Reference Figure 2 , is an embodiment of the present invention, which is different from the first embodiment in that it provides a control method for a circuit breaker topology suitable for suppressing a DC fault, a medium and low voltage DC distribution network topology structure, including:

[0056] Through the innovative design of a multi-branch collaborative topology structure, including main branches, transfer branches, energy-absorbing branches, current-limiting branches and voltage-limiting branches, effective suppression of overcurrent and overvoltage can be achieved during fault isolation. Through the dynamic response and collaborative control of current-limiting and voltage-limiting branches, rapid isolation and energy consumption of DC faults can be achieved, significantly improving the operating efficiency and reliability of circuit breakers, providing technical support for the realization of miniaturized, efficient and economical circuit breakers.

[0057] Short-circuit faults in DC lines have a significant impact on system safety, especially bipolar short-circuit faults and unipolar grounding faults. This embodiment takes the low-voltage side fault of the DC distribution network as an example. The distribution network topology is as follows: Figure 2 The circuit breaker with DC fault suppression capability proposed in this application is installed between the low voltage feeder and the DC converter to protect the DC system and its cable feeder.

[0058] Assume that at t0, a bipolar short circuit fault occurs between the cables on the DC converter side. After the protection device identifies the bipolar short circuit fault, the circuit breaker with DC fault suppression capability proposed in this application is triggered, and the fault current passes through the main branch, the commutation branch, the current limiting branch, the voltage limiting branch and the energy absorption branch, thereby achieving reliable and rapid isolation of the fault.

[0059] Example 3

[0060] Reference Figure 3 , is an embodiment of the present invention. This embodiment is different from the first embodiment in that it provides a voltage and current waveform during the opening process of a DC circuit breaker in a control method for a circuit breaker topology suitable for suppressing DC faults, including:

[0061] The DC fault isolation method successfully achieves microsecond-level fault commutation and energy consumption through the dynamic response of the current limiting branch and the bidirectional current blocking capability of the transfer branch, as well as the coordinated control of the energy absorption branch and the voltage limiting branch, thus reducing the difficulty of isolation.

[0062] Assume that a short circuit fault occurs in the DC link at time t0. main is the main branch current; i trans is the transfer branch current; i C is the voltage-limiting branch current; i mov is the fault energy consumption branch current; I dc_0 is the DC steady-state value; U dc is the steady-state value of the DC voltage on the rectifier side; I main_max is the peak current of the main branch; I trans_max is the peak value of the transfer branch current; U max is the transfer branch peak voltage; U main_on Main branch opening voltage; U trans_on Turn on the voltage for the transfer branch; i dc is the total current flowing into the circuit breaker.

[0063] The DC fault isolation process is as follows:

[0064] (a) At time t0: a DC short circuit fault occurs, i dc (t0) = I dc_0 .

[0065] (b) t0~t1: The protection device detects and identifies the fault. During this period, the current i dc Rapidly rising, dc =i main .

[0066] (c) t1~t2: The stage where the fault current is commutated to the transfer branch. At time t1, the fault identification is completed and the current limiting inductor L of the current limiting branchlim With resistor R lim Connect to the circuit, from t1 to t2, the current i dc =i main +i trans , and i main Rapid decline, and i trans Rapidly rising. Current i main When it drops to zero at time t2, the commutation completion time is in microseconds, which can be basically ignored.

[0067] (d) t2~t3: UFD opening process. At time t2, the fault current is completely commutated to the transfer branch. At this time, the UFD receives the opening command and starts the arc extinguishing action. At time t3, the UFD completes the opening action. dc The peak value I is reached at t3 trans_max During the period from t2 to t3, i dc =i trans ,i trans It rises slowly due to the current limiting effect of the current limiting branch.

[0068] (e) t3-t4: The stage where the fault current is commutated to the voltage-limiting branch. At time t3, the IGBT in the transfer branch T After receiving the cut-off signal, the thyristors SCR1 and SCR2 of the voltage limiting branch receive the turn-on signal. At time t4, the voltage of capacitor C rises to the MOV starting voltage. During the period from t3 to t4, the current i dc =i trans +i C , capacitor C is charged, i trans Rapid decline, and i C Rise quickly.

[0069] (f) t4-t5: The rising stage of the current flowing through the energy absorption branch MOV. From t4 to t5, the arrester group MOV gradually changes from high resistance to low resistance, and the current i dc =i C +i mov .i C Rapidly declining, and i mov Rapidly rising, at time t5, i C drops to zero, i mov reached its peak.

[0070] (g) t5-t6: The stage where the energy absorption branch MOV consumes the fault energy. At time t5, the fault current is completely commutated to the energy absorption branch. Current i C After falling to zero, thyristors SCR1 and SCR2 are turned off by the reverse voltage. During the period from t5 to t6, the fault current decays rapidly to zero, and i dc =imov . DC fault isolation is successful, IGBT U Closed. Capacitor C U Fast discharge, capacitor C during fault isolation U The discharge process does not affect the DC fault isolation result.

[0071] As can be seen from the above, the present invention can achieve effective suppression of overvoltage and overcurrent during the fault isolation stage. The proposed circuit breaker reduces the problem of excessive voltage and current stress while ensuring the breaking capacity, providing strong support for the economical design of the circuit breaker. The improved DC circuit breaker of the present invention uses current limiting and voltage limiting branches at the same time, effectively reducing the voltage and current stress when the DC fault current is interrupted, reducing the difficulty of isolating DC faults, and providing the possibility for a more miniaturized, efficient and economical circuit breaker.

[0072] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A circuit breaker topology suitable for suppressing DC faults, characterized in that: include: Pre-charge capacitor C U The discharge branch, the voltage limiting branch and the voltage limiting branch composed of the first thyristor SCR1 and the second thyristor SCR2; the current limiting branch includes a current limiting reactor L lim and resistor R lim ; The first semiconductor switch IGBT T A transfer branch composed of unit series and parallel connection, an energy absorption branch including a metal oxide varistor MOV, and a main branch including an ultra-fast disconnect switch UFD; The main branch, transfer branch, energy absorption branch and voltage limiting branch are connected in parallel with each other and then connected in series with the current limiting branch.

2. The circuit breaker topology suitable for suppressing DC faults according to claim 1, characterized in that: The pre-charge capacitor C U The discharge branch is connected in series with the resistor R U and the second semiconductor switch IGBT U With the pre-charge capacitor C U Connect in parallel, the pre-charge capacitor C U Also with diode D U The voltage limiting branch is formed by connecting in series, wherein one side of the voltage limiting branch is connected in series with the first thyristor SCR1 , and the other side of the voltage limiting branch is connected in series with the second thyristor SCR2 .

3. The circuit breaker topology suitable for suppressing DC faults according to claim 2, characterized in that: The current limiting branch also includes: a third semiconductor switch IGBT Lim , the third semiconductor switch IGBT Lim With the current limiting reactor L in series lim And the resistor R lim They are connected in parallel to form a current limiting branch.

4. The circuit breaker topology suitable for suppressing DC faults according to claim 3, characterized in that: The first semiconductor switch IGBT of the transfer branch T Unit and inductor L com and the inductor C com are connected in series, the inductor C com Connected in parallel to the switch S and the series branch of the DC power supply.

5. A control method for a circuit breaker topology suitable for suppressing DC faults, characterized in that: include: When the DC system operates normally, the current flows through the main branch and the current-limiting branch; When a fault is detected in the DC system, the fault current growth is suppressed through the current limiting branch, and the fault current is commutated to the transfer branch, so that the voltage at both ends of the energy absorption branch and the voltage limiting branch increases; The voltage-limiting branch absorbs fault energy and provides the transient voltage required for the MOV to operate. When the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy-absorbing branch for energy consumption, thereby completing fault isolation.

6. The control method of the circuit breaker topology suitable for suppressing DC faults according to claim 5, characterized in that: Also includes: When the DC system operates normally, the current flows through the ultra-fast disconnect switch UFD of the main branch and the third semiconductor switch IGBT of the current limiting branch. Lim ; When a fault in the DC system is detected, the third semiconductor switch IGBT Lim In the off state, the current flows through the current limiting inductor L of the current limiting branch lim With resistor R lim , in order to suppress the growth of fault current.

7. The control method of a circuit breaker topology suitable for suppressing DC faults according to claim 6, characterized in that: When a fault is detected in the DC system, the growth of the fault current is suppressed by the current limiting branch, and the fault current is commutated to the transfer branch, including: the ultra-fast disconnector UFD of the main branch performs a tripping operation to disconnect the fault current and allow the current to flow through the transfer branch.

8. The control method of the circuit breaker topology suitable for suppressing DC faults according to claim 7, characterized in that: The voltage limiting branch absorbs the fault energy and provides the transient voltage required for the MOV to operate. The thyristors on both sides of the voltage limiting branch receive the conduction signal, and the pre-charge capacitor C U Charging provides a starting voltage for the metal oxide varistor MOV and slows down the voltage rise rate.

9. The control method of a circuit breaker topology suitable for suppressing DC faults according to claim 8, characterized in that: When the voltage of the MOV exceeds its rated threshold, the fault current is directed to the energy absorption branch for energy consumption, including: when the voltage of the MOV exceeds its rated threshold, its internal resistance drops, allowing a large amount of current to pass and converting the overvoltage energy into heat energy, limiting the voltage increase through nonlinear characteristics, and controlling the voltage within the safety threshold.

10. The control method of the circuit breaker topology suitable for suppressing DC faults according to claim 9, characterized in that: include: When the energy consumption of the fault current is 0, DC fault isolation is completed.

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