Current source driving circuit and control method
By using a combination of P-MOS tubes and N-MOS tubes in the current source drive circuit, the output voltage of the control circuit regulates the MOSFET state, which solves the problems of slow adjustment speed and complex structure of the current source drive circuit, realizes fast drive current adjustment and simplifies the circuit structure.
Patent Information
- Application Number
- CN202510078023.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-17
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2045-01-17
AI Technical Summary
Existing current source drive circuits have slow adjustment speeds and complex structures, and cannot meet the requirements of power switching devices with fast switching transients.
The charging current source drive circuit and the discharging current source drive circuit are composed of P-MOS tubes and N-MOS tubes respectively. The working state of MOSFET is regulated by the output voltage of the control circuit to realize dynamic adjustment of the drive current and simplify the circuit structure.
The invention realizes fast regulation of driving current, simplifies circuit structure, reduces cost, and is suitable for wide bandgap power devices with fast switching transients.
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Figure CN119921544B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of power electronics, and more specifically, relates to a current source drive circuit and a control method. Background Art
[0002] Power electronic converters are key devices for achieving efficient electrical energy conversion and play a crucial role in areas such as rail transit, new energy, and new power systems. As the core component of the converter, the operating characteristics of power switching devices directly affect key performance indicators such as converter efficiency, power density, and reliability. The gate drive circuit of a power switching device has a significant impact on device losses, reliability, and other operating characteristics. Compared to traditional voltage source drive circuits, current source drive circuits can provide a constant drive current during the switching transients of power devices, thereby accelerating the charge / discharge process of the input capacitor and reducing switching losses of the power device. However, current current source drive circuits have a complex structure and a slow drive current switching speed, making them unsuitable for power switching devices with fast switching transients.
[0003] Current current source drive circuit implementation technologies can be mainly divided into three categories: 1) Inductor-based resonant current sources, which use the inductor's characteristic of hindering current changes to provide a constant drive current. However, due to the presence of the inductor, this method has a slow drive current regulation speed. 2) BJT-based mirror current sources, which connect two BJTs with completely identical parameters into a current mirror structure and dynamically adjust the drive current by regulating the reference current source of the current mirror. However, this method has overshoot during the current switching process and a slow regulation speed. 3) Current sources based on multiple MOSFET branches in parallel, which regulate the drive current by controlling the number of MOSFET branches that are turned on. However, the MOSFET in each branch requires corresponding control and trigger circuits, making the circuit structure too complex, difficult to implement, and costly. In summary, existing current source drive circuits have slow drive current regulation speeds and complex circuit implementation schemes. Summary of the Invention
[0004] In view of the defects of the related art, the purpose of the present invention is to provide a current source driving circuit and a control method, aiming to solve the problems of slow adjustment speed and complex structure of the current source driving circuit of the existing power device.
[0005] To achieve the above objectives, in a first aspect, the present invention provides a current source drive circuit, wherein the driven power device T1 is a SiC MOS, including a gate G, a drain D, a source S, and a Kelvin source KS; characterized in that the current source drive circuit includes: a charging current source drive circuit, a discharging current source drive circuit, a charging current source control voltage regulation circuit, and a discharging current source control voltage regulation circuit;
[0006] The charging current source driving circuit adopts a P-MOS tube M1, the source of the P-MOS tube M1 is connected to the positive power supply V CC The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the charging current source control voltage regulation circuit; the charging current source driving circuit is used to provide the driving current required for the transient process of turning on the driven power device T1 and the gate-source bias voltage V of T1 when turning on the steady state CC ;
[0007] The discharge current source driving circuit adopts N-MOS tube M2, the source of N-MOS tube M2 is connected to the negative power supply V EE The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the discharge current source control voltage regulation circuit; the discharge current source driving circuit is used to provide the driving current required for the transient shutdown process of the driven power device T1 and the gate-source bias voltage V of T1 when the device is turned off in a steady state EE ;
[0008] The charging current source controls the output voltage v of the voltage control circuit ctrl1 , used to regulate the gate-source voltage v of the P-MOS tube M1 GS1 , so that when the driven power device T1 is turned on transiently, the P-MOS tube M1 is controlled to operate in the saturation region, so as to dynamically adjust the turn-on drive current output by M1; and when the driven power device T1 is turned on steady state, the P-MOS tube M1 is controlled to operate in the variable resistance region, so that the gate-source voltage of the driven power device T1 is clamped at the turn-on steady state bias voltage V CC ;
[0009] The discharge current source controls the output voltage v of the voltage control circuit ctrl2 , used to regulate the gate-source voltage v of the N-MOS tube M2 GS2 , so that when the driven power device T1 is turned off transiently, the N-MOS tube M2 is controlled to operate in the saturation region to dynamically adjust the turn-off drive current output by M2; and when the driven power device T1 is turned off steady state, the N-MOS tube M2 is controlled to operate in the variable resistance region to clamp the gate-source voltage of the driven power device T1 to the turn-off steady-state bias voltage V EE .
[0010] Optionally, the positive power supply is 15V and the negative power supply is -5V.
[0011] Optionally, the charging current source control voltage regulation circuit includes an FPGA and a first DAC;
[0012] The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the first DAC, and the analog signal output terminal of the first DAC is connected to the gate of the P-MOS transistor M1.
[0013] Optionally, the discharge current source control voltage regulation circuit includes the FPGA and a second DAC;
[0014] The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the second DAC, and the analog signal output terminal of the second DAC is connected to the gate of the N-MOS transistor M2.
[0015] In a second aspect, the present invention further provides a control method for a current source drive circuit, which is executed based on the circuit according to any one of the first aspects, wherein within one cycle, the driven power device T1 includes a turn-on process and a turn-off process; the control method includes:
[0016] S1, before the driven power device T1 is in the turn-on process, the charging current source controls the output voltage v of the voltage control circuit ctrl1 is the positive bias voltage V CC ; Among them, the positive bias voltage V CC The gate-source bias voltage for turning on the steady state of the driven power device T1;
[0017] S2, at time t0, the charging current source controls the output voltage v of the voltage control circuit ctrl1 From the positive bias voltage V CC Switch to voltage V p1 , maintaining voltage V p1 To time t1;
[0018] S3, at time t1, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Increase to V p2 , maintained until t2; where V p1 Less than V p2 , V p1 and V p2 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the saturation region;
[0019] S4, at time t2, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Switch to V p1 , maintaining voltage V p1 To time t4;
[0020] S5. At time t4, the charging current source controls the output voltage v of the voltage control circuit. ctrl1 Switch to V p3, maintained until the driven power device T1 starts to turn off; where V p3 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the variable resistance area;
[0021] S6, at time t5 before the driven power device T1 is turned off, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 is the negative bias voltage V EE ; Among them, the negative bias voltage V EE is the gate-source bias voltage of the driven power device T1 in the off-state steady state;
[0022] S7, at time t5, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 From the negative bias voltage V EE Switch to voltage V n1 , maintaining voltage V n1 To time t7;
[0023] S8, at time t7, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Gradually reduce to V n2 , maintained until t8; where V n1 Greater than V n2 , V n1 and V n2 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the saturation region;
[0024] S9, at time t8, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n1 , maintaining voltage V n1 Until time t9;
[0025] S10, at time t9, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n3 , and maintain until the next cycle of the driven power device T1 begins; where V n3 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the variable resistance area.
[0026] In a third aspect, the present invention further provides a double-pulse test circuit, comprising: a high-voltage DC power supply V1, a DC bus capacitor C1, a load inductor L1, a freewheeling diode D1, a driven power device T1, and the current source drive circuit according to any one of the first aspects;
[0027] The high-voltage DC power supply V1 and the DC bus capacitor C1 are connected in parallel;
[0028] The load inductor L1 and the freewheeling diode D1 are connected in parallel, and the anode of the freewheeling diode D1 is connected to the drain D of the driven power device T1;
[0029] The source electrode S of the driven power device T1 is connected to the negative electrode of the high-voltage DC power supply V1;
[0030] The cathode of the freewheeling diode D1 is connected to the anode of the high-voltage DC power supply V1;
[0031] The driven power device T1 is connected to the current source driving circuit and is turned on or off according to the on / off driving current output by the current source driving circuit.
[0032] Optionally, the driven power device T1 is a three-pin device or a four-pin device;
[0033] When the driven power device T1 is a three-pin device, the Kelvin source KS and the source S are regarded as the same point.
[0034] Compared with the prior art, the above technical solutions conceived by the present invention can achieve the following beneficial effects:
[0035] 1. The present invention provides a current source drive circuit. The charging current source drive circuit only uses a P-MOSFET, and the discharging current source drive circuit only uses an N-MOSFET, so as to form a current source drive circuit. The output voltages of the charging current source control voltage regulation circuit and the discharging current source control voltage regulation circuit are used to regulate the working states of the MOSFETs in the charging current source drive circuit and the discharging current source drive circuit respectively, thereby realizing control of the drive current during the transient on / off process of the driven power device T1 and clamping of the gate-source voltage during the steady-state on / off process. The overall circuit structure is simple, easy to implement and has lower cost.
[0036] 2. The present invention provides a control method for a current source drive circuit. By regulating the output voltage of the charging current source control voltage control circuit and the discharging current source control voltage control circuit, the gate-source voltage of the MOSFET in the current source drive circuit is regulated to achieve dynamic regulation of the drive current during the switching transient of the power device T1. The regulation method is simpler, and the driving current regulation speed of the method is faster, and it can be applied to wide bandgap power devices with fast switching transients. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 A comparison diagram of a current source driving method and a conventional voltage source driving method;
[0038] Figure 2A block diagram of a current source driving circuit provided by an embodiment of the present invention;
[0039] Figure 3 A specific circuit connection diagram of a current source driving circuit provided by an embodiment of the present invention;
[0040] Figure 4 A control principle diagram of an N-MOS tube M2 in a current source driving circuit provided by the present invention;
[0041] Figure 5 A control principle diagram of a P-MOS tube M1 in a current source driving circuit provided by the present invention;
[0042] Figure 6 This is a timing diagram of the turn-on process of a fast switching dynamic current source drive circuit;
[0043] Figure 7 This is a timing diagram of the turn-off process of a fast-switching dynamic current source drive circuit;
[0044] Figure 8 A schematic diagram of a switching waveform of an output drive current of an inductor-based resonant current source circuit;
[0045] Figure 9 A schematic diagram of a switching waveform of an output drive current of a BJT-based mirror current source circuit;
[0046] Figure 10 The figure is a schematic diagram of a switching waveform of a driving current output by a fast switching current source circuit proposed by the present invention. DETAILED DESCRIPTION
[0047] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
[0048] The contents involved in the above embodiment are described below in conjunction with a preferred embodiment.
[0049] Example 1
[0050] like Figure 1 As shown, Figure 1 A comparison diagram of a current source driving method and a conventional voltage source driving method.
[0051] During the turn-on transient of a driven power device, when a voltage source drive method is used, as the gate-source voltage of the driven power device rises, the drive current gradually decreases, resulting in a larger turn-on delay and turn-on loss. When a current source drive method is used, as the gate-source voltage of the driven power device rises, the drive current can be maintained constant, causing the gate-source voltage of the driven power device to rise faster, thereby achieving a smaller turn-on delay and turn-on loss. Furthermore, during the turn-off transient of the driven power device, the current source drive method can also achieve a smaller turn-off delay and turn-off loss.
[0052] like Figure 2 and Figure 3 As shown, the present invention provides a current source driving circuit, wherein the driven power device T1 is SiCMOS, including a gate G, a drain D, a source S and a Kelvin source KS; the current source driving circuit includes: a charging current source driving circuit, a discharging current source driving circuit, a charging current source control voltage regulation circuit and a discharging current source control voltage regulation circuit;
[0053] The charging current source driving circuit adopts a P-MOS tube M1, the source of the P-MOS tube M1 is connected to the positive power supply V CC The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the charging current source control voltage regulation circuit; the charging current source driving circuit is used to provide the driving current required for the transient process of turning on the driven power device T1 and the gate-source bias voltage V of T1 when turning on the steady state CC ;
[0054] The discharge current source driving circuit adopts N-MOS tube M2, the source of N-MOS tube M2 is connected to the negative power supply V EE The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the discharge current source control voltage regulation circuit; the discharge current source driving circuit is used to provide the driving current required for the transient shutdown process of the driven power device T1 and the gate-source bias voltage V of T1 when the device is turned off in a steady state EE ;
[0055] The charging current source controls the output voltage v of the voltage control circuit ctrl1 , used to regulate the gate-source voltage v of the P-MOS tube M1 GS1 , so that when the driven power device T1 is turned on transiently, the P-MOS tube M1 is controlled to operate in the saturation region, so as to dynamically adjust the turn-on drive current output by M1; and when the driven power device T1 is turned on steady state, the P-MOS tube M1 is controlled to operate in the variable resistance region, so that the gate-source voltage of the driven power device T1 is clamped at the turn-on steady state bias voltage V CC ;
[0056] The discharge current source controls the output voltage v of the voltage control circuit ctrl2 , used to regulate the gate-source voltage v of the N-MOS tube M2 GS2 , so that when the driven power device T1 is turned off transiently, the N-MOS tube M2 is controlled to operate in the saturation region to dynamically adjust the turn-off drive current output by M2; and when the driven power device T1 is turned off steady state, the N-MOS tube M2 is controlled to operate in the variable resistance region to clamp the gate-source voltage of the driven power device T1 to the turn-off steady-state bias voltage V EE .
[0057] The present invention provides a current source drive circuit that is regulated based on the saturation region MOSFET gate voltage, thereby overcoming the defects in the existing current source drive circuit implementation technology. The current source drive circuit uses a MOSFET to provide the driving current required for the power device shutdown process, and uses another MOSFET to provide the driving current required for the power device turn-on process. By controlling the above-mentioned MOSFET gate voltage to make it operate in the saturation region, a constant current is provided, and by dynamically regulating the above-mentioned MOSFET gate voltage to change its operating point, rapid regulation of the driving current is achieved, the circuit structure is simple, and the current regulation speed is fast. In addition, during the steady-state process of turning on and off the driven power device T1, by controlling the above-mentioned MOSFET gate voltage to make it operate in the variable resistance region, the gate-source voltage of T1 is clamped to the steady-state bias voltage of turning on and off.
[0058] like Figure 2 As shown, the driven power device T1 adopts SiC MOS, which has four connection terminals, including gate G, drain D, source S and Kelvin source KS; the capacitor C connected between the gate G and the Kelvin source KS GS is the gate-source capacitance of the driven power device T1; capacitance C GS The voltage is the gate voltage of the driven power device T1, recorded as the driving voltage v GS The current flowing into the gate G of the driven power device T1 is recorded as the driving current i G The threshold voltage of the driven power device T1 is recorded as V th , the Miller platform voltage is recorded as V miller The drain-source voltage of the driven power device T1 is recorded as v DS , the drain current is recorded as i D .
[0059] like Figure 3 As shown, the charging current source driving circuit is driven by the positive power supply V CC The source of the P-MOS tube M1 is connected to the positive power supply V CCThe drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the charging current source control voltage regulation circuit.
[0060] like Figure 3 As shown, the discharge current source driving circuit is driven by a negative power supply V EE The source of N-MOS tube M2 is connected to the negative power supply V EE The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output end of the discharge current source control voltage regulation circuit.
[0061] In the transient process of turning on and off the driven power device T1, the P-MOS transistor M1 and the N-MOS transistor M2 should operate in the device saturation region to provide a constant current to the gate G terminal of the driven power device T1; in the steady-state process of turning on and off the driven power device T1, the P-MOS transistor M1 and the N-MOS transistor M2 should operate in the device variable resistance region to clamp the gate-source voltage of T1 to the steady-state bias voltage of turning on and off.
[0062] In this embodiment, the positive power supply is 15V, and the negative power supply is -5V.
[0063] The charging current source controls the output voltage v of the voltage control circuit ctrl1 and the discharge current source controls the output voltage v of the voltage control circuit ctrl2 With dynamic regulation capability, the output voltage v ctrl1 and the output voltage v ctrl2 Dynamically adjust its size according to the control signal, thereby correspondingly adjusting the output drive current size. Specifically, it includes:
[0064] (1) During the turn-on transient of the driven power device T1, when the gate-source voltage v GS Located in V miller With V th When the charging current source controls the output voltage v of the voltage control circuit ctrl1 It should be increased in stages to reduce the drain current of the P-MOS tube M1, thereby reducing the driving current output by the charging current source driving circuit, and further reducing the drain current change rate di of the driven power device T1. D / dt, thereby reducing the current stress of T1.
[0065] (2) During the turn-off transient of the driven power device T1, when the gate-source voltage v GS Located in V miller With V thWhen the discharge current source controls the output voltage of the voltage control circuit, the output voltage should be reduced in stages to reduce the drain current of the N-MOS tube M2, thereby reducing the drive current output by the discharge current source drive circuit, and further reducing the drain current change rate di of the driven power device T1. D / dt, thereby reducing the voltage stress of T1.
[0066] Optionally, the charging current source control voltage regulation circuit includes an FPGA and a first DAC;
[0067] The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the first DAC, and the analog signal output terminal of the first DAC is connected to the gate of the P-MOS transistor M1.
[0068] Furthermore, the charging current source control voltage regulation circuit is composed of an FPGA, a first DAC and a first peripheral circuit; the first peripheral circuit is connected one by one according to the configuration scheme required for the normal operation of the FPGA and the first DAC.
[0069] Optionally, the discharge current source control voltage regulation circuit includes the FPGA and a second DAC;
[0070] The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the second DAC, and the analog signal output terminal of the second DAC is connected to the gate of the N-MOS transistor M2.
[0071] Furthermore, the discharge current source control voltage regulation circuit is composed of an FPGA, a second DAC and a second peripheral circuit; the second peripheral circuit is connected one by one according to the configuration scheme required for the normal operation of the FPGA and the second DAC.
[0072] The control principle diagram of the N-MOS tube M2 in the current source driving circuit provided by the present invention is as follows: Figure 4 As shown, specifically, during the turn-off transient process of the driven power device T1, the output signal v of the discharge current source control voltage control circuit ctrl2 The N-MOS tube M2 should be operated in the saturation region to provide a constant driving current for the driven power device T1; when the output signal v of the discharge current source control voltage control circuit is ctrl2 When the gate-source voltage v of N-MOS tube M2 changes, GS2 Changes, resulting in changes in its operating point, the drain current i D2 Therefore, v ctrl2 The driving current output by the discharge current source driving circuit can be directly controlled to achieve segmented dynamic regulation of the driving current during the shutdown transient process of the driven power device T1.
[0073] The control principle diagram of the P-MOS tube M1 in the current source driving circuit provided by the present invention is as follows: Figure 5 As shown, specifically, during the transient state of the driven power device T1, the output signal v of the charging current source control voltage control circuit is ctrl1 The P-MOS tube M1 should be operated in the saturation region to provide a constant driving current for the driven power device T1; when the output signal v of the charging current source control voltage control circuit is ctrl1 When the gate-source voltage v of the P-MOS tube M1 changes, GS1 Changes, resulting in changes in its operating point, the drain current i D1 Therefore, v ctrl1 The driving current output by the charging current source driving circuit can be directly controlled to achieve segmented dynamic regulation of the driving current during the transient process of turning on the driven power device T1.
[0074] The embodiment of the present invention provides a current source drive circuit. The charging current source drive circuit uses only one P-MOSFET, and the discharging current source drive circuit uses only one N-MOSFET, so as to form a current source drive circuit. The driving current output by the charging current source drive circuit and the discharging current source drive circuit are regulated by controlling the output voltage of the charging current source control voltage regulation circuit and the output voltage of the discharging current source control voltage regulation circuit, respectively. The problems of slow regulation speed and complex structure existing in the existing current source drive circuit of power devices are solved. The drive current is dynamically regulated in sections during the turn-on transient process and the turn-off transient process of the driven power device T1. The overall circuit structure is simple, the drive current regulation speed is fast, it is easy to implement and the cost is lower.
[0075] Example 2
[0076] The present invention further provides a control method for a current source driving circuit, which is executed based on the circuit described in any one of the first embodiments. In one cycle, the driven power device T1 includes a turn-on process and a turn-off process. The control method includes:
[0077] S1, before the driven power device T1 is in the turn-on process, the charging current source controls the output voltage v of the voltage control circuit ctrl1 is the positive bias voltage V CC ; Among them, the positive bias voltage V CC The gate-source bias voltage for turning on the steady state of the driven power device T1;
[0078] S2, at time t0, the charging current source controls the output voltage v of the voltage control circuit ctrl1 From the positive bias voltage V CC Switch to voltage V p1 , maintaining voltage V p1To time t1;
[0079] S3, at time t1, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Increase to V p2 , maintained until time t2; where V p1 Less than V p2 , V p1 and V p2 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the saturation region;
[0080] S4, at time t2, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Switch to V p1 , maintaining voltage V p1 To time t4;
[0081] S5. At time t4, the charging current source controls the output voltage v of the voltage control circuit. ctrl1 Switch to V p3 , maintained until the driven power device T1 starts to turn off; where V p3 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the variable resistance area;
[0082] S6, at time t5 before the driven power device T1 is turned off, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 is the negative bias voltage V EE ; Among them, the negative bias voltage V EE is the gate-source bias voltage of the driven power device T1 in the off-state steady state;
[0083] S7, at time t5, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 From the negative bias voltage V EE Switch to voltage V n1 , maintaining voltage V n1 To time t7;
[0084] S8, at time t7, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Gradually reduce to V n2 , maintained until t8; where V n1 Greater than V n2 , V n1 and V n2 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the saturation region;
[0085] S9, at time t8, the discharge current source controls the output voltage v of the voltage control circuitctrl2 Switch to V n1 , maintaining voltage V n1 Until time t9;
[0086] S10, at time t9, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n3 , and maintain until the next cycle of the driven power device T1 begins; where V n3 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the variable resistance area;
[0087] Among them, in S3, the output voltage v ctrl1 Increase and regulate the gate-source voltage v of the P-MOS tube M1 GS1 Increase, so that the drain current of the P-MOS tube M1 decreases, and the drain current change rate di of the driven power device T1 is reduced D / dt to reduce the current stress of the driven power device T1.
[0088] Among them, in S8, the output voltage v ctrl2 Reduce and regulate the gate-source voltage v of the N-MOS tube M2 GS2 Reduce, so that the drain current of the N-MOS tube M2 is reduced, and the drain current change rate di of the driven power device T1 is reduced. D / dt to reduce the voltage stress of the driven power device T1.
[0089] A control method for a current source driving circuit includes a control method for a turn-on process of a driven power device T1 and a control method for a turn-off process of the driven power device T1.
[0090] like Figure 6 As shown, Figure 6 This is a timing diagram of the turn-on transient process of a fast-switching dynamic current source drive circuit, specifically including:
[0091] Before time t0, the driven power device T1 is in the off steady state, v DS is the bus voltage V BUS , v GS is the negative bias voltage V EE , v ctrl1 is the positive bias voltage V CC So that the P-MOSFET is turned off. At time t0, v ctrl1 From the positive bias voltage V CC Fast switching to voltage V p1 , the P-MOSFET switches from the cut-off region to the saturation region, at which time the gate-source voltage vGS1 Small, driving current i G Large, so that the gate-source voltage v of the driven power device T1 GS Rapidly rises to the threshold voltage V th , reducing the activation delay.
[0092] At time t1, the drain current i D Rapidly rising, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Gradually increase to V p2 , the P-MOSFET still works in the saturation region, and its gate-source voltage v GS1 Increase, driving current i G Reduce, thereby reducing the drain current change rate di of the driven power device T1 D / dt, thereby reducing the current stress of T1.
[0093] At time t2, the drain-source voltage v DS Rapidly decreases, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Switch to V p1 , the P-MOSFET gate-source voltage v GS1 Decrease, drive current i G Increase, accelerate v DS The falling process reduces the turn-on loss of T1.
[0094] At time t3, the gate-source voltage v GS Rapidly rise to positive bias voltage V CC , the charging current source controls the output voltage v of the voltage control circuit ctrl1 Still maintain V p1 , to provide a larger driving current i G , reducing the activation delay.
[0095] At time t4, the transient process of turning on the driven power device T1 ends, and the output voltage v of the voltage control circuit controlled by the charging current source is ctrl1 Switch to V p3 , so that the P-MOSFET works in the variable resistance region, and the gate-source voltage of the driven power device T1 is clamped at the turn-on bias voltage V CC .
[0096] like Figure 7 As shown, Figure 7 This is a timing diagram of the turn-off transient process of a fast-switching dynamic current source drive circuit, specifically including:
[0097] Before time t5, the driven power device T1 is in the on steady state, i D is the load current I L , v GS is the positive bias voltage V CC , v ctrl2 is the negative bias voltage V EE So that the N-MOSFET is turned off. At t5, v ctrl2 From the negative bias voltage V EE Fast switching to voltage V n1 , the N-MOSFET switches from the cut-off region to the saturation region, at which time the gate-source voltage v GS2 Large, driving current i G Large, so that the gate-source voltage v of the driven power device T1 GS Rapidly decreases to Miller voltage V miller , reducing the shutdown delay.
[0098] At time t6, the drain-source voltage v DS Rapidly rising, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Still maintain V n1 , to provide a larger driving current i G , acceleration v DS rising process, thereby reducing the turn-off loss of T1.
[0099] At time t7, the drain current i D Rapidly decreases, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n2 , the N-MOSFET gate-source voltage v GS2 Decrease, drive current i G Reduce, thereby reducing the drain current change rate di of the driven power device T1 D / dt, thereby reducing the voltage stress of T1.
[0100] At time t8, the gate-source voltage v GS Rapidly decreases to negative bias voltage V EE , the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n1 , the N-MOSFET gate-source voltage v GS2 Increase, driving current i G Increase, decrease turn-off delay.
[0101] At time t9, the transient process of turning off the driven power device T1 ends, and the output voltage v of the voltage control circuit controlled by the discharge current source is ctrl2 Switch to V n3 , so that the N-MOSFET works in the variable resistance region, and the gate-source voltage of the driven power device T1 is clamped at the turn-off bias voltage V EE .
[0102] like Figure 8 As shown, Figure 8 This diagram shows the switching waveform of the output drive current of an inductor-based resonant current source circuit. Specifically, the parasitic inductance of the drive loop is set to 50nH, and the output drive current of the current source circuit is set to switch between 5A and 10A. The resonant current source circuit takes 363ns to switch the output current from 10A to 5A.
[0103] like Figure 9 As shown, Figure 9 This diagram shows the switching waveforms of the output drive current of a BJT-based mirror current source circuit. Specifically, the drive loop parasitic inductance is set to 50nH, and the output drive current of the current source circuit is set to switch between 5A and 10A. The mirror current source circuit takes 77ns to switch from 10A to 5A, and 130ns to switch from 5A to 10A.
[0104] like Figure 10 As shown, Figure 10 This figure shows the switching waveform of the output drive current of a fast-switching current source circuit proposed in the present invention. Specifically, the parasitic inductance of the drive loop is set to 50nH, and the output drive current of the current source circuit is set to switch between 5A and 10A. The proposed current source drive circuit takes 58ns to switch from 10A to 5A, and 79ns to switch from 5A to 10A.
[0105] As shown in Table 1, Table 1 compares the current switching speeds of a conventional current source driving circuit and the proposed current source driving circuit.
[0106] Table 1
[0107]
[0108]
[0109] Specifically, the driving current switching time of the inductor-based resonant current source is 5.29 times that of the method proposed in the embodiment of the present invention. The driving current switching time of the BJT-based mirror current source is 1.51 times that of the method proposed in the embodiment of the present invention. Therefore, the current source drive circuit proposed in the embodiment of the present invention can achieve a faster driving current switching speed than the current current source drive circuit.
[0110] An embodiment of the present invention provides a control method for a current source drive circuit. By regulating the output voltages of a charging current source control voltage control circuit and a discharging current source control voltage control circuit, the gate-source voltage of a MOSFET in the current source drive circuit is regulated to achieve dynamic regulation of the drive current during the switching transient of the power device T1. The regulation method is simpler, and the drive current regulation speed of the method is faster. The method can be applied to wide bandgap power devices with fast switching transients.
[0111] Example 3
[0112] The present invention also provides a double-pulse test circuit, comprising: a high-voltage DC power supply V1, a DC bus capacitor C1, a load inductor L1, a freewheeling diode D1, a driven power device T1, and the current source drive circuit according to any one of the first aspects;
[0113] The high-voltage DC power supply V1 and the DC bus capacitor C1 are connected in parallel;
[0114] The load inductor L1 and the freewheeling diode D1 are connected in parallel, and the anode of the freewheeling diode D1 is connected to the drain D of the driven power device T1;
[0115] The source electrode S of the driven power device T1 is connected to the negative electrode of the high-voltage DC power supply V1;
[0116] The cathode of the freewheeling diode D1 is connected to the anode of the high-voltage DC power supply V1;
[0117] The driven power device T1 is connected to the current source driving circuit and is turned on or off according to the on / off driving current output by the current source driving circuit.
[0118] like Figure 3 As shown, a double pulse test circuit includes: a high voltage DC power supply V1, a DC bus capacitor C1, a load inductor L1, a freewheeling diode D1, a driven power device T1 and a current source drive circuit. Among them, the source of the P-MOS tube M1 is connected to the positive power supply V CC The drain is connected to the gate G of the driven power device T1, and the gate is connected to the output of the charging current source control voltage regulation circuit. The source of the N-MOS tube M2 is connected to the negative power supply V EE The drain is connected to the gate G end of the driven power device T1, and the gate is connected to the output end of the discharge current source control voltage regulation circuit.
[0119] Optionally, the driven power device T1 is a three-pin device or a four-pin device;
[0120] When the driven power device T1 is a three-pin device, the Kelvin source KS and the source S are regarded as the same point.
[0121] The driven power device T1 may also be a Si MOS or an IGBT. When the driven power device T1 is a three-pin device, the Kelvin source KS and the source S are regarded as the same point.
[0122] In the double-pulse test circuit shown in the figure, the upper transistor (HMT) is always driven off by a negative voltage, acting as a freewheeling diode. The lower transistor (BMT) is the SiC MOSFET device under test. At the start of the test, the control circuit issues the first drive pulse, turning on the BMT. The DC bus charges the load inductor, and the load current increases linearly. After a period of time, the first drive pulse ends, and the BMT turns off. Due to the stray resistance of the freewheeling loop, the load current slowly decays. After a period of time, the control circuit issues a second drive pulse, turning the BMT back on. The freewheeling diode enters reverse recovery. Driven by the reverse recovery current in the same direction as the load current, the SiC MOSFET drain current overshoots. After a period of time, the second drive pulse ends, and the SiC MOSFET drain current rapidly decreases. The large di / dt generated during the turn-off process acts on the parasitic inductance of the loop, causing a voltage overshoot. Compared to single-pulse testing, double-pulse testing better simulates the current overshoot that can occur in actual power electronic devices.
[0123] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A current source driving circuit, wherein the driven power device T1 is a SiC MOS, including a gate G, a drain D, a source S and a Kelvin source KS; characterized in that: The current source driving circuit includes: a charging current source driving circuit, a discharging current source driving circuit, a charging current source control voltage regulating circuit and a discharging current source control voltage regulating circuit; The charging current source driving circuit adopts a P-MOS tube M1, the source of the P-MOS tube M1 is connected to the positive power supply V CC The drain is connected to the gate G terminal of the driven power device T1, and the gate is connected to the output terminal of the charging current source control voltage regulation circuit; the charging current source driving circuit is used to provide the driving current required for the transient process of turning on the driven power device T1 and the gate-source bias voltage V of T1 when turning on the steady state. CC ; The discharge current source driving circuit adopts N-MOS tube M2, the source of N-MOS tube M2 is connected to the negative power supply V EE The drain is connected to the gate G terminal of the driven power device T1, and the gate is connected to the output terminal of the discharge current source control voltage regulation circuit; the discharge current source driving circuit is used to provide the driving current required for the transient shutdown process of the driven power device T1 and the gate-source bias voltage V of T1 when the device is turned off in a steady state EE ; The charging current source controls the output voltage v of the voltage control circuit ctrl1 , used to regulate the gate-source voltage v of the P-MOS tube M1 GS1 , so that when the driven power device T1 is turned on transiently, the P-MOS tube M1 is controlled to operate in the saturation region, so as to dynamically adjust the turn-on drive current output by M1; and when the driven power device T1 is turned on steady state, the P-MOS tube M1 is controlled to operate in the variable resistance region, so that the gate-source voltage of the driven power device T1 is clamped at the turn-on steady state bias voltage V CC ; The discharge current source controls the output voltage v of the voltage control circuit ctrl2 , used to regulate the gate-source voltage v of the N-MOS tube M2 GS2 , so that when the driven power device T1 is turned off transiently, the N-MOS tube M2 is controlled to operate in the saturation region to dynamically adjust the turn-off drive current output by M2; and when the driven power device T1 is turned off steady state, the N-MOS tube M2 is controlled to operate in the variable resistance region to clamp the gate-source voltage of the driven power device T1 to the turn-off steady-state bias voltage V EE .
2. The current source driving circuit according to claim 1, wherein: The positive power supply is 15V, and the negative power supply is -5V.
3. The current source driving circuit according to claim 1, wherein: The charging current source control voltage regulation circuit includes an FPGA and a first DAC; The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the first DAC, and the analog signal output terminal of the first DAC is connected to the gate of the P-MOS transistor M1.
4. The current source driving circuit according to claim 3, wherein: The discharge current source control voltage regulation circuit includes the FPGA and the second DAC; The digital signal output terminal of the FPGA is connected to the digital signal input terminal of the second DAC, and the analog signal output terminal of the second DAC is connected to the gate of the N-MOS transistor M2.
5. A method for controlling a current source driving circuit, characterized in that: Based on the circuit according to any one of claims 1 to 4, within one cycle, the driven power device T1 includes a turn-on process and a turn-off process; the control method includes: S1, before the driven power device T1 is in the turn-on process, the charging current source controls the output voltage v of the voltage control circuit ctrl1 is the positive bias voltage V CC ; Among them, the positive bias voltage V CC The gate-source bias voltage for turning on the steady state of the driven power device T1; S2, at time t0, the charging current source controls the output voltage v of the voltage control circuit ctrl1 From the positive bias voltage V CC Switch to voltage V p1 , maintaining voltage V p1 To time t1; S3, at time t1, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Increase to V p2 , maintained until t2; where V p1 Less than V p2 , V p1 and V p2 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the saturation region; S4, at time t2, the charging current source controls the output voltage v of the voltage control circuit ctrl1 Switch to V p1 , maintaining voltage V p1 To time t4; S5. At time t4, the charging current source controls the output voltage v of the voltage control circuit. ctrl1 Switch to V p3 , maintained until the driven power device T1 starts to turn off; where V p3 The range of values makes the P-MOS tube M1 used in the charging current source driving circuit work in the variable resistance area; S6, at time t5 before the driven power device T1 is turned off, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 is the negative bias voltage V EE ; Among them, the negative bias voltage V EE is the gate-source bias voltage of the driven power device T1 in the off-state steady state; S7, at time t5, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 From the negative bias voltage V EE Switch to voltage V n1 , maintaining voltage V n1 To time t7; S8, at time t7, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Gradually reduce to V n2 , maintained until t8; where V n1 Greater than V n2 , V n1 and V n2 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the saturation region; S9, at time t8, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n1 , maintaining voltage V n1 Until time t9; S10, at time t9, the discharge current source controls the output voltage v of the voltage control circuit ctrl2 Switch to V n3 , and maintain until the next cycle of the driven power device T1 begins; where V n3 The range of values makes the N-MOS tube M2 used in the discharge current source driving circuit work in the variable resistance area.
6. A double pulse test circuit, characterized in that: include: A high-voltage DC power supply V1, a DC bus capacitor C1, a load inductor L1, a freewheeling diode D1, a driven power device T1, and a current source drive circuit according to any one of claims 1 to 4; The high-voltage DC power supply V1 and the DC bus capacitor C1 are connected in parallel; The load inductor L1 and the freewheeling diode D1 are connected in parallel, and the anode of the freewheeling diode D1 is connected to the drain D of the driven power device T1; The source electrode S of the driven power device T1 is connected to the negative electrode of the high-voltage DC power supply V1; The cathode of the freewheeling diode D1 is connected to the anode of the high-voltage DC power supply V1; The driven power device T1 is connected to the current source driving circuit and is turned on or off according to the on / off driving current output by the current source driving circuit.
7. The double pulse test circuit according to claim 6, wherein: The driven power device T1 is a three-pin device or a four-pin device; When the driven power device T1 is a three-pin device, the Kelvin source KS and the source S are regarded as the same point.