Time synchronization method and device based on phase-locked loop LMS algorithm and medium

By applying the time synchronization method based on the phase-locked loop LMS algorithm in the power system, the problem of fast and accurate time synchronization in the dynamic environment is solved, and the rapid compensation and time synchronization of frequency fluctuations are achieved, which improves the stability and reliability of the system.

CN119921762APending Publication Date: 2025-05-02STATE GRID SHANGHAI MUNICIPAL ELECTRIC POWER CO
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Patent Information

Application Number
CN202411762311.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-03
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

In a dynamically changing environment, it is difficult for the prior art to achieve fast and accurate time synchronization, especially in power systems. Environmental factors such as temperature, humidity and electromagnetic interference will cause clock errors and frequency fluctuations, affecting the performance of satellite timing systems.

Method used

The time synchronization method based on the phase-locked loop LMS algorithm is adopted. By initializing the phase-locked loop parameters, calculating the error signal, filtering, and adjusting the filter parameters adaptively by using the LMS algorithm to achieve compensation for frequency fluctuations and time synchronization.

Benefits of technology

This method can quickly lock the frequency and phase of the input signal in a dynamically changing environment, reduce the risk of lockout, improve the stability and reliability of the system, and has low computing complexity, and is suitable for hardware with limited resources.

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Abstract

The invention relates to a time synchronization method and device based on a phase-locked loop LMS algorithm and a medium, and the method comprises the following steps: initializing parameters of a phase-locked loop which comprises a phase discriminator, a loop filter and a voltage-controlled oscillator; the phase discriminator receives an input signal and an output signal of the voltage-controlled oscillator and calculates an error signal; inputting the error signal into a loop filter for filtering processing, and outputting a filtered error signal; the filtered error signal is used as an input control voltage of the voltage-controlled oscillator to control the output frequency of the voltage-controlled oscillator; and according to the corresponding relation between the frequency output by the voltage-controlled oscillator and the time error, filter parameters are adaptively adjusted based on the error signal by using an LMS algorithm, frequency fluctuation is compensated, and time synchronization is realized. Compared with the prior art, the method has the advantages of high stability and reliability and the like.
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Description

Technical Field

[0001] The present invention relates to the field of dynamic monitoring of electric power systems, and in particular to a time synchronization method, device and medium based on a phase-locked loop (LMS) algorithm. Background Art

[0002] Wireless sensor networks are a promising new form of network, which are widely used in large-scale or high-resolution monitoring of environmental data. Undoubtedly, time plays a vital role in wireless sensor networks. Without accurate time information, the data collected by sensor nodes may lose key previous and next data packets. Most applications add timestamps to the measured data, but these timestamps are only meaningful when the time consistency between nodes is high. Therefore, time synchronization is extremely important for wireless sensor networks.

[0003] The synchronized phasor measurement unit (PMU) can perform synchronized phasor measurement on each node in the power grid under the control of the Beidou satellite timing signal. Its measurement results can provide a relatively critical basic data source for the safety and stability analysis of the power grid. Since the voltage, current amplitude and phase angle of the generator set and the transmission line change rapidly over time, they can directly reflect the dynamic stability of the power system. In order to ensure the safe and stable operation of the regional power grid, major power grids at home and abroad have accelerated the application of wide area measurement systems (WAMS) and PMUs, and installed a large number of PMUs in some hub substations and large power plants.

[0004] Satellite timing relies on precise clock synchronization, and changes in the environment may cause clock errors to increase. Environmental factors interact with other components in the circuit and may introduce power supply noise. This noise will have a negative impact on the performance of the satellite timing system, especially in precision electronic equipment that requires low noise, and may cause signal distortion, especially in high-frequency signal transmission. Signal distortion directly affects the accuracy and reliability of satellite timing. Environmental changes may cause changes in the frequency response of the circuit, which will affect the frequency stability of the receiver in the satellite timing system. When environmental conditions in the circuit, such as temperature, humidity, and electromagnetic interference, change, frequency fluctuations will directly affect the time accuracy. Usually in actual measurements, due to a series of factors such as temperature changes and aging of component parameters, the time and frequency measurement equipment that has been calibrated before the formal measurement will bring more than tens of picoseconds of system measurement errors when used, and the measurement accuracy is low. Therefore, technically, a time and frequency measurement method that can be calibrated in real time during formal measurements is urgently needed. Using a crystal oscillator as a clock time source, after being tamed by an external reference time source, when the reference time source is interrupted, the high-performance time retention of the crystal oscillator is achieved by compensating for the aging and temperature of the crystal oscillator.

[0005] As a clock reference, the crystal oscillator has the characteristic of accumulating time errors. This is because the oscillation frequency of the crystal oscillator will change slightly over time. This change may be caused by factors such as aging of the crystal material, temperature changes, power supply voltage fluctuations, etc. These factors will cause the frequency output by the crystal oscillator to deviate from the ideal value, thus causing the clock time error.

[0006] In practical applications, in order to reduce the impact of this error on system performance, some measures are usually taken to improve the stability and accuracy of the crystal oscillator. For example, high-quality crystal materials can be used to make the crystal oscillator to reduce the impact of aging and temperature changes on the frequency; constant temperature control technology can be used to keep the operating temperature of the crystal oscillator stable, thereby reducing the impact of temperature changes on the frequency; power supply voltage stabilization technology can also be used to ensure the stability of the crystal oscillator's power supply voltage, thereby reducing the impact of power supply voltage fluctuations on the frequency.

[0007] In addition, the accumulated time error of the crystal oscillator can be calibrated and compensated through software algorithms. For example, the actual frequency of the crystal oscillator can be measured regularly and compared with the ideal value to calculate the error value, and then the counting speed of the clock can be adjusted according to the error value to achieve the purpose of calibration. This method requires certain computing resources and storage space, but it can effectively reduce the impact of the accumulated time error on system performance. However, the speed of calculation greatly limits its application. In the face of some systems that require fast response, there is currently a lack of relevant calibration and compensation methods. Summary of the invention

[0008] The purpose of the present invention is to provide a time synchronization method, device and medium based on a phase-locked loop (LMS) algorithm, so as to achieve rapid time synchronization in a dynamically changing environment.

[0009] The purpose of the present invention can be achieved by the following technical solutions:

[0010] A time synchronization method based on a phase-locked loop (LMS) algorithm comprises the following steps:

[0011] Initializing parameters of a phase-locked loop, wherein the phase-locked loop includes a phase detector, a loop filter, and a voltage-controlled oscillator;

[0012] The phase detector receives the input signal and the output signal of the voltage-controlled oscillator and calculates the error signal;

[0013] The error signal is input into the loop filter for filtering, and the filtered error signal is output;

[0014] Using the filtered error signal as an input control voltage of a voltage-controlled oscillator to control the output frequency of the voltage-controlled oscillator;

[0015] According to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error, the LMS algorithm is used to adaptively adjust the filter parameters based on the error signal to compensate for the frequency fluctuation and achieve time synchronization.

[0016] The initialization phase-locked loop parameters are specifically:

[0017] 1) Determine system parameters: Determine the key parameters of the phase-locked loop based on application requirements and system design;

[0018] 2) Set initial conditions: Set the initial state of the phase-locked loop, including the initial values ​​of the phase error, frequency error, and any internal state variables;

[0019] 3) Selecting the working mode: Selecting the phase-locked loop working mode according to the application requirements, wherein the working mode includes a locking mode, a frequency capture mode or a phase capture mode;

[0020] 4) Initialize loop filter parameters, including filter coefficients and sampling rate;

[0021] 5) Calibrate hardware components: For phase-locked loops that contain analog components, perform hardware calibration, including adjusting bias current, voltage levels, or other relevant parameters.

[0022] The voltage controlled oscillator changes the output frequency by voltage control:

[0023] φ out =ω0 t +K VCO ∫V cont dt+φ0

[0024]

[0025] Among them, V cont is the input voltage control voltage, φ0 is the input phase, K VCO is the gain coefficient of the voltage-controlled oscillator, t is the time, ω0 is the initial angular frequency, ω out is the output angular frequency, φ out is the output phase.

[0026] The error signal is expressed as:

[0027] e(n)=d(n)-V out (n) = d(n) - V T (n)w(n)=d(n)-w T (n)V(n)

[0028] Where, e(n) represents the error signal, d(n) represents the desired signal, V out (n) represents the actual output response of the phase-locked loop, V(n) represents the input signal, w(n) represents the weight,

[0029] V(n)=[V(n) V(n-1) ... V(nL)] T

[0030]

[0031] w(n)=[w0(n)w1(n)...w L (n)] T

[0032] L represents the signal length.

[0033] The LMS algorithm performs adaptive optimization according to the criterion of minimizing the mean square value of the error signal, that is, the mean square error is:

[0034] ξ(n)=E[e 2 (n)]=E[d 2 (n)]+w T (n)E[V(n)V T (n)]w(n)-2E[d(n)V T (n)]w(n)

[0035] Assume that the autocorrelation matrix of the input signal is:

[0036] R=E[V(n)V T (n)]

[0037] The cross-correlation matrix between the expected signal and the input signal is:

[0038] P=E[d(n)V(n)]=E[d(n)V(n)d(n)V(n-1)...d(n)V(nL)]

[0039] Then, the mean square error is expressed as:

[0040] ξ(n)=E[d 2 (n)]+w T Rw-2P T w

[0041] Compute the gradient of the mean squared error performance surface:

[0042]

[0043] Let the gradient be zero and find the optimal weight vector or Wiener solution corresponding to the minimum mean square error:

[0044] w * =R -1 P

[0045] The weight vector is calculated iteratively using the steepest descent method:

[0046] w(n+1)=w(n)+μ(-▽(n))

[0047] The LMS algorithm uses square error instead of mean square error:

[0048]

[0049] and use a rough estimate of the gradient at each iteration Instead of exact value

[0050]

[0051] The next weight vector w(n+1) is equal to the current weight vector w(n) plus a correction amount, which is equal to the weighted value of the error signal e(n). The weighting coefficient is 2μV(n), which is proportional to the current input signal.

[0052] The LMS algorithm improves the weighting coefficients to speed up the convergence:

[0053]

[0054] The corresponding relationship between the frequency and the time error is:

[0055]

[0056] Among them, Δf is the frequency change, Δt is the time error, ppm is the frequency accuracy, and f is the frequency.

[0057] According to the correspondence between the frequency output by the voltage-controlled oscillator and the time error, the filter parameters are adaptively adjusted based on the error signal using the LMS algorithm to compensate for the frequency fluctuation and achieve time synchronization specifically as follows:

[0058] The predicted value of the next weight vector obtained by the LMS algorithm is continuously iterated to obtain the error e(n) approaching the true value, thereby obtaining the output angular frequency of the voltage-controlled oscillator. The output frequency f is calculated, and the clock deviation is obtained according to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error. The local clock of the node approaches the real time by compensating the clock deviation, thus achieving time synchronization.

[0059] A time synchronization device based on a phase-locked loop (LMS) algorithm comprises a memory, a processor, and a program stored in the memory. When the processor executes the program, the method described above is implemented.

[0060] A storage medium stores a program, which implements the method described above when executed.

[0061] Compared with the prior art, the present invention has the following beneficial effects:

[0062] (1) The present invention uses the LMS algorithm to minimize the output error by continuously adjusting the coefficients of the filter. This adaptive capability enables the phase-locked loop to lock the frequency and phase of the input signal more quickly. In a dynamically changing environment, fast convergence is particularly important because it can reduce the risk of loss of lock and improve the stability and reliability of the system.

[0063] (2) The LMS algorithm adopted in the present invention has a certain suppressive effect on noise, which means that the phase-locked loop can maintain stable performance even in a noisy environment.

[0064] (3) The real-time update capability of the LMS algorithm used in the present invention enables the phase-locked loop to respond instantly to changes in the input signal, which is an important advantage for systems that require fast response. Real-time ensures that the phase-locked loop can adapt to new signal conditions in the shortest possible time and maintain optimal working conditions.

[0065] (4) The LMS algorithm adopted by the present invention has low computational complexity and can be run on hardware with limited resources while maintaining good performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 The figure is a flow chart of the method of the present invention. DETAILED DESCRIPTION

[0067] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0068] Example 1

[0069] This embodiment provides a time synchronization method based on a phase-locked loop LMS algorithm, such as Figure 1 As shown, the following steps are included:

[0070] Initializing parameters of a phase-locked loop, wherein the phase-locked loop includes a phase detector, a loop filter, and a voltage-controlled oscillator;

[0071] The phase detector receives the input signal and the output signal of the voltage-controlled oscillator and calculates the error signal;

[0072] The error signal is input into the loop filter for filtering, and the filtered error signal is output;

[0073] Using the filtered error signal as an input control voltage of a voltage-controlled oscillator to control the output frequency of the voltage-controlled oscillator;

[0074] According to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error, the LMS algorithm is used to adaptively adjust the filter parameters based on the error signal to compensate for the frequency fluctuation and achieve time synchronization.

[0075] Satellite time synchronization is underground and cannot be connected to the Internet or other time sources. In order to resynchronize the clock, a crystal oscillator is used to synchronize with the local clock. According to the actual situation, the clock will be affected by the change of the crystal frequency. Formula (1) is the relationship between the time error and the frequency:

[0076]

[0077] Among them, Δf is the frequency change, Δt is the time error, ppm is the frequency accuracy, and f is the frequency. It can be found that the accumulated time error of the crystal oscillator is mainly related to the frequency. If you want to maintain the crystal oscillator frequency without being affected by other factors, a certain frequency compensation is required. This embodiment uses an adaptive algorithm (LMS) algorithm to compensate for frequency fluctuations, which will change after a period of time and then compensate repeatedly.

[0078] The present invention adopts a method for improving a phase-locked loop and applies an LMS algorithm to the phase-locked loop. In the process of locking the phase of the phase-locked loop, filter parameters can be adaptively adjusted to optimize signal quality.

[0079] First, initialize the phase-locked loop parameters, including the filter weight, step factor, etc., specifically:

[0080] 1) Determine system parameters: Determine the key parameters of the phase-locked loop based on application requirements and system design.

[0081] 2) Set initial conditions: Set the initial state of the phase-locked loop, including the phase error, frequency error, and the initial values ​​of any internal state variables; these initial conditions are usually set to the steady-state operating point of the system.

[0082] 3) Selecting an operating mode: Selecting a phase-locked loop operating mode according to application requirements, wherein the operating mode includes a locking mode, a frequency capture mode, or a phase capture mode.

[0083] 4) Initialize loop filter parameters, including filter coefficients and sampling rate.

[0084] 5) Calibrate hardware components: For phase-locked loops that contain analog components, perform hardware calibration, including adjusting bias current, voltage levels, or other relevant parameters.

[0085] According to the phase-locked loop configuration, the voltage-controlled oscillator (VCO) changes the output frequency by means of a voltage-controlled voltage:

[0086] φ out =ω0t+KVCO ∫V cont dt+φ0 (2)

[0087]

[0088] Among them, V cont is the input voltage control voltage, φ0 is the input phase, K VCO is the gain coefficient of the voltage-controlled oscillator, t is the time, ω0 is the initial angular frequency, ω out is the output angular frequency, φ out is the output phase.

[0089] In the LMS algorithm, the error calculation is defined by the difference between the desired signal and the output signal.

[0090] Let V(n) be the input signal vector:

[0091] V(n)=[V(n)V(n-1)...V(nL)] T (4)

[0092] V out (n) is the actual output response of the phase-locked loop:

[0093]

[0094] w(n)=[w0(n)w1(n)...w L (n)] T (6)

[0095] Then V out (n) can be expressed as:

[0096] V out (n) = V T (n)w(n)=w T (n)V(n) (7)

[0097] The error signal is expressed as:

[0098] e(n)=d(n)-V out (n) = d(n) - V T (n)w(n)=d(n)-w T (n)V(n) (8)

[0099] Where, e(n) represents the error signal, d(n) represents the desired signal, V out (n) represents the actual output response of the phase-locked loop, V(n) represents the input signal, w(n) represents the weight, and L represents the signal length.

[0100] The LMS algorithm performs adaptive optimization according to the criterion of minimizing the mean square value of the error signal, that is, the mean square error is:

[0101] ξ(n)=E[e 2 (n)]=E[d 2 (n)]+w T (n)E[V(n)V T (n)]w(n)-2E[d(n)V T (n)]w(n) (9)

[0102] Assume that the autocorrelation matrix of the input signal is:

[0103] R=E[V(n)V T (n)] (10)

[0104] The cross-correlation matrix between the expected signal and the input signal is:

[0105] P=E[d(n)V(n)]=E[d(n)V(n)d(n)V(n-1)...d(n)V(nL)] (11)

[0106] Then, the mean square error is expressed as:

[0107] ξ(n)=E[d 2 (n)]+w T Rw-2P T w (12)

[0108] Under the premise that the input signal and the reference response are both stationary random signals, the mean square error is a quadratic function of the components of the weight vector. The function graph is a hyperparaboloid with a concave center in a two-dimensional space and a unique minimum point. This surface is called the mean square error performance surface, or simply the performance surface.

[0109] Compute the gradient of the mean squared error performance surface:

[0110]

[0111] Let the gradient be zero and find the optimal weight vector or Wiener solution corresponding to the minimum mean square error:

[0112] w * =R -1 P (14)

[0113] The weight vector is calculated iteratively using the steepest descent method:

[0114] w(n+1)=w(n)+μ(-▽(n)) (15)

[0115] The LMS algorithm uses square error instead of mean square error:

[0116]

[0117] and use a rough estimate of the gradient at each iteration Instead of exact value

[0118]

[0119] The next weight vector w(n+1) is equal to the current weight vector w(n) plus a correction amount, which is equal to the weighted value of the error signal e(n). The weighting coefficient is 2μV(N), which is proportional to the current input signal.

[0120] The predicted value of the next weight vector obtained by the LMS algorithm is continuously iterated to obtain the error e(n) approaching the true value, thereby obtaining the output angular frequency of the voltage-controlled oscillator. The output frequency f is calculated, and the clock deviation is obtained according to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error, that is, formula (1). The local clock of the node approaches the real time by compensating the clock deviation, thus achieving time synchronization.

[0121] In the LMS algorithm, the impact of noise is a key issue because it directly affects the performance and convergence speed of the algorithm. Compared with the basic LMS algorithm, the NLMS algorithm introduces a normalization mechanism when updating the filter coefficients, which enables the algorithm to better adapt to different input signal conditions, especially when the input signal power varies greatly.

[0122] Therefore, this embodiment changes the LMS algorithm with a fixed step size factor into a variable step size NLMS algorithm according to the time-varying input signal, and improves the weighting coefficient to speed up the convergence speed:

[0123]

[0124] The addition of a non-fixed compensation factor improves the disadvantage of the slow convergence speed of the LMS algorithm, simplifies the calculation, and has higher accuracy.

[0125] Example 2

[0126] The above is an introduction to a method embodiment. The following is a further explanation of the solution of the present invention through an apparatus embodiment.

[0127] A time synchronization device based on a phase-locked loop (LMS) algorithm comprises a memory, a processor, and a program stored in the memory, wherein the processor implements the method described in the above embodiment 1 when executing the program. Preferably, the device comprises:

[0128] Initialization module: initializing parameters of a phase-locked loop, wherein the phase-locked loop includes a phase detector, a loop filter and a voltage-controlled oscillator;

[0129] Error signal calculation module: The phase detector receives the input signal and the output signal of the voltage-controlled oscillator and calculates the error signal;

[0130] Filter module: inputs the error signal into the loop filter for filtering and outputs the filtered error signal;

[0131] Frequency output module: uses the filtered error signal as the input control voltage of the voltage-controlled oscillator to control the output frequency of the voltage-controlled oscillator;

[0132] Adaptive compensation module: According to the correspondence between the frequency and time error output by the voltage-controlled oscillator, the filter parameters are adaptively adjusted based on the error signal using the LMS algorithm to compensate for frequency fluctuations and achieve time synchronization.

[0133] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the described module can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0134] If the above functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program code.

[0135] The preferred specific embodiments of the present invention are described in detail above. It should be understood that a person skilled in the art can make many modifications and changes based on the concept of the present invention without creative work. Therefore, any technical solution that can be obtained by a person skilled in the art through logical analysis, reasoning, or limited experiments based on the concept of the present invention on the basis of the prior art should be within the scope of protection determined by the claims.

Claims

1. A time synchronization method based on a phase-locked loop LMS algorithm, characterized in that: The following steps are involved: Initializing parameters of a phase-locked loop, wherein the phase-locked loop includes a phase detector, a loop filter, and a voltage-controlled oscillator; The phase detector receives the input signal and the output signal of the voltage-controlled oscillator and calculates the error signal; The error signal is input into the loop filter for filtering, and the filtered error signal is output; Using the filtered error signal as an input control voltage of a voltage-controlled oscillator to control the output frequency of the voltage-controlled oscillator; According to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error, the LMS algorithm is used to adaptively adjust the filter parameters based on the error signal to compensate for the frequency fluctuation and achieve time synchronization.

2. A time synchronization method based on a phase-locked loop (LMS) algorithm according to claim 1, characterized in that: The initialization phase-locked loop parameters are specifically: 1) Determine system parameters: Determine the key parameters of the phase-locked loop based on application requirements and system design; 2) Set initial conditions: Set the initial state of the phase-locked loop, including the initial values ​​of the phase error, frequency error, and any internal state variables; 3) Selecting the working mode: Selecting the phase-locked loop working mode according to the application requirements, wherein the working mode includes a locking mode, a frequency capture mode or a phase capture mode; 4) Initialize loop filter parameters, including filter coefficients and sampling rate; 5) Calibrate hardware components: For phase-locked loops that contain analog components, perform hardware calibration, including adjusting bias current, voltage levels, or other relevant parameters.

3. The time synchronization method based on the phase-locked loop (LMS) algorithm according to claim 1, characterized in that: The voltage controlled oscillator changes the output frequency by voltage control: f out =ω0t+K VCO ∫V cont dt+φ0 Among them, V cont is the input voltage control voltage, φ0 is the input phase, K VCO is the gain coefficient of the voltage-controlled oscillator, t is the time, ω0 is the initial angular frequency, ω out is the output angular frequency, φ out is the output phase.

4. The time synchronization method based on the phase-locked loop (LMS) algorithm according to claim 1, characterized in that: The error signal is expressed as: e(n)=d(n)-V out (n)=d(n)-V T (n)w(n)=d(n)-w T (n)V(n) Where, e(n) represents the error signal, d(n) represents the desired signal, V out (n) represents the actual output response of the phase-locked loop, V(n) represents the input signal, w(n) represents the weight, V(n)=[V(n)V(n-1)...V(nL)] T w(n)=[w0(n)w1(n)...w L (n)] T L represents the signal length.

5. A time synchronization method based on a phase-locked loop (LMS) algorithm according to claim 4, characterized in that: The LMS algorithm performs adaptive optimization according to the criterion of minimizing the mean square value of the error signal, that is, the mean square error is: ξ(n)=E[e 2 (n)]=E[d 2 (n)]+w T (n)E[V(n)V T (n)]w(n)-2E[d(n)V T (n)]w(n) Assume that the autocorrelation matrix of the input signal is: R=E[V(n)V T (n)] The cross-correlation matrix between the expected signal and the input signal is: P=E[d(n)V(n)]=E[d(n)V(n)d(n)V(n-1)...d(n)V(nL)] Then, the mean square error is expressed as: ξ(n)=E[d 2 (n)]+w T Rw-2P T w Compute the gradient of the mean squared error performance surface: Let the gradient be zero and find the optimal weight vector or Wiener solution corresponding to the minimum mean square error: w * =R -1 P The weight vector is calculated iteratively using the steepest descent method: The LMS algorithm uses square error instead of mean square error: and use a rough estimate of the gradient at each iteration Instead of exact value The next weight vector w(n+1) is equal to the current weight vector w(n) plus a correction amount, which is equal to the weighted value of the error signal e(n). The weighting coefficient is 2μV(n), which is proportional to the current input signal.

6. A time synchronization method based on a phase-locked loop (LMS) algorithm according to claim 5, characterized in that: The LMS algorithm improves the weighting coefficients to speed up the convergence:

7. The time synchronization method based on the phase-locked loop (LMS) algorithm according to claim 1, characterized in that: The corresponding relationship between the frequency and the time error is: Among them, Δf is the frequency change, Δt is the time error, ppm is the frequency accuracy, and f is the frequency.

8. The time synchronization method based on the phase-locked loop (LMS) algorithm according to claim 7, characterized in that: According to the correspondence between the frequency output by the voltage-controlled oscillator and the time error, the filter parameters are adaptively adjusted based on the error signal using the LMS algorithm to compensate for the frequency fluctuation and achieve time synchronization specifically as follows: The predicted value of the next weight vector obtained by the LMS algorithm is continuously iterated to obtain the error e(n) approaching the true value, thereby obtaining the output angular frequency ω of the voltage-controlled oscillator. out , and find the output frequency f. According to the corresponding relationship between the frequency output by the voltage-controlled oscillator and the time error, the clock deviation is obtained. The local clock of the node approaches the real time through the compensation of the clock deviation, thus achieving time synchronization.

9. A time synchronization device based on a phase-locked loop (LMS) algorithm, comprising a memory, a processor, and a program stored in the memory, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 8 is implemented.

10. A storage medium having a program stored thereon, characterized in that: When the program is executed, the method according to any one of claims 1 to 8 is implemented.