Carrier for polishing workpiece having flat or void surface

By designing a substrate carrier head with isolation pressure function, the burning plane phenomenon of the CMP system when dealing with wafers with planar edges is solved, achieving a more uniform planarization effect and a longer equipment life.

CN119923711APending Publication Date: 2025-05-02ASM IP +1
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Patent Information

Application Number
CN202380068488.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-07-29
Filing Date
2023-07-24
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

When using wafers with planar edges, existing chemical mechanical planarization (CMP) systems are prone to burning planes, resulting in uneven planarization effects, affecting yield and service life of the equipment.

Method used

A substrate carrier head is designed, including a carrier body, an elastic membrane, a membrane cavity and a membrane support plate. By isolating the pressure between the main and secondary regions of the membrane, the membrane prevents the membrane from filling the voids formed by the plane edges, thereby reducing the firing plane phenomenon.

Benefits of technology

Effectively reduce or eliminate burning plane phenomenon, improve the uniformity of wafer surface planarization, extend the service life of the equipment, and improve yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

A carrier for polishing a workpiece having a plane or void is provided. In one aspect, a substrate carrier head for a chemical mechanical planarization (CMP) system includes a carrier body including an aperture configured to receive a wafer and a film having a first surface configured to contact a surface of the wafer and a second surface opposite the first surface, the film having a primary region and a secondary region. The substrate carrier head also includes a film cavity formed along the second surface and configured to apply pressure to the film within the primary region, and a film support plate configured to support a secondary region of the film.
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Description

Incorporation by reference into any priority application

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 369,490, filed on July 26, 2022, and U.S. Provisional Patent Application No. 63 / 639,917, filed on July 29, 2022, which are hereby incorporated by reference in their entirety and for all purposes. Any and all applications claiming foreign or domestic priority identified in a PCT request filed with this application are hereby incorporated by reference in accordance with 37 CFR 1.57. Technical Field

[0002] The present disclosure relates generally to carriers for polishing workpieces, and more particularly to systems and apparatus for improving chemical mechanical planarization (CMP) performance for thin film planarization. Background Art

[0003] CMP systems are designed to planarize the surface of a wafer to provide a sufficiently flat surface when manufacturing semiconductor chips. As the process steps for manufacturing semiconductor chips become more complex and / or chip designs become smaller, the tolerance for planarizing the surface of a wafer may become more precise. Therefore, it may be desirable to improve the uniformity of planarization, which may involve identifying and reducing the source of uneven removal rates. Summary of the invention

[0004] In order to summarize the present disclosure and the benefits achieved relative to the prior art, certain objects and benefits of the present disclosure are described herein. Such objects or benefits are not all achievable in any specific embodiment. Thus, for example, those skilled in the art will recognize that the present invention can be implemented or performed in a manner that achieves or optimizes one benefit or a group of benefits taught herein without necessarily achieving other objects or benefits taught or suggested herein.

[0005] One aspect of the disclosed technology is a substrate carrier head for a chemical mechanical planarization (CMP) system, the substrate carrier head comprising: a carrier body including a hole configured to receive a wafer; a membrane having a first surface configured to contact a surface of the wafer and a second surface opposite to the first surface, the membrane having a primary zone and a secondary zone; a membrane cavity formed along the second surface and configured to apply pressure to the membrane within the primary zone; and a membrane support plate configured to support the secondary zone of the membrane.

[0006] In some embodiments, the secondary region of the membrane is isolated from the pressure applied to the primary region of the membrane.

[0007] In some embodiments, the membrane is further configured to be in substantially continuous contact with the wafer.

[0008] In some embodiments, the main region of the membrane includes a plurality of sub-regions, and the substrate carrier head further includes a processor configured to independently control the pressure applied to each sub-region.

[0009] In some embodiments, the wafer includes a planar edge that forms a void when the wafer is held by the carrier body, wherein a width of the secondary region is greater than the void to prevent the film from filling the void.

[0010] In some embodiments, the membrane support plate has an annular shape and is configured to control the pressure applied to the secondary region of the membrane.

[0011] In some embodiments, the substrate carrier head is compatible with a film controlled CMP system.

[0012] In some embodiments, the substrate carrier head further comprises: an inner plate; and an outer plate, wherein the membrane further comprises an inner ridge secured between the inner plate and the outer plate and configured to isolate the primary region from the secondary region.

[0013] In some embodiments, the substrate carrier head further comprises a membrane backing ring disposed over the outer plate and securing the membrane in place.

[0014] In some embodiments, the substrate carrier head further comprises an adhesive that bonds the secondary region of the membrane to the membrane support plate.

[0015] On the other hand is a chemical mechanical planarization (CMP) system, which includes: a substrate carrier head, the substrate carrier head including: a carrier body, the carrier body including a hole configured to receive a wafer; a membrane, the membrane having a first surface configured to contact the wafer surface and a second surface opposite to the first surface, the membrane having a main area and a secondary area; a membrane cavity, the membrane cavity is formed along the second surface and is configured to apply pressure to the membrane in the main area; and a membrane support plate, the membrane support plate is configured to support the secondary area of ​​the membrane; and a processor, the processor is configured to control the pressure applied to the membrane through the membrane cavity.

[0016] In some embodiments, the secondary region of the membrane is isolated from the pressure applied to the primary region of the membrane.

[0017] In some embodiments, the membrane is further configured to be in substantially continuous contact with the wafer.

[0018] In some embodiments, the main region of the membrane includes a plurality of sub-regions, and the substrate carrier head further includes a processor configured to independently control the pressure applied to each sub-region.

[0019] In some embodiments, the wafer includes a planar edge that forms a void when the wafer is held by the carrier body, wherein a width of the secondary region is greater than the void to prevent the film from filling the void.

[0020] In some embodiments, the membrane support plate has an annular shape and is configured to control the pressure applied to the secondary region of the membrane.

[0021] In some embodiments, the substrate carrier head is compatible with a film controlled CMP system.

[0022] In some embodiments, the substrate carrier head further comprises: an inner plate; and an outer plate, wherein the membrane further comprises an inner ridge secured between the inner plate and the outer plate and configured to isolate the primary region from the secondary region.

[0023] In some embodiments, the substrate carrier head further comprises a membrane backing ring disposed over the outer plate and securing the membrane in place.

[0024] In some embodiments, the substrate carrier head further comprises: an adhesive bonding the secondary region of the membrane to the membrane support plate.

[0025] On the other hand, a method for isolating a main area of ​​a membrane from a secondary area of ​​the membrane comprises: receiving a chip in a hole of a carrier body, the carrier body comprising a membrane, the membrane having a first surface and a second surface, the first surface being configured to contact a surface of the chip, the second surface being opposite to the first surface, the membrane having a main area and a secondary area; applying pressure to the main area of ​​the membrane through a membrane cavity formed along the second surface of the membrane; and supporting the secondary area of ​​the membrane with a support plate.

[0026] In some embodiments, the method further comprises isolating the secondary region of the membrane from the pressure applied to the primary region of the membrane.

[0027] In some embodiments, the membrane is further configured to be in substantially continuous contact with the wafer.

[0028] All of these embodiments are intended to fall within the scope of the invention disclosed herein. These and other embodiments will be apparent to those skilled in the art based on the following detailed description of the preferred embodiments with reference to the accompanying drawings, and the invention is not limited to any particular preferred embodiment(s) disclosed. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other objects, features and benefits of the inventive concept will be better understood through the following illustrative and non-limiting detailed description of embodiments of the invention with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals will be used for the same elements unless otherwise specified.

[0030] Figure 1 is a schematic illustration of a chemical mechanical planarization system for processing a polishing pad.

[0031] Figure 2 yes Figure 10026] Figure 2 is a view of a chemical mechanical planarization system showing a substrate held by a substrate carrier in a loading position.

[0032] Figure 3 is a partial cross-sectional view of a substrate carrier head, which may be included as Figure 1 and Figure 2 A portion of a substrate carrier is shown.

[0033] Figures 4A-4D Embodiments of wafers that may undergo non-uniform planarization according to aspects of the present disclosure are shown.

[0034] Figure 5A A cross section of a carrier and wafer is provided to illustrate that the film fills the void created by the flat of the wafer according to aspects of the present disclosure.

[0035] Figure 5B It is around Figure 5A A close-up view of the area surrounding the void shown in FIG.

[0036] Fig. 6A Process results showing a wide range of observed numbers of non-uniform effects due to burning the flat phenomenon.

[0037] Figure 6B A range of process results are shown where the burn plane effect is reduced or eliminated.

[0038] Figure 7 Another view of a substrate carrier head including a membrane and IT region is provided.

[0039] Figure 8 is a cross-sectional view of a rigid backed substrate carrier head according to aspects of the present disclosure.

[0040] Fig.9A and 9B A substrate carrier head having a sealed IT region according to aspects of the present disclosure is illustrated.

[0041] Fig. 10A and 10B A substrate carrier head having a gimbaled device according to aspects of the present disclosure is illustrated.

[0042] Fig.11A and 11B Another embodiment of a substrate carrier head according to aspects of the present disclosure is illustrated.

[0043] Fig.12 is another embodiment of a substrate carrier head according to aspects of the present disclosure. DETAILED DESCRIPTION

[0044] Although the following provides a detailed description of a variety of different embodiments of the invention, it should be understood that the legal scope of the invention is defined by the words of the claims appended to the patent. The detailed description is to be construed as exemplary only and does not describe every possible embodiment of the invention because describing every possible embodiment would be impractical, if not impossible. A variety of alternative embodiments may be implemented using current technology or technology developed after the filing date of this patent and still fall within the scope of the claims defining the invention. Chemical Mechanical Planarization (CMP)

[0045] In the manufacture of semiconductor ICs, MEMS devices, and LEDs, as well as in many other similar applications, the adoption and utilization of Chemical Mechanical Planarization (CMP) for thin film planarization is common among companies that manufacture the "chips" for these types of devices. Such adoption includes the manufacture of chips for mobile phones, tablets and other portable devices, as well as desktop and laptop computers. Advances in nanotechnology and micromachining have brought great promise for the widespread use and adaptation of digital devices in the medical field, the automotive field, and the Internet of Things ("IoT"). Scientists and engineers at IBM invented and developed Chemical Mechanical Planarization for thin film planarization in the early 1980s. Today, this process is widespread on a global basis and is one of the truly useful technologies in the manufacture of many digital devices.

[0046] Integrated circuits are made with multiple and alternating layers of conductive materials (such as copper, tungsten, aluminum, etc.), insulating layers (such as silicon dioxide, silicon nitride, etc.), and semiconductor materials (such as polysilicon). These layers, in successive combinations, are applied sequentially to the surface of the wafer, but due to the implanted devices on the surface, topographical undulations are formed on the device structure, as in the case of the silicon dioxide insulating layer. These unwanted topographical undulations are usually flattened or "planarized" using CMP before the next layer is deposited to allow for proper interconnection between device features of ever-decreasing size. In the case of copper layers, copper is deposited on the surface to fill contact vias and provide an efficient vertical path for electrons to travel from device to device and from layer to layer. This process continues as each layer is applied (usually by a deposition process). In the case of multiple layers of conductive materials (multilayer metals), this can result in extensive polishing procedures (once for each layer of conductor, insulator, and semiconductor material) to achieve successful circuit systems and interconnections between device features.

[0047] In the CMP process, a substrate or wafer is held by a wafer carrier, which is rotated and pressed against a polishing platform - generally through an elastic membrane within the wafer carrier - for a specified time. A CMP wafer carrier generally contains components for precision polishing a generally flat and rounded workpiece, such as a silicon wafer on a process head and / or a film deposited thereon. These components include: 1) an elastic membrane, wherein a compressed gas is applied to the top surface or back side of the membrane; the pressure is then transferred to the top surface or back side of the workpiece via the membrane to cause material removal during CMP; 2) one or more rigid support components, which provide a means for fastening the membrane to its mating component, maintaining the membrane in its desired shape and size, and / or clamping the membrane to provide a sealed space body for sealing and containing controlled gas pressure.

[0048] In this process, the slurry is applied to the rotating polishing pad through a fluid control device such as a metering pump or a mass flow control regulator system. The slurry can be introduced to the polishing platform through a single-pass distribution system. To achieve better performance, the slurry particles in its medium should be evenly distributed between the rotating wafer and the rotating polishing pad / platform.

[0049] A force is applied to the back side of the wafer through the wafer carrier film to press it into the pad, and both can have motion to produce relative velocity. The motion and force cause abrasion of portions of the pad by pushing the abrasive against the substrate while it moves across the wafer surface. The corrosive chemicals in the slurry change the material being polished on the surface of the wafer. This mechanical effect of abrasion combined with chemical changes is called chemical mechanical planarization or polishing (CMP). The material removal rate brought about by both chemical and mechanical effects can easily be an order of magnitude higher than either one alone. Similarly, by using the chemical and mechanical effects together, the surface smoothness after polishing is improved.

[0050] During the polishing process, materials such as copper, dielectrics, or polysilicon are removed from the surface of the wafer. These microscopic particles remain suspended in the slurry, or are embedded in the polishing pad, or both. These particles cause scratches on the surface of the film being polished, which can lead to catastrophic failures in the circuit system, rendering the chip useless, and therefore have a significant negative impact on yield.

[0051] Yield is a driving force for success at the manufacturing level for many products, including integrated circuits, MEMS, and LEDs. The surface quality tolerance of CMP processes within semiconductor manufacturing facilities ("fabs") and foundries is measured in nanometers or even angstroms. The ability to remove material as uniformly as possible from the surface of a wafer or film during the CMP process is very important. Therefore, carrier design technology continues to advance in the direction of improving this ability. Small non-uniformities in the flatness of wafers processed in a CMP system can lead to reduced yield and increased waste. Cross-diameter non-uniformities or pressure differences in wafer carriers and processing pads can cause wafer breakage. The cumulative cost of manufacturing solid-state devices is collectively referred to as the "cost of ownership" (CoO), and the term is also applied to each required manufacturing step. The CoO of the CMP process is one of the highest CoO amounts among the 500 to 800 individual manufacturing steps required to manufacture a semiconductor "chip" and its related digital devices.

[0052] The disclosed technology will be described with respect to specific embodiments and with reference to certain drawings. The present disclosure is not limited thereto but only by the claims. The drawings described are merely schematic and non-limiting. In the drawings, for illustrative purposes, the sizes of some elements may be exaggerated and not drawn to scale. The sizes and relative sizes do not necessarily correspond to actual reductions of the present disclosure. CMP System

[0053] Figure 1 is a schematic diagram of a chemical mechanical planarization system 100 for processing a polishing pad 110. The system 100 may include a wafer carrier 150 configured to hold and process a wafer. It should be understood that the term "wafer" used herein may refer to a semiconductor wafer (e.g., round), but may more broadly include other types of substrates having different shapes that are processed by a polishing or planarization device (such as a CMP device). Therefore, in the following description, the terms "wafer" and "substrate" may be used interchangeably unless the context clearly refers to only one of a "wafer" or a "substrate". In an exemplary embodiment, the substrate carrier 150 is in a processing (e.g., lower) position, holding a substrate (not shown) against a polishing pad 110 having a film (not shown). The polishing pad 110 may be positioned on a support surface, such as a surface of a platform 120.

[0054] Figure 2 yes Figure 1 1, showing a view of a chemical mechanical planarization system showing a substrate 155 held in a loading (eg, upper) position by a substrate carrier 150. The substrate 155 can be held, for example, by a vacuum force. Figure 1 and Figure 2, the system 100 may include a slurry delivery system 140 configured to deliver a treatment slurry to the substrate 155 and allow it to be chemically / mechanically planarized against the polishing pad 110. The system 100 may include a pad conditioning arm 160 including a pad conditioner at an end thereof that may be configured to treat or "refresh" the surface roughness or other treatment characteristics of the pad during or between treatment cycles.

[0055] exist Figure 1 and Figure 2 In the system 100 of FIG. 1 , the polishing pad 110 is on the top surface of the platform 120, which rotates counterclockwise about a vertical axis. Other motion orientations and directions may be implemented.

[0056] The slurry delivery system 140 can deliver a slurry containing abrasive and corrosive particles to the surface of the treated polishing pad 130. The polishing slurry is generally a colloidal suspension of abrasive particles such as colloidal silica, colloidal alumina, or colloidal ceria in a water-based medium. In various embodiments, the slurry delivery system 140 includes a metering pump, a mass flow control regulator system, or other suitable fluid delivery components.

[0057] The substrate carrier 150 can hold the substrate 155, for example, by a vacuum, so that the surface of the substrate 155 to be polished faces the polishing pad 110. The abrasive particles and corrosive chemicals in the slurry deposited on the polishing pad 110 by the slurry delivery system 140 mechanically and chemically polish the substrate by abrasion and corrosion, respectively. The substrate carrier 155 and the polishing pad 110 can be moved relative to each other in any of a variety of different ways to provide polishing. For example, the substrate carrier 150 can apply a downward force against the platform 120 so that the substrate 155 is pressed against the polishing pad 110. The substrate 155 can be pressed against the polishing pad 110 by a pressure membrane (not shown), as will be further described herein. The abrasive particles and corrosive chemicals in the slurry between the substrate 155 and the polishing pad 110 can provide chemical and mechanical polishing when the polishing pad 110 and the substrate carrier 155 move relative to each other. The relative motion between the polishing pad and the substrate carrier can be configured in a variety of ways, and either or both can be configured to vibrate, move linearly, and / or rotate - counterclockwise and / or clockwise relative to each other.

[0058] The pad conditioning arm 160 can condition the surface of the polishing pad 110 by applying force against the polishing pad 110 and relative movement therebetween, such as the relative movement described above with respect to the polishing pad and substrate carrier 150. The pad conditioning arm 160 in the example embodiment can vibrate with a rotating pad conditioner at its end in contact with the polishing pad 110.

[0059] Figure 3is a partial cross-sectional view of a substrate carrier head 300, which may be included as Figure 1 and Figure 2 1. A portion of the substrate carrier 150 shown. The substrate carrier head 300 includes a membrane assembly 305 for a chemical mechanical planarization (CMP) system. In some embodiments, the substrate carrier head 300 (also referred to herein as a carrier head or simply as a carrier) may include a support base 380 to which the membrane assembly 305 is mounted. The support base 380 may be any configuration suitable for providing support for the membrane assembly. The support base 380 may attach and engage the remainder of the substrate carrier head 300 with a CMP system (not shown). The support base 380 may include a carrier body, a substrate holder, a support plate, and / or other components described elsewhere herein to support a wafer (e.g., membrane assembly 305) and / or engage the remainder of the carrier head 300 with a CMP system. The support base 380 may also form a hole in which the membrane 320 may be placed to be held by the substrate carrier head 300.

[0060] The membrane assembly 305 may include a support plate 310, an elastic membrane 320, a membrane holder (such as a membrane clamp 330), and an optional outer pressure ring 340, as shown. The support plate 310 may be any configuration suitable for supporting a wafer during processing, such as attaching the membrane assembly 305 to a support base 380. For example, the support plate 310 may be mounted to the support base 380 using one or more bolts or other suitable attachment elements. The support plate 310 may be mounted to the support base 380 at various locations, such as along the periphery of the support base 380.

[0061] The support plate 310 can be any suitable configuration to support the wafer, such as through the elastic membrane 320. The elastic membrane 320 can be fixed to the support plate 310 in a variety of different ways. The elastic membrane 320 can be fixed to the support plate 310 before or after the support plate 310 is fixed to the support base 380. The elastic membrane 320 can be fixed to the support plate 310 by using any of a variety of suitable different membrane holder fixing elements such as a membrane clamp 330. In some embodiments, the membrane clamp 330 can be spring-loaded. In other embodiments, the membrane clamp 330 can be fixedly tightened by using a fastening mechanism (such as nuts and bolts, etc.). The membrane clamp 330 can fix the outer portion (e.g., outer edge) of the membrane 320 to the corresponding portion of the support plate 310 and / or the support base 380. The membrane holder can be any suitable configuration to fix at least a portion of the membrane 320 to the support plate 310 and / or the support base 380.

[0062] The elastic membrane 320 can be fixed to the support plate 310 so that the membrane 320 can hold the substrate 370 against the polishing pad and process the substrate, for example, as described above with reference to Figure 1 and Figure 2 The film may include a first surface (e.g., facing downward) configured to contact the surface of the substrate (e.g., facing upward). The film 320 may be sufficiently elastic and flexible so that the film 320 can apply a relatively uniform pressure across the entire substrate 370 in combination with the polishing pad material and the processing parameters. In some embodiments, the elasticity and flexibility of the film 320 may also help reduce substrate fractures. The support plate 310 may be separated from the film 320 to form a gap or film cavity 360 therebetween. In some embodiments, when the film 320 is in a static (e.g., non-pressurized) state, a film cavity 360 may be formed. The film cavity 360 may be supplied with a fluid that may be pressurized to press the film 320 against the substrate 370 during the flattening process. For example, the film 320 may be configured to allow the fluid to contact the second surface of the film 320, for example, facing upward to the surface, relative to the first film surface described above. According to an embodiment, the fluid may include a gas and / or a liquid. For example, a gas may be used to provide static pressure to the second surface of the film 330. In another application, the liquid may be used to provide pressure while also flowing along the membrane 330 , while also flowing across the membrane to heat or cool the membrane 330 .

[0063] The membrane cavity 360 can be sealed. In some embodiments, a fluid-impermeable seal can be formed within the membrane cavity 360 to prevent fluid from leaking out of the membrane cavity 360 when the fluid is pressurized. Therefore, the membrane cavity 360 can form a fluid cavity. The seal can be formed between a portion of the membrane 320 and a portion of the carrier body (e.g., plate 310 and / or substrate 380), such as at the membrane fixture 330. As used herein, a sealed membrane cavity surrounds a membrane cavity that is in fluid communication with an inlet (one or more) and / or an outlet (one or more), and the inlet and / or outlet can be selectively sealed (e.g., opened and closed, such as with a valve).

[0064] In some embodiments, when the film 320 is in a stationary state, a portion of the film 320 (such as its upper surface) is located on or near a corresponding portion of the plate 310 (such as its lower surface), and when the film 320 expands (e.g., by fluid pressurization), a film cavity 360 is formed. The film cavity 360 can redistribute and take into account the changes in the fluid pressure on the film 320 and therefore the substrate 370 during the flattening process. The fluid can be provided to the film cavity 360 on the back side of the film 320 through the inlet 350, as shown. The inlet 350 can be arranged in the support plate 310, or the fluid can be supplied by other configurations. In some embodiments, a vacuum can be provided to the cavity 360 through the inlet and / or outlet to keep the wafer 370 on the lower side of the film assembly, as further described herein.

[0065] In some embodiments, the membrane cavity 360 can be formed by separating the membrane 320 from the support plate 310. For example, the support plate 310 may include a recessed interior to form a cavity. In an exemplary embodiment, the membrane assembly 305 may include an optional outer pressure ring 340 to form the membrane cavity 360. In other embodiments, the membrane assembly 305 can be assembled without a pressure ring. For example, the elastic membrane 320 can be directly against the support plate 310 without the membrane cavity 360 separating the membrane 320 from the support plate 310, for example, when there is no fluid in the membrane cavity 360. In some embodiments, the membrane assembly 305 may include one or more pressure rings 340 arranged in concentric circles.

[0066] In another embodiment, the wafer carrier may include a multi-zone carrier. For example, the film 320 may be a multi-zone film. Each zone (domain) in the multi-zone film may include a corresponding film cavity, which is configured to receive a fluid, and / or is similarly (e.g., individually) controlled, as described herein with respect to a single-zone carrier with a single-zone (domain) cavity. For example, the film 320 may have a groove (e.g., a dent) and / or a raised portion of the film 320, which effectively separates the various regions of the film 320. In a non-limiting example, the groove may be arranged with a series of concentric circles starting from the center of the film. In another example, the groove and the raised portion may be irregularly shaped (e.g., a circular pattern of interconnected circles, non-circular dents, and dispersed across the film surface), to improve the distribution of pressure across the substrate 370 when attached to the film assembly 305. In some embodiments, the system may apply different pressures to one or more regions in the multi-zone film to adjust the removal rate in each region. For example, the removal rate of the region where higher pressure is applied may be higher.

[0067] The membrane 320 can be flexible so that it conforms to the structure around it. In some cases, the membrane 320 can be convex. For example, the membrane 320 may sag at the center. The membrane 320 can even be shaped like a cone so that a small area of ​​the membrane 320 will be in contact with the substrate surface for fine precision polishing.

[0068] The membrane material can be any elastic material suitable for planarization (as described herein) and suitable for use in a carrier head, such as a CMP process. In some embodiments, the membrane material can be one of a rubber or synthetic rubber material. The membrane material can also be one of ethylene propylene diene monomer (M grade) (EPDM) rubber or silicone. Optionally, it can be a vinyl rubber, silicone rubber, synthetic rubber, nitrile, thermoplastic elastomer, fluorinated elastomer (fluorelastomer), hydrated acrylonitrile butadiene rubber or one or more combinations of urethane and polyurethane forms. In order to effectively cool the substrate (or heat, or otherwise control its temperature), in some embodiments, the material of the elastic membrane 320 can be selected based on the heat transfer properties of the material. Therefore, when cooling a substrate (such as a silicon carbine substrate), a material with higher thermal conductivity may be desired. For example, in some embodiments, the membrane material can be an elastomer, such as silicone, including those under the trademarks owned by Rogers Corporation. The thermal conductivity of the elastic film 320 can help cool the substrate. In some embodiments, the elastic film 320 can include an inorganic additive that increases the thermal conductivity of the elastic film 320 to improve heat transfer between the temperature control fluid and the substrate. Examples of inorganic additives that increase thermal conductivity can include the trademarks of Martinswerk GMBH. Additive series manufactured under.

[0069] One or more membrane modules may be implemented in a single CMP system.The CMP system may have controls that utilize feedback from the system while in operation to more accurately control the CMP process (eg, variable speed motor control, etc.).

[0070] In an exemplary embodiment, the film 320 can be planarized. For example, the film 320 can be made flat within a desired tolerance, and / or conformal to the surface roughness within a desired tolerance. For example, the film 320 can be subjected to a planarization procedure, wherein the film is treated with a polishing pad. In addition, the film 320 can be introduced into a chemical slurry, which flattens the film 320. In addition, the surface roughness of the film 320 can be improved by this planarization process. Surface roughness can be very important for films used in CMP process environments for at least two reasons: sealing and static resistance. Through the planarization process, the surface roughness can be reduced to provide an improved seal between the substrate 370 and the film 320 - for processing purposes. At the same time, the surface roughness can be increased to prevent static resistance (i.e., the substrate adheres to the film due to surface tension), and to improve the release of the substrate from the film after processing. A control mechanism can be used in the planarization process (as described below) to achieve a desired balance between low surface roughness and high surface roughness. The control mechanism can be outside the device for planarizing the film. Example CMP system configured to planarize a substrate having flat surfaces or voids

[0071] Many wafers may have one or more "flats" or "gaps" formed along the edge of the wafer. Figures 4A-4D Implementations of wafers 370 according to aspects of the present disclosure are illustrated, which may experience non-uniform planarization. Specifically, Figure 4A An implementation of a wafer 370 according to aspects of the present disclosure is illustrated. Figure 4B A carrier 300 configured to hold a wafer 370 is illustrated. Figure 4C and 4D A close-up view of a portion of a wafer 370 having non-uniform planarization is provided.

[0072] Since the wafer can be substantially circular, e.g. Figure 4A As shown, wafer 370 may have a flat surface 402 edge that may provide a reference edge - providing a mechanical indication of the orientation of the crystal structure of the silicon on wafer 370. For example, flat surface 402 may form a fiducial for aligning the silicon crystal structure on the wafer. In contrast, for a circular wafer that does not include flat surface 402 or other identifying features in its shape, it may be difficult to determine the orientation of the silicon crystal structure of the wafer due to its angular symmetry. Therefore, flat surface 402 may help provide an identifying feature that enables visual determination of the orientation of the wafer.

[0073] In some embodiments, the wafer 370 may include a primary flat surface 402 and a secondary flat surface (not shown). Aspects of the present disclosure may be applicable to improving planarization of a wafer 370 including one or more flat surfaces 402 .

[0074] When using a CMP system to planarize a wafer 370 having a flat surface 402, one problem that may occur is the so-called "burning the flat" phenomenon. Burning the flat generally refers to a very high removal rate of a portion of the flat surface 402 area of ​​the wafer 370 due to voids in the carrier 300. Figure 4B The wafer 370 is illustrated as being held by the carrier 300 after planarization. For example, the wafer 370 may be held within a hole formed in the substrate carrier head 300. At the gap formed by the flat surface 402 in the wafer 370, the film 320 (e.g., Figure 3 The membrane 320) is visible. Figure 4C and 4D Portions 404 of wafer 370 are illustrated that may experience a higher removal rate than other portions 404 of wafer 370 due to plane 402 .

[0075] Figure 5AA cross section of carrier 300 and wafer 370 is provided to illustrate the filling of voids 502 created by flat surfaces 402 of wafer 370 by film 320 according to aspects of the present disclosure. Figure 5B yes Figure 5A A close-up view of the area surrounding void 502 is shown in FIG.

[0076] refer to Figure 5A and 5B , the substrate carrier head 300 holds the wafer 370 adjacent to the membrane 320. The flat surface 402 in the wafer 370 may be located adjacent to the outermost region of the substrate carrier head 300, which may be referred to as the inner tube (IT) region 504 (also referred to as the secondary region). The flat surface 402 in the wafer 370 forms a gap 502, and due to the presence of the film cavity 360 (see Figure 3 ) is applied to the film 320, which fills the void 502. As the film 320 fills the void, additional pressure is applied to the wafer 370 near the plane 402. In addition, the film 320 wraps around the edge of the wafer 370 at the plane 402 and removes a portion 404 of the wafer 370 at a different (higher) rate in this area than the rest of the wafer 370.

[0077] Fig. 6A Process results showing a wide range of observed non-uniform effects due to the burn plane phenomenon. Figure 6B A range of process results are shown where the effects of burnt planes are reduced or eliminated.

[0078] One technique to reduce or eliminate film wrapping is to prevent air pressure from filling the gap 502 at the plane 402 region. As described above, the plane 402 can be located below the IT region 504. In some embodiments, the film 320 can be wrapped around the IT region 504, providing a substantially continuous contact surface across the wafer 370. This feature can provide good process results outside the plane 402 region.

[0079] Figure 7 Another view of the substrate carrier head 300 of the membrane 320 and IT region 504 is provided. Figure 7 The substrate carrier head 300 can provide a film 320 and a wafer 370 ( Figure 7 A substantially continuous contact surface between the two (not shown).

[0080] Another technique to reduce or eliminate film wrapping is to use a rigid backing carrier in place of the film 320 . Figure 8800 is a cross-sectional view of a rigid backing substrate carrier head 800 according to aspects of the present disclosure. The substrate carrier head 800 includes a rigid wafer backing plate 802 configured to hold a wafer 370 having a flat edge 402 and a chamber flexible membrane seal 804. The substrate carrier head 800 is configured to provide a pressure / vacuum 806 that pushes or pulls the rigid wafer backing plate 802. The substrate carrier head 800 can at least partially solve the flat surface burning problem because there is no membrane 320 to fill the gap 502 formed by the flat surface 402. However, one disadvantage of this approach is that this rigid backing carrier system is designed for rigid backing carriers only and cannot be modified for other applications (e.g., including membrane-based carriers or hybrid carriers).

[0081] Aspects of the present disclosure are configured to address one or more of the above-mentioned disadvantages using a one-piece dual-zone control membrane. Fig.9A and 9B A substrate carrier head 300 having a sealed IT region 504 according to aspects of the present disclosure is illustrated. Specifically, Fig.9A A cross-sectional view of a substrate carrier head 300 is provided, and Fig. 9B A close-up view of IT zone 504 is provided.

[0082] refer to Fig.9A and 9B , the substrate carrier head 300 includes an inner IT plate 902, an outer IT plate 904, and a membrane backing ring 906. The membrane 320 is held in place by the inner IT plate 902, the outer IT plate 904, and the membrane backing ring 906. Specifically, the inner ridge 908 of the membrane 320 extends between the inner IT plate 902 and the outer IT plate 904 and is fixed therebetween. The inner ridge 908 can form a ring that separates the IT region 504 from the main region 910 of the membrane 320. The inner ridge 908 can provide a seal between the inner IT plate 902 and the outer IT plate 904, thereby sealing the main region 910 from the IT region 504. That is, the inner ridge 908 can be configured to seal the membrane cavity 360 so that the pressure applied within the membrane cavity 360 is applied to the main region 910, but not to the portion of the membrane 320 that forms the IT region 504 outside the inner ridge 908. The membrane 320 continues to wrap around the IT board 904 via the internal ridge 908 and is held in place by the membrane backing ring 906. In some embodiments, the width of the IT region 504 can be greater than the width of the gap 502, thereby preventing the membrane 320 from filling the gap 502.

[0083] By sealing the membrane cavity 360 from the edge of the IT region 504 using the internal ridge 908, the portion of the membrane 320 supported by the outer IT plate 904 can be prevented from expanding into the gap 502 formed by the plane 402. Since the membrane 320 can be prevented from expanding into the gap 502, this configuration can reduce or eliminate plane burning. In addition, the outer IT plate 904 can have an annular shape that overlaps the IT region 504. Therefore, the outer IT plate 904 can provide mechanical support for the portion of the membrane 320 formed in the IT region 504, thereby reducing or preventing pressurization, inflation and / or bulging of the membrane 320 in the gap 502. Therefore, the outer IT plate 904 can help reduce and / or eliminate wafer burning.

[0084] In addition, the membrane 320 can still be configured to be in substantially continuous contact across substantially the entire wafer surface while maintaining separation between the two regions. With this design, the process of controlling the membrane 320 region (e.g., providing pressure through the membrane chamber 360) can be substantially the same as other CMP systems, while also providing isolation of the gap 502 / plane 402 region to prevent plane burning. Although not illustrated, the main area 910 can be divided into a plurality of sub-areas, each of which can be independently pressurized, for example, through a corresponding membrane chamber 360. The substrate carrier head 300 can include a processor (which can be located in another part of the CMP system) that is configured to control the pressure applied to each sub-area.

[0085] Embodiments of the present disclosure provide a control membrane (e.g., membrane 320) that can be formed as a single piece with two or more control zones, including a primary zone 910 and an IT zone 504 (or secondary zone). By isolating the primary zone 910 from the IT zone 504, the substrate carrier head 300 is able to provide substantially continuous contact between the membrane 320 and the wafer 370, while also enabling separate zone control (e.g., applying different pressures to the membrane 320 in the primary zone 910 and the IT zone 504). In addition, the annular outer IT plate 904 can provide rigid mechanical support for the portion of the membrane 320 in the IT zone 504, enabling this portion of the membrane 320 to be supported without the use of pneumatic pressure. In addition, the outer IT plate 904 can also provide substantially continuous contact between the portion of the membrane 320 in the IT zone 504 and the wafer 370, while also providing support in this area. The outer IT plate 904 is also configured to provide and control the pressure applied to the membrane 320 in the IT zone 504, which in turn is applied to the corresponding portion of the wafer 370. By replacing pneumatic pressure with mechanical support, portions of the film 320 in the IT region 504 can be prevented from expanding into the void 502. Thus, the substrate carrier head 300 can reduce or eliminate high removal rates at the void 502 region of the wafer 370 due to asymmetric pressure caused by film wrapping.

[0086] Furthermore, by isolating the pressure applied to the main region 910 and the IT region 504 as described herein, pressurization, swelling, and bulging of the membrane 320 in the IT region 504 can be prevented. This can reduce the pressure applied to the planar 402 area of ​​the wafer 370.

[0087] In some embodiments, the membrane backing ring 906 can be divided into two or more pieces that can be attached using fasteners to form a continuous ring. For example, in some embodiments, the membrane backing ring 906 can include two semicircular pieces. By forming the membrane backing ring 906 in multiple pieces that can be assembled into the membrane backing ring 906, the assembly of the substrate carrier head 300 can be simplified, including attaching the membrane 320 to the membrane backing ring 906. This can make the assembly of the substrate carrier head 300 easier, as well as simplifying the tensioning of the membrane 320.

[0088] Fig. 10A and 10B A substrate carrier head 300 with a gimbal device 1002 according to aspects of the present disclosure is illustrated. Specifically, Fig. 10A A cross-sectional view of a substrate carrier head 300 having a gimbal device 1002 is provided, and Fig. 10B A close-up view of gimbaled device 1002 is provided.

[0089] refer to Fig. 10A and 10B , the gimbal device 1002 includes a rigid shaft 1004, a compliant material 1006, and a gimbal portion 1008. In general, the gimbal device can allow the subject to freely tilt or hover in any direction so that the subject will remain horizontal when its support body topples over. In the context of the substrate carrier head 300, the gimbal device 1002 is configured to allow the substrate carrier head 300 to freely tilt or hover in any direction so that the substrate carrier head 300 will remain horizontal when the rigid shaft 1004 topples over.

[0090] Fig.11A and 11B Another embodiment of a substrate carrier head 800 according to aspects of the present disclosure is illustrated. Fig.11A illustrates a cross section of a substrate carrier head 800, and Fig. 11B A perspective view of a substrate carrier head 800 is provided.

[0091] Fig.11A and 11BThe substrate carrier head 800 is implemented as a hybrid membrane controlled rigid backing carrier. The substrate carrier head 800 includes a rigid wafer backing plate 802 and a chamber flexible membrane seal 804, the rigid wafer backing plate 802 being configured to hold a wafer 370 having a flat surface 402. The substrate carrier head 800 is configured to provide a pressure / vacuum 806 that pushes or pulls the rigid wafer backing plate 802. The substrate carrier head 800 also includes a plurality of vacuum through-holes that are coupled to a wafer chucking vacuum manifold and pluming 1102.

[0092] Advantageously, the substrate carrier head 800 can be a direct replacement for a membrane-based carrier head and can work on membrane-based CMP systems. For example, compatible systems include the Axus Surface TM 、Applied Material Mirra TM etc. Strausbaugh Viprr TM Standard rigid backing supports such as , Speedfam / IPEC Rigidback, etc. will not work on these membrane systems (most CMP systems in the world).

[0093] One aspect of the substrate carrier head 800 is the integration of a membrane that controls pressure to the wafer - as compared to carriers that use a hard mounted spindle or arm to control wafer pressure.

[0094] In certain embodiments, providing a substrate carrier head 800 with a hybrid film control rigid backing support enables film pressure control while also reducing wafer burning caused by the rigid backing support portion of the carrier in the IT region 504. In some embodiments, the substrate carrier head 800 with a hybrid film control rigid backing support may be compatible with a wide range of film control CMP systems.

[0095] Fig.12 is another embodiment of a substrate carrier head 300 according to aspects of the present disclosure. Fig.12 , the substrate carrier head 300 includes a membrane 320, the membrane 320 including a main area 910 and an IT area 504. Fig.9A and 9B In contrast to the implementation method, Fig.12 The film 320 may be attached to the IT board 1202 by adhesive 1204. The adhesive 1204 attaches (or bonds) the film 320 to the underlying IT board 1202, thereby constraining the film 320 in the area where the adhesive 1204 bonds the film 320 to the IT board 1202.

[0096] That is, the adhesive 1204 prevents any pressure applied to 360 from being applied to the IT region 504 of the film 320, while still enabling pressure to be applied to the main region 910 of the film 320. Thus, by preventing the IT region 504 of the film 320 from expanding into the void 502 formed by the plane 402, the substrate carrier head 300 can help reduce or eliminate wafer burning.

[0097] According to embodiments, the IT board 1202 may include various methods and means for such bonding and / or combining, including applying various adhesive materials. For example, the adhesive material may include one or more of glue, epoxy, chemicals, heat, molding, vulcanization, etc.

[0098] As described herein, by preventing pressure applied to the main region 910 of the membrane 320 from reaching the IT region 504 - for example, by utilizing a pressure barrier, isolation, and / or restraint (e.g., by an adhesive contact layer), pressurization, inflation, and bulging of the IT region 504 can be reduced or prevented. This can reduce excessive pressure from being applied to the flat surface 402 of the wafer 370, thereby reducing wafer burning. These techniques can be particularly beneficial when processing relatively hard materials (e.g., silicon carbide, sapphire, etc.), which can be processed using higher pressures than relatively softer materials. Summarize

[0099] The word "exemplary" as used herein means "as an example, case or example". Any aspect or embodiment described herein as "exemplary" is not necessarily to be construed as being preferred or beneficial relative to other aspects or embodiments. Various aspects of the new system, device and method will be described more fully below with reference to the accompanying drawings. However, the present disclosure can be implemented in a variety of different forms and should not be construed as limited to any specific structure or function displayed throughout the present disclosure. Rather, these aspects are provided so that the present disclosure is detailed and complete, and the scope of the present disclosure is fully conveyed to those skilled in the art. Based on the teachings of this article, it should be understood by those skilled in the art that the scope of the present disclosure is intended to cover any aspect of the new system, device and method disclosed herein, whether implemented independently or in combination with any other aspect described. For example, the device can be implemented and the method can be practiced using any number of aspects set forth herein. In addition, the scope of the present disclosure is intended to cover such a device or method that is practiced using other structures, functions, or structures and functions other than or in addition to the various aspects of the disclosure presented herein. It should be understood that any aspect disclosed herein can be implemented by one or more elements of the claims.

[0100] It should also be understood that unless a term is expressly defined in this patent by the use of "As used herein, the term '______' is hereby defined to mean ..." or similar language, no limitation of the meaning of the term beyond its ordinary or customary meaning - express or implied, is intended, and such term should not be construed as limited in scope based on any statement in any part of this patent (other than the language of the claims). If any term recited in the claims appended hereto is referred to in this patent in a manner consistent with one meaning, this is done only for clarity to avoid confusion among readers, and is not intended to limit such claim term to that one meaning by implication or otherwise.

[0101] Unless otherwise specified or understood in the context of use, conditional language, such as "may," "can," "could," or "might," is generally intended to convey that certain embodiments include, while other embodiments do not, certain features, elements, and / or steps. Thus, such conditional language is not generally intended to imply that features, elements, and / or steps are in any way required by one or more embodiments, or that one or more embodiments must include logic that determines (with or without user input or prompting) whether such features, elements, and / or steps are included or to be performed in any particular embodiment.

[0102] Unless specifically stated otherwise, conjunction language, such as the phrase "at least one of X, Y, and Z," in conjunction with the context in which it is used, is generally understood to convey that an item, term, etc. can be X, Y, or Z. Thus, such conjunction language is not generally intended to require that certain embodiments require that at least one X, at least one Y, and at least one Z be present.

[0103] The language of degree used herein, such as the terms "approximately," "about," "generally," and "substantially" as used herein, refers to a value, amount, or characteristic that is close to the stated value, amount, or characteristic and still performs the desired function or achieves the desired result. For example, the terms "approximately," "about," "generally," and "substantially" may refer to an amount within less than 10%, less than 5%, less than 1%, less than 0.1%, and less than 0.01% of the stated amount, depending on the desired function or desired result.

[0104] Although certain embodiments have been described, these embodiments are presented as examples only and are not intended to limit the scope of the present disclosure. In fact, the novel methods and systems described herein can be implemented in various other forms. In addition, various omissions, substitutions, and changes may be made to the systems and methods described herein without departing from the spirit of the present disclosure. The attached claims and their equivalents are intended to cover such forms or modifications that fall within the scope and spirit of the present disclosure.

[0105] Features, materials, characteristics or groups described in conjunction with a particular aspect, embodiment or example should be understood to be applicable to any other aspect, embodiment or example described in this section or elsewhere in this specification unless incompatible therewith. All features disclosed in this specification (including any accompanying claims, abstract and drawings) and / or all steps of any method or process so disclosed may be combined in any combination, except that at least some of such features and / or steps are mutually exclusive combinations. Protection is not limited to the details of any preceding embodiments. Protection extends to any new feature or any new combination of features disclosed in this specification (including any accompanying claims, abstract and drawings), or any new step or any new combination of steps of any method or process so disclosed.

[0106] In addition, certain features described in the present disclosure in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. In addition, although features may be described above as functioning in certain combinations, one or more features in the combination may be deleted from the combination in some cases, and the combination may be claimed as a sub-combination or a variation of the sub-combination.

[0107] In addition, although the operations may be depicted in the drawings or described in the specification in a specific order, it is not required that these operations be performed in the specific order shown or in a sequential order, or that all operations be performed, to achieve the desired result. Other operations not depicted or described may be incorporated into the example methods and processes. For example, one or more additional operations may be performed before, after, simultaneously, or between any of the operations. In addition, these operations may be rearranged or reordered in other embodiments. It will be understood by those skilled in the art that in some embodiments, the actual steps taken in the examples and / or disclosed processes may be different from those shown in the figures. Depending on the implementation, some of the above steps may be deleted, and other steps may be added. In addition, the features and attributes of the specific embodiments disclosed above may be combined in different ways to form additional embodiments, all of which fall within the scope of the present disclosure. In addition, the separation of various system components in the above embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the components and systems described may be integrated into a single product or packaged into multiple products as a whole. For example, any component of the energy storage system described herein may be provided separately, or integrated together (e.g., packaged together or attached together) to form an energy storage system.

[0108] For the purposes of this disclosure, certain aspects, benefits, and novel features are described herein. Such benefits may not all be achieved according to any specific embodiment. Thus, for example, those skilled in the art will recognize that the present disclosure may be implemented or performed in a manner that achieves one benefit or a group of benefits taught herein without necessarily achieving other benefits taught or suggested herein.

[0109] The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the apparatus and methods disclosed herein.

[0110] The scope of the present disclosure is not intended to be limited by the specific disclosure of the preferred embodiments in this section or elsewhere in this specification, and may be limited by the claims, as presented in this section or elsewhere in this specification or as presented in the future. The language of the claims should be interpreted broadly based on the language used in the claims, and not limited to the examples described in this specification or during prosecution of the application, which examples should be interpreted as non-exclusive.

Claims

1. A substrate carrier head for a chemical mechanical planarization (CMP) system, comprising: a carrier body comprising a hole configured to receive a wafer; a film having a first surface and a second surface, the first surface being configured to contact the surface of the wafer, the second surface being opposite to the first surface, the film having a primary region and a secondary region; a membrane cavity formed along the second surface and configured to apply pressure to the membrane within the primary region; and A membrane support plate is configured to support the secondary region of the membrane.

2. The substrate carrier head of claim 1, wherein the secondary region of the membrane is isolated from pressure applied to the primary region of the membrane.

3. The substrate carrier head of claim 1, wherein the membrane is further configured to be in substantially continuous contact with the wafer.

4. The substrate carrier head of claim 1, wherein the main region of the membrane comprises a plurality of sub-regions, the substrate carrier head further comprising a processor configured to independently control the pressure applied to each of the sub-regions.

5. The substrate carrier head of claim 1, wherein the wafer includes a planar edge that forms a gap when the wafer is held by the carrier body, wherein a width of the secondary region is greater than the gap to prevent the film from filling the gap. 6 . The substrate carrier head of claim 1 , wherein the membrane support plate has an annular shape and is configured to control a pressure applied to the secondary region of the membrane.

7. The substrate carrier head of claim 6, wherein the substrate carrier head is compatible with a film control CMP system.

8. The substrate carrier head of claim 1, further comprising: Inner panels; and outer panel, Wherein the membrane further comprises an internal ridge secured between the inner plate and the outer plate and configured to isolate the primary region from the secondary region.

9. The substrate carrier head of claim 8, further comprising: A membrane backing ring is disposed over the outer panel and secures the membrane in place.

10. The substrate carrier head of claim 1, further comprising: An adhesive bonds the secondary region of the membrane to the membrane support plate.

11. A chemical mechanical planarization (CMP) system comprising: A substrate carrier head, the substrate carrier head comprising: a carrier body comprising a hole configured to receive a wafer; a film having a first surface and a second surface, the first surface being configured to contact the surface of the wafer, the second surface being opposite to the first surface, the film having a primary region and a secondary region; a membrane cavity formed along the second surface and configured to apply pressure to the membrane within the primary region; and a membrane support plate configured to support the secondary region of the membrane; and A processor is configured to control the pressure applied to the membrane via the membrane cavity.

12. The CMP system of claim 11, wherein the secondary region of the membrane is isolated from a pressure applied to the primary region of the membrane.

13. The CMP system of claim 11, wherein the membrane is further configured to be in substantially continuous contact with the wafer.

14. The CMP system of claim 11, wherein the main zone of the film comprises a plurality of sub-zones, the substrate carrier head further comprising a processor configured to independently control the pressure applied to each of the sub-zones.

15. The CMP system of claim 11, wherein the wafer includes a planar edge that forms a gap when the wafer is held by the carrier body, wherein a width of the secondary region is greater than the gap to prevent the film from filling the gap.

16. The CMP system of claim 11, wherein the membrane support plate has a ring shape and is configured to control a pressure applied to the sub-region of the membrane.

17. The CMP system of claim 16, wherein the substrate carrier head is compatible with a film controlled CMP system.

18. The CMP system of claim 11, wherein the substrate carrier head further comprises: Inner panels; and outer panel, Wherein the membrane further comprises an internal ridge secured between the inner plate and the outer plate and configured to isolate the primary region from the secondary region.

19. The CMP system of claim 18, wherein the substrate carrier head further comprises: A membrane backing ring is disposed over the outer panel and secures the membrane in place.

20. The CMP system of claim 11, wherein the substrate carrier head further comprises: An adhesive bonds the secondary region of the membrane to the membrane support plate.

21. A method of isolating a primary region of a membrane from a secondary region of a membrane, comprising: receiving a wafer in a hole of a carrier body, the carrier body comprising a membrane, the membrane having a first surface and a second surface, the first surface being configured to contact a surface of the wafer, the second surface being opposite the first surface, the membrane having a primary region and a secondary region; applying pressure to the main region of the membrane through a membrane cavity formed along the second surface of the membrane; and The sub-region of the membrane is supported by a support plate.

22. The method according to claim 21, further comprising: The secondary region of the membrane is isolated from pressure applied to the primary region of the membrane.

23. The method of claim 21, wherein the film is further configured to be in substantially continuous contact with the wafer.