Transmit (TX) local oscillator (LO) leakage calibration

Abstract

A transmit (TX) local oscillator (LO) leakage calibration circuit, the circuit comprising: a transceiver having a transmit portion and a receive portion; an interface circuit connected to the transmitting portion and the receiving portion; an impedance control circuit connected to a low noise amplifier (LNA) in the receiving portion, the impedance control circuit configured to adjust an input impedance of the LNA; a power detector coupled to an output of the LNA; and a local oscillator cancellation element connected to the power detector, the local oscillator cancellation element configured to adjust an input of the transmit section based on a TX LO leakage detected by the power detector.

Description

Technical Field

[0001] The present disclosure relates generally to electronics and, more particularly, to local oscillators for use in transceivers. Background Art

[0002] Wireless communication devices and technologies are becoming more and more common, as are communication devices that operate at millimeter wave (mmW) frequencies. Wireless communication devices typically transmit and / or receive communication signals. In a radio frequency (RF) transceiver, the communication signal is typically amplified and transmitted by a transmitting section, and the received communication signal is amplified and processed by a receiving section. Transceivers used for communication in 5G and 6G applications typically communicate using millimeter wave (mmW) frequency signals and employ a so-called superheterodyne architecture. A superheterodyne architecture is an architecture that up-converts a baseband information signal to an intermediate frequency (IF) and then further up-converts it to a radio frequency (RF) signal for transmission. However, as the number of frequencies continues to increase, the use of superheterodyne architectures in mmW frequency communication systems may be problematic due to conflicts between the mmW communication frequencies and the local oscillator (LO) signal frequencies used to convert the mmW frequencies. Summary of the invention

[0003] Various implementations of systems, methods, and devices within the scope of the appended claims each have several aspects, no single one of which is solely responsible for the desirable attributes described herein. Without limiting the scope of the appended claims, certain governing features are described herein.

[0004] Details of one or more specific implementations of the subject matter described in this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. Note that the relative sizes of the following drawings may not be drawn to scale.

[0005] One aspect of the present disclosure provides a transmit (TX) local oscillator (LO) leakage calibration circuit, which includes: a transceiver having a transmit part and a receive part; an interface circuit connected to the transmit part and the receive part; an impedance control circuit connected to a low noise amplifier (LNA) in the receive part, the impedance control circuit being configured to adjust the input impedance of the LNA; a power detector coupled to an output of the LNA; and a local oscillator elimination element connected to the power detector, the local oscillator elimination element being configured to adjust the input of the transmit part based on TXLO leakage detected by the power detector.

[0006] Another aspect of the present disclosure provides a method for transmit (TX) local oscillator (LO) leakage calibration, the method comprising: directing a transmit signal having TX LO leakage to a receiver co-located with a transmitter from which the transmit signal is directed; adjusting an impedance at an input of a low noise amplifier (LNA) in the receiver; detecting an LO signal at an output of the receiver; determining LO leakage from the LO signal; and correcting the LO leakage.

[0007] Another aspect of the present disclosure provides an apparatus comprising: means for directing a transmit signal having TX LO leakage to a receiver co-located with a transmitter from which the transmit signal is directed; means for adjusting an impedance at an input of a low noise amplifier (LNA) in the receiver; means for detecting an LO signal at an output of the receiver; means for determining LO leakage from the LO signal; and means for correcting the LO leakage. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In the drawings, like reference numerals refer to like parts throughout the various views unless otherwise indicated. For reference numerals with alphabetic characters, such as "102a" or "102b", the alphabetic characters may distinguish between two similar parts or elements in the same figure. When it is intended that a reference numeral encompass all parts having the same reference numeral in all figures, the alphabetic characters of the reference numeral may be omitted.

[0009] Figure 1 is a diagram showing a wireless device communicating with a wireless communication system.

[0010] Figure 2A is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented.

[0011] Figure 2B is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented.

[0012] Figure 2C is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented.

[0013] Figure 3 is a block diagram of a TX LO calibration circuit according to an exemplary embodiment of the present disclosure.

[0014] Figure 4 is a block diagram of a TX LO calibration circuit according to an exemplary embodiment of the present disclosure.

[0015] Figure 5 is a block diagram of a TX LO calibration circuit according to an exemplary embodiment of the present disclosure.

[0016] Figure 6 is a flow chart describing an example of the operation of a method for TX LO calibration.

[0017] Figure 7 is a functional block diagram of a device for TXLO calibration. DETAILED DESCRIPTION

[0018] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0019] In a communication device transceiver, one or more mmW frequency signals may be up-converted and down-converted using a local oscillator (LO) signal.

[0020] In communication device transceivers, signal upconversion and signal downconversion can occur by using a direct conversion architecture, such as one that uses a low intermediate frequency (LIF) or zero intermediate frequency (ZIF). In communication device transceivers that use a direct conversion architecture (e.g., one that employs a low intermediate frequency (LIF) or zero intermediate frequency (ZIF) architecture) and operate at millimeter wave (mmW) frequencies, the local oscillator (LO) signals used for signal upconversion and signal downconversion occur in a very high frequency range, typically tens of gigahertz (GHz). At such high frequencies, LO signal leakage in the transmit circuitry can interfere with the operation of the receiver. For example, it would be ideal to be able to distinguish between the desired communication information signal and the LO signal leakage, and there would also be a way to control or minimize the LO leakage power.

[0021] In an exemplary embodiment, the TX LO leakage calibration circuit detects LO leakage at mmW frequencies and performs calibration at baseband (LIF or ZIF).

[0022] In an exemplary embodiment, the TX LO leakage calibration circuit performs LO calibration for the transceiver chip.

[0023] In an exemplary embodiment, the TX LO leakage calibration circuit does not mix the IF signal or down-convert the IF signal when performing the LO calibration.

[0024] In an exemplary embodiment, the TX LO leakage calibration circuit uses a receiver portion of a transceiver in a calibration mode to detect TX LO signal leakage from a transmit portion of the transceiver.

[0025] Figure 11 is a diagram showing wireless device 110 communicating with wireless communication system 120. Wireless communication system 120 may be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, a 5G NR (New Radio) system, or some other wireless system. A CDMA system may implement Wideband CDMA (WCDMA), CDMA 1X, Evolution Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity, Figure 1 A wireless communication system 120 is shown including two base stations 130 and 132 and one system controller 140. In general, a wireless communication system may include any number of base stations and any set of network entities.

[0026] The wireless device 110 may also be referred to as a user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc. The wireless device 110 may be a cellular phone, a smart phone, a tablet device, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a tablet computer, a cordless phone, a medical device, a car, a device configured to connect to one or more other devices (e.g., through the Internet of Things), a wireless local loop (WLL) station, a Bluetooth device, etc. The wireless device 110 may communicate with the wireless communication system 120. The wireless device 110 may also receive signals from a broadcast station (e.g., a broadcast station 134) and / or signals from a satellite (e.g., a satellite 150 in one or more global navigation satellite systems (GNSS)). The wireless device 110 may support one or more radio technologies for wireless communication, such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.11, 802.15, 5G, Sub6 5G, 6G, or UWB.

[0027] The wireless device 110 may support carrier aggregation, for example, as described in one or more LTE or 5G standards. In some embodiments, carrier aggregation is used to send a single data stream over multiple carriers, for example, as opposed to separate carriers for the respective data streams. The wireless device 110 is capable of operating in a variety of communication bands, including, for example, those used by LTE, WiFi, 5G, or other communication bands within a wide frequency range. The wireless device 110 is also capable of communicating directly with other wireless devices without communicating through a network.

[0028] Generally speaking, carrier aggregation (CA) can be classified into two types: intra-band CA and inter-band CA. Intra-band CA refers to the operation on multiple carriers in the same frequency band. Inter-band CA refers to the operation on multiple carriers in different frequency bands.

[0029] Figure 2A is a block diagram illustrating a wireless device 200 in which exemplary techniques of the present disclosure may be implemented. The wireless device 200 may be, for example, Figure 1 An implementation of a wireless device 110 is illustrated.

[0030] Figure 2A An example of a transceiver 220 is shown with a transmitter 230 and a receiver 250. In general, conditioning of the signals in the transmitter 230 and the receiver 250 may be performed by one or more stages of amplifiers, filters, upconverters, downconverters, etc. These circuit blocks are based on Figure 2A The configuration shown in is arranged differently. In addition, Figure 2A Other circuit blocks not shown in FIG. 2 may also be used to condition the signals in transmitter 230 and receiver 250. Unless otherwise indicated, Figure 2A Or any signal in any other diagram in the accompanying drawings may be single-ended or differential. Figure 2A Some circuit blocks in the circuit can also be omitted.

[0031] exist Figure 2A In the example shown, the wireless device 200 generally includes a transceiver 220 and a data processor 210. The data processor 210 may include a processor 296 operatively coupled to a memory 298. The memory 298 may be configured to store data and program codes, generally shown using reference numeral 299, and may generally include analog and / or digital processing components. The processor 296 and the memory 298 may cooperate to control, configure, program, or otherwise control, in whole or in part, some or all of the operations of the embodiments of the TXLO leakage calibration circuit described herein.

[0032] The transceiver 220 includes a transmitter 230 and a receiver 250 that support bidirectional communication. In general, the wireless device 200 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. All or a portion of the transceiver 220 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed signal ICs, etc.

[0033] A transmitter or receiver can be implemented using a superheterodyne architecture or a direct conversion architecture. In a superheterodyne architecture, the signal undergoes multiple stages of frequency conversion between radio frequency (RF) and baseband, such as from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another stage for a receiver. In a direct conversion architecture, the signal is converted between RF and baseband in one stage. Superheterodyne and direct conversion architectures may use different circuit blocks and / or have different requirements. Figure 2AIn the example shown, transmitter 230 and receiver 250 are implemented using a direct conversion architecture.

[0034] In the transmit path, the data processor 210 processes the data to be transmitted and provides in-phase (I) and quadrature (Q) analog output signals to the transmitter 230. In an exemplary embodiment, the data processor 210 includes digital-to-analog converters (DACs) 214a and 214b for converting the digital signals generated by the data processor 210 into I analog output signals and Q analog output signals (e.g., I analog output signals and Q analog output signals) for further processing. In other embodiments, the DACs 214a and 214b are included in the transceiver 220, and the data processor 210 provides data (e.g., for I and Q) to the transceiver 220 in a digital manner.

[0035] In the transmitter 230, baseband (e.g., low-pass) filters 232a and 232b filter the I and Q analog transmit signals to remove the undesired image frequencies caused by the previous digital-to-analog conversion. Amplifiers (Amp) 234a and 234b amplify the signals from the baseband filters 232a and 232b, respectively, and provide I and Q baseband signals. An up-converter 240 with up-converter mixers 241a and 241b up-converts the I and Q baseband signals using the I TX LO signal and the Q TX LO signal from the transmit (TX) local oscillator (LO) signal generator 290, and provides the up-converted signals. The filter 242 filters the up-converted signals to remove the undesired image frequencies caused by the frequency up-conversion and the noise in the receive band. A power amplifier (PA) 244 amplifies the signal from the filter 242 to obtain the desired output power level and provide the transmit RF signal. The transmit RF signal may be routed through a duplexer or switch 246 and transmitted via an antenna 248. Although the examples discussed herein utilize I and Q signals, those skilled in the art will appreciate that the components of a transceiver may be configured to utilize polar modulation.

[0036] In the receive path, antenna 248 receives the communication signal and provides a received RF signal, which can be routed through a duplexer or switch 246 and provided to a low noise amplifier (LNA) 252. The duplexer 246 is designed to operate with a specific RX and TX duplexer frequency separation so that the RX signal is isolated from the TX signal. The received RF signal is amplified by the LNA 252 and filtered by the filter 254 to obtain the desired RF input signal.

[0037] Down-converter mixers 261a and 261b in down-converter 260 mix the output of filter 254 with I RX LO signal and Q RX LO signal (i.e., LO_I and LO_Q) from receive (RX) LO signal generator 280 to generate I baseband signal and Q baseband signal. The I baseband signal and Q baseband signal are amplified by amplifiers 262a and 262b and further filtered by baseband (e.g., low-pass) filters 264a and 264b to obtain I analog input signal and Q analog input signal, which are provided to data processor 210. In the exemplary embodiment shown, data processor 210 includes analog-to-digital converters (ADCs) 216a and 216b for converting analog input signals into digital signals to be further processed by data processor 210. In some embodiments, ADCs 216a and 216b are included in transceiver 220 and provide data to data processor 210 in a digital manner.

[0038] exist Figure 2A 2 , TX LO signal generator 290 generates I TX LO signal and Q TX LO signal for up-conversion, and RX LO signal generator 280 generates I RX LO signal and Q RX LO signal for down-conversion. Each LO signal is a periodic signal with a specific base frequency. Phase-locked loop (PLL) 292 receives timing information from data processor 210 and generates a control signal for adjusting the frequency and / or phase of the TX LO signal from LO signal generator 290. Similarly, PLL 282 receives timing information from data processor 210 and generates a control signal for adjusting the frequency and / or phase of the RX LO signal from LO signal generator 280.

[0039] The wireless device 200 may support CA and may (i) receive multiple downlink signals sent by one or more cells on multiple downlink carriers at different frequencies and / or (ii) send multiple uplink signals to one or more cells on multiple uplink carriers. However, those skilled in the art will appreciate that the various aspects described herein may be implemented in systems, devices, and / or architectures that do not support carrier aggregation.

[0040] Figure 2A200, and the configurations illustrated therein may or may not represent physical device configurations in certain specific implementations. For example, as described above, transceiver 220 may be implemented in various integrated circuits (ICs), RF ICs (RFICs), mixed signal ICs, etc. In some embodiments, transceiver 220 is implemented on a substrate or board (such as a printed circuit board (PCB)) having various modules, chips, and / or components. For example, power amplifier 244, filter 242, and duplexer 246 may be implemented in separate modules or as discrete components, while the remaining components illustrated in transceiver 220 may be implemented in a single transceiver chip.

[0041] The power amplifier 244 may include one or more stages including, for example, a driver stage, a power amplifier stage, or other components that may be configured to amplify communication signals at one or more frequencies, in one or more frequency bands, and at one or more power levels. Depending on various factors, the power amplifier 244 may be configured to operate using one or more driver stages, one or more power amplifier stages, one or more impedance matching networks, and may be configured to provide good linearity, efficiency, or a combination of good linearity and efficiency.

[0042] In an exemplary embodiment in a super-heterodyne architecture, PA 244 and LNA 252 (and in some examples filter 242 and filter 254) may be implemented separately from other components in transmitter 230 and receiver 250 (e.g., on a millimeter wave integrated circuit). Figure 2B An example superheterodyne architecture is illustrated in .

[0043] Figure 2B is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented. Figure 2B Certain components of the wireless device 200a (eg, which may be indicated by the same reference numerals) may be similar to those of the wireless device 200a. Figure 2A The components of the wireless device 200 shown in FIG. 1 are configured as described above, and the detailed description will not be repeated. Figure 2B Description of the item with the same number in .

[0044] Wireless device 200a is an example of a heterodyne (or superheterodyne) architecture, wherein upconverter 240 and downconverter 260 are configured to process communication signals between baseband and intermediate frequency (IF). The intermediate frequency (IF) signal may be a low intermediate frequency (LIF) signal, or a zero (or near zero) intermediate frequency (ZIF) signal. For example, upconverter 240 may be configured to provide the IF signal to upconverter 275. In an exemplary embodiment, upconverter 275 may include a summing function 278 and an upconversion mixer 276. Summing function 278 combines the I output and the Q output of upconverter 240 and provides a non-orthogonal signal to mixer 276. The non-orthogonal signal may be single-ended or differential. The mixer 276 is configured to receive the IF signal from the up-converter 240 and the TX RF LO signal from the TX RF LO signal generator 277 and provide the up-converted RF signal to the phase shift circuit 281. Figure 2B 277, but a corresponding PLL for each signal generator may be implemented.

[0045] In an exemplary embodiment, the components in the phase shift circuit 281 may include one or more adjustable or variable phased array elements, and may receive one or more control signals from the data processor 210 via connection 294 and operate the adjustable or variable phased array elements based on the received control signals.

[0046] In an exemplary embodiment, phase shift circuit 281 includes phase shifters 283 and phased array elements 287. Although three phase shifters 283 and three phased array elements 287 are shown for ease of illustration, phase shift circuit 281 may include more or fewer phase shifters 283 and phased array elements 287.

[0047] Each phase shifter 283 can be configured to receive an RF transmit signal from the upconverter 275, change the phase by a certain amount, and provide an RF signal to a corresponding phased array element 287. Each phased array element 287 can include transmit and receive circuits including one or more filters, amplifiers, driver amplifiers, and / or power amplifiers. In some embodiments, the phase shifter 283 can be incorporated into the corresponding phased array element 287.

[0048] The output of the phase shift circuit 281 is provided to the antenna array 248. In an exemplary embodiment, the antenna array 248 includes a number of antennas that generally corresponds to the number of phase shifters 283 and phased array elements 287, e.g., such that each antenna element is coupled to a respective phased array element 287. In an exemplary embodiment, the phase shift circuit 281 and the antenna array 248 may be referred to as a phased array.

[0049] In the receive direction, the output of the phase shift circuit 281 is provided to a downconverter 285. In an exemplary embodiment, the downconverter 285 may include an I / Q generation function 291 and a downconversion mixer 286. In an exemplary embodiment, the mixer 286 downconverts the received RF signal provided by the phase shift circuit 281 to an IF signal based on the RXRF LO signal provided by the RXRF LO signal generator 279. The I / Q generation function 291 receives the IF signal from the mixer 286 and generates an I signal and a Q signal for the downconverter 260, which downconverts the IF signal to baseband, as described above. Although the PLL 282 is in Figure 2B 279, but a respective PLL for each signal generator may be implemented.

[0050] In some embodiments, the upconverter 275, the downconverter 285, and the phase shift circuit 281 are implemented on a common IC. In some embodiments, while the summing function 278 and the I / Q generation function 291 are implemented separately from the mixers 276 and 286, so that the mixers 276, 286, and the phase shift circuit 281 are implemented on a common IC, the summing function 278 and the I / Q generation function 291 are not implemented on a common IC (e.g., the summing function 278 and the I / Q generation function 291 are implemented in another IC coupled to the IC with the mixers 276, 286). In some embodiments, the LO signal generators 277, 279 are included in a common IC. In some embodiments in which the phase shift circuit is implemented on a common IC with 276, 286, 277, 278, 279, and / or 291, the common IC and the antenna array 248 are included in a module that can be coupled to other components of the transceiver 220 via a connector. In some embodiments, the phase shift circuit 281 (e.g., a chip on which the phase shift circuit 281 is implemented) is coupled to the antenna array 248 via an interconnect, or both are mounted on the substrate. For example, the components of the antenna array 248 can be implemented on the substrate and coupled to the integrated circuit implementing the phase shift circuit 281 via a flexible printed circuit, or the integrated circuit can be mounted on the other side of the substrate.

[0051] In some embodiments, Figure 2A The illustrated architecture and Figure 2B The illustrated architecture is implemented in the same device. For example, the wireless device 110 or 200 may be configured to use Figure 2A The illustrated architecture communicates with signals having frequencies below about 20 GHz and uses Figure 2B The illustrated architecture communicates with signals having frequencies above about 20 GHz. In devices implementing both architectures, Figure 2A and Figure 2BOne or more components with the same number may be shared between the two architectures. For example, a signal that has been directly down-converted from RF to baseband and a signal that has been down-converted from RF to baseband by an IF stage may both be filtered by the same baseband filter 264. In other embodiments, a first version of filter 264 is included in an implementation of the device. Figure 2A and a second version of the filter 264 is included in the implementation of the device Figure 2B Although certain example frequencies are described herein, other specific implementations are possible. For example, a direct conversion architecture can be used to transmit and / or receive signals having a frequency greater than about 20 GHz (e.g., having mmW frequencies). In such embodiments, for example, a phased array can be implemented in a direct conversion architecture.

[0052] Figure 2C is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented. Figure 2C Certain components of the wireless device 200b (e.g., indicated by the same reference numerals) may be configured similarly to Figure 2A The wireless device 200 and / or Figure 2B The components in the wireless device 200a are similar, and Figure 2C The descriptions of component items with the same number will not be repeated.

[0053] Figure 2C The wireless device 200b in the embodiment of the present invention incorporates a phase shift circuit 281 ( Figure 2B ), where the mmW transmit signal is up-converted and down-converted between baseband and RF without using intermediate frequency (IF) signal conversion. For example, Figure 2C The LO signals in the architecture may include signals with frequencies of tens of GHz.

[0054] In some embodiments, the upconverter 240, the downconverter 260, and the phase shift circuit 281 are implemented on a common IC. In some embodiments, the LO signal generators 280, 290 are included in the common IC. In some embodiments, the common IC and the antenna array 248 are included in a module that can be coupled to other components of the transceiver 220 via a connector. In some embodiments, the phase shift circuit 281 (e.g., a chip on which the phase shift circuit 281 is implemented) is coupled to the antenna array 248 via an interconnect, or both are mounted on a substrate. For example, the components of the antenna array 248 can be implemented on a substrate and coupled to an integrated circuit that implements the phase shift circuit 281 via a flexible printed circuit, or the integrated circuit can be mounted on the other side of the substrate.

[0055] Figure 3is a block diagram of a TX LO calibration circuit 300 according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the TX LO calibration circuit 300 includes portions of a transmitting section 310 and a receiving section 350. The transmitting section 310 and the receiving section 350 may be part of a transceiver, such as Figure 2C In some embodiments, some components of the transmitting unit 310 and the receiving unit 350 may be located in Figure 2C In some embodiments, Figure 3 All elements illustrated in are provided on the common IC described above. Thus, in some embodiments, calibration can be implemented and performed on the RFIC without transmitting signals from the RFIC to the baseband circuit. In other embodiments, only signals associated with power detection are transmitted between the RFIC and the baseband circuit. In some such embodiments, the power detection signal is much lower in frequency (or is a DC signal) relative to the LO signal processed by the calibration circuit 300, and therefore all mmW signals can be included in the RFIC and processed.

[0056] Transmitter 310 and receiver 350 may be connected to interface circuit 304. Interface circuit 304 may be connected to circuit pads 302, which may be implemented as bumps on an IC and which may be connected to other circuit elements and / or one or more antennas. In some embodiments, a power detector (PDET) 375 may be located at the output of power amplifier 326, across connections 341 and 343.

[0057] In an exemplary embodiment, the interface circuit 304 may include one or more magnetic elements, such as inductors, capacitors, resistors, etc., and may be configured to provide an interface between the transmitting portion 310 and the circuit welding point 302; and may be configured to provide an interface between the receiving portion 350 and the circuit welding point 302.

[0058] In an exemplary embodiment, the interface circuit 304 may also be configured to provide a connection between the transmit section 310 and the receive section 350. For example, under certain conditions, the interface circuit 304 may be configured to provide a transmit signal from the transmit section 310 to the receive section 350. For example, in an exemplary embodiment in a TX LO leakage calibration mode, a portion of the receive section 350 may be configured to process a signal from the transmit section 310 to determine TX LO signal power leakage and provide TX LO signal leakage detection and calibration. Such a TX LO leakage calibration mode may include a mode in which selected elements of the transmit section 310 and selected elements of the receive section 350 are simultaneously active. In an exemplary embodiment, a transmit signal having TX LO leakage is directed from the transmit section 310 to the receive section 350, wherein a receiver having the receive section 350 is co-located with a transmitter having the transmit section 310 from which the transmit signal is directed.

[0059] In an exemplary embodiment, the transmitting section 310 may include a digital-to-analog converter 332, a DAC 334, a quadrature signal generator 316, a mixer 318, a mixer 322, a phase shifter 324, and a power amplifier 326. In an exemplary embodiment, the DAC 332 (DAC-I) may be configured to process an in-phase signal, and the DAC 334 (DAC-Q) may be configured to process a quadrature signal.

[0060] In an exemplary embodiment, the transmission section 310 may include a connection 312 configured to provide a baseband information signal including an in-phase signal component to a mixer 318. Similarly, the transmission section 310 may also include a connection 314 configured to provide a baseband information signal including a quadrature signal component to a mixer 322. A local oscillator (LO) signal may be provided to a quadrature signal generator 316 via a connection 315. The LO signal may be provided by, for example, Figure 2C The TX LO signal generator 290 or other LO signal generator in FIG. Mixers 318 and 322 may be examples of mixers 241a and 241b.

[0061] In an exemplary embodiment, quadrature signal generator 316 may provide a 0 degree phase shifted signal to mixer 318 and may be configured to provide a 90 degree phase shifted signal to mixer 322. However, other phase shift amounts are possible.

[0062] In an exemplary embodiment, mixer 318 combines the in-phase baseband information signal on connection 312 with a 0 degree phase shifted LO signal from quadrature signal generator 316 to provide an up-converted (RF) in-phase signal to phase shifter 324 via connection 337 .

[0063] In an exemplary embodiment, mixer 322 combines the quadrature baseband information signal on connection 314 with a 90 degree phase shifted LO signal from quadrature signal generator 316 to provide an up-converted (RF) quadrature signal to phase shifter 324 via connection 337 .

[0064] In an exemplary embodiment, phase shifter 324 changes the phase of the signal on connection 337 and provides the transmit signal on connection 339 to power amplifier 326. Phase shifter 324 may be controlled by a signal from data processor 210 or other (eg, local) controller.

[0065] The power amplifier 326 amplifies the transmit signal and provides a differential transmit signal on connection 341 and connection 343 to the interface circuit 304. Although one PA and one phase shifter are shown in the illustrated example, in other examples, the output signals of the mixers 318 and 322 can be split and provided to multiple paths, each path including a PA, a phase shifter, a bump, and a corresponding receiving section.

[0066] In an exemplary embodiment, the receiving section 350 may include an impedance control circuit 360, a low noise amplifier (LNA) 352, a phase shifter 354, an RF variable gain amplifier (RF-VGA) 356, an optional narrowband tunable bandpass buffer 362, a power detector (PDET) 364, an analog-to-digital converter (ADC) 366 and an LO elimination element 368.

[0067] In an exemplary embodiment, in the TX LO calibration mode, a signal may be provided from the transmit section 310 via the interface circuit 304 to the LNA 352 via the connection 307. In an exemplary embodiment, the signal provided via the connection 307 may include a transmit signal provided by the transmit section 310 that is generated and provided to the receive section 350 in the TX LO calibration mode to determine the TX LO leakage. For example, the signal provided from the transmit section 310 to the LNA 352 via the connection 307 may include a signal representing a TX signal from the TX LO signal generator 290 ( Figure 2C ) of the leakage signal.

[0068] In an exemplary embodiment, impedance control circuit 360 may include one or more switchable and / or variable capacitors, resistors, and inductors configured to change the impedance at the input of LNA 352 so that the signal on connection 307 provided to LNA 352 is similar to the transmit signal in normal operating mode (also referred to as mission mode). For example, in TXLO leakage calibration mode, impedance control circuit 360 at the input of LNA 352 may be configured to make the TX signal in TX LO leakage calibration mode highly similar to or close to the mission mode TX signal. In this way, the TX LO leakage at interface circuit 304 will be similar to and representative of the TXLO leakage in mission mode. In an exemplary embodiment, impedance control circuit 360 may be controlled by a processor from data processor 210 ( Figure 2C ) or other controller signal control.

[0069] In an exemplary embodiment, the TX LO calibration circuit 300 operates in a mmW communication system, which can be implemented as a time division duplex (TDD) system. In such a TDD system, the LNA 352 includes a configurable input so that when the transceiver is in TX mode, the LNA 352 is immune to large voltage fluctuations and can still detect weak signals with a low noise figure in RX mode. In such applications, in the TX LO calibration mode, the signal power from the transmit section 310 is very low because the signal only represents TX LO leakage. This allows the input of the LNA 352 to be reconfigured so that large input voltage fluctuations are ignored, so that the load of the power amplifier 326 does not change, while still representing the mission mode TX signal, and also allows the LNA 352 to sense and amplify the TXLO leakage for detection. In this way, the shape of the frequency impedance response for the power amplifier 326 is maintained, so as not to cause attenuation or peaks in the TX LO leakage signal, which may cause inaccurate correction and fail to represent the TXLO leakage of the mission mode TX signal.

[0070] In an exemplary embodiment, impedance control circuit 360 can be configured to maintain an input impedance at LNA 352 when LNA 352 is off that is similar to when LNA 352 is on. In some embodiments, impedance control circuit 360 can be configured to selectively apply a transmit signal from transmit section 310 directly to LNA 352 in receive section 350 by controlling the impedance at connection 307.

[0071] In an exemplary embodiment, LNA 352 can be configured to operate in three modes: (1) RX mode (PA OFF and LNA ON), (2) TX mission mode (PA ON and LNA OFF), and (3) TX LO calibration mode (also referred to as transmit receive (TRX) mode, in which both the PA and LNA are ON).

[0072] In an exemplary embodiment, the frequency response of the mission mode transmit signal and the frequency response of the transmit signal in the TX LO leakage calibration mode are characterized. For example, the mission mode TX signal can be provided from the power amplifier 326 to the interface circuit 304 and to the circuit pad 302. The output of the power detector (PDET) 375 can also be provided to the data processor 210 ( Figure 2C ) to determine the frequency response of the mission mode TX signal; alternatively, the output of the power detector can be provided to a local processor of the chip on which the PDET 375 is implemented. Then, during the TX LO calibration mode, the power detector (PDET) 375 and the data processor 210 ( Figure 2C ) or a local processor repeats the frequency response measurement so that the impedance provided by the impedance control circuit 360 can be adjusted so that the frequency response of the TX LO leakage signal appearing at the output of the power amplifier 326 in the TX LO calibration mode matches (or is highly close to) the frequency response of the mission mode TX signal at the output of the power amplifier 326. This ensures that the TX LO leakage signal at the output of the power amplifier 326 is approximately the same between the TX mission mode and the TX LO calibration mode. In this way, in the TX LO leakage calibration mode, the frequency response of the TX LO leakage signal appearing at the connection 357 is close to the frequency response of the mission mode TX signal. In this way, the TX LO calibration circuit 300 can provide a signal with TX LO leakage at the connection 357 that is highly close to the mission mode TX signal, so that the appropriate TX LO correction amount can be determined and applied. In an exemplary embodiment, by adjusting the impedance provided by the impedance control circuit 360, the frequency response of the TX LO leakage signal can be made to highly match the frequency response of the transmit signal in the mission mode.

[0073] In an exemplary embodiment, the output of LNA 352 at connection 353 is provided to phase shifter 354. Phase shifter 354 provides a phase shifted signal to RF-VGA 356 via connection 355. Phase shifter 354 may be provided by a signal from data processor 210 ( Figure 2C ) or other controller. In an exemplary embodiment, the RF-VGA 356 may be adjustable and may be controlled by a signal from the data processor 210 ( Figure 2C) or other controller. In TX LO calibration mode, the expected output of the RF-VGA at connection 357 is a signal with only the LO tone (or frequency) in this exemplary embodiment and can be used to determine TX LO signal leakage.

[0074] In an exemplary embodiment, the signal on connection 357 is provided to an optional narrowband tunable bandpass buffer 362. The optional narrowband tunable bandpass buffer 362 may be used when the system gain is low and / or one or more spurs (spurs) are present at frequencies close to the LO signal frequency on connection 357. In some embodiments, if the strength of the signal on connection 357 falls within the detectable range of the power detector (PDET) 364, the optional narrowband tunable bandpass buffer 362 may be omitted.

[0075] The signal on connection 357 (or the output of the optional narrowband tunable bandpass buffer 362, if present) is provided to a power detector (PDET) 364. The power detector (PDET) 364, in conjunction with the data processor 210, determines the power level and frequency response of the signal on connection 357 and provides an output to the ADC 366 via connection 365. In other embodiments, a local processor on the chip on which the PDET 364 is implemented (which may be the same local processor as described above) assists in determining the power level and frequency response and provides an output via connection 365. The signal on connection 365 is a DC signal that is proportional to the amount of LO leakage detected by the power detector (PDET) 364. In an exemplary embodiment, the narrowband tunable bandpass buffer 362 may be configured to filter out unwanted signals from the signal on connection 357, enabling the power detector 364 to detect the LO tone, since the power detector 364 is generally unable to distinguish signals between multiple frequencies. In an exemplary embodiment, due to the limited sensitivity of power detector 364 in detecting signals, RF-VGA 356 provides an amplification function so that the signal on connection 357 falls within the detection range of power detector 364.

[0076] In an exemplary embodiment, the impedance control circuit 360 can be configured so that the signal characteristics (e.g., frequency response) at the input of the power detector (PDET) 364 match or are highly close to the signal characteristics of the mission mode transmit signal at the output of the power amplifier 326, as described above. For example, the TX LO leakage can be measured at the output of the power amplifier 326 in the TX mission mode and the TX LO calibration mode as described above. In this way, the TX LO leakage measured by the power detector 364 in the TX LO calibration mode can be compensated after the TX LO signal is processed by the LNA 352, the phase shifter 354, and the RF-VGA 356.

[0077] In an exemplary embodiment, the LO leakage present at the output of the power amplifier 326 is typically small and, without certain amplification and / or signal processing, cannot be detected by the power detector (PDET) 364. Therefore, in the TX LO leakage mode, the signal at the output of the power amplifier 326 is provided to the LNA 352 (without changing the impedance presented to the power amplifier 326) in order to maintain a consistent value of the LO leakage at the output of the power amplifier 326 in the TX mission mode and the TX LO calibration mode.

[0078] In some embodiments, if the power of the signal provided by LNA 352 on connection 353 falls within the detection range of power detector (PDET) 364, the output of LNA 352 can be provided directly to power detector 364 (or to optional narrowband tunable bandpass buffer 362, if present), bypassing phase shifter 354 and RF-VGA 356. In other embodiments, if the power of the signal provided by phase shifter 354 on connection 355 falls within the detection range of power detector 364, the output of phase shifter 354 can be provided directly to power detector 364 (or to optional narrowband tunable bandpass buffer 362, if present).

[0079] In an exemplary embodiment, power detector (PDET) 364 measures the signal at connection 357, which includes the gain of LNA 352, phase shifter 354, and RF-VGA 356, so that power detector (PDET) 364 can detect the signal at connection 357 with TX LO leakage before and after correction.

[0080] ADC 366 provides a digital value proportional to the DC signal on connection 365. LO cancellation element 368 receives the digital value on connection 367 and generates a DC offset value, which is provided to DAC 332 and DAC 334 via connection 369.

[0081] A DC offset value is provided from DAC 332 to mixer 318 via connection 333, and the DC offset value is provided from DAC 334 to mixer 322 via connection 335. The DC offset introduced to mixers 318 and 322 produces an LO tone at the output of mixers 318 and 322 on connection 337. The LO output on connection 337 is the vector sum of the LO leakage from mixer 318 (I mixer) and mixer 322 (Q mixer). Thus, the signal on connection 369 can provide a different DC offset to be applied to mixers 318 and 322 to produce a high or low effective LO tone at the output on connection 337. The value of the DC offset provided on connection 369 that ultimately generates a minimum value for the LO leakage on connection 337 is stored in a transceiver device memory (e.g., a read only memory (ROM)), such as stored in ( Figure 2C In this way, any LO leakage on the signal on connection 305 can be corrected by changing the signals provided by mixers 318 and 322.

[0082] In an exemplary embodiment, the TX LO leakage calibration described herein occurs at mmW frequencies and the TX LO signal on connection 357 has not yet passed through a mixer, which minimizes any non-idealities introduced by the mixer.

[0083] Figure 4 is a block diagram of a TX LO calibration circuit 400 according to an exemplary embodiment of the present disclosure. Figure 4 Zhongyu Figure 3 The same elements are provided with the same reference numerals. Figure 4 There may be Figure 3 The components in the same function may be Figure 3 The components of the exemplary implementation of the components in the embodiment adopt the 4XX naming method, wherein Figure 4 The components marked 4XX correspond to Figure 3 Components marked as 3XX.

[0084] In an exemplary embodiment, the TX LO calibration circuit 400 includes portions of a transmit section 410 and a receive section 450. The transmit section 410 and the receive section 450 may be part of a transceiver, such as Figure 2C The transceiver 220 of FIG. The transmitting section 410 and the receiving section 450 may be connected to the interface circuit 470. The interface circuit 470 may be connected to the circuit pad 302, which may be implemented as a bump and which may be connected to other circuit elements and / or one or more antennas.

[0085] In an exemplary embodiment, interface circuit 470 may include inductors 472, 474, and 476, and may be configured to provide an interface between transmit portion 410 and circuit pad 302; and may be configured to provide an interface between receive portion 450 and circuit pad 302. A power detector (PDET) 475 may be connected across inductor 472 at the output of power amplifier 326.

[0086] In an exemplary embodiment, the interface circuit 470 may also be configured to provide a connection between the transmit section 410 and the receive section 450. For example, under certain conditions, the interface circuit 470 may be configured to provide a transmit signal from the transmit section 410 to the receive section 450. For example, in an exemplary embodiment in a TX LO leakage calibration mode, a portion of the receive section 450 may be configured to process a signal from the transmit section 410 to determine TX LO signal power leakage and provide TX LO signal leakage calibration. Such a calibration mode may include a mode in which selected elements of the transmit section 410 and selected elements of the receive section 450 are simultaneously active.

[0087] In an exemplary embodiment, inductors 472, 474, and 476 in interface circuit 470 may be magnetically coupled. For example, inductors 472, 474, and 476 may form a so-called tri-coil. In an exemplary embodiment, in a transmit mode, inductor 472 and inductor 476 may be electromagnetically coupled to provide a transmit signal from power amplifier 326 to circuit pad 302. In an exemplary embodiment, in a receive mode, inductor 474 and inductor 476 may be electromagnetically coupled to provide a receive signal from circuit pad 302 to an input of LNA 352. In an exemplary TX LO calibration mode, inductor 472 and inductor 474 may be electromagnetically coupled to provide a transmit signal from power amplifier 326 to an input of LNA 352, wherein the TX signal represents TX LO leakage.

[0088] In an exemplary embodiment, impedance control circuit 460 may include switches 461 and 463, and may include adjustable capacitor 466 and fixed inductor 464. In an exemplary embodiment, adjustable capacitor 466 may be connected to switch 461, and fixed inductor 464 may be connected to switch 463. In an exemplary embodiment, adjustable capacitor 466 may be switchably or selectively connected to the input of LNA 352 on connection 307 via switch 461. Similarly, fixed inductor 464 may be switchably or selectively connected to the input of LNA 352 on connection 307 via switch 463. Although shown as simple single-pole single-pole switches, switches 461 and 463 may be configured in a variety of ways to provide a variable resistance in series with adjustable capacitor 466 and fixed inductor 464.

[0089] In an exemplary embodiment, switches 461 and 463 and adjustable capacitor 466 may be controlled by a processor 210 ( Figure 2C ) or other (e.g., local) controller signal control.

[0090] In an exemplary embodiment, the values ​​of adjustable capacitance 466 and fixed inductance 464 can be configured to change the impedance at the input of LNA 352 so that the TX LO leakage signal provided to LNA 352 on connection 307 in the TX LO leakage calibration mode is similar to the transmit signal in the normal operating mode (also referred to as the mission mode), as described herein. For example, in the calibration mode, impedance control circuit 460 at the input of LNA 352 can be configured to allow the TX signal in the TX LO leakage calibration mode to behave like the mission mode TX signal, as described herein. In this way, the TX LO leakage at the interface circuit 470 will be similar to and representative of the TX LO leakage in the mission mode, so that the TX LO leakage can be compensated by the calibration described herein. In an exemplary embodiment, impedance control circuit 460 can be configured so that in the TX LO calibration mode, the characteristics of the signal at the input of power detector 364 on connection 357 match the characteristics of the mission mode transmit signal at the output of power amplifier 326, as described above.

[0091] In an exemplary embodiment, the TX LO calibration circuit 400 may include an optional narrowband tunable bandpass buffer 462. The narrowband tunable bandpass buffer 462 is an example of the narrowband tunable bandpass buffer 362. In an exemplary embodiment, the optional narrowband tunable bandpass buffer 462 may include an amplifier 482, an inductor 484, and an adjustable capacitor 486. The adjustable capacitor 486 may be provided by the data processor 210 ( Figure 2C ) or other controller's control signal control. In an exemplary embodiment, the narrowband tunable bandpass buffer 462 can be configured to provide signal buffering (and / or amplification) and frequency adjustability using an adjustable capacitor 486.

[0092] The signal on connection 357 (or the output of the optional narrowband tunable bandpass buffer 462 if present) is provided to a power detector (PDET) 364 and then processed by an ADC 366 and LO cancellation element 368 as shown. Figure 3 described.

[0093] Figure 5 is a block diagram of a TX LO calibration circuit 500 according to an exemplary embodiment of the present disclosure. Figure 5 Zhongyu Figure 3 and Figure 4 The same elements are provided with the same reference numerals. Figure 5There may be Figure 3 or Figure 4 The components in the same function may be Figure 3 or Figure 4 The components of the exemplary implementation of the components in the embodiment adopt the 5XX naming method, wherein Figure 5 The components marked 5XX correspond to Figure 3 Components marked 3XX or Figure 4 Components marked as 4XX.

[0094] In an exemplary embodiment, the TX LO calibration circuit 500 includes portions of a transmission section 510 and a reception section 550. The transmission section 510 and the reception section 550 may be part of a transceiver, such as Figure 2C The transceiver 220 of the embodiment of the present invention. The transmitting section 510 and the receiving section 550 may be connected to the interface circuit 570. The interface circuit 570 may be connected to the circuit pad 302, which may be implemented as a bump and which may be connected to other circuit elements and / or one or more antennas.

[0095] In an exemplary embodiment, the interface circuit 570 may include inductors 571 and 573 and may be configured to provide an interface between the transmitting portion 510 and the circuit pad 302 ; and may be configured to provide an interface between the receiving portion 550 and the circuit pad 302 .

[0096] In an exemplary embodiment, the interface circuit 570 may also include a capacitor 577 connected across the inductor 571 and a capacitor 578 connected across the inductor 573 .

[0097] In an exemplary embodiment, the interface circuit 570 may also be configured to provide a connection between the transmit section 510 and the receive section 550. For example, under certain conditions, the interface circuit 570 may be configured to provide a transmit signal from the transmit section 510 through the connection 578 and the inductor 579 to the receive section 550 through the connection 307. For example, in an exemplary embodiment in a TX LO leakage calibration mode, a portion of the receive section 550 may be configured to process a signal from the transmit section 510 to determine LO signal power leakage and provide LO signal leakage calibration. Such a calibration mode may include a mode in which selected elements of the transmit section 510 and selected elements of the receive section 550 are simultaneously active.

[0098] In an exemplary embodiment, inductors 571 and 573 in interface circuit 570 may be magnetically coupled to provide a transmit signal from power amplifier 326 to circuit pad 302. In an exemplary embodiment, in a receive mode, inductor 579 may be configured to provide a receive signal from circuit pad 302 to the input of LNA 352.

[0099] In an exemplary TX LO calibration mode, inductor 571 and inductor 573 may be electromagnetically coupled to provide a transmit signal from power amplifier 326 to an input of LNA 352 through inductor 579 , wherein the TX signal represents TX LO leakage.

[0100] In an exemplary embodiment, impedance control circuit 560 may include switches 561 and 563, and may include adjustable capacitor 566 and fixed inductor 564. In an exemplary embodiment, adjustable capacitor 566 may be connected to switch 561, and fixed inductor 564 may be connected to switch 563. In an exemplary embodiment, adjustable capacitor 566 may be switchably or selectively connected to the input of LNA 352 on connection 307 via switch 561. Similarly, fixed inductor 564 may be switchably or selectively connected to the input of LNA 352 on connection 307 via switch 563. Although shown as simple single-pole single-pole switches, switches 561 and 563 may be configured in a variety of ways to provide a variable resistance in series with adjustable capacitor 566 and fixed inductor 564.

[0101] In an exemplary embodiment, switches 561 and 563 and adjustable capacitor 566 may be controlled by a processor 210 ( Figure 2C ) or other (e.g., local) controller signal control.

[0102] In an exemplary embodiment, the values ​​of adjustable capacitance 566 and fixed inductance 564 can be configured to change the impedance at the input of LNA 352 so that the TX LO calibration signal provided to LNA 352 on connection 307 is similar to the transmit signal in the normal operating mode (also referred to as the mission mode). For example, in the TX LO calibration mode, the impedance control circuit 560 at the input of the LNA can be configured to allow the TX signal in the TXLO calibration mode to be similar to the mission mode TX signal. In this way, the LO leakage at the interface circuit 570 will be similar to and representative of the TX LO leakage in the mission mode, so that the TXLO leakage can be compensated through calibration.

[0103] The signal on connection 357 (or the output of the optional narrowband tunable bandpass buffer 462 if present) is provided to a power detector (PDET) 364 and then processed by an ADC 366 and LO cancellation element 368 as shown. Figure 3 described.

[0104] Figure 6 6 is a flowchart 600 describing an example of the operation of a method for TX LO calibration. The blocks in the method 600 may or may not be performed in the order shown, and in some embodiments, may be performed at least partially in parallel.

[0105] The mission mode transmit signal may be characterized in block 601. For example, the mission mode transmit signal appearing at the output of the power amplifier 326 may be processed by the power detector (PDET) 375 and the data processor 210 (or a local processor) to determine a frequency response.

[0106] In block 602, a transmit signal including a TX LO signal may be provided to a receiver in a TX LO leakage calibration mode. For example, the interface circuit 304 ( Figure 3 )、interface circuit 470( Figure 4 ) or interface circuit 570 ( Figure 5 ) can provide a signal to the receiver portion that is representative of the TX LO leakage at the output of the power amplifier 326. This signal will be similar to and representative of the TX LO leakage in mission mode, so that the TX LO leakage can be compensated for through calibration.

[0107] In block 604, the impedance at the input of the low noise amplifier (LNA) is adjusted. For example, the impedance control circuit 360 ( Figure 3 )、impedance control circuit 460( Figure 4 ) or impedance control circuit 560 ( Figure 5 ) such that the signal presented to the input of LNA 352 in the TX LO calibration mode causes the TX signal in the TX LO leakage calibration mode to resemble the mission mode TX signal with LO leakage.

[0108] In block 606, a TX LO signal (single tone) is detected at the receiver output. For example, the output of RF-VGA 356 on connection 357 is detected, which may contain a signal with TX LO leakage.

[0109] In block 608, TX LO leakage is determined. For example, power detector 364 and data processor 210 (or a local processor) measure the power and frequency response of the signal on connection 357, and the measured power and frequency response are indicative of TX LO leakage.

[0110] In block 610, TX LO leakage is compensated. For example, ADC 366 provides a digital value proportional to the DC signal provided by power detector 364. LO cancellation element 368 receives the digital value and generates a DC offset value, which is provided to DAC 332 and DAC 334 via connection 369. The DC offset value is provided from DAC 332 to mixer 318 via connection 333, and the DC offset value is provided from DAC 334 to mixer 322 via connection 335. In this way, any LO leakage on the signal on connection 307 can be corrected by changing the signals provided by mixers 318 and 322.

[0111] Figure 7 7 is a functional block diagram of an apparatus 700 for TX LO calibration. The apparatus 700 includes a component 701 for characterizing a mission mode transmit signal. In some embodiments, the component 701 for characterizing a mission mode transmit signal may be configured to perform the method 600 ( Figure 6 ) in one or more of the functions described in operation block 601 of the embodiment. In an exemplary embodiment, the component 701 for characterizing the mission mode transmit signal may include a power detector (PDET) 375 and a data processor 210 (or a local processor), for example, configured to determine the frequency response of the mission mode transmit signal appearing at the output of the power amplifier 326.

[0112] The apparatus 700 may also include a component 702 for providing a transmit signal including a TX LO signal to a receiver in a TX LO leakage calibration mode. In some embodiments, the component 702 for providing a transmit signal including a TX LO signal to a receiver in a TX LO leakage calibration mode may be configured to perform the method 600 ( Figure 6 ) of the operation block 602. In an exemplary embodiment, the component 702 for providing the transmit signal including the TXLO signal to the receiver in the TX LO leakage calibration mode may include the interface circuit 304 ( Figure 3 )、interface circuit 470( Figure 4 ) or interface circuit 570 ( Figure 5 ), for example, is configured to provide a signal to the receiver portion that is representative of the TX LO leakage at the output of the power amplifier 326.

[0113] The apparatus 700 may also include a component 704 for adjusting the impedance at the input of the low noise amplifier (LNA). In some embodiments, the component 704 for adjusting the impedance at the input of the low noise amplifier (LNA) may be configured to perform the method 600 ( Figure 6) of the operation block 604. In an exemplary embodiment, the component 704 for adjusting the impedance at the input of the low noise amplifier (LNA) may include the impedance control circuit 360 ( Figure 3 )、impedance control circuit 460( Figure 4 ) or impedance control circuit 560 ( Figure 5 ), for example, is configured to adjust the impedance so that the signal presented to the input of LNA 352 in the TX LO leakage calibration mode is similar to the mission mode TX signal with LO leakage.

[0114] The apparatus 700 may also include a component 706 for detecting a TX LO signal (single tone) at the output of the receiver. In some embodiments, the component 706 for detecting a TX LO signal (single tone) at the output of the receiver may be configured to perform the method 600 ( Figure 6 ) in one or more of the functions described in operation block 606 of ). In an exemplary embodiment, means 706 for detecting a TX LO signal (single tone) at the output of the receiver may include a power detector 364, for example, configured to detect an output of the RF-VGA 356 having LO leakage on connection 357.

[0115] The apparatus 700 may also include a component 708 for determining TX LO leakage. In some embodiments, the component 708 for determining TX LO leakage may be configured to perform the method 600 ( Figure 6 ). In an exemplary embodiment, means for determining TX LO leakage 708 may include power detector (PDET) 364 and / or data processor 210 (or a local processor), for example, configured to measure a power and frequency response of a signal on connection 357, wherein the measured power and frequency response are indicative of TX LO leakage.

[0116] The apparatus 700 may also include a component 710 for compensating for TX LO leakage. In some embodiments, the component 710 for compensating for TX LO leakage may be configured to perform the method 600 ( Figure 6 ) may include one or more of the functions described in operation block 610 of FIG. 36A . In an exemplary embodiment, component 710 for compensating for TX LO leakage may include ADC 366, for example, configured to provide a digital value proportional to the DC signal provided by power detector 364. LO cancellation element 368 receives the digital value and generates a DC offset value, which is provided to DAC 332 and DAC 334 via connection 369.

[0117] Specific implementation examples are described in the following numbered clauses:

[0118] 1. A transmit (TX) local oscillator (LO) leakage calibration circuit, the transmit (TX) local oscillator (LO) leakage calibration circuit comprising: a transceiver, the transceiver having a transmit portion and a receive portion; an interface circuit, the interface circuit connected to the transmit portion and the receive portion; an impedance control circuit, the impedance control circuit connected to a low noise amplifier (LNA) in the receive portion, the impedance control circuit configured to adjust an input impedance of the LNA; a power detector, the power detector coupled to an output of the LNA; and a local oscillator cancellation element, the local oscillator cancellation element connected to the power detector, the local oscillator cancellation element configured to adjust an input of the transmit portion based on a TX LO leakage detected by the power detector.

[0119] 2. The TX LO leakage calibration circuit of clause 1, wherein the impedance control circuit is configured to maintain the same input impedance for the LNA when the LNA is off as when the LNA is on, the impedance control circuit being configured to selectively apply a transmit signal from the transmit section directly to the LNA in the receive section.

[0120] 3. A TX LO leakage calibration circuit according to any one of clauses 1 to 2, wherein the TX LO leakage calibration circuit further comprises: a phase shifter connected to the output of the LNA; a radio frequency (RF) variable gain amplifier (VGA) connected to the output of the phase shifter; and a narrowband tunable bandpass buffer configured to receive the output of the VGA, wherein the narrowband tunable bandpass buffer is configured to provide input to the power detector.

[0121] 4. The TX LO leakage calibration circuit of any of clauses 1 to 3, wherein the interface circuit comprises a magnetic circuit having three inductors.

[0122] 5. The TX LO leakage calibration circuit of any of clauses 1 to 4, wherein the interface circuit comprises a magnetic circuit having two inductors and further comprising a third inductor external to the interface circuit.

[0123] 6. The TX LO leakage calibration circuit of any of clauses 1 to 5, wherein the impedance control circuit comprises a switched variable capacitor and a switched fixed inductor.

[0124] 7. The TX LO leakage calibration circuit of clause 6, wherein the impedance control circuit comprises a first variable resistor and a second variable resistor, the first variable resistor being connected in series with the switched variable capacitor and the second variable resistor being connected in series with the switched fixed inductor.

[0125] 8. A TX LO leakage calibration circuit as recited in any one of clauses 1 to 7, wherein the transmit signal from the transmit section applied to the LNA in the receive section comprises TX LO leakage.

[0126] 9. The TX LO leakage calibration circuit of any of clauses 1 to 8, wherein the local oscillator cancellation element is configured to provide a direct current (DC) offset to a mixer in the transmit section.

[0127] 10. The TX LO leakage calibration circuit of clause 9, wherein the value of the DC offset minimizes TX LO leakage.

[0128] 11. A method for transmit (TX) local oscillator (LO) leakage calibration, the method comprising: directing a transmit signal having TX LO leakage to a receiver, the receiver being co-located with a transmitter from which the transmit signal is directed; adjusting an impedance at an input of a low noise amplifier (LNA) in the receiver; detecting an LO signal at an output of the receiver; determining LO leakage from the LO signal; and correcting the LO leakage.

[0129] 12. The method of clause 11, wherein correcting the LO leakage comprises adjusting an input of the transmitter.

[0130] 13. The method of any of clauses 11 to 12, wherein adjusting the impedance at the input of the LNA further comprises adjusting a switched variable capacitance and adjusting a switched fixed inductance.

[0131] 14. The method of clause 13, further comprising: adjusting a first variable resistor in series with the switched variable capacitor; and adjusting a second variable resistor in series with the switched fixed inductor.

[0132] 15. A method according to any of clauses 11 to 14, wherein the correcting LO leakage comprises applying a direct current (DC) offset to a mixer in the transmitter.

[0133] 16. The method of clause 15, wherein the value of the DC offset minimizes TX LO leakage.

[0134] 17. An apparatus for transmit (TX) local oscillator (LO) leakage calibration, the apparatus comprising: means for directing a transmit signal having TX LO leakage to a receiver, the receiver being co-located with a transmitter from which the transmit signal is directed; means for adjusting the impedance at an input of a low noise amplifier (LNA) in the receiver; means for detecting the LO signal at an output of the receiver; means for determining LO leakage from the LO signal; and means for correcting the LO leakage.

[0135] 18. The apparatus of clause 17, wherein the means for correcting the LO leakage comprises means for adjusting an input of the transmitter.

[0136] 19. Apparatus according to any of clauses 17 to 18, wherein the means for adjusting the impedance at the input of the LNA further comprises means for adjusting capacitance and means for adjusting inductance.

[0137] 20. The apparatus of clause 19, further comprising: means for adjusting a first variable resistance in series with the capacitor; and means for adjusting a second variable resistance in series with the inductor.

[0138] 21. Apparatus according to any of clauses 17 to 20, wherein the means for correcting LO leakage comprises means for applying a direct current (DC) offset to a mixer in the transmitter.

[0139] 22. The apparatus of clause 21, wherein the value of the DC offset minimizes TX LO leakage.

[0140] 23. An integrated circuit, comprising: a transmit portion, the transmit portion being configured to process transmit signals having a frequency greater than 20 GHz; a receive portion, the receive portion comprising a low noise amplifier (LNA) and being configured to process receive signals having a frequency greater than 20 GHz; an interface circuit, the interface circuit being connected to the transmit portion, the receive portion, and a circuit solder joint that can be coupled to an antenna; a switched fixed inductor, the switched fixed inductor being coupled to an input of the interface circuit and the LNA; and a switched variable capacitor, the switched variable capacitor being coupled to the interface circuit and the input of the LNA.

[0141] 24. The integrated circuit of clause 23, wherein the switched fixed inductor and the switched variable capacitor are configurable to maintain the same input impedance for the LNA when the LNA is off as when the LNA is on.

[0142] 25. An integrated circuit as claimed in any of clauses 23 to 24, further comprising a local oscillator cancellation element configured to adjust an input of the transmit part based on TX LO leakage detected from the receive part.

[0143] The circuit architecture described herein may be implemented on one or more ICs, analog ICs, RFICs, mixed-signal ICs, ASICs, printed circuit boards (PCBs), electronic devices, etc. The circuit architecture described herein may also be manufactured using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-channel MOS (NMOS), P-channel MOS (PMOS), bipolar junction transistor (BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), heterojunction bipolar transistor (HBT), high electron mobility transistor (HEMT), silicon on insulator (SOI), etc.

[0144] The apparatus implementing the circuits described herein may be a stand-alone device or may be part of a larger device. The device may be (i) a stand-alone IC, (ii) a collection of one or more ICs that may include a memory IC for storing data and / or instructions, (iii) an RFIC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) an ASIC such as a mobile station modem (MSM), (v) a module that may be embedded in other devices, (vi) a receiver, a cellular phone, a wireless device, a handset or a mobile unit, (vii) and the like.

[0145] While selected aspects have been illustrated and described in detail, it should be understood that various substitutions and changes may be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A transmit (TX) local oscillator (LO) leakage calibration circuit, the transmit (TX) local oscillator (LO) leakage calibration circuit comprising: a transceiver having a transmitting portion and a receiving portion; an interface circuit connected to the transmitting section and the receiving section; an impedance control circuit connected to a low noise amplifier (LNA) in the receiving section, the impedance control circuit being configured to adjust an input impedance of the LNA; a power detector coupled to an output of the LNA; and A local oscillator cancellation element is connected to the power detector, and is configured to adjust an input of the transmit section based on TX LO leakage detected by the power detector.

2. The TX LO leakage calibration circuit of claim 1 , wherein the impedance control circuit is configured to maintain the same input impedance for the LNA when the LNA is turned off as when the LNA is turned on, the impedance control circuit being configured to selectively apply a transmit signal from the transmit section directly to the LNA in the receive section.

3. The TX LO leakage calibration circuit of claim 1 , further comprising: a phase shifter connected to an output of the LNA; a radio frequency (RF) variable gain amplifier (VGA) connected to an output of the phase shifter; and a narrowband tunable bandpass buffer configured to receive an output of the VGA, wherein the narrowband tunable bandpass buffer is configured to provide an input to the power detector. 4 . The TX LO leakage calibration circuit of claim 1 , wherein the interface circuit comprises a magnetic circuit having three inductors.

5. The TX LO leakage calibration circuit of claim 1, wherein the interface circuit comprises a magnetic circuit having two inductors and further comprising a third inductor external to the interface circuit. 6 . The TX LO leakage calibration circuit of claim 1 , wherein the impedance control circuit comprises a switched variable capacitor and a switched fixed inductor. 7 . The TX LO leakage calibration circuit of claim 6 , wherein the impedance control circuit comprises a first variable resistor and a second variable resistor, the first variable resistor being connected in series with the switched variable capacitor, and the second variable resistor being connected in series with the switched fixed inductor.

8. The TX LO leakage calibration circuit of claim 1, wherein the transmit signal from the transmit section applied to the LNA in the receive section includes TX LO leakage.

9. The TX LO leakage calibration circuit of claim 1, wherein the local oscillator cancellation element is configured to provide a direct current (DC) offset to a mixer in the transmit section.

10. The TX LO leakage calibration circuit of claim 9, wherein the value of the DC offset minimizes TX LO leakage.

11. A method for transmit (TX) local oscillator (LO) leakage calibration, the method comprising: directing a transmit signal having TX LO leakage to a receiver co-located with a transmitter from which the transmit signal was directed; adjusting impedance at an input of a low noise amplifier (LNA) in the receiver; detecting an LO signal at an output of the receiver; determining LO leakage from the LO signal; as well as The LO leakage is corrected.

12. The method of claim 11, wherein correcting the LO leakage comprises adjusting an input of the transmitter.

13. The method of claim 11, wherein adjusting the impedance at the input of the LNA further comprises adjusting a switched variable capacitance and adjusting a switched fixed inductance.

14. The method according to claim 13, further comprising: adjusting a first variable resistor connected in series with the switchable variable capacitor; as well as A second variable resistor connected in series with the switched fixed inductor is adjusted.

15. The method of claim 11, wherein the correcting LO leakage comprises applying a direct current (DC) offset to a mixer in the transmitter. The method of claim 15 , wherein the value of the DC offset minimizes TX LO leakage.

17. An apparatus for transmit (TX) local oscillator (LO) leakage calibration, the apparatus comprising: means for directing a transmit signal having TX LO leakage to a receiver co-located with a transmitter from which the transmit signal was directed; means for adjusting the impedance at the input of a low noise amplifier (LNA) in the receiver; means for detecting an LO signal at an output of said receiver; means for determining LO leakage from said LO signal; and Means for correcting the LO leakage.

18. The apparatus of claim 17, wherein the means for correcting the LO leakage comprises means for adjusting an input of the transmitter.

19. The apparatus of claim 17, wherein the means for adjusting the impedance at the input of the LNA further comprises means for adjusting capacitance and means for adjusting inductance.

20. The device according to claim 19, further comprising: means for adjusting a first variable resistor connected in series with the capacitor; and means for adjusting a second variable resistor connected in series with the inductor.

21. The apparatus of claim 17, wherein the means for correcting LO leakage comprises means for applying a direct current (DC) offset to a mixer in the transmitter.

22. The apparatus of claim 21, wherein the value of the DC offset minimizes TX LO leakage.

23. An integrated circuit, comprising: A transmitting part, wherein the transmitting part is configured to process a transmitting signal having a frequency higher than 20 GHz; a receiving portion including a low noise amplifier (LNA) and configured to process received signals having a frequency greater than 20 GHz; an interface circuit connected to the transmitting portion, the receiving portion, and a circuit soldering point capable of coupling to an antenna; a switched fixed inductor coupled to the interface circuit and an input of the LNA; and A switched variable capacitor is coupled to the interface circuit and the input of the LNA.

24. The integrated circuit of claim 23, wherein the switched fixed inductor and the switched variable capacitor are configurable to maintain the same input impedance for the LNA when the LNA is off as when the LNA is on.

25. The integrated circuit of claim 23, further comprising a local oscillator cancellation element configured to adjust an input of the transmit portion based on TX LO leakage detected from the receive portion.

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