Electronic device

Abstract

Embodiments of the present disclosure relate to electronic devices. The present specification relates to a device comprising a voltage regulator comprising a first branch and a second branch, a fourth transistor, and a fifth transistor, the first branch and the second branch comprising a first transistor, a second transistor and a third transistor, the control node of the first transistor of the first branch and the control node of the first transistor of the second branch being coupled together, the control node of the third transistor of each of the first branch and the second branch being coupled to the connection of the first transistor and the second transistor of the same branch, the control node of the fourth transistor and the control node of the second transistor of the first branch being coupled together to a node at which a setpoint voltage is applied, the control node of the fifth transistor and the control node of the second transistor of the second branch being coupled together to an output node of the regulator.

Description

[0001] Cross-Reference to Related Applications

[0002] The present disclosure is based on and claims priority to French Patent Application No. 2311974, filed November 3, 2023, entitled “dispositif électronique” (electronic device), the contents of which are hereby incorporated by reference. TECHNICAL FIELD

[0003] The present disclosure relates generally to electronic devices, and more particularly to electronic devices comprising a voltage regulator. BACKGROUND

[0004] A voltage regulator is an electronic component configured to maintain a substantially constant voltage at its output. The voltage regulator can for example be a linear regulator, that is to say a regulator based on active elements working in their linear region or on passive elements working in their reverse region, such as Zener diodes.

[0005] One type of linear regulator corresponds to the so-called low-dropout (LDO) regulator. This type of regulator makes the output voltage very close to the supply voltage of the regulator. SUMMARY

[0006] An embodiment provides an apparatus comprising: a voltage regulator, the regulator comprising: a first branch and a second branch, the first branch and the second branch each comprising a first transistor, a second transistor and a third transistor, the first transistor, the second transistor and the third transistor being coupled in series between a first node applying a supply voltage and a second node applying a reference voltage, a control node of the first transistor of the first branch and a control node of the first transistor of the second branch being coupled together, a control node of the third transistor of each of the first branch and the second branch being coupled to a junction point of the first transistor and the second transistor of the same branch; a fourth transistor coupled between a junction point of the second transistor and the third transistor of the second branch and a third node; and a fifth transistor coupled between a junction point of the second transistor and the third transistor of the first branch and a fourth node, a control node of the fourth transistor and a control node of the second transistor of the first branch being coupled together to a node applying a setpoint voltage, a control node of the fifth transistor and a control node of the second transistor of the second branch being coupled together to an output node of the regulator.

[0007] According to one embodiment, the first transistor of the first branch and the first transistor of the second branch are P-channel MOSFET transistors, and the second and third transistors of the first branch and the second and third transistors of the second branch are N-channel MOSFET transistors.

[0008] According to one embodiment, the regulator includes a sixth transistor and a seventh transistor, a first resistor, and an eighth transistor and a ninth transistor, the sixth transistor and the seventh transistor, the first resistor, and the eighth transistor and the ninth transistor are coupled in series between the first node and the second node in this order, a control node of the sixth transistor is coupled to a connection point of the seventh transistor and the resistor, the control node of the sixth transistor is also coupled to a control node of the first transistor of the first branch and a control node of the first transistor of the second branch, a control node of the seventh transistor is coupled to a connection point of the eighth transistor and the first resistor.

[0009] According to one embodiment, the regulator includes a current source, a second resistor, and a tenth transistor and an eleventh transistor, the current source, the second resistor, and the tenth transistor and the eleventh transistor are coupled in series between the first node and the second node in this order, a control node of the tenth transistor is coupled to a connection point of the second resistor and the current source and a control node of the eighth transistor, a control node of the eleventh transistor is coupled to a control node of the ninth transistor.

[0010] According to one embodiment, the regulator includes a twelfth transistor, a thirteenth transistor and a fourteenth transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor are coupled in series between the first node and the second node in this order, a control node of the fourteenth transistor is coupled to a control node of the third transistor of the first branch, a control node of the thirteenth transistor is coupled to a control node of the eighth transistor.

[0011] According to one embodiment, the regulator includes a fifteenth transistor, a sixteenth transistor and a seventeenth transistor, the fifteenth transistor, the sixteenth transistor and the seventeenth transistor are coupled in series between the first node and the second node in this order, a control node of the seventeenth transistor is coupled to a control node of the third transistor of the second branch, a control node of the sixteenth transistor is coupled to a control node of the eighth transistor, a control node of the fifteenth transistor is coupled to a control node of the twelfth transistor.

[0012] According to one embodiment, the regulator includes an eighteenth transistor, the eighteenth transistor is coupled between the first node and an output node of the regulator.

[0013] According to one embodiment, the regulator includes a nineteenth transistor coupled in series between the twelfth transistor and the thirteenth transistor, a control node of the nineteenth transistor coupled to the control node of the seventh transistor, a control node of the twelfth transistor coupled to a connection of the nineteenth transistor and the thirteenth transistor.

[0014] According to one embodiment, the regulator includes a twentieth transistor coupled in series between the fifteenth transistor and the sixteenth transistor, a control node of the twentieth transistor coupled to the control node of the nineteenth transistor.

[0015] According to one embodiment, a control node of the eighteenth transistor is coupled to a connection of the twentieth transistor and the sixteenth transistor.

[0016] According to one embodiment, a control node of the thirteenth transistor is coupled to a connection of the thirteenth transistor and the fourteenth transistor, a control node of the eighteenth transistor is coupled to a connection of the fifteenth transistor and the sixteenth transistor.

[0017] According to one embodiment, the regulator includes a first Miller capacitor coupled between an output node of the regulator and a connection of the sixteenth transistor and the seventeenth transistor.

[0018] According to one embodiment, the regulator includes a second Miller capacitor coupled between an output node of the regulator and a control node of the third transistor of the first branch. BRIEF DESCRIPTION OF DRAWINGS

[0019] The above features and advantages and other features and advantages will be described in detail in the rest of the disclosure in connection with specific embodiments, which are illustrated in the appended drawings, in which:

[0020] Figure 1 An example of an electronic device is shown;

[0021] Figure 2 An embodiment of a voltage regulator is shown;

[0022] Figure 3 Another embodiment of a voltage regulator is shown;

[0023] Figure 4 Another embodiment of a voltage regulator is shown;

[0024] Figure 5 Another embodiment of a voltage regulator is shown;

[0025] Figure 6 An example implementation of the circuit 172 in Figure 5 is shown; and

[0026] Figure 7 Another embodiment of a voltage regulator is shown. DETAILED DESCRIPTION

[0027] In the various figures, like features have been indicated by like reference labels. In particular, structural and / or functional features that are common to various embodiments can have the same reference label and can have the same structural, dimensional, and material properties.

[0028] For the sake of clarity, only the steps and elements directly related to understanding the described embodiments have been shown and described.

[0029] Unless otherwise indicated, when referring to two elements connected together, this means a direct connection without any intermediate elements other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0030] In the following description, unless otherwise indicated, when referring to absolute position qualifiers such as "front", "back", "top", "bottom", "left", "right", or relative position qualifiers such as "top", "bottom", "upper", "lower", or orientation qualifiers such as "horizontal", "vertical", reference is made to the orientation of the figures.

[0031] Unless otherwise indicated, the expressions "about", "approximately", "substantially", and "around" mean plus or minus 10%, preferably plus or minus 5%.

[0032] Figure 1 An example of an electronic device 10 is shown. The device 10 is for example a chip.

[0033] The device 10 comprises a component 12, for example a circuit and components, configured to allow the implementation of digital functions. The component 12 comprises for example one or more microcontrollers. The device 10 comprises for example a memory 14.

[0034] The device 10 comprises a power management unit 16. The unit 16 is for example configured to generate a supply voltage Vout. The supply voltage Vout is for example a supply voltage of the component 12 and / or of the memory 14.

[0035] The unit 16 comprises for example at least one voltage regulator or voltage follower configured to maintain the voltage Vout at a desired value during the operation of the device 10.

[0036] Figure 2 An embodiment of a voltage regulator 18 is shown. The voltage regulator 18 is for example configured to be included in a power management unit 16. Figure 1power management unit 16 of the application.

[0037] The voltage regulator 18 is configured to power a load 20. The load 20 for example corresponds to a memory 14 or a component 12 of the application. More precisely, the regulator 18 comprises an output node 22 having a supply voltage Vout generated thereon. The load 20 is coupled to (preferably connected to) the node 22. Figure 1 The regulator 18 comprises a transistor 26. The transistor 26 is for example an insulated gate field effect transistor (MOSFET - Metal Oxide Semiconductor Field Effect Transistor). The transistor 26 is preferably a P-channel transistor.

[0038] The node 22 is coupled to a node 24 of the application device 10 via the transistor 26 (i.e. the supply voltage of the regulator 18). In other words, a conductive node (e.g. the source) of the transistor 26 is coupled to (preferably connected to) the node 24, while another conductive node (e.g. the drain) of the transistor 26 is coupled to (preferably connected to) the node 22.

[0039] The regulator 18 further comprises transistors 28, 30, 32, 34. The transistors 28, 30, 32, 34 are for example Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). The transistors 28, 30, 32, 34 are preferably P-channel transistors.

[0040] The transistors 28 and 30 are coupled in series. Similarly, the transistors 32 and 34 are coupled in series. The transistors 28 and 30 are coupled in common source common gate. In other words, a conductive node (preferably the source) of the transistor 28 is coupled to (preferably connected to) the node 24. Another conductive node (e.g. the drain) of the transistor 28 is coupled to (preferably connected to) a node 36. A conductive node (preferably the source) of the transistor 30 is coupled to (preferably connected to) the node 36. Another conductive node (e.g. the drain) of the transistor 30 is coupled to (preferably connected to) a node 38. A control node (e.g. the gate) of the transistor 28 is coupled to (preferably connected to) the node 38.

[0041]

[0042] ​Furthermore, transistors 32 and 34 are coupled in series with transistors 28 and 30. In other words, a conductive node (preferably, a source) of transistor 32 is coupled to (preferably, connected to) node 24. Another conductive node (e.g., a drain) of transistor 32 is coupled to (preferably, connected to) node 40. A conductive node (preferably, a source) of transistor 34 is coupled to (preferably, connected to) node 40. Another conductive node (e.g., a drain) of transistor 34 is coupled to (preferably, connected to) node 41. A control node (e.g., a gate) of transistor 32 is coupled to (preferably, connected to) a control node of transistor 28. Thus, the control node of transistor 32 is coupled to (preferably, connected to) node 38. A control node (e.g., a gate) of transistor 34 is coupled to (preferably, connected to) a control node of transistor 30.

[0043] A control node (e.g., a gate) of transistor 26 is coupled to (preferably, connected to) node 41.

[0044] Regulator 18 also includes transistors 42 and 44. Transistors 42 and 44 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). Transistors 42 and 44 are preferably N-channel transistors.

[0045] Transistors 42 and 44 are coupled in series. Transistors 42 and 44 are also coupled in series with transistors 32 and 34. In other words, a conductive node (preferably, a source) of transistor 44 is coupled to (preferably, connected to) node 46, which applies a reference voltage (e.g., ground). Another conductive node (e.g., a drain) of transistor 44 is coupled to (preferably, connected to) node 48. A conductive node (preferably, a source) of transistor 42 is coupled to (preferably, connected to) node 48. Another conductive node (e.g., a drain) of transistor 42 is coupled to (preferably, connected to) node 41.

[0046] Similarly, regulator 18 also includes transistors 50 and 52. Transistors 50 and 52 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). Transistors 50 and 52 are preferably N-channel transistors.

[0047] Transistors 50 and 52 are coupled in series. Transistors 50 and 52 are also coupled in series with transistors 28 and 30. In other words, a conductive node (preferably, a source) of transistor 52 is coupled to (preferably, connected to) node 46, which applies a reference voltage (e.g., ground). Another conductive node (e.g., a drain) of transistor 52 is coupled to (preferably, connected to) node 54. A conductive node (preferably, a source) of transistor 50 is coupled to (preferably, connected to) node 54. Another conductive node (e.g., a drain) of transistor 50 is coupled to (preferably, connected to) node 38.

[0048] The regulator 18 also includes transistors 56, 58, 60, and 62. Transistors 56, 58, 60, and 62 are, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs). Transistors 56, 58, 60, and 62 are preferably N-channel transistors.

[0049] Transistors 56 and 58 are coupled in series. Transistors 60 and 62 are also coupled in series. Transistors 56 and 58 are cascode coupled. In other words, the conductive node (preferably, the source) of transistor 58 is coupled to (preferably, connected to) node 46. Another conductive node (e.g., the drain) of transistor 58 is coupled to (preferably, connected to) node 64. The conductive node (preferably, the source) of transistor 56 is coupled to (preferably, connected to) node 64. Another conductive node (e.g., the drain) of transistor 56 is coupled to (preferably, connected to) node 66.

[0050] Furthermore, transistors 60 and 62 are coupled to transistors 56 and 58 as current mirrors. In other words, the conductive node (preferably, the source) of transistor 62 is coupled to (preferably, connected to) node 46. Another conductive node (e.g., the drain) of transistor 62 is coupled to (preferably, connected to) node 68. The conductive node (preferably, the source) of transistor 60 is coupled to (preferably, connected to) node 68. Another conductive node (e.g., the drain) of transistor 60 is coupled to (preferably, connected to) node 70. The control node (e.g., the gate) of transistor 62 is coupled to (preferably, connected to) the control node (e.g., the gate) of transistor 58. The control node (e.g., the gate) of transistor 60 is coupled to (preferably, connected to) the control node (e.g., the gate) of transistor 56. Furthermore, the control node of transistor 60 is coupled to (preferably, connected to) the control nodes of transistors 50 and 42. In other words, the control nodes of transistors 42, 50, 56, and 60 are coupled together (preferably, connected together).

[0051] The regulator 18 also includes a resistor 72 and a current source 74. Resistor 72 and current source 74 are coupled in series. Resistor 72 and current source 74 are also coupled in series with transistors 56 and 58. In other words, one terminal of resistor 72 is coupled to (preferably, connected to) node 66, and the other terminal of resistor 72 is coupled to (preferably, connected to) node 76. Node 76 is also coupled to (preferably, connected to) the control node of transistor 56. Therefore, node 76 is coupled to (preferably, connected to) the control node of transistor 60. Current source 74 includes one terminal coupled to (preferably, connected to) node 76 and another terminal coupled to (preferably, connected to) node 24.

[0052] The regulator 18 includes a resistor 78 and transistors 80 and 82. The transistors 80 and 82 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). The transistors 80 and 82 are preferably P-channel transistors.

[0053] The transistors 80, 82 and the resistor 78 are coupled in series. The transistors 80, 82 and the resistor 78 are coupled in series with the transistors 60 and 62. In other words, one terminal of the resistor 78 is coupled to (preferably connected to) the node 70, and the other terminal of the resistor 78 is coupled to (preferably connected to) the node 84. The conductive node (preferably the source) of the transistor 80 is coupled to (preferably connected to) the node 24. The other conductive node (e.g., the drain) of the transistor 62 is coupled to (preferably connected to) the node 86. The conductive node (preferably the source) of the transistor 80 is coupled to (preferably connected to) the node 86. The other conductive node (e.g., the drain) of the transistor 82 is coupled to (preferably connected to) the node 84. The control node of the transistor 80 is coupled to (preferably connected to) the node 70. Moreover, the control node of the transistor 80 is coupled to (preferably connected to) the control node of the transistor 30 and the control node of the transistor 34. Thus, the control nodes of the transistors 30, 34 and 80 are, for example, coupled together (preferably connected together). Moreover, the control node of the transistor 82 is coupled to (preferably connected to) the node 84.

[0054] The regulator 18 also includes two branches 88 and 90. Both of the branches 88 and 90 include three transistors coupled in series between the node 24 and the node 46.

[0055] Thus, the branch 88 includes transistors 92, 94, 96. The transistors 92, 94, 96 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). The transistors 94, 96 are preferably N-channel transistors. The transistor 92 is, for example, a P-channel transistor. The transistor 96 is, for example, the same transistor as the transistor 52. Alternatively, the transistor 96 has, for example, a surface area that is substantially equal to a multiple of the surface area of the transistor 52.

[0056] The transistors 92, 94, 96 are coupled in series between the node 24 and the node 46. In other words, the transistor 92 includes a conductive node (e.g., source) that is coupled to (preferably connected to) the node 24. Another conductive node (e.g., drain) of the transistor 92 is coupled to (preferably connected to) the node 98. The transistor 94 includes a conductive node (e.g., source) that is coupled to (preferably connected to) the node 98. Another conductive node (e.g., drain) of the transistor 94 is coupled to (preferably connected to) the node 100. The transistor 96 includes a conductive node (e.g., drain) that is coupled to (preferably connected to) the node 100. Another conductive node (e.g., source) of the transistor 96 is coupled to (preferably connected to) the node 46.

[0057] The transistor 92 includes a control node (e.g., gate) that is coupled to (preferably connected to) the node 102. The node 102 is coupled to (preferably connected to) the control node of the transistor 82 and is coupled to (preferably connected to) the node 84. The transistor 94 includes a control node (e.g., gate) that is coupled to (preferably connected to) a terminal (e.g., positive terminal) of a voltage source 104. The voltage source 104 is configured to generate a setpoint voltage Vref on the positive terminal. The voltage source 104 also includes a terminal (e.g., negative terminal) that is coupled to (preferably connected to) the node 46. The transistor 96 includes a control node (e.g., gate) that is coupled to (preferably connected to) the node 98 that is coupled to (preferably connected to) the source of the transistor 94 that is coupled to (preferably connected to) the connection point of the transistors 92 and 94.

[0058] Similarly, the branch 90 includes transistors 106, 108, 110. The transistors 106, 108, 110 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). The transistors 108, 110 are preferably N-channel transistors. The transistor 106 is, for example, a P-channel transistor. The transistor 110 is, for example, the same transistor as the transistor 44. Alternatively, the transistor 110 has a surface area that is, for example, substantially equal to a multiple of the surface area of the transistor 44.

[0059] Transistors 106, 108, and 110 are coupled in series between nodes 24 and 46. In other words, transistor 106 includes a conductive node (e.g., a source) coupled to (preferably connected to) node 24. Another conductive node (e.g., a drain) of transistor 106 is coupled to (preferably connected to) node 112. Transistor 108 includes a conductive node (e.g., a source) coupled to (preferably connected to) node 112. Another conductive node (e.g., a drain) of transistor 108 is coupled to (preferably connected to) node 114. Transistor 110 includes a conductive node (e.g., a drain) coupled to (preferably connected to) node 114. Another conductive node (e.g., a source) of transistor 110 is coupled to (preferably connected to) node 46.

[0060] Transistor 106 includes a control node (e.g., a gate) coupled to (preferably, connected to) node 102. Node 102 is coupled to (preferably, connected to) the control nodes of transistors 82 and 92, and is coupled to (preferably, connected to) node 84. Transistor 108 includes a control node (e.g., a gate) coupled to (preferably, connected to) output node 22, which has a voltage Vout generated thereon. Transistor 110 includes a control node (e.g., a gate) coupled to (preferably, connected to) node 116, which is coupled to (preferably, connected to) the source of transistor 108, and the source of transistor 108 is coupled to (preferably, connected to) the junction of transistors 106 and 108. Node 116 is also coupled to (preferably, connected to) the control node of transistor 44.

[0061] The regulator 18 also includes a pair of differential transistors 118 and 120. Transistors 118 and 120 are, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs). Transistors 118 and 120 are preferably N-channel transistors. Preferably, transistors 118 and 120 are identical transistors. Alternatively, one of the transistors 118 and 120 may have a surface area substantially equal to a multiple of the surface area of ​​the other transistor.

[0062] The transistor 118 is coupled between the node 114 (i.e. the connection point of the transistors 108 and 110) and the node 40 (i.e. the connection point of the transistors 32 and 34). In other words, a conductive node (e.g. the source) of the transistor 118 is coupled to (preferably connected to) the node 114. Another conductive node (e.g. the drain) of the transistor 118 is coupled to (preferably connected to) the node 40. The control node (e.g. the gate) of the transistor 118 is coupled to (preferably connected to) the control node of the transistor 94 and the positive terminal of the voltage source 104.

[0063] The transistor 120 is coupled between the node 100 (i.e. the connection point of the transistors 108 and 110) and the node 40 (i.e. the connection point of the transistors 32 and 34). In other words, a conductive node (e.g. the source) of the transistor 120 is coupled to (preferably connected to) the node 100. Another conductive node (e.g. the drain) of the transistor 120 is coupled to (preferably connected to) the node 36. The control node (e.g. the gate) of the transistor 120 is coupled to (preferably connected to) the control node of the transistor 108 and the node 22.

[0064] When the load draws current, the voltage Vout changes. This change in the voltage Vout results in a change in the current flowing through the transistors 32, 34, and a change in the transistors 42, 44. The change in the voltage Vout results not only in a change in the current flowing through the transistors 32, 34, as in a conventional regulator. Thus, the current at the node 41 (i.e. the control current of the transistor 26) changes faster in the regulator 18, resulting in a faster regulation of the voltage Vout.

[0065] Thus, the bias applied to the transistors 118 and 120 of the differential pair is dynamic.

[0066] Figure 3 Another embodiment of a voltage regulator 122 is shown.

[0067] The regulator 122 comprises Figure 2 The components of the regulator 18 of Figure 1 are arranged in the same way. These different components, i.e. the transistors 26, 32, 34, 42, 28, 30, 50, 52, 106, 108, 110, 118, 120, 92, 94, 96, 82, 80, 60, 62, 56, 58, the resistors 72 and 78, and the current source 74 and the voltage source 104, are thus present in the regulator 122 and will not be described in detail again.

[0068] The regulator 122 further comprises capacitors 124 and 126. The capacitors 124 and 126 are Miller capacitors and thus compensate the gain of the loop and speed up the response of the regulator.

[0069] The capacitor 124 is coupled between the output node 22 and a node 48, i.e. the connection node of the transistors 42 and 44. In other words, one terminal of the capacitor 124 is coupled to (preferably connected to) the node 22, while the other terminal of the capacitor 124 is coupled to (preferably connected to) the node 48.

[0070] The capacitor 126 is connected between the output node 22 and a node 128. In other words, one terminal of the capacitor 126 is coupled to (preferably connected to) the node 22, while the other terminal of the capacitor 126 is coupled to (preferably connected to) the node 128. The node 128 is further coupled to (preferably connected to) the control nodes of the transistors 52 and 96.

[0071] Figure 4 Another embodiment of the voltage regulator 130 is shown.

[0072] The regulator 130 comprises Figure 2 the components of the regulator 18 of Fig. 1, the components being arranged in the same way, except for the transistors 30 and 34. These different components, i.e. the transistors 26, 32, 42, 28, 50, 52, 106, 108, 110, 118, 120, 92, 94, 96, 82, 80, 60, 62, 56, 58, the resistors 72 and 78, and the current source 74 and the voltage source 104, thus exist in the regulator 122, and will not be described in detail again. In the absence of the transistors 30 and 34, the conductive node (e.g. drain) of the transistor 28 is coupled to (preferably connected to) the node 38, while the conductive node (e.g. drain) of the transistor 32 is coupled to (preferably connected to) the node 41. Thus, the control node of the transistor 28 is coupled to (preferably connected to) the drain of the transistor 28. Furthermore, the control node of the transistor 26 is coupled to (preferably connected to) the drain of the transistor 32.

[0073] In contrast to the regulator 18, the transistor 118 is not coupled between the node 40 and the node 114. Similarly, the transistor 120 is not coupled between the node 36 and the node 100. The transistor 118 and a transistor 132 (different from the transistor 32) are coupled in series between the node 114 and the node 24. Similarly, the transistor 120 and a transistor 136 (different from the transistor 28) are coupled in series between the node 100 and the node 24.

[0074] The transistors 132 and 136 are for example metal oxide semiconductor field effect transistors (MOSFETs). The transistors 132 and 136 are preferably P-channel transistors.

[0075] In other words, the conductive node (e.g. source) of the transistor 118 is coupled to (preferably connected to) the node 40, while the conductive node (e.g. source) of the transistor 120 is coupled to (preferably connected to) the node 36. Figure 2The other conductive node of transistor 118 is coupled to (preferably connected to) node 134. A conductive node (e.g., source) of transistor 132 is coupled to (preferably connected to) node 24, and the other conductive node (e.g., drain) of transistor 132 is coupled to (preferably connected to) node 134. The control node (e.g., gate) of transistor 132 is coupled to (preferably connected to) node 134.

[0076] In addition, a conductive node (e.g., source) of transistor 120 is coupled to (preferably connected to) node 100, and the other conductive node of transistor 120 is coupled to (preferably connected to) node 138. A conductive node (e.g., source) of transistor 136 is coupled to (preferably connected to) node 24, and the other conductive node (e.g., drain) of transistor 136 is coupled to (preferably connected to) node 138. The control node (e.g., gate) of transistor 136 is coupled to (preferably connected to) node 138. Figure 2

[0077] The regulator 130 also includes transistors 140 and 142. The transistors 140 and 142 are, for example, metal oxide semiconductor field effect transistors (MOSFETs). The transistors 140 and 142 are preferably P-channel transistors.

[0078] The transistor 140 is coupled between node 24 and node 54. In other words, a conductive node (e.g., source) of transistor 140 is coupled to (preferably connected to) node 24, and the other conductive node (e.g., drain) of transistor 140 is coupled to (preferably connected to) node 54.

[0079] Similarly, the transistor 142 is coupled between node 24 and node 48. In other words, a conductive node (e.g., source) of transistor 142 is coupled to (preferably connected to) node 24, and the other conductive node (e.g., drain) of transistor 142 is coupled to (preferably connected to) node 48.

[0080] One advantage of the described embodiments is that they apply a variable bias to both conductive terminals of the transistors of the differential pair. Thus, the response of the current regulator is faster in the case of a change occurring at the output node.

[0081] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants can be combined, and that other variants will occur to those skilled in the art. In particular, in the embodiments of Figure 4 In the embodiments of FIG. 1, there can be Miller capacitors 124 and 126 arranged in parallel with​Figure 3 At the same location as in the embodiments.

[0082] Figure 5 Another example of voltage regulator 144 is shown.

[0083] Regulator 144 includes Figure 3 The components of the regulator 122 shown are arranged in the same manner. These different components, namely transistors 26, 28, 30, 32, 34, 42, 44, 50, 52, 56, 58, 60, 62, 80, 82, 92, 94, 96, 106, 108, 110, 118, 120, resistors 72 and 78, capacitors 124 and 126, and current source 74 and voltage source 104, are therefore also present in the regulator 144 and will not be described in detail further. Regulator 144 and... Figure 3 The difference between regulator 122 and transistor 60 is that the control node of transistor 60 is not like... Figure 3 They are coupled to the control nodes of transistors 42 and 50 in the same way.

[0084] The regulator 144 includes transistors 146, 148, and 150. Transistors 146, 148, and 150 are, for example, insulated-gate field-effect transistors (MOSFETs). Transistors 146 and 148 are preferably P-channel transistors. Transistor 150 is, for example, an N-channel transistor.

[0085] Transistors 146, 148, and 150 are coupled in series between nodes 24 and 46. In other words, transistor 146 includes a conductive node (e.g., a source) coupled to (preferably, connected to) node 24. Another conductive node (e.g., a drain) of transistor 146 is coupled to (preferably, connected to) node 152. Transistor 148 includes a conductive node (e.g., a source) coupled to (preferably, connected to) node 152. Another conductive node (e.g., a drain) of transistor 148 is coupled to (preferably, connected to) node 154. Transistor 150 includes a conductive node (e.g., a drain) coupled to (preferably, connected to) node 154. Another conductive node (e.g., a source) of transistor 150 is coupled to (preferably, connected to) node 46.

[0086] The transistor 146 includes a control node (e.g., gate) coupled to (preferably connected to) the node 102. The node 102 is coupled to (preferably connected to) the control nodes of the transistors 82, 92, and 106, and is coupled to (preferably connected to) the node 84. The transistor 148 includes a control node (e.g., gate) coupled to (preferably connected to) the node 70. The node 70 is coupled to (preferably connected to) the control nodes of the transistors 80, 30, and 34. The transistor 150 includes a control node (e.g., gate) coupled to (preferably connected to) the node 156. The node 156 is coupled to (preferably connected to) the control nodes of the transistors 42 and 50. The node 156 is also coupled to (preferably connected to) the node 154.

[0087] The regulator 144 includes transistors 158, 160, 162. The transistors 158, 160, 162 are, for example, insulated gate field effect transistors (MOSFETs). The transistors 158, 160 are preferably P-channel transistors. The transistor 162 is, for example, an N-channel transistor.

[0088] The transistors 158, 160, 162 are coupled in series between the node 24 and the node 46. In other words, the transistor 158 includes a conductive node (e.g., source) coupled to (preferably connected to) the node 24. Another conductive node (e.g., drain) of the transistor 158 is coupled to (preferably connected to) the node 164. The transistor 160 includes a conductive node (e.g., source) coupled to (preferably connected to) the node 164. Another conductive node (e.g., drain) of the transistor 160 is coupled to (preferably connected to) the node 166. The transistor 162 includes a conductive node (e.g., drain) coupled to (preferably connected to) the node 166. Another conductive node (e.g., source) of the transistor 162 is coupled to (preferably connected to) the node 46.

[0089] The transistor 158 includes a control node (e.g., gate) coupled to (preferably connected to) the node 102. The node 102 is coupled to (preferably connected to) the control nodes of the transistors 82, 92, 106, and 146, and is coupled to (preferably connected to) the node 84. The transistor 160 includes a control node (e.g., gate) coupled to (preferably connected to) the node 70. The node 70 is coupled to (preferably connected to) the control nodes of the transistors 80, 30, 34, and 148. The transistor 162 includes a control node (e.g., gate) coupled to (preferably connected to) the node 168. The node 168 is coupled to (preferably connected to) the control nodes of the transistors 58 and 62.

[0090] The regulator 144 also includes a capacitor 170. The capacitor 170 is coupled between the node 41 and the node 1644. Thus, one terminal of the capacitor 170 is coupled to (preferably connected to) the node 41, i.e., the midpoint of the transistors 34 and 42, and the other terminal of the capacitor 170 is coupled to (preferably connected to) the node 164, i.e., the midpoint of the transistors 158 and 160.

[0091] The regulator 144 also includes a buffer circuit 172. In the example shown in FIG. 1, the circuit 172 is an operational amplifier. Figure 5

[0092] The circuit 172 includes a first input, e.g., a non-inverting (+) input, and a second input, e.g., an inverting (-) input. The first input is coupled to (preferably connected to) the node 41. The second input is coupled to (preferably connected to) the node 174.

[0093] The circuit 172 includes an output. The output is coupled to (preferably connected to) the node 174. The node 174 is also coupled to (preferably connected to) the control node of the transistor 26. Thus, the second input and the output of the circuit 172 are coupled to (preferably connected to) the control node of the transistor 26.

[0094] The capacitor 170 improves regulator stability. In particular, the capacitor 170 lowers the frequency of the branch 90, and prevents overvoltage. The circuit 172 provides very fast load transient response.

[0095] In another embodiment, the regulator 144 can include a resistor (not shown) coupled in series with the capacitor 170 between the nodes 41 and 164.

[0096] The transistors 158, 160, 162 allow fast line transient response to be maintained. ​

[0097] Figure 6 A portion of the embodiments shown in Figure 1 FIG. 1 is a schematic diagram of an example implementation of a circuit 172. Figure 6 FIG. 1 is a schematic diagram of an example implementation of a circuit 172.

[0098] Circuit 172 includes transistors 174, 176, 178, 180, 182, 184, 186, 188. Transistors 174, 176, 178, 180, 182, 184, 186, 188 are, for example, insulated gate field effect transistors (MOSFETs). Transistors 174, 178, 182, 186 are preferably P-channel transistors. Transistors 176, 180, 184, 188 are, for example, N-channel transistors.

[0099] Transistors 174 and 176 are coupled in series between node 24 and node 46. In other words, transistor 174 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 24. Another conductive node (e.g., drain) of transistor 174 is coupled to (preferably connected to) node 190. Transistor 176 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 190. Another conductive node (e.g., drain) of transistor 176 is coupled to (preferably connected to) node 46.

[0100] Similarly, transistors 182 and 184 are coupled in series between node 24 and node 46. In other words, transistor 182 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 24. Another conductive node (e.g., drain) of transistor 182 is coupled to (preferably connected to) node 192. Transistor 184 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 192. Another conductive node (e.g., drain) of transistor 184 is coupled to (preferably connected to) node 46.

[0101] Similarly, transistors 186 and 188 are coupled in series between node 24 and node 46. In other words, transistor 186 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 24. Another conductive node (e.g., drain) of transistor 186 is coupled to (preferably connected to) node 194. Transistor 188 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 194. Another conductive node (e.g., drain) of transistor 188 is coupled to (preferably connected to) node 46.

[0102] Similarly, transistors 178 and 180 are coupled in series between node 24 and node 46. In other words, transistor 178 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 24. Another conductive node (e.g., drain) of transistor 178 is coupled to (preferably connected to) node 196. Transistor 180 includes a conductive node (e.g., source) that is coupled to (preferably connected to) node 196. Another conductive node (e.g., drain) of transistor 180 is coupled to (preferably connected to) node 46.

[0103] Transistor 174 includes a control node (e.g., gate) that is coupled to (preferably connected to) node 190. Node 190 is also coupled to (preferably connected to) the control node of transistor 178. Transistor 176 includes a control node (e.g., gate) that is coupled to (preferably connected to) node 192. Node 192 is also coupled to (preferably connected to) the control node of transistor 184. Transistor 182 includes a control node (e.g., gate) that is coupled to (preferably connected to) node 196. Node 196 is also coupled to (preferably connected to) node 174, and thus to (preferably connected to) the output of circuit 172. Node 196 is also coupled to the inverting input of circuit 172. Transistor 180 includes a control node (e.g., gate) that is coupled to (preferably connected to) node 194. Node 194 is also coupled to (preferably connected to) the control node of transistor 188. Transistor 186 includes a control node (e.g., gate) that is coupled to (preferably connected to) the non-inverting input of circuit 172, and thus to (preferably connected to) node 41.

[0104] In combination Figure 6 The described circuit 172 ensures adaptive biasing in the load current. It also improves transient response as the load current increases.

[0105] Figure 7 Another example of a voltage regulator 200 is shown.

[0106] The regulator 200 includes Figure 5The components of the regulator 144 shown in FIG. 1 are arranged in the same manner. These different components, i.e., transistors 26, 28, 30, 32, 34, 42, 44, 50, 52, 56, 58, 60, 62, 80, 82, 92, 94, 96, 106, 108, 110, 118, 120, 146, 148, 150, 160, 162, resistors 72 and 78, circuit 172, capacitors 124, 126, 170, and current source 74 and voltage source 104, are thus present in the regulator 122 and will not be described in detail again.

[0107] The regulator 200 differs from the regulator 144 in that the regulator 200 does not include the transistor 158. The node 164 is then coupled to (preferably connected to) the node 112, i.e., the midpoint of the transistor 106 and the transistor 108.

[0108] The regulator 144 includes transistors 202 and 204. The transistors 202 and 204 are, for example, insulated gate field effect transistors (MOSFETs). The transistor 202 is preferably a P-channel transistor. The transistor 204 is, for example, an N-channel transistor.

[0109] The transistors 202 and 204 are coupled in series between the node 24 and the node 46 with the transistor 92. In other words, the transistor 92 includes a conductive node (e.g., source) that is coupled to (preferably connected to) the node 24. Another conductive node (e.g., drain) of the transistor 92 is coupled to (preferably connected to) the node 98. The transistor 202 includes a conductive node (e.g., source) that is coupled to (preferably connected to) the node 98. Another conductive node (e.g., drain) of the transistor 202 is coupled to (preferably connected to) the node 128 and thus to (preferably connected to) the control nodes of the transistors 96 and 52. The transistor 204 includes a conductive node (e.g., drain) that is coupled to (preferably connected to) the node 128. Another conductive node (e.g., source) of the transistor 204 is coupled to (preferably connected to) the node 46.

[0110] The transistor 202 includes a control node (e.g., gate) that is coupled to (preferably connected to) the node 70. The node 70 is coupled to (preferably connected to) the control nodes of the transistors 80, 148, 160, 30, and 34. The transistor 204 includes a control node (e.g., gate) that is coupled to (preferably connected to) the node 168. The node 168 is coupled to (preferably connected to) the control nodes of the transistors 62, 64, 162.

[0111] The addition of transistors 2020 and 204 equalizes the drain voltages of the differential pair (i.e., transistors 94 and 118 and transistors 120 and 108).

[0112] For example, circuit 172 is implemented as described in connection with Figure 6

[0113] Finally, the actual implementation of the described embodiments and variants, based on the above-described functionality indications, is within the capabilities of a person skilled in the art.​

Claims

1. An apparatus comprising: A voltage regulator, the voltage regulator comprising: The first branch and the second branch, each including a first transistor, a second transistor and a third transistor, the first transistor, the second transistor and the third transistor being connected in series between a first node and a second node, the first node being supplied with a supply voltage and the second node being supplied with a reference voltage, the control node of the first transistor of the first branch being coupled together with the control node of the first transistor of the second branch, and the control node of the third transistor of each of the first and second branches being coupled to the connection point of the first transistor and the second transistor of the corresponding branch; A fourth transistor, coupled between the connection point of the second transistor and the third transistor in the second branch and the third node, wherein the control node of the fourth transistor and the control node of the second transistor in the first branch are coupled together to the node to which the setpoint voltage is applied; and The fifth transistor is coupled between the connection point of the second transistor and the third transistor in the first branch and the fourth node, and the control node of the fifth transistor and the control node of the second transistor in the second branch are coupled together to the output node of the regulator. A microcontroller having a first power supply input coupled to the output node of the regulator; and The memory has a second power supply input that is coupled to the output node of the regulator.

2. The device according to claim 1, wherein the first transistor of the first branch and the first transistor of the second branch are P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs), and the second transistor and the third transistor of the first branch and the second transistor and the third transistor of the second branch are N-channel MOSFETs.

3. The device of claim 1, wherein the regulator comprises a sixth transistor and a seventh transistor, a first resistor, and an eighth transistor and a ninth transistor, the sixth transistor and the seventh transistor, the first resistor, and the eighth transistor and the ninth transistor being sequentially coupled in series between the first node and the second node, the control node of the sixth transistor being coupled to the connection point of the seventh transistor and the first resistor, the control node of the sixth transistor also being coupled to the control node of the first transistor in the first branch and the control node of the first transistor in the second branch, and the control node of the seventh transistor being coupled to the connection point of the eighth transistor and the first resistor.

4. The device of claim 3, wherein the regulator comprises a current source, a second resistor, and a tenth transistor and an eleventh transistor, the current source, the second resistor, and the tenth and eleventh transistors being sequentially coupled in series between the first node and the second node, the control node of the tenth transistor being coupled to the connection point of the second resistor and the current source and the control node of the eighth transistor, and the control node of the eleventh transistor being coupled to the control node of the ninth transistor.

5. The device of claim 3, wherein the regulator comprises a twelfth transistor, a thirteenth transistor, and a fourteenth transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor being sequentially coupled in series between the first node and the second node, the control node of the fourteenth transistor being coupled to the control node of the third transistor of the first branch, and the control node of the thirteenth transistor being coupled to the control node of the eighth transistor.

6. The device of claim 5, wherein the regulator comprises a fifteenth transistor, a sixteenth transistor, and a seventeenth transistor, the fifteenth transistor, the sixteenth transistor, and the seventeenth transistor being sequentially coupled in series between the first node and the second node, the control node of the seventeenth transistor being coupled to the control node of the third transistor of the second branch, the control node of the sixteenth transistor being coupled to the control node of the eighth transistor, and the control node of the fifteenth transistor being coupled to the control node of the twelfth transistor.

7. The device of claim 6, wherein the control node of the sixteenth transistor is coupled to the control node of the eighth transistor, and the control node of the thirteenth transistor is coupled to the control node of the eighth transistor.

8. The device of claim 6, wherein the regulator includes an eighteenth transistor coupled between the first node and the output node of the regulator.

9. The device of claim 8, wherein the regulator includes a nineteenth transistor, the nineteenth transistor being coupled in series between the twelfth and thirteenth transistors, the control node of the nineteenth transistor being coupled to the control node of the seventh transistor, and the control node of the twelfth transistor being coupled to the connection point of the nineteenth and thirteenth transistors.

10. The device of claim 9, wherein the regulator includes a twentieth transistor, the twentieth transistor being coupled in series between the fifteenth transistor and the sixteenth transistor, and the control node of the twentieth transistor being coupled to the control node of the nineteenth transistor.

11. The device of claim 10, wherein the device includes a twenty-first transistor, a twenty-second transistor, and a twenty-third transistor, the twenty-first transistor, the twenty-second transistor, and the twenty-third transistor being sequentially coupled in series between the first node and the second node, a control node of the twenty-first transistor being coupled to the control node of the sixth transistor, a control node of the twenty-second transistor being coupled to the control node of the seventh transistor, a control node of the twenty-third transistor being coupled to the control node of the thirteenth transistor, and the control node of the twenty-third transistor being further coupled to the midpoint between the twenty-second transistor and the twenty-third transistor; the device includes a twenty-fourth transistor, a twenty-fifth transistor, and a twenty-sixth transistor, the twenty-fourth transistor, the twenty-fifth transistor, and the twenty-sixth transistor being sequentially coupled in series between the first node and the second node, a control node of the twenty-fourth transistor being coupled to the control node of the sixth transistor, a control node of the twenty-fifth transistor being coupled to the control node of the seventh transistor, and a control node of the twenty-sixth transistor being coupled to the control node of the ninth transistor; the device further includes a third capacitor coupled between the midpoint of the twenty-fourth transistor and the twenty-fifth transistor and the midpoint of the twenty-first transistor and the sixteenth transistor.

12. The device of claim 10, wherein the device comprises a twenty-first transistor, a twenty-second transistor, and a twenty-third transistor, the twenty-first transistor, the twenty-second transistor, and the twenty-third transistor being connected in series in this order between the first node and the second node, the control node of the twenty-first transistor being coupled to the control node of the sixth transistor, the control node of the twenty-second transistor being coupled to the control node of the seventh transistor, the control node of the twenty-third transistor being coupled to the control node of the thirteenth transistor, and the control node of the twenty-third transistor being further coupled to the midpoint between the twenty-second and twenty-third transistors, the device comprising a twenty-fifth transistor and a twenty-sixth transistor, the twenty-fifth transistor and the twenty-sixth transistor being connected in series in this order between the midpoint of the first and second transistors of the second branch and the second node, and the control node of the twenty-fifth transistor being coupled to the seventh transistor. The device includes a control node of the body transistor, wherein the control node of the 26th transistor is coupled to the control node of the 9th transistor, and the midpoint between the 25th and 26th transistors is also coupled to the midpoint between the 1st and 2nd transistors of the second branch. The device includes a 27th and 28th transistor, which are sequentially coupled in series between the midpoint of the 1st and 2nd transistors of the first branch and the second node. The control node of the 27th transistor is coupled to the control node of the 7th transistor, and the control node of the 28th transistor is coupled to the control node of the 9th transistor. The midpoint between the 27th and 28th transistors is coupled to the control node of the 3rd transistor of the first branch. The device also includes a third capacitor, which is coupled between the midpoint of the 1st and 2nd transistors and the midpoint between the 20th and 16th transistors.

13. The device of claim 1, wherein the regulator includes an eighteenth transistor coupled between the first node and the output node of the regulator.

14. The device of claim 10, wherein the control node of the eighteenth transistor is coupled to the connection point of the twentieth transistor and the sixteenth transistor.

15. The device of claim 8, wherein the control node of the thirteenth transistor is coupled to the connection point of the thirteenth transistor and the fourteenth transistor, and the control node of the eighteenth transistor is coupled to the connection point of the fifteenth transistor and the sixteenth transistor.

16. The device of claim 10, wherein the regulator includes a first Miller capacitor coupled between the output node of the regulator and the connection point of the sixteenth transistor and the seventeenth transistor.

17. The device of claim 16, wherein the regulator includes a second Miller capacitor coupled between the output node of the regulator and the control node of the third transistor of the first branch.

18. The device of claim 17, wherein the control node of the eighteenth transistor is coupled to the midpoint between the twentieth and sixteenth transistors via an operational amplifier, the non-inverting input of the operational amplifier is coupled to the midpoint between the twentieth and sixteenth transistors, the inverting input of the operational amplifier is coupled to the output of the operational amplifier, and the output of the operational amplifier is further coupled to the control node of the eighteenth transistor.

19. A voltage regulator, comprising: The first branch and the second branch, each including a first transistor, a second transistor and a third transistor, the first transistor, the second transistor and the third transistor being connected in series between a first node and a second node, the first node being supplied with a supply voltage and the second node being supplied with a reference voltage, the control node of the first transistor of the first branch being coupled together with the control node of the first transistor of the second branch, and the control node of the third transistor of each of the first and second branches being coupled to the connection point of the first transistor and the second transistor of the corresponding branch; The fourth transistor is coupled between the connection point of the second transistor and the third transistor in the second branch and the third node, and the control node of the fourth transistor is coupled together with the control node of the second transistor in the first branch to the node where the set point voltage is applied. as well as A fifth transistor is coupled between the connection point of the second and third transistors in the first branch and the fourth node, and the control node of the fifth transistor is coupled together with the control node of the second transistor in the second branch to the output node of the regulator.

20. The voltage regulator of claim 19, wherein the regulator comprises a sixth transistor and a seventh transistor, a first resistor, and an eighth transistor and a ninth transistor, the sixth transistor and the seventh transistor, the first resistor, and the eighth transistor and the ninth transistor being sequentially coupled in series between the first node and the second node, the control node of the sixth transistor being coupled to the connection point of the seventh transistor and the first resistor, the control node of the sixth transistor also being coupled to the control node of the first transistor in the first branch and the control node of the first transistor in the second branch, and the control node of the seventh transistor being coupled to the connection point of the eighth transistor and the first resistor.

21. The voltage regulator of claim 20, wherein the regulator comprises a current source, a second resistor, and a tenth transistor and an eleventh transistor, the current source, the second resistor, and the tenth and eleventh transistors being sequentially coupled in series between the first node and the second node, the control node of the tenth transistor being coupled to the connection point of the second resistor and the current source and the control node of the eighth transistor, and the control node of the eleventh transistor being coupled to the control node of the ninth transistor.

22. The voltage regulator of claim 20, wherein the regulator comprises a twelfth transistor, a thirteenth transistor, and a fourteenth transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor being sequentially coupled in series between the first node and the second node, the control node of the fourteenth transistor being coupled to the control node of the third transistor of the first branch, and the control node of the thirteenth transistor being coupled to the control node of the eighth transistor.

23. The voltage regulator of claim 22, wherein the regulator comprises a fifteenth transistor, a sixteenth transistor, and a seventeenth transistor, the fifteenth transistor, the sixteenth transistor, and the seventeenth transistor being sequentially coupled in series between the first node and the second node, the control node of the seventeenth transistor being coupled to the control node of the third transistor of the second branch, the control node of the sixteenth transistor being coupled to the control node of the eighth transistor, and the control node of the fifteenth transistor being coupled to the control node of the twelfth transistor.

24. The voltage regulator of claim 23, wherein the control node of the sixteenth transistor is coupled to the control node of the eighth transistor, and the control node of the thirteenth transistor is coupled to the control node of the eighth transistor.

25. The voltage regulator of claim 23, wherein the regulator includes an eighteenth transistor coupled between the first node and the output node of the regulator.

26. The voltage regulator of claim 25, wherein the regulator includes a nineteenth transistor, the nineteenth transistor being coupled in series between the twelfth and thirteenth transistors, the control node of the nineteenth transistor being coupled to the control node of the seventh transistor, and the control node of the twelfth transistor being coupled to the connection point of the nineteenth and thirteenth transistors.

27. The voltage regulator of claim 26, wherein the regulator includes a twentieth transistor, the twentieth transistor being coupled in series between the fifteenth transistor and the sixteenth transistor, and the control node of the twentieth transistor being coupled to the control node of the nineteenth transistor.

28. The voltage regulator of claim 27, wherein the voltage regulator comprises a twenty-first transistor, a twenty-second transistor, and a twenty-third transistor, the twenty-first transistor, the twenty-second transistor, and the twenty-third transistor being sequentially coupled in series between the first node and the second node, the control node of the twenty-first transistor being coupled to the control node of the sixth transistor, the control node of the twenty-second transistor being coupled to the control node of the seventh transistor, the control node of the twenty-third transistor being coupled to the control node of the thirteenth transistor, and the control node of the twenty-third transistor being further coupled to the midpoint between the twenty-second and twenty-third transistors. The voltage regulator includes a 24th transistor, a 25th transistor, and a 26th transistor, which are sequentially coupled in series between the first node and the second node. The control node of the 24th transistor is coupled to the control node of the 6th transistor, the control node of the 25th transistor is coupled to the control node of the 7th transistor, and the control node of the 26th transistor is coupled to the control node of the 9th transistor. The voltage regulator also includes a third capacitor coupled between the midpoint of the 24th and 25th transistors and the midpoint of the 20th and 16th transistors.

29. The voltage regulator of claim 27, wherein the voltage regulator comprises a twenty-first transistor, a twenty-second transistor, and a twenty-third transistor, the twenty-first transistor, the twenty-second transistor, and the twenty-third transistor being connected in series in this order between the first node and the second node, the control node of the twenty-first transistor being coupled to the control node of the sixth transistor, the control node of the twenty-second transistor being coupled to the control node of the seventh transistor, the control node of the twenty-third transistor being coupled to the control node of the thirteenth transistor, and the control node of the twenty-third transistor being further coupled to the midpoint between the twenty-second and twenty-third transistors, the voltage regulator comprising a twenty-fifth transistor and a twenty-sixth transistor, the twenty-fifth transistor and the twenty-sixth transistor being connected in series in this order between the midpoint of the first transistor and the second transistor of the second branch and the second node, and the control node of the twenty-fifth transistor being coupled to the seventh transistor. The control node of the transistor, the control node of the 26th transistor is coupled to the control node of the 9th transistor, the midpoint of the 25th and 26th transistors is also coupled to the midpoint of the 1st and 2nd transistors of the 2nd branch, the voltage regulator includes a 27th and a 28th transistor, the 27th and 28th transistors are sequentially coupled in series between the midpoint of the 1st and 2nd transistors of the 1st branch and the 2nd node, the control node of the 27th transistor is coupled to the control node of the 7th transistor, the control node of the 28th transistor is coupled to the control node of the 9th transistor, the midpoint of the 27th and 28th transistors is coupled to the control node of the 3rd transistor of the 1st branch, the voltage regulator also includes a third capacitor, the third capacitor is coupled between the midpoint of the 1st and 2nd transistors and the midpoint of the 20th and 16th transistors.

30. The voltage regulator of claim 27, wherein the control node of the thirteenth transistor is coupled to the connection point of the thirteenth transistor and the fourteenth transistor, and the control node of the eighteenth transistor is coupled to the connection point of the fifteenth transistor and the sixteenth transistor.

31. The voltage regulator of claim 27, wherein the regulator comprises: A first Miller capacitor is coupled between the output node of the regulator and the connection point of the sixteenth and seventeenth transistors; as well as A second Miller capacitor is coupled between the output node of the regulator and the control node of the third transistor in the first branch.

32. The voltage regulator of claim 31, wherein the control node of the eighteenth transistor is coupled to the midpoint between the twentieth and sixteenth transistors via an operational amplifier, the non-inverting input of the operational amplifier is coupled to the midpoint between the twentieth and sixteenth transistors, the inverting input of the operational amplifier is coupled to the output of the operational amplifier, and the output of the operational amplifier is further coupled to the control node of the eighteenth transistor.

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