A rapid verification method and system for a silicon carbide high-voltage MOS structure

Abstract

The present invention discloses a method and system for quickly verifying a silicon carbide high-voltage MOS structure, relating to the technical field of semiconductor devices. The method includes: dynamically and periodically monitoring the silicon carbide high-voltage MOS structure to obtain full-cycle output characteristics, and extracting first output characteristics; reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree; introducing a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; and using the first target matching degree as the first structure effectiveness index of the silicon carbide high-voltage MOS structure. The technical problems of low verification efficiency and large errors existing in the prior art for the silicon carbide high-voltage MOS structure are solved, and the technical effects of improving verification efficiency and the accuracy of verification results are achieved.

Description

Technical Field

[0001] This application relates to the technical field of semiconductor devices, and more particularly to a method and system for rapidly verifying a silicon carbide high-voltage MOS structure. Background Art

[0002] As a third-generation semiconductor material, silicon carbide (SiC) has excellent properties such as a high breakdown electric field, high thermal conductivity, and a wide bandgap, and is widely used in high-voltage power devices. In the development process of a silicon carbide high-voltage metal-oxide-semiconductor (MOS) structure, the verification of its dynamic performance and reliability is a key link. However, traditional structure verification usually relies on long-term testing and complex modeling analysis, which may have problems of low efficiency and large errors. How to obtain the dynamic performance characteristics of a silicon carbide high-voltage MOS structure through a rapid and accurate verification method has become a technical problem to be solved urgently.

[0003] Therefore, in the current related technologies, there are technical problems of low verification efficiency and large errors in the verification of a silicon carbide high-voltage MOS structure. Summary of the Invention

[0004] This application provides a method and system for rapidly verifying a silicon carbide high-voltage MOS structure, which solves the technical problems of low verification efficiency and large errors in the verification of a silicon carbide high-voltage MOS structure in the prior art, and achieves the technical effects of improving verification efficiency and the accuracy of verification results.

[0005] This application provides a method for rapidly verifying a silicon carbide high-voltage MOS structure. The method includes: dynamically monitoring the silicon carbide high-voltage MOS structure for a full cycle to obtain full-cycle output characteristics, and extracting first output characteristics of the first cycle in the full-cycle output characteristics; reading a predetermined trend comparison strategy, and based on the predetermined trend comparison strategy, comparing a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve to obtain a first matching degree; introducing a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; using the first target matching degree as a first structure effectiveness index of the silicon carbide high-voltage MOS structure.

[0006] In a possible implementation, when reading a predetermined trend comparison strategy and, based on the predetermined trend comparison strategy, comparing a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve to obtain a first matching degree, the following processing is also performed: extracting second output characteristics of the second cycle in the full-cycle output characteristics; based on the predetermined trend comparison strategy, comparing a second IV characteristic curve obtained by analyzing the second output characteristics with the ideal IV characteristic curve to obtain a second matching degree; using the second matching degree to verify the first matching degree.

[0007] In a possible implementation manner, the second IV characteristic curve obtained by analyzing the second output characteristic is compared with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a second matching degree, and the following processing is further performed: the second output characteristic is divided into stages according to a stage division plan to obtain a second stage division result; any output characteristic corresponding to any stage in the second stage division result is extracted; the any output characteristic is analyzed and an any current-voltage scatter plot is drawn; curve fitting analysis is performed on the any current-voltage scatter plot based on the random sample consensus principle to obtain an any spline curve; overlapping comparison analysis is performed on the any spline curve and the ideal IV characteristic curve to obtain an any overlapping degree; the any overlapping degree after weighted normalization processing is used to obtain the second matching degree.

[0008] In a possible implementation manner, the stage division plan refers to a division plan for predetermined types of stages, and the following processing is further performed: the first stage in the predetermined type of stages is extracted, and the first stage characteristic of the first stage is obtained; the first division plan of the first stage is set based on the first stage characteristic, and the stage division plan is formed; wherein, the predetermined type of stages includes a cut-off region stage, a saturation region stage, and a linear region stage.

[0009] In a possible implementation manner, curve fitting analysis is performed on the any current-voltage scatter plot based on the random sample consensus principle to obtain an any spline curve, and the following processing is further performed: Step A: obtaining a first spline scatter point set of the any current-voltage scatter plot based on the random sample consensus principle; Step B: fitting a first spline curve based on the first spline scatter point set; Step C: comparing the first spline scatter point set with the total scatter point set of the any current-voltage scatter plot to obtain a first non-spline scatter point set; Step D: performing a support rate analysis on the first spline curve through the first non-spline scatter point set to obtain a first support rate; Step E: when the first support rate reaches a predetermined support threshold, the first spline curve is used as the any spline curve.

[0010] In a possible implementation manner, Step D further performs the following processing: randomly extracting any non-spline scatter point in the first non-spline scatter point set, and denoting the any non-spline scatter point as a verification sample point; judging whether the verification sample point conforms to the first support sample point constraint of the first spline curve; if it conforms, adding the verification sample point to a support sample point list, and counting the number of support sample points in the support sample point list; taking the ratio of the number of support sample points to the number of first verification sample points in the first non-spline scatter point set to obtain the first support rate.

[0011] In a possible implementation, after step D, the following processing is further performed: when the first support rate does not reach the predetermined support threshold, steps A to D are repeated until the predetermined support threshold is reached, the first support rate at that time is output, and the first spline curve at that time is used as the arbitrary spline curve.

[0012] In a possible implementation, a predetermined feedback calibration function is introduced to calibrate and adjust the first matching degree to obtain a first target matching degree, and the following processing is further performed: obtaining material characteristic information of a silicon carbide high-voltage MOS structure; extracting first application simulation information of the first cycle from the full-cycle output characteristics; the material characteristic information and the first application simulation information form a calibration information set; reading a matching degree factor in the predetermined feedback calibration function, and traversing the matching degree factor in the calibration information set to obtain a calibration factor parameter set; calibrating and adjusting the first matching degree according to the predetermined feedback calibration function in combination with the calibration factor parameter set to obtain the first target matching degree.

[0013] The present application further provides a rapid verification system for a silicon carbide high-voltage MOS structure, including: a full-cycle output characteristic acquisition module, configured to perform dynamic cycle monitoring on the silicon carbide high-voltage MOS structure to obtain full-cycle output characteristics, and extract first output characteristics of the first cycle from the full-cycle output characteristics; a first matching degree acquisition module, configured to read a predetermined trend comparison strategy, and compare a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree; a calibration and adjustment module, configured to introduce a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; a first structure effectiveness index acquisition module, configured to use the first target matching degree as the first structure effectiveness index of the silicon carbide high-voltage MOS structure.

[0014] It is intended to perform dynamic cycle monitoring on a silicon carbide high-voltage MOS structure through a rapid verification method and system for a silicon carbide high-voltage MOS structure proposed in the present application to obtain full-cycle output characteristics, and extract first output characteristics; read a predetermined trend comparison strategy, and compare a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree; introduce a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; use the first target matching degree as the first structure effectiveness index of the silicon carbide high-voltage MOS structure. The technical problems of low verification efficiency and large error in the verification of the silicon carbide high-voltage MOS structure in the prior art are solved, and the technical effects of improving the verification efficiency and the accuracy of the verification result are achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the accompanying drawings of the embodiments of the present disclosure will be briefly introduced below. Flowcharts are used in this application to illustrate the operations performed by the systems according to the embodiments of the present application. It should be understood that the operations above or below do not necessarily need to be executed precisely in sequence. Instead, according to needs, various steps can be executed in reverse order or simultaneously. At the same time, other operations can also be added to these processes, or one or several steps can be removed from these processes.

[0016] Figure 1 Schematic diagram of the process of a rapid verification method for a silicon carbide high-voltage MOS structure provided by an embodiment of the present application;

[0017] Figure 2 Schematic diagram of the structure of a rapid verification system for a silicon carbide high-voltage MOS structure provided by an embodiment of the present application.

[0018] Explanation of reference numerals: full-cycle output characteristic acquisition module 10, first matching degree acquisition module 20, calibration and adjustment module 30, first structure effectiveness index acquisition module 40. Detailed implementation manners

[0019] The above description is only an overview of the technical solutions of the present application. In order to be able to understand the technical means of the present application more clearly, it can be implemented according to the content of the description. And in order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the following specifically gives the detailed implementation manners of the present application.

[0020] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limitations of the present application. All other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0021] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict. The terms "first" and "second" involved are only used to distinguish similar objects and do not represent a specific order for the objects. The terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or server comprising a series of steps or units need not be limited to those steps or units clearly listed, but may include other steps or modules not clearly listed or inherent to these processes, methods, products or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application.

[0022] An embodiment of this application provides a method for quickly verifying a silicon carbide high-voltage MOS structure, as Figure 1 shown. The method includes:

[0023] Step S100, dynamically and periodically monitoring the silicon carbide high-voltage MOS structure to obtain full-cycle output characteristics, and extracting the first output characteristics of the first cycle in the full-cycle output characteristics.

[0024] Preferably, a silicon carbide high-voltage MOS refers to a high-voltage power MOS (metal oxide semiconductor) device made of silicon carbide (SiC) material, that is, it is a metal oxide semiconductor field effect transistor (MOSFET) using silicon carbide as the semiconductor material, and is usually used in high-voltage power electronic applications. High voltage means that the rated operating voltage range of the MOS device is usually between several hundred volts and several thousand volts, and is suitable for the switching control or energy conversion of high-voltage circuits. The MOS structure consists of three layers: metal (M), oxide (O), and semiconductor (S). Among them, the oxide layer plays an insulating role, and the semiconductor layer controls the current flow. Dynamically monitor the silicon carbide high-voltage MOS structure periodically, that is, continuously and real-time monitor the dynamic response behavior of the silicon carbide high-voltage MOS structure during operation. By applying a periodically changing input signal (such as voltage or current), measure the change of the output signal, so as to obtain the dynamic electrical characteristic data of the structure in a complete working cycle, as the full-cycle output characteristic. The full-cycle output characteristic refers to the set of all output data of the silicon carbide high-voltage MOS structure in a working cycle, usually including the change curves of current and voltage over time, or the transient response characteristics under certain specific conditions, which comprehensively reflects the dynamic performance and operating state of the device. Finally, select and extract the data of the first cycle (the first output characteristic) from the full-cycle output characteristic. Among them, the first cycle is any one in the full cycle, and the output characteristic may be the current-voltage (I-V) characteristic curve of a certain time period, the dynamic response parameter of a certain point, or the key index related to the ideal characteristic after analysis, to ensure the data representativeness and the efficiency of analysis.

[0025] Step S200, read a predetermined trend comparison strategy, and compare the first IV characteristic curve obtained by analyzing the first output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree.

[0026] Preferably, the predetermined trend comparison strategy refers to a rule set in advance based on the theoretical analysis and experience accumulation of device performance for judging whether the device performance meets the requirements. It may include trend evaluation methods, such as evaluating the trend change of test data through methods like curve fitting and piecewise calculation; comparison parameters include curve slope, inflection point position, response time, etc.; the tolerance range defines the range allowing deviation from the ideal curve for quantifying the qualification of device performance; analyze the first output characteristic, that is, monitor the output characteristic of the first cycle during the operation of the silicon carbide high-voltage MOS structure, extract and convert it into the corresponding current-voltage relationship curve to obtain the first IV characteristic curve, that is, the relationship curve between the current (I) and voltage (V) of the MOS structure, which reflects the dynamic electrical behavior (turn-on, turn-off, and dynamic performance) of the device during actual operation. The ideal IV characteristic curve is the performance target curve obtained according to the device theory design, representing the current-voltage relationship of the device in the best working state. Compare the first IV characteristic curve with the ideal IV characteristic curve, that is, based on the predetermined trend comparison strategy, compare the first IV characteristic curve with the ideal IV characteristic curve by using difference analysis, curve fitting degree calculation, or characteristic parameter comparison, etc., to obtain a quantitative index of consistency, that is, the first matching degree. A high matching degree means that the device performance is close to the ideal state, and a low matching degree indicates a large deviation.

[0027] Further, step S200 further includes step S210 of extracting the second output characteristic of the second cycle from the full-cycle output characteristic; step S220 of comparing the second IV characteristic curve obtained by analyzing the second output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain the second matching degree; step S230 of verifying the first matching degree with the second matching degree.

[0028] Preferably, select another period from the full-cycle output characteristics and extract the corresponding device dynamic output characteristics as the second output characteristics, including the performance of voltage, current or other parameters changing with time, to provide more sample data for further analysis of the device performance, for observing the consistency and stability during multi-cycle operation, and then analyze the second output characteristics to obtain the current-voltage relationship curve (IV characteristic curve) of the second period. Specifically, by comparing the second IV characteristic curve with the ideal IV characteristic curve, evaluate the performance consistency based on a predetermined trend comparison strategy (such as calculating the curve difference, the fitting degree of key points, etc.) to obtain the matching degree corresponding to the second period (the second matching degree). Finally, verify the first matching degree with the second matching degree, that is, by comparing the matching degrees of the first period and the second period, check their conformity, so as to verify the reliability and representativeness of the output characteristics of the first period. For example, if the first matching degree is close to the second matching degree, it indicates that the test results of the first period can reflect the overall performance of the device. If there is a large difference between the two, it may indicate that there is an abnormality in the device (such as fluctuations, unstable operation), and the reason needs to be further analyzed. Through the data comparison and verification of multiple working cycles, ensure that the extracted output characteristics and the calculated matching degrees are representative and reliable, improve the accuracy and credibility of the analysis results, and avoid misjudgment caused by relying only on single-cycle data.

[0029] Further, step S220 further includes step S221, dividing the second output characteristics according to the stage division plan to obtain the second stage division result; step S222, extracting any output characteristics corresponding to any stage in the second stage division result; step S223, analyzing the any output characteristics and drawing an arbitrary current-voltage scatter plot; step S224, performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the principle of random sample consensus to obtain an arbitrary spline curve; step S225, performing overlapping comparison analysis on the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlapping degree; step S226, obtaining the second matching degree by weighted normalization processing of the arbitrary overlapping degree.

[0030] Preferably, the stage division plan refers to the rules for dividing the output characteristics into different time periods or state stages according to the operating characteristics of the silicon carbide high-voltage MOS structure. The division basis may include time periods (such as turn-on, maintenance, and turn-off stages), power characteristics (such as the change trend of load current or voltage), and dynamic behaviors (such as the change amplitude or frequency of the current waveform). Applying this plan, the output characteristics of the second cycle are decomposed into several stages, and the characteristic data of each stage are determined to obtain the second stage division result; then, any output characteristic corresponding to any stage in the second stage division result is extracted, that is, the output data at a certain moment or in a certain state corresponding to a certain stage is randomly extracted, which may include specific voltage and current values, or the change curves of these data over time. Analyze it, and plot the relationship between the output voltage and current in this stage as a current-voltage scatter plot to intuitively reflect the distribution law of the current changing with the voltage.

[0031] Preferably, curve fitting analysis is performed on any current-voltage scatter plot based on the random sample consensus principle, that is, a reliable subset is selected from the scatter data, and a fitting algorithm (such as the spline interpolation method) is used to generate a smooth curve according to the current-voltage scatter plot to obtain any spline curve, which is used to approximately describe the current-voltage relationship in this stage. Among them, the random sample consensus principle (RANSAC) is a data analysis algorithm mainly used to process sample data containing noise. The goal is to select a reliable subset from the scatter data to fit the best curve and reduce the influence of noise on the result; then, the overlapping comparison analysis is performed between any spline curve and the ideal IV characteristic curve. The fitted spline curve is superimposed on the theoretically ideal IV curve, and their similarity is evaluated through difference calculation (such as area difference, mean square error, etc.) to obtain any overlapping degree, which represents the matching degree between any spline curve and the ideal IV characteristic curve. Finally, by assigning different weights to any overlapping degree and comprehensively considering the contribution values of the characteristics of each stage, the weighted and standardized overlapping degrees are summarized to obtain the overall matching degree of the output characteristics of the second cycle, and finally the second matching degree is obtained.

[0032] Further, step S221 includes step S221a, extracting the first stage in the predetermined type stage and obtaining the first stage characteristics of the first stage; step S221b, setting the first division plan of the first stage based on the first stage characteristics and forming the stage division plan; step S221c, wherein the predetermined type stage includes a cut-off region stage, a saturation region stage, and a linear region stage.

[0033] Preferably, the predetermined type stage includes a cut-off region stage, a saturation region stage, and a linear region stage, which reflect the operating characteristics of the device under different working conditions. In the cut-off region stage, the gate voltage (Vgs) is lower than the threshold voltage (Vth), and a conducting channel cannot be formed. The drain-source current (Id) is almost zero (only a tiny leakage current), and the drain-source voltage (Vds) is close to the applied power supply voltage. The impedance of the device is extremely high, and the device does not conduct current, showing the "off" state of the switch. The saturation region stage is also called the "constant current region". The gate voltage is higher than the threshold voltage (Vgs > Vth), and the drain-source voltage (Vds) exceeds a certain saturation value. The conducting channel is fully formed, and the drain-source current (Id) is mainly controlled by the gate voltage (Vgs) and hardly changes with the drain-source voltage (Vds). The drain-source voltage (Vds) maintains a low level, and the device is fully conducting. The drain-source current is controlled by the gate, showing a stable "on" state of the switch. In the linear region stage (variable resistance region), the gate voltage is higher than the threshold voltage (Vgs > Vth), but the drain-source voltage (Vds) is lower than the saturation value. The conducting channel is not fully formed, and the drain-source current (Id) changes linearly with the drain-source voltage (Vds). The drain-source voltage (Vds) is relatively high but still lower than the saturation value, and the device is in a partially conducting state, showing resistive behavior.

[0034] Preferably, extract the first stage in the predetermined type stage and obtain the first stage characteristics (data characteristics reflecting the device behavior within the corresponding stage) of the first stage, such as the voltage and current relationship (such as whether the current in the cut-off region is close to zero), the dynamic response characteristics (such as the rate of state change), etc. Then, according to the extracted first stage characteristics, further subdivide the state or time period of this stage to more accurately analyze its behavior. For example, the cut-off region stage can be subdivided into a "gate rising stage" and a "fully cut-off stage". Integrate the division schemes of multiple stages to form a complete stage division plan for guiding the characteristic extraction and analysis throughout the cycle. By dividing the working cycle of the silicon carbide high-voltage MOS structure into clear stages (such as the cut-off region, saturation region, and linear region) and extracting and analyzing the characteristics of each stage in detail, the performance of the device in different states can be systematically mastered, thereby improving the analysis accuracy.

[0035] Furthermore, step S224 further includes step A: obtaining a first spline scatter point set of the arbitrary current-voltage scatter plot based on the random sample consensus principle; step B: fitting a first spline curve based on the first spline scatter point set; step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter plot to obtain a first non-spline scatter point set; step D: performing a support rate analysis on the first spline curve through the first non-spline scatter point set to obtain a first support rate; step E: when the first support rate reaches a predetermined support threshold, taking the first spline curve as the arbitrary spline curve.

[0036] Preferably, the Random Sample Consensus (RANSAC) principle is used to extract a reliable subset ("inliers") from a sample containing a large amount of noise. By randomly sampling scattered points and finding the subset that best fits the model. Specifically, based on the RANSAC principle, a first spline scatter point set of any current-voltage scatter plot is obtained. These points have high consistency and representativeness in curve fitting. The scattered points are fitted by a mathematical interpolation method (such as B-spline interpolation or Cubic-spline interpolation) to generate a smooth curve that can reflect the data change trend, namely the first spline curve. The first spline scatter point set is compared with the total scatter point set of any current-voltage scatter plot, and the points belonging to the first spline scatter point set are removed from the total scatter point set. The remaining points are the first non-spline scatter point set (outliers or noise). Among them, the total scatter point set is all the data points of any current-voltage scatter plot, including the spline scatter points that meet the spline fitting conditions and the non-spline scatter points that deviate from the spline. The support rate analysis of the first spline curve is performed by the first non-spline scatter point set, that is, to check whether the first spline curve can be supported by enough scattered points to verify its representativeness and accuracy. If the points in the first non-spline scatter point set are close to the first spline curve, they can also be reclassified as points supporting the curve, thereby increasing the support rate. Finally, the first support rate is compared with a predetermined support threshold. The predetermined support threshold is a preset support rate threshold, indicating that the spline curve must be supported by enough scattered points to be accepted. For example, if the support rate reaches more than 80%, the spline curve is considered valid. If the first spline curve is greater than the predetermined support threshold, indicating that it passes the support rate verification, it is confirmed as an arbitrary spline curve as the final description of the current-voltage characteristics at this stage, ensuring the accuracy and reliability of the results.

[0037] Furthermore, step D further includes D10: randomly extract any non-spline scatter point from the first non-spline scatter point set and denote the arbitrary non-spline scatter point as a calibration sample point; step D20: determine whether the calibration sample point meets the first support sample point constraint of the first spline curve; step D30: if it meets the requirement, add the calibration sample point to the support sample point list and count the number of support sample points in the support sample point list; step D40: take the ratio of the number of support sample points to the number of the first calibration sample points in the first non-spline scatter point set to obtain the first support rate.

[0038] Preferably, any non-spline scatter point in the first non-spline scatter point set is randomly extracted, and the any non-spline scatter point is denoted as a calibration sample point to verify whether it can support the first spline curve, and then it is determined whether the calibration sample point meets the first support sample point constraint of the first spline curve. The first support sample point constraint refers to the condition for determining whether a scatter point "supports" a spline curve. For example, whether the vertical distance between the calibration sample point and the spline curve is less than a predetermined threshold. If the calibration sample point meets the support sample point constraint (the vertical distance between the calibration sample point and the spline curve is less than or equal to the predetermined threshold), it is considered that it can support the first spline curve, and the calibration sample point is added to the support sample point list, and the number of support sample points in the support sample point list is counted; finally, the ratio of the number of support sample points to the number of first calibration sample points in the first non-spline scatter point set is taken as the first support rate. The number of support sample points represents the number of non-spline scatter points consistent with the first spline curve, and the total number of the first non-spline scatter point set is used for normalizing the support degree. The support rate reflects the representativeness of the first spline curve in the non-spline scatter point set. If the support rate is high, it indicates that the spline curve fits the entire scatter data well.

[0039] Further, step D further includes that when the first support rate does not reach the predetermined support threshold, steps A to D are repeated until the predetermined support threshold is reached, the first support rate at that time is output, and the first spline curve at that time is used as the arbitrary spline curve.

[0040] Preferably, if the currently calculated support rate (the first support rate) is lower than the threshold value, it indicates that the fitting quality or representativeness of the spline curve is insufficient and needs to be re-adjusted and optimized. Then steps A to D are repeated, that is, the non-spline scatter point set is randomly sampled again, a new spline curve is fitted, the non-spline scatter point set is updated, the new spline curve is calibrated by the new non-spline scatter point set, and the support rate is recalculated. If the support rate still does not reach the threshold value, it is repeated again until the predetermined support threshold is reached, the first support rate at that time is output, and the first spline curve at this time is regarded as the arbitrary spline curve for representing the characteristic description of the current - voltage scatter plot.

[0041] Step S300, introducing a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree.

[0042] Step S300 further includes step S310 of obtaining the material characteristic information of the silicon carbide high-voltage MOS structure; step S320 of extracting the first application simulation information of the first cycle from the full-cycle output characteristics; step S330 of forming a calibration information set with the material characteristic information and the first application simulation information; step S340 of reading the matching degree factor in the predetermined feedback calibration function and traversing the matching degree factor in the calibration information set to obtain a calibration factor parameter set; step S350 of calibrating and adjusting the first matching degree according to the predetermined feedback calibration function in combination with the calibration factor parameter set to obtain the first target matching degree.

[0043] Preferably, the material characteristic information of the silicon carbide high-voltage MOS structure is obtained, that is, the physical and electrical characteristic data of the silicon carbide high-voltage MOS structure, such as material type, electrical properties of silicon carbide (SiC) (e.g., wide bandgap, high breakdown electric field, high thermal conductivity), conductivity, electron mobility, conduction bandwidth, etc., thermal characteristics, thermal conductivity, thermal diffusion, etc., breakdown voltage: reflecting the withstand ability of the material under high voltage, etc.; the first application simulation information of the first cycle is extracted from the full-cycle output characteristics. The full-cycle output characteristics refer to the electrical response of the silicon carbide high-voltage MOS structure within a complete working cycle, such as current-voltage (I-V) curve, current waveform, etc. The first application simulation information is the simulation data related to the first cycle, usually including the initial values of voltage and current, the dynamic behavior of the first cycle (such as switching time, rise / fall time, peak current, etc.); the material characteristic information and the application simulation information are combined to form a complete calibration information set, comprehensively reflecting the actual operating characteristics and expected behavior of the device.

[0044] Preferably, the matching degree factor in the predetermined feedback calibration function is read. Among them, the feedback calibration function is used to calibrate the matching degree according to the input material characteristic information and simulation data. The matching degree factor is multiple factors in the calibration function that affect the performance of the silicon carbide high-voltage MOS, used to weigh the influence of each input characteristic, specifically including material characteristics, such as high frequency and high efficiency versus high voltage resistance, on-resistance and breakdown voltage (the breakdown voltage characterizes the high-voltage withstand ability of the device), high-temperature reliability (reliability in a high-temperature environment); dynamic and static characteristics (such as switching speed, switching loss, etc., the operating voltage and current values of the device and static conduction characteristics), short-circuit and over-current protection (ensuring that the device can protect itself from damage in a harsh environment), electric field strength of the gate oxide layer (determining the threshold voltage and conduction characteristics of the device), interface defects (causing performance degradation, such as increased leakage current, reduced breakdown voltage, etc.).

[0045] Preferably, traverse the matching degree factors in the calibration information set, that is, compare and analyze each matching degree factor in the calibration information set to calculate the specific influence of each factor. For example, how to adjust the gate design according to the high-frequency and high-efficiency characteristics of the material, or adjust the current and voltage characteristics according to the relationship between the on-resistance and the breakdown voltage, so as to obtain a specific set of calibration factor parameters, which reflects the actual contribution of each material characteristic or performance index to the overall device performance. The calibration factor parameter set may include the weight of each factor and the specific influence value of each factor on the performance (such as the proportion of the influence on the on-current, the degree of influence on the breakdown voltage, etc.). Finally, calibrate and adjust the first matching degree according to the feedback calibration function and the calibration factor parameter set. Specifically, use the feedback calibration function, take the calibration factor parameter set as the input parameter, and combine the predetermined feedback calibration function to perform operations and adjustments to obtain the first target matching degree, so that it can more accurately reflect the actual performance, thereby effectively improving the design accuracy and performance stability of the device, and improving its efficiency and reliability in practical applications.

[0046] Step S400, use the first target matching degree as the first structural effectiveness index of the silicon carbide high-voltage MOS structure.

[0047] Preferably, use the first target matching degree as the first structural effectiveness index of the silicon carbide high-voltage MOS structure, and quantify the overall performance and effectiveness of the silicon carbide high-voltage MOS structure through the calibrated matching degree value. Among them, the first structural effectiveness index is used to measure the performance effectiveness of the silicon carbide high-voltage MOS structure. The effectiveness index is a measure of the "effectiveness" or "adaptability" of the device, indicating whether the device can meet the design requirements, especially the stability and reliability under complex conditions such as high voltage and temperature. For example, when the first target matching degree is relatively high, it means that the structure works well under the design expectation, has characteristics such as efficient current transmission, high breakdown voltage resistance, and low loss, and can effectively perform its functions in applications such as power conversion or high-voltage switching; when this index is relatively low, it indicates that there may be performance deviations in the actual operation of the device, and it may not be able to fully meet the design requirements and may need further optimization.

[0048] In the above text, refer to Figure 1 A rapid verification method for a silicon carbide high-voltage MOS structure according to an embodiment of the present invention is described in detail. Next, refer to Figure 2 Describe a rapid verification system for a silicon carbide high-voltage MOS structure according to an embodiment of the present invention.

[0049] A rapid verification system for a silicon carbide high-voltage MOS structure according to an embodiment of the present invention is used to solve the technical problems of low verification efficiency and large errors in the verification of silicon carbide high-voltage MOS structures in the prior art, and achieves the technical effects of improving verification efficiency and the accuracy of verification results. A rapid verification system for a silicon carbide high-voltage MOS structure includes: a full-cycle output characteristic acquisition module 10, a first matching degree acquisition module 20, a calibration and adjustment module 30, and a first structure effectiveness index acquisition module 40.

[0050] The full-cycle output characteristic acquisition module 10 is configured to perform dynamic cycle monitoring on the silicon carbide high-voltage MOS structure to obtain full-cycle output characteristics, and extract first output characteristics of the first cycle in the full-cycle output characteristics; the first matching degree acquisition module 20 is configured to read a predetermined trend comparison strategy, and compare a first IV characteristic curve obtained by analyzing the first output characteristics with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree; the calibration and adjustment module 30 is configured to introduce a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; the first structure effectiveness index acquisition module 40 is configured to use the first target matching degree as the first structure effectiveness index of the silicon carbide high-voltage MOS structure.

[0051] Next, the specific configuration of the first matching degree acquisition module 20 will be described in detail. The first matching degree acquisition module 20 further includes: extracting second output characteristics of the second cycle in the full-cycle output characteristics; comparing a second IV characteristic curve obtained by analyzing the second output characteristics with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a second matching degree; and verifying the first matching degree with the second matching degree.

[0052] Next, the specific configuration of the first matching degree acquisition module 20 will be further described in detail. The first matching degree acquisition module 20 further includes: performing stage division on the second output characteristics according to a stage division plan to obtain a second stage division result; extracting arbitrary output characteristics corresponding to any stage in the second stage division result; analyzing the arbitrary output characteristics and plotting an arbitrary current-voltage scatter plot; performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the random sample consensus principle to obtain an arbitrary spline curve; performing overlapping comparison analysis between the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlapping degree; and obtaining the second matching degree by weighted normalization processing of the arbitrary overlapping degree.

[0053] Next, the specific configuration of the first matching degree obtaining module 20 will be further described in detail. The first matching degree obtaining module 20 further includes: extracting the first stage in the predetermined type stage, and obtaining the first stage characteristics of the first stage; setting a first division scheme for the first stage based on the first stage characteristics, and forming the stage division preplan; wherein, the predetermined type stage includes a cut-off region stage, a saturation region stage, and a linear region stage.

[0054] Next, the specific configuration of the first matching degree obtaining module 20 will be further described in detail. The first matching degree obtaining module 20 further includes: Step A: obtaining a first spline scatter point set of the arbitrary current-voltage scatter plot based on the random sample consensus principle; Step B: fitting a first spline curve based on the first spline scatter point set; Step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter plot to obtain a first non-spline scatter point set; Step D: performing a support rate analysis on the first spline curve through the first non-spline scatter point set to obtain a first support rate; Step E: when the first support rate reaches a predetermined support threshold, taking the first spline curve as the arbitrary spline curve.

[0055] Next, the specific configuration of the first matching degree obtaining module 20 will be further described in detail. The first matching degree obtaining module 20 further includes: randomly extracting an arbitrary non-spline scatter point from the first non-spline scatter point set, and denoting the arbitrary non-spline scatter point as a verification sample point; judging whether the verification sample point conforms to the first support sample point constraint of the first spline curve; if it conforms, adding the verification sample point to the support sample point list, and counting the number of support sample points in the support sample point list; taking the ratio of the number of support sample points to the number of first verification sample points in the first non-spline scatter point set to obtain the first support rate.

[0056] Next, the specific configuration of the first matching degree obtaining module 20 will be further described in detail. The first matching degree obtaining module 20 further includes: when the first support rate does not reach the predetermined support threshold, repeating steps A to D until the predetermined support threshold is reached, outputting the first support rate at that time, and taking the first spline curve at that time as the arbitrary spline curve.

[0057] Next, the specific configuration of the calibration adjustment module 30 will be described in detail. The calibration adjustment module 30 further includes: obtaining the material characteristic information of the silicon carbide high-voltage MOS structure; extracting the first application simulation information of the first period from the full-cycle output characteristics; the material characteristic information and the first application simulation information form a calibration information set; reading the matching degree factor in the predetermined feedback calibration function, and traversing the matching degree factor in the calibration information set to obtain a calibration factor parameter set; according to the predetermined feedback calibration function, combining the calibration factor parameter set to calibrate and adjust the first matching degree to obtain the first target matching degree.

[0058] The silicon carbide high-voltage MOS structure rapid verification system provided by the embodiment of the present invention can execute the silicon carbide high-voltage MOS structure rapid verification method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects for executing the method.

[0059] Although the present application makes various references to certain modules in the system according to the embodiments of the present application, however, any number of different modules can be used and run on the user terminal and / or the server. The included various units and modules are only divided according to the functional logic, but are not limited to the above division, as long as the corresponding functions can be realized; in addition, the specific names of the functional units are only for the convenience of mutual distinction and do not limit the protection scope of the present invention.

[0060] The above specific implementation manners do not constitute a limitation to the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A method for rapid verification of a silicon carbide high voltage MOS structure, characterized in that: include: Performing dynamic periodic monitoring on the silicon carbide high-voltage MOS structure to obtain full-period output characteristics, and extracting a first output characteristic of a first period in the full-period output characteristics; Reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first phase match; Introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching degree to obtain a first target phase matching degree; Using the first target matching degree as a first structure effectiveness index of the silicon carbide high voltage MOS structure; Reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first degree of match, further comprising: Extracting a second output characteristic of a second period in the full-period output characteristic; Comparing a second IV characteristic curve obtained by analyzing the second output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a second phase match; verifying the first phase compatibility with the second phase compatibility; Divide the second output characteristic into stages according to the stage division plan to obtain a second stage division result; Extracting any output feature corresponding to any stage in the second stage division result; Analyze the arbitrary output characteristics and draw an arbitrary current-voltage scatter plot; Performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the principle of random sampling consistency to obtain an arbitrary spline curve; Performing overlapping comparison analysis on the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlapping degree; The arbitrary overlap degree after weighted normalization processing is used to obtain the second matching degree; Based on the principle of random sampling consistency, a curve fitting analysis is performed on the arbitrary current-voltage scatter plot to obtain an arbitrary spline curve, including: Step A: obtaining a first spline scatter point set of the arbitrary current-voltage scatter plot based on the principle of random sampling consistency; Step B: fitting a first spline curve based on the first spline scattered point set; Step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter diagram to obtain a first non-spline scatter point set; Step D: performing support rate analysis on the first spline curve using the first non-spline scattered point set to obtain a first support rate; Step E: When the first support rate reaches a predetermined support threshold, the first spline curve is used as the arbitrary spline curve.

2. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: The stage division plan refers to the division plan of the predetermined type of stages, including: extracting a first stage of the predetermined type of stages and obtaining a first stage characteristic of the first stage; Setting a first division scheme for the first stage based on the characteristics of the first stage, and forming the stage division plan; The predetermined type of stage includes a cutoff region stage, a saturation region stage and a linear region stage.

3. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: Step D comprises: Randomly extract any non-spline scattered point in the first non-spline scattered point set, and record the any non-spline scattered point as a verification sample point; Determining whether the verification sample point meets the first supporting sample point constraint of the first spline curve; If it is in compliance, the verification sample point is added to the support sample point list, and the number of support sample points in the support sample point list is counted; The first support rate is obtained by taking the ratio of the number of the supporting sample points to the number of the first verification sample points in the first non-spline scattered point set.

4. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: After step D, the method further comprises: When the first support rate does not reach the predetermined support threshold, repeat steps A to D until the predetermined support threshold is reached, output the first support rate at that time, and use the first spline curve at that time as the arbitrary spline curve.

5. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: Introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching to obtain a first target phase matching, including: Obtain material characteristic information of silicon carbide high voltage MOS structure; extracting first application simulation information of the first period from the full-period output characteristics; The material characteristic information and the first application simulation information constitute a calibration information set; Reading the matching factor in the predetermined feedback calibration function, and traversing the matching factor in the calibration information set to obtain a calibration factor parameter set; The first degree of matching is calibrated and adjusted according to the predetermined feedback calibration function and in combination with the calibration factor parameter set to obtain the first target degree of matching.

6. A silicon carbide high voltage MOS structure rapid verification system, characterized in that: The system is used to implement a method for rapid verification of a silicon carbide high-voltage MOS structure according to any one of claims 1 to 5, and the system comprises: A full-cycle output characteristic acquisition module is used to dynamically monitor the silicon carbide high-voltage MOS structure to obtain a full-cycle output characteristic, and extract a first output characteristic of a first cycle in the full-cycle output characteristic; a first phase matching degree obtaining module, configured to read a predetermined trend comparison strategy, and compare a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first phase matching degree; A calibration adjustment module, used for introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching degree to obtain a first target phase matching degree; The first structure validity index acquisition module is used to use the first target matching degree as the first structure validity index of the silicon carbide high-voltage MOS structure.

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