Coil board and manufacturing method

By adding plating and conductive pads to the coil plate, the problem of difficulty in increasing the thrust of the coil plate in the prior art is solved, and a higher thrust output is achieved, which is suitable for complex lens modules.

CN119945019APending Publication Date: 2025-05-06ZHUHAI YUEXIN SEMICON LLC
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Patent Information

Application Number
CN202510216835.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-25
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The prior art is difficult to effectively increase the thrust of the coil plate, especially when the lens module is complicated and the weight increases, it is necessary to increase the cross-sectional area of ​​the conductor to increase the thrust, but there are shortcomings in related technologies.

Method used

By adding a first plating layer and a second plating layer to the coil plate, the cross-sectional area of ​​the first coil and the second coil is increased by using these plating layers, and the electroplating of the second coil is realized through the first and second conductive pads, thereby increasing the thrust force of the coil plate.

Benefits of technology

The technical effect of increasing the thrust of the coil plate is achieved. By adding plating and conductive pads, the thrust of the coil plate is effectively improved, and is suitable for complex lens modules.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a coil plate and a manufacturing method. The coil plate comprises a first coil; the first plating layer covers the first coil; the dielectric layer covers the first plating layer; a second coil on the dielectric layer; the second plating layer covers the second coil; wherein the first plating layer is located between the dielectric layer and the first coil; the dielectric layer comprises a first blind hole, the second coil is conducted and connected with the first coil through the first blind hole, and the coil plate further comprises a first conductive pad parallel to the first coil and a second conductive pad parallel to the second coil; the dielectric layer further comprises a second blind hole, and the second conductive pad is connected with the first conductive pad through the second blind hole. The technical effect of electroplating the second plating layer on the isolated second coil is achieved by using the first conductive pad and the second conductive pad.
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Description

Technical Field

[0001] The present disclosure relates to the field of packaging technology, and in particular to a coil plate and a manufacturing method thereof. Background Art

[0002] Voice Coil Motor (VCM) has the characteristics of high frequency response and high precision. Optical Image Stabilization (OIS) is a type of VCM, which is widely used in cameras to achieve autofocus function and present clear images by adjusting the position of the lens. The coil plate is used in the camera VCM-OIS, which uses the energized coil to drive the lens or sensor to move in the magnetic field to achieve anti-shake.

[0003] As the lens module becomes more complex, the weight tends to increase, and the force required to move the lens or sensor also increases. According to the force formula for the current-carrying wire in the magnetic field F = BIL (where B is the magnetic field strength, I is the current, and L is the length of the wire), Ohm's law I = U / R (where U is the voltage and R is the resistance), and the wire resistance formula R = ρL / S (where ρ is the resistivity of the material made of the resistor, L is the length of the wire wound into the resistor, and S is the cross-sectional area of ​​the wire wound into the resistor), it can be converted to F = BUS / ρ. Obviously, when the magnetic field strength B, voltage U, and material resistivity ρ are constant, increasing the thrust can be achieved by increasing the wire cross-sectional area S. However, for the technical solution of increasing the cross-sectional area S, the relevant technology still has obvious deficiencies. Summary of the invention

[0004] In view of this, an object of the present disclosure is to provide a coil plate and a manufacturing method thereof.

[0005] Based on the above-mentioned purpose, in a first aspect, the present disclosure provides a coil plate, comprising: a first coil; a first additional plating layer covering the first coil; a dielectric layer covering the first additional plating layer; a second coil on the dielectric layer; and a second additional plating layer covering the second coil; wherein the first additional plating layer is located between the dielectric layer and the first coil; the dielectric layer comprises a first blind hole, and the second coil is conductively connected to the first coil through the first blind hole; wherein the coil plate also comprises a first conductive pad arranged in parallel with the first coil and a second conductive pad arranged in parallel with the second coil; the dielectric layer comprises a second blind hole, and the second conductive pad is conductively connected to the first conductive pad through the second blind hole.

[0006] In some embodiments, a solder resist layer is further included; the solder resist layer covers the second additional plating layer and the dielectric layer; the solder resist layer includes a solder resist opening to expose at least a portion of the second additional plating layer.

[0007] In some embodiments, the first conductive pad is covered with a first additional plating layer; and / or the second conductive pad is covered with a second additional plating layer.

[0008] In some embodiments, the first conductive pad and the second conductive pad are located in a non-product area of ​​the coil plate.

[0009] In a second aspect, the present disclosure also provides a method for manufacturing a coil plate, comprising:

[0010] (a) preparing a carrier plate;

[0011] (b) forming a first coil and a first conductive pad on the carrier plate;

[0012] (c) electroplating the entire surface to form a first additional plating layer covering the first coil and the first conductive pad;

[0013] (d) laminating a dielectric layer on the first additional plating layer and opening a first blind hole and a second blind hole; wherein the first blind hole exposes the first additional plating layer on the first coil; and the second blind hole exposes the first additional plating layer on the first conductive pad;

[0014] (e) forming a second coil and a second conductive pad on the dielectric layer; wherein the second coil is conductively connected to the first coil through the first blind hole; and the second conductive pad is conductively connected to the first conductive pad through the second blind hole;

[0015] (f) electroplating a second plated layer on the second coil and the second conductive pad; wherein the first conductive pad and the second conductive pad are located in a non-product area;

[0016] (g) Removing the carrier plate.

[0017] In some embodiments, it also includes:

[0018] (h) forming a solder resist layer on the dielectric layer; the solder resist layer comprising a solder resist opening to expose at least a portion of the second plated layer.

[0019] In some embodiments, step (b) specifically comprises:

[0020] (b1) the carrier plate comprises a support layer and a first seed layer on the support layer, and a first photoresist layer is formed and patterned on the first seed layer;

[0021] (b2) forming a first coil and a first conductive pad by electroplating in the pattern of the first photoresist layer;

[0022] (b3) removing the first photoresist layer.

[0023] In some embodiments, the material of the first seed layer is copper;

[0024] Step (b) further includes: forming a first metal layer on the first seed layer, and forming a first coil and a first conductive pad on the first metal layer; wherein the first metal layer includes a non-copper metal;

[0025] Step (c) further includes: after etching the exposed first metal layer, electroplating the entire surface to form a first additional plating layer covering the first coil and the first conductive pad.

[0026] In some embodiments, step (g) further includes: etching the first metal layer remaining on the first coil and the first conductive pad.

[0027] In some embodiments, the non-copper metal includes at least one of titanium (Ti), chromium (Cr), tungsten (W), zirconium (Zr), aluminum (Al), silver (Ag), and gold (Au).

[0028] In some embodiments, step (e) comprises:

[0029] (e1) electroless copper plating on the dielectric layer;

[0030] (e2) forming a second photoresist layer on the dielectric layer and patterning the layer;

[0031] (e3) forming a second coil and a second conductive pad by electroplating in the pattern of the second photoresist layer;

[0032] (e4) removing the second photoresist layer.

[0033] In some embodiments, the carrier board further comprises a copper foil layer; the copper foil layer is located between the support layer and the first seed layer; the copper foil layer is physically combined with the first seed layer;

[0034] Step (g) includes: separating the copper foil layer and the first seed layer to remove the carrier board.

[0035] From the above, it can be seen that the present disclosure provides a coil plate and a manufacturing method, which achieves the technical effect of increasing the thrust of the coil plate by adding a first additional plating layer and a second additional plating layer, using the first additional plating layer to increase the cross-sectional area of ​​the first coil, and using the second additional plating layer to increase the cross-sectional area of ​​the second coil; using the first and second conductive pads to achieve the technical effect of electroplating the second additional plating layer on the isolated second coil, and at the same time, the first and second conductive pads are formed in the non-working area without the need to be removed, saving process steps; using a non-copper metal to form a first metal layer to protect the bottom surface of the first coil, so that the first coil will not be corroded when the exposed first seed layer and the first additional plating layer are subsequently etched to remove, thereby preventing the cross-section of the first coil from becoming thinner. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 A schematic diagram of the intermediate structure of a coil plate provided by the related art is shown;

[0038] Figure 2(a) to Figure 2(r) A schematic cross-sectional or front view diagram showing an intermediate structure of each step of a method for manufacturing a coil plate provided by an embodiment of the present disclosure;

[0039] Figure 3 A schematic structural diagram of a coil plate provided in an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0040] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0041] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connecting" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. When using terms such as "on", "above", "below" and "beside" to describe the positional relationship between two components, unless these terms are used together with the terms "closely" or "directly", one or more components can be located between the two components. When an element or layer is set "on" another element or layer, another layer or element can be directly inserted on the other element or between them. In the drawings, the thickness and shape of some layers and regions may be exaggerated for better understanding and ease of description. Even if not explicitly stated, components are interpreted as including a normal error range.

[0042] The existing related technologies do not indicate how to increase the cross-sectional area of ​​the coil to increase the coil thrust. At the same time, for the coil plating problem, such as Figure 1As shown, the related art discloses that a temporary electroplating lead ( Figure 1 The temporary electroplating lead is used as an electrical conduction path during electroplating, and the temporary electroplating lead is subsequently removed to avoid short circuit. The prior art solution increases the process complexity and design difficulty.

[0043] In view of this, an embodiment of the present disclosure provides a method for manufacturing a coil plate. Figure 2(a) to Figure 2(r) A schematic diagram of a cross section or front view of an intermediate structure of each step of a method for manufacturing a coil plate provided by an embodiment of the present disclosure is shown. Figure 2(a) to Figure 2(r) As shown, the manufacturing method comprises:

[0044] First, a carrier plate 100 is provided—step (a), as shown in FIG. 2( a ).

[0045] In some embodiments, the carrier board 100 further includes a support layer 101, a first seed layer 103, and a copper foil layer 102 located therebetween. Here, the copper foil layer 102 and the first seed layer 103 are physically combined and can be physically separated.

[0046] Optionally, the material of the support layer 101 includes but is not limited to resin, glass fiber, glass, silicon, and metal. The first seed layer 103 and the copper foil layer 102 are disposed on one or both sides of the support layer 101. It should be understood that the carrier board 100 may also include more strippable metal conductive layers, such as copper foil, which is not limited in the present disclosure.

[0047] Optionally, the copper foil layer 102 has a thickness of 16-20 μm, such as 18 μm. Optionally, the first seed layer 103 may be a copper foil with a thickness of 1.5-5 μm.

[0048] Next, as shown in FIG2( b ), a first metal layer 201 is formed on the first seed layer 103. The first metal layer 201 includes a non-copper metal. Here, the non-copper metal includes at least one of titanium (Ti), chromium (Cr), tungsten (W), zirconium (Zr), aluminum (Al), silver (Ag), and gold (Au).

[0049] Optionally, the first metal layer 201 may further include copper. It should be noted that the copper should be located on a side of the first metal layer 201 away from the carrier board 100 .

[0050] Optionally, the first metal layer 201 may be formed by sputtering or electroplating. For example, titanium is firstly sputtered on the first seed layer 103 and copper is then sputtered. For another example, titanium is firstly electroplated on the first seed layer 103 and copper is then electroplated.

[0051] It should be noted that the step of forming the first metal layer 201 may be omitted.

[0052] Then, a first coil 301 and a first conductive pad 302 are formed on the first metal layer 201—step (b), such as Figure 2(c) to Figure 2(g) shown.

[0053] It should be understood that if the step of forming the first metal layer 201 is omitted, the first coil 301 and the first conductive pad 302 are formed on the first seed layer 103 .

[0054] In some embodiments, step (b) specifically comprises:

[0055] (b1) A first photoresist layer 202 is formed on the first metal layer 201 and patterned, as shown in FIG. 2( c ) and FIG. 2( d ); here, the position of the first circuit layer is exposed by exposure and development, thereby achieving patterning.

[0056] It should be noted that if the step of forming the first metal layer 201 is omitted, the first photoresist layer 202 is formed on the first seed layer 103 and patterned, which is not described in detail in the present disclosure.

[0057] (b2) Electroplating forms a first circuit layer 203 in the pattern of the first photoresist layer 202, as shown in FIG2(e). Here, the first circuit layer 203 partially forms the first coil 301, and partially forms the first conductive pad 302. The material of the first circuit layer 203 can be copper.

[0058] (b3) Removing the first photoresist layer 202, as shown in FIG. 2(f).

[0059] (b4) Etching the first metal layer 201 not covered by the first circuit layer 203, as shown in FIG2(g) and FIG2(h). It should be understood that the first metal layer 201 can be etched using a solution that corrodes a specific metal, so the solution should correspond to the material of the first metal layer 201, and the present disclosure does not limit this. If the step of forming the first metal layer 201 is omitted, step (b4) can be omitted.

[0060] After step (b), it can be clearly seen from Fig. 2(h) that a first coil 301 and a first conductive pad 302 are formed on the first seed layer 103. It should be noted that the first conductive pad 302 is located in a non-product area, that is, a waste area.

[0061] In this way, there is no need to perform additional processing on the first conducting pad 302 after the final product is completed, which helps to reduce the process steps.

[0062] Next, the entire surface is electroplated to form a first additional plating layer 303 covering the first coil 301, the first conductive pad 302 and the first seed layer 103—step (c), as shown in Fig. 2(i). Here, the material of the first additional plating layer 303 can be copper.

[0063] Then, the dielectric layer 401 is pressed onto the first plated layer 303 and a first blind hole 402 and a second blind hole 403 are opened; wherein the first blind hole 402 exposes a portion of the first plated layer on the first coil 301; and the second blind hole 403 exposes a portion of the first plated layer on the first conductive pad 302 - step (d), refer to FIG. 2 (j).

[0064] Optionally, the material of the dielectric layer 401 may be a resin material, such as one selected from the group consisting of liquid crystal polymer, BT (bismaleimide triazine) resin, semi-cured prepreg, ABF (Ajinomoto Build-up Film) film, epoxy resin and polyimide resin, but the present disclosure is not limited to this.

[0065] The first blind hole 402 and the second blind hole 403 may be opened by laser drilling, laser drilling, etc., which is not limited in the present disclosure.

[0066] In some alternative embodiments, the dielectric layer 401 and the second seed layer are laminated on the first plating layer 303 , thereby saving the step of manufacturing the second seed layer.

[0067] Next, a second coil 501 and a second conductive pad 502 are formed on the dielectric layer 401—step (e), as shown in FIG. 2(j) and FIG. 2(k). Here, the second coil 501 is conductively connected to the first coil 301 through the first blind hole 402; the second conductive pad 502 is conductively connected to the first conductive pad 302 through the second blind hole 403.

[0068] It should be noted that the second conductive pad 502 is located in a non-product area, that is, a waste area. In this way, after the final product is completed, there is no need to perform additional processing on the second conductive pad 502, which helps to reduce the manufacturing process.

[0069] In some embodiments, step (e) comprises:

[0070] (e1) de-smear and electroless copper plating (PHT);

[0071] Here, the desmear treatment can remove organic residues remaining on the first blind hole 402 and the second blind hole 403, which helps to ensure that the second coil 501 is conductively connected to the first coil 301 through the first blind hole 402; the second conductive pad 502 is conductively connected to the first conductive pad 302 through the second blind hole 403 to avoid virtual connection.

[0072] Chemical copper plating can form a copper layer on the sidewalls and bottoms of the first blind hole 402 and the second blind hole 403 , which is convenient for subsequent electroplating.

[0073] (e2) forming a second photoresist layer on the dielectric layer 401 and patterning it;

[0074] (e3) forming a second coil 501 and a second conductive pad 502 by electroplating at the pattern hollowing-out portion of the second photoresist layer;

[0075] (e4) Removing the second photoresist layer.

[0076] (e5) Flash etching the second seed layer.

[0077] Here, steps (e2) to (e4) are similar to steps (b1) to (b3) and will not be described in detail.

[0078] Then, the second plated layer 503 is electroplated on the second coil 501 and the second conductive pad 502—step (f), as shown in FIG2(l). Here, the first coil 301 and the first conductive pad 302 are both formed on the surface of the first seed layer 103, so that the entire board can be electrically conductive. The second coil 501 conducts the first coil 301, the first seed layer 103, and the first conductive pad 302 through the first blind hole, and the second conductive pad 502 conducts the first conductive pad 302 and the second conductive pad 502 through the second blind hole to connect the external electrode to form an electrical circuit.

[0079] During electroplating, it is only necessary to connect the second conductive pad 502 to the external electrode to form an electrical circuit, thereby achieving the purpose of plating the isolated second coil 501. There is no need to pull the electroplating lead on the second coil 501, which helps to improve the complex plating process.

[0080] Next, a third photoresist layer 601 is formed on the dielectric layer 401 and the second additional coating layer 503, as shown in Fig. 2(m). The third photoresist layer 601 is used to protect the first coil 301 and the second coil 501 to prevent scratches and to avoid subsequent etching from corroding the first coil 301 and the second coil 501.

[0081] Then, the support layer 101 is removed—step (g), as shown in Fig. 2(n). Specifically, the support layer 101 can be easily removed by peeling off the copper foil layer 102 and the first seed layer 103.

[0082] Next, the first seed layer 103 and the first additional plating layer 303 located on the surface of the dielectric layer 401 away from the second coil 501 and the second conductive pad 502 are etched, as shown in FIG. 2( o ).

[0083] Here, etching the first additional plating layer 303 on the surface of the dielectric layer 401 can ensure that the first coil 301 is in a non-short-circuited state.

[0084] Since the material on the surface of the first metal layer 201 is different from copper, it is insoluble in the copper etching solution, which can protect the first coil 301 from being over-etched and ensure that the cross-sectional area of ​​the first coil 301 is not significantly reduced.

[0085] As shown in Fig. 2(p), the process further includes etching the first metal layer 201 on the first coil 301 and the first conductive pad 302. The first coil 301 and the first conductive pad 302 are made of copper, and the etching solution for etching the first metal layer 201 does not dissolve copper, which can effectively prevent the first coil 301 from being corroded.

[0086] It should be understood that if the step of forming the first metal layer 201 is omitted, it is difficult to ensure that the first coil 301 will not be corroded when etching the first seed layer 103 and the first additional coating 303, which is not conducive to maximizing the cross-sectional area of ​​the first coil 301. Even so, the manufacturing method provided in the embodiment of the present disclosure utilizes the first additional coating layer, which can still increase the cross-sectional area of ​​the first coil 301.

[0087] Then, the third photoresist layer is removed, as shown in FIG. 2( q ).

[0088] Finally, a solder resist layer 701 is formed on the dielectric layer 401 ; the solder resist layer 701 includes a solder resist opening 702 to expose at least a portion of the second plated layer 503 —step (i), as shown in FIG. 2( r ).

[0089] like Figure 3 As shown, the embodiment of the present disclosure also provides a coil plate. Figure 3 As shown, the coil plate includes: a dielectric layer 401, a first coil 301, a second coil 501, a first additional coating layer 303 and a second additional coating layer 503; wherein the first coil 301 is arranged in the dielectric layer 401, and the first additional coating layer 303 is located between the dielectric layer 401 and the first coil 301; the second coil 501 is arranged on the dielectric layer 401; the dielectric layer 401 includes a first blind hole 402, and the second coil 501 is conductively connected to the first coil 301 through the first blind hole 402; and the second additional coating layer 503 is arranged on the second coil 501. By respectively arranging the first additional coating layer 303 and the second additional coating layer 503 on the first coil 301 and the second coil 501, the effect of increasing the thrust of the coil plate is achieved.

[0090] In some embodiments, a solder resist layer 701 is further included; the solder resist layer 701 is disposed on the surface of the dielectric layer 401 ; the solder resist layer 701 includes a solder resist opening 702 to expose at least a portion of the second plated layer 503 .

[0091] In some embodiments, a first conductive pad 302 and a second conductive pad 502 are also included; wherein the first conductive pad 302 is arranged in the dielectric layer 401 parallel to the first coil 301; the dielectric layer 401 includes a second blind hole 403, and the second conductive pad 502 is arranged on the dielectric layer 401 parallel to the second coil 501 and is conductively connected to the first conductive pad 302 through the second blind hole 403.

[0092] By using the second conductive pad 502 , the second coil 501 can be easily plated to increase the cross-sectional area of ​​the second coil 501 .

[0093] In some embodiments, a first additional plating layer 303 is disposed between the dielectric layer 401 and the first conductive pad 302 ; and / or a second additional plating layer 503 is disposed on the second conductive pad 502 .

[0094] In some embodiments, the first conductive pad 302 and the second conductive pad 502 are located in a non-product area of ​​the coil plate. Placing the first conductive pad 302 and the second conductive pad 502 in the non-product area does not require additional processing, which helps reduce the manufacturing process.

[0095] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0096] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A coil plate, characterized in that: include: First coil; a first plating layer covering the first coil; a dielectric layer covering the first additional coating; a second coil on the dielectric layer; and a second additional plating layer covering the second coil; wherein the first additional plating layer is located between the dielectric layer and the first coil; the dielectric layer includes a first blind hole, and the second coil is conductively connected to the first coil through the first blind hole; wherein the coil plate also includes a first conductive pad arranged in parallel with the first coil and a second conductive pad arranged in parallel with the second coil; the dielectric layer includes a second blind hole, and the second conductive pad is conductively connected to the first conductive pad through the second blind hole.

2. The coil plate according to claim 1, characterized in that: It also includes a solder resist layer; the solder resist layer covers the second plated layer and the dielectric layer; the solder resist layer includes a solder resist opening to expose at least a portion of the second plated layer.

3. The coil plate according to claim 1, characterized in that: The first conductive pad is covered with the first additional plating layer; and / or The second conductive pad is covered with the second additional plating layer.

4. The coil plate according to claim 1, characterized in that: The first conductive pad and the second conductive pad are located in a non-product area of ​​the coil plate.

5. A method for manufacturing a coil plate, characterized in that: include: (a) preparing a carrier plate; (b) forming a first coil and a first conductive pad on the carrier plate; (c) electroplating the entire surface to form a first additional plating layer covering the first coil and the first conductive pad; (d) laminating a dielectric layer on the first additional plating layer and opening a first blind hole and a second blind hole; wherein the first blind hole exposes the first additional plating layer on the first coil; and the second blind hole exposes the first additional plating layer on the first conductive pad; (e) forming a second coil and a second conductive pad on the dielectric layer; wherein the second coil is conductively connected to the first coil through the first blind hole; and the second conductive pad is conductively connected to the first conductive pad through the second blind hole; (f) electroplating a second plated layer on the second coil and the second conductive pad; wherein the first conductive pad and the second conductive pad are located in a non-product area; (g) Removing the carrier plate.

6. The method according to claim 5, characterized in that: Also includes: (h) forming a solder resist layer on the dielectric layer; the solder resist layer comprising a solder resist opening to expose at least a portion of the second plated layer.

7. The manufacturing method according to claim 5, characterized in that: Step (b) specifically comprises: (b1) the carrier plate comprises a support layer and a first seed layer on the support layer, and a first photoresist layer is formed and patterned on the first seed layer; (b2) forming a first coil and a first conductive pad by electroplating in the pattern of the first photoresist layer; (b3) removing the first photoresist layer.

8. The method according to claim 7, characterized in that: The material of the first seed layer is copper; Step (b) further includes: forming a first metal layer on the first seed layer, and forming a first coil and a first conductive pad on the first metal layer; wherein the first metal layer includes a non-copper metal; Step (c) further includes: after etching the exposed first metal layer, electroplating the entire surface to form a first additional plating layer covering the first coil and the first conductive pad.

9. The manufacturing method according to claim 8, characterized in that: Step (g) further comprises: The first metal layer remaining on the first coil and the first conductive pad is etched.

10. The manufacturing method according to claim 8, characterized in that: The non-copper metal includes at least one of titanium, chromium, tungsten, zirconium, aluminum, silver and gold.

11. The manufacturing method according to claim 5, characterized in that: Step (e) comprises: (e1) electroless copper plating on the dielectric layer; (e2) forming a second photoresist layer on the dielectric layer and patterning the layer; (e3) forming a second coil and a second conductive pad by electroplating in the pattern of the second photoresist layer; (e4) removing the second photoresist layer.

12. The manufacturing method according to claim 7, characterized in that: The carrier board further comprises a copper foil layer; the copper foil layer is located between the support layer and the first seed layer; The copper foil layer is physically combined with the first seed layer; Step (g) includes: separating the copper foil layer and the first seed layer to remove the carrier board.