A galvanometer circuit with a low temperature coefficient

Abstract

The present invention provides a current detection circuit with a low temperature coefficient, which includes a current module, an adjustment module, and a comparison module. The adjustment module includes an adjustment unit, whose first output terminal is connected to a first resistor, and the second output terminal is grounded; a first switching transistor M1, whose input terminal is connected to the power supply voltage VDD, the output terminal is connected to the first input terminal of the adjustment unit and the comparison module, and the control terminal is connected to the current module; a second switching transistor M2, whose input terminal is connected to the power supply voltage VDD, the output terminal is connected to the second input terminal of the adjustment unit and the comparison module, and the control terminal is connected to the control terminal of the first switching transistor M1; wherein, the adjustment unit is configured to be able to adjust the voltage magnitude relationship between the output terminals of the first switching transistor M1 and the second switching transistor M2 according to the magnitude relationship between the measured current ID of the circuit under test and the threshold current ID0, and further adjust the level of the output voltage VO at the output terminal of the current detection circuit, and the sensitivity of the threshold current ID0 to temperature decreases as the temperature increases.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit detection, and in particular, to a current detection circuit with a low temperature coefficient. Background Art

[0002] Figure 1 The topological structure diagram of a power supply circuit in the prior art is shown. Refer to Figure 1 , the power supply circuit includes a power control chip U0 and a resistor RS. The resistor RS is used as a current detection resistor and is connected in series in the current detection branch to be detected. The power control chip U0 includes an operational amplifier A1 and a logic circuit. The operational amplifier A1 realizes the detection of the current I0 by detecting the voltage across the resistor R0. At the same time, the operational amplifier A1 outputs a corresponding control signal to the logic circuit according to the voltage across the resistor R0, so as to realize functions such as power control and current limiting.

[0003] However, whether it is the operational amplifier A1 or the logic circuit inside the power control chip U0, or the external resistor RS, they will all be affected by temperature. Figure 2 The schematic diagram of the threshold current of the measured current I0 changing with temperature in the prior art is shown. From Figure 2 it can be seen that the temperature coefficient of the threshold current in the prior art can reach several mA / K or even higher, thus greatly reducing the accuracy of the current detection circuit and the safety and reliability of the power control chip U0. Summary of the Invention

[0004] An embodiment of the present invention provides a current detection circuit with a low temperature coefficient, which can effectively reduce the influence of temperature on the current detection circuit, thereby improving the accuracy of the current detection circuit and the safety and reliability of the power control chip.

[0005] According to a first aspect of the present invention, there is provided a current detection circuit with a low temperature coefficient for detecting a current signal of a circuit to be detected. The circuit to be detected includes a first resistor R1. The current detection circuit includes a current module, an adjustment module, and a comparison module. The adjustment module includes:

[0006] An adjustment unit having a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first output terminal is connected to one end of the first resistor R1, the second output terminal is grounded, and the other end of the first resistor R1 is grounded;

[0007] A first switching transistor M1, whose input terminal is connected to a power supply voltage VDD, the output terminal is connected to the first input terminal of the adjustment unit and the comparison module, and the control terminal is connected to the current module;

[0008] A second switching transistor M2, whose input terminal is connected to the power supply voltage VDD, the output terminal is connected to the second input terminal of the adjustment unit and the comparison module, and the control terminal is connected to the control terminal of the first switching transistor M1;

[0009] Among them, the adjustment unit is configured to be able to adjust the voltage magnitude relationship between the output end of the first switching transistor M1 and the output end of the second switching transistor M2 according to the magnitude relationship between the measured current ID of the circuit to be measured and the threshold current ID0, and further adjust the level of the output voltage VO at the output end of the current detection circuit. The sensitivity of the threshold current ID0 to temperature decreases as the temperature increases.

[0010] In a possible implementation, the rate formula for the threshold current ID0 varying with temperature T is:

[0011] ;

[0012] Among them, P is a constant, a represents the temperature coefficient of the first resistor R1, and a>0, T0 represents room temperature, represents the rate of change of the threshold current with temperature.

[0013] In a possible implementation, the adjustment unit includes a second resistor R2 and a third resistor R3 connected in series, a third switching transistor M3 and a fourth resistor R4 connected in sequence, and a fourth switching transistor M4 and a fifth resistor R5 connected in sequence;

[0014] The control end of the third switching transistor M3 is connected to the control end of the fourth switching transistor M4 and is incorporated between the second resistor R2 and the third resistor R3. The end of the fourth resistor R4 far from the third switching transistor M3 serves as the first output end; the end of the fifth resistor R5 far from the fourth switching transistor M4 serves as the second output end;

[0015] The end of the second resistor R2 far from the third resistor R3 is connected to the input end of the third switching transistor M3 and serves as the first input end. The end of the third resistor R3 far from the second resistor R2 is connected to the input end of the fourth switching transistor M4 and serves as the second input end.

[0016] In a possible implementation, in the current module, the power supply voltage VDD is grounded through a fifth switching transistor M5 and a first triode Q1 in sequence; the power supply voltage VDD is also grounded through a sixth switching transistor M6, a sixth resistor R6 and a second triode Q2 in sequence;

[0017] The control end of the fifth switching transistor M5 is connected to the control end of the sixth switching transistor M6 and is incorporated into the control end of the first switching transistor M1. Both the first triode Q1 and the second triode Q2 are connected in diode configuration.

[0018] In a possible implementation, the power supply voltage VDD is also grounded through a seventh switching transistor M7, an eighth switching transistor M8 and a first current source B1 in sequence; the power supply voltage VDD is also grounded through a ninth switching transistor M9, a tenth switching transistor M10 and the first current source B1 in sequence;

[0019] The control terminals of the seventh switching transistor M7 and the ninth switching transistor M9 are connected and incorporated into the output terminal of the ninth switching transistor M9. The control terminal of the eighth switching transistor M8 is connected to a first node C1 between the fifth switching transistor M5 and the first triode Q1. The control terminal of the tenth switching transistor M10 is connected to a second node C2 between the sixth switching transistor M6 and the sixth resistor R6. A third node E between the seventh switching transistor M7 and the eighth switching transistor M8 is connected to the control terminal of the fifth switching transistor M5.

[0020] In a possible implementation, the fifth switching transistor M5, the sixth switching transistor M6, the first switching transistor M1, and the second switching transistor M2 form a current mirror structure of 1:1:M:M;

[0021] The number ratio of the first triode Q1 and the second triode Q2 is 1:N;

[0022] The seventh switching transistor M7 and the ninth switching transistor M9 form a current mirror structure of 1:1.

[0023] In a possible implementation, in the rate formula of the threshold current ID0 varying with temperature T, the formula of the constant P is:

[0024] ;

[0025] Wherein, represents the resistance value of the first resistor R1 at room temperature, represents the thermal voltage values of the first triode Q1 and the second triode Q2 at room temperature.

[0026] In a possible implementation, the comparison module includes a comparison unit and an output unit;

[0027] In the comparison unit, the power supply voltage VDD is grounded through a second current source B2, an eleventh switching transistor M11, and a seventh resistor R7 in sequence, and the power supply voltage VDD is also grounded through a second current source B2, a twelfth switching transistor M12, and an eighth resistor R8 in sequence. The control terminal of the eleventh switching transistor M11 is connected to the output terminal of the second switching transistor M2. The control terminal of the twelfth switching transistor M12 is connected to the output terminal of the first switching transistor M1;

[0028] A fourth node F1 between the eleventh switching transistor M11 and the seventh resistor R7 and a fifth node F2 between the twelfth switching transistor M12 and the eighth resistor R8 are both connected to the output unit. The output unit is configured to adjust the level of the output voltage VO in the output unit according to the magnitude relationship between the fourth node F1 and the fifth node F2.

[0029] In a possible implementation, in the output unit, the power supply voltage VDD is grounded through a third current source B3, a thirteenth switching transistor M13, and a fourteenth switching transistor M14 in sequence; the power supply voltage VDD is also grounded through the third current source B3, a fifteenth switching transistor M15, and a sixteenth switching transistor M16 in sequence; the control terminal of the thirteenth switching transistor M13 is connected to the fourth node F1, and the control terminal of the fifteenth switching transistor M15 is connected to the fifth node F2; the control terminal of the fourteenth switching transistor M14 is connected to the input terminal of the fourteenth switching transistor M14, and the control terminal of the sixteenth switching transistor M16 is connected to the input terminal of the sixteenth switching transistor M16;

[0030] The power supply voltage VDD is also grounded through a seventeenth switching transistor M17 and an eighteenth switching transistor M18 in sequence; the power supply voltage VDD is also grounded through a nineteenth switching transistor M19 and a twentieth switching transistor M20 in sequence; the control terminal of the seventeenth switching transistor M17 is connected to the control terminal of the nineteenth switching transistor M19 and is incorporated into the output terminal of the seventeenth switching transistor M17; the control terminal of the eighteenth switching transistor M18 is connected to the control terminal of the fourteenth switching transistor M14, and the control terminal of the twentieth switching transistor M20 is connected to the control terminal of the sixteenth switching transistor M16;

[0031] The output terminal of the current detection circuit is located between the nineteenth switching transistor M19 and the twentieth switching transistor M20.

[0032] In a possible implementation, the fourteenth switching transistor M14 and the eighteenth switching transistor M18 form a 1:1 current mirror structure;

[0033] The sixteenth switching transistor M16 and the twentieth switching transistor M20 form a 1:1 current mirror structure;

[0034] The seventeenth switching transistor M17 and the nineteenth switching transistor M19 form a 1:1 current mirror structure.

[0035] In a possible implementation, when the current ID to be measured is less than the threshold current ID0, the output voltage VO is a first level signal;

[0036] When the current ID to be measured is greater than the threshold current ID0, the output voltage VO is a second level signal;

[0037] The first level corresponding to the first level signal is lower than the second level corresponding to the second level signal.

[0038] In a second aspect, the present invention further provides a power supply circuit, including a circuit under test, a logic circuit, and the current detection circuit as described above;

[0039] In the circuit under test, the input power supply VIN is grounded through a first power switch transistor Mp1, a second power switch transistor Mp2, and a first resistor R1 in sequence; the control terminals of the first power switch transistor Mp1 and the second power switch transistor Mp2 are both connected to the logic circuit;

[0040] The circuit under test further includes a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is connected between the first power switch transistor Mp1 and the second power switch transistor Mp2, and the other end is connected to the output terminal VOUT of the power supply circuit; one end of the first capacitor C1 is connected to the output terminal VOUT of the power supply circuit, and the other end is grounded;

[0041] The current detection circuit is connected to the logic circuit and is used for outputting a voltage signal to the logic circuit;

[0042] The current detection circuit is connected to a sixth node A between the first resistor R1 and the second power switch transistor Mp2, and the current detection circuit is grounded.

[0043] In a possible implementation manner, when the first power switch transistor Mp1 is turned on and the second power switch transistor Mp2 is turned off, the output voltage VO is a first-level signal.

[0044] In a possible implementation manner, when the first power switch transistor Mp1 is turned off and the second power switch transistor Mp2 is turned on, according to the magnitude relationship between the current ID under test in the circuit under test and the threshold current ID0, the magnitude relationship of the voltage between the output terminal of the first switch transistor M1 and the output terminal of the second switch transistor M2 is adjusted, and further the level of the output voltage VO of the current detection circuit is adjusted.

[0045] According to the solution of the present invention, when the first power switch transistor Mp1 is turned on and the second power switch transistor Mp2 is turned off, no current flows through the second power switch transistor Mp2, and at this time, there is no current ID under test. When the first power switch transistor Mp1 is turned off and the second power switch transistor Mp2 is turned on, there is a freewheeling current flowing from PGND to the first inductor L1, and this freewheeling current is the current ID under test. At this time, the adjustment unit adjusts the magnitude of the voltage between the output terminal of the first switch transistor M1 and the output terminal of the second switch transistor M2 according to the magnitude relationship between the current ID under test and the threshold current ID0, and further adjusts the level of the output voltage VO. Since the sensitivity of the threshold current ID0 to temperature decreases as the temperature increases, and the operating temperature of the power supply circuit is relatively high in most operating conditions, the threshold current ID0 can remain stable when the temperature changes. Therefore, the current detection circuit can still maintain high detection accuracy and stability when the temperature changes, effectively reducing the influence of temperature on the current detection performance.

[0046] Furthermore, the present invention adopts a positive temperature coefficient resistor outside the power control chip and collaboratively designs it with the internal circuit of the power control chip, enabling basic functions such as current detection to be achieved while the threshold current of the current detection circuit also has a low temperature coefficient, thereby effectively reducing the impact of temperature changes on the detection accuracy. Meanwhile, the present invention adopts optimized designs such as current mirrors, resistor networks, and multi-stage switch tube controls to improve the stability and sensitivity of current detection.

[0047] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and be able to implement it in accordance with the content of the specification, the following details the preferred embodiments of the present invention as follows. Brief Description of the Drawings

[0048] Figure 1 Shows the power circuit topology diagram in the prior art;

[0049] Figure 2 Shows the schematic diagram of the threshold value of the current I0 to be measured changing with temperature in the prior art;

[0050] Figure 3 Shows the power circuit topology diagram of an embodiment of the present invention;

[0051] Figure 4 Shows the topology diagram of the current detection circuit with a low temperature coefficient in an embodiment of the present invention;

[0052] Figure 5 Shows the topology diagram of the current detection circuit with a low temperature coefficient in another embodiment of the present invention;

[0053] Figure 6 Shows the schematic diagram of the threshold current of the current detection circuit with a low temperature coefficient in an embodiment of the present invention changing with temperature;

[0054] Figure 7 Shows the schematic diagram of the change rate of the threshold current of the current detection circuit with a low temperature coefficient in an embodiment of the present invention changing with temperature. Detailed Description of the Embodiments

[0055] To make the above objects, features, and advantages of the present application more obvious and understandable, the following detailed description of the specific embodiments of the present application is made in conjunction with the drawings. It can be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Additionally, it should be noted that for the sake of convenience of description, only parts related to the present application rather than all structures are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0056] Reference to "embodiments" in this document means that the specific features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0057] Figure 3 The topological structure diagram of the power supply circuit according to an embodiment of the present invention is shown. As Figure 3 shown, the power supply circuit includes a circuit under test and a power control chip U1. The power control chip U1 includes a logic circuit and a current detection circuit. In the circuit under test, the input power supply VIN is grounded through a first power switch tube Mp1, a second power switch tube Mp2, and a first resistor R1 in sequence. The control terminals of the first power switch tube Mp1 and the second power switch tube Mp2 are both connected to the logic circuit. The circuit under test further includes a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is connected between the first power switch tube Mp1 and the second power switch tube Mp2, and the other end is connected to the output terminal VOUT of the power supply circuit. One end of the first capacitor C1 is connected to the output terminal VOUT of the power supply circuit, and the other end is grounded. The current detection circuit is connected to the logic circuit and is used to output a voltage signal to the logic circuit. The current detection circuit is further connected to a sixth node A between the first resistor R1 and the second power switch tube Mp2, and the current detection circuit is grounded. In one embodiment, the first resistor R1 is a metal resistor with a positive temperature coefficient.

[0058] In this embodiment, the working principle of the power supply circuit is as follows: when the first power switch tube Mp1 is turned on and the second power switch tube Mp2 is turned off, the power current flows through the first power switch tube Mp1 and into the first inductor L1. At this time, the second power switch tube Mp2 is in the off state and no current flows through it. When the first power switch tube Mp1 is turned off and the second power switch tube Mp2 is turned on, no current flows through the first power switch tube Mp1, and a freewheeling current flowing from PGND to the first inductor L1 flows through the second power switch tube Mp2 and the first resistor R1. At this time, the power current is positively correlated with the freewheeling current, that is, the larger the power current, the larger the freewheeling current. Therefore, detecting the freewheeling current is equivalent to detecting the power current. That is to say, by detecting the voltage across the first resistor R1 through the current detection circuit, the current detection of the power supply circuit can be achieved.

[0059] According to the solution of the embodiment of the present invention, the terminal voltage of the first resistor R1 is detected by the current detection circuit to realize the detection of the current flowing through the second power switch Mp2. At the same time, the current detection circuit outputs a corresponding control signal to the logic circuit according to the terminal voltage of the first resistor R1, and the logic circuit controls the on / off of the first power switch Mp1 and the second power switch Mp2 according to the control signal, so as to realize functions such as power control and current limiting.

[0060] In one embodiment, the second power switch Mp2 can be replaced by a diode. One end of the diode is connected to the output end of the first power switch Mp1, and the other end is grounded through the first resistor R1. At this time, the diode is not connected to the logic circuit and conducts and turns off by itself according to the working state of the circuit.

[0061] Figure 4 The topological structure diagram of the current detection circuit with a low temperature coefficient according to an embodiment of the present invention is shown. As Figure 4 shown, the current detection circuit is used to detect the current signal of the circuit under test, and the circuit under test includes a first resistor R1. It can be understood that in Figure 3 the embodiment shown, the current signal of the circuit under test is the current signal flowing through the second power switch Mp2, and the current signal can be obtained by detecting the terminal voltage of the first resistor R1.

[0062] The current detection circuit includes a current module, an adjustment module and a comparison module, and the output end of the current detection circuit is arranged in the comparison module. The adjustment module includes an adjustment unit, a first switch M1 and a second switch M2. The adjustment unit has a first input end, a second input end, a first output end and a second output end. The first output end is connected to one end of the first resistor R1, the second output end is grounded, and the other end of the first resistor R1 is grounded. The input end of the first switch M1 is connected to the power supply voltage VDD, the output end is connected to the first input end of the adjustment unit and the comparison module, and the control end is connected to the current module. The input end of the second switch M2 is connected to the power supply voltage VDD, the output end is connected to the second input end of the adjustment unit and the comparison module, and the control end is connected to the control end of the first switch M1. Among them, the adjustment unit is configured to adjust the voltage magnitude relationship between the output end of the first switch M1 and the output end of the second switch M2 according to the magnitude relationship between the current ID to be measured of the circuit under test and the threshold current ID0, and further adjust the level of the output voltage VO at the output end of the current detection circuit. The sensitivity of the threshold current ID0 to temperature decreases as the temperature increases.

[0063] As can be seen from the working principle of the above power supply circuit, when the first power switch tube Mp1 is turned on and the second power switch tube Mp2 is turned off, no current flows through the second power switch tube Mp2, and there is no current ID to be measured at this time. When the first power switch tube Mp1 is turned off and the second power switch tube Mp2 is turned on, there is a freewheeling current flowing from PGND to the first inductor L1, and this freewheeling current is the current ID to be measured. At this time, the adjustment unit adjusts the voltage between the output terminals of the first switch tube M1 and the second switch tube M2 according to the magnitude relationship between the current ID to be measured and the threshold current ID0, and then adjusts the level of the output voltage VO. Since the sensitivity of the threshold current ID0 to temperature decreases with the increase of temperature, and the working temperature of the power supply circuit is relatively high in most working conditions, the threshold current ID0 can remain stable when the temperature changes. As a result, the current detection circuit can still maintain high detection accuracy and stability when the temperature changes, effectively reducing the influence of temperature on the current detection performance.

[0064] In some embodiments, the rate formula for the threshold current ID0 changing with temperature T is:

[0065] ;

[0066] where P is a constant, a represents the temperature coefficient of the first resistor R1, and a > 0, T0 represents room temperature, represents the rate of change of the threshold current with temperature. In one embodiment, P is a constant determined through calibration.

[0067] It can be seen from this formula that since P, T0, and a are all constants, is inversely proportional to the square of the temperature T, that is, as the temperature increases, the sensitivity of the threshold current ID0 to temperature gradually decreases. In most working conditions, the working temperature of the power supply circuit is relatively high. Therefore, the threshold current ID0 of the current detection circuit in the embodiments of the present invention has a low temperature coefficient, which can effectively reduce the influence of temperature on the current detection circuit, thereby improving the accuracy of the current detection circuit and the safety and reliability of the power control chip.

[0068] Figure 5 shows the topology structure diagram of a current detection circuit with a low temperature coefficient according to another embodiment of the present invention. As Figure 5As shown, the adjustment unit includes a second resistor R2 and a third resistor R3 connected in series, a third switching transistor M3 and a fourth resistor R4 connected in sequence, and a fourth switching transistor M4 and a fifth resistor R5 connected in sequence. The control terminal of the third switching transistor M3 is connected to the control terminal of the fourth switching transistor M4 and is incorporated between the second resistor R2 and the third resistor R3. One end of the fourth resistor R4 away from the third switching transistor M3 serves as the first output terminal. One end of the fifth resistor R5 away from the fourth switching transistor M4 serves as the second output terminal. One end of the second resistor R2 away from the third resistor R3 is connected to the input terminal of the third switching transistor M3 and serves as the first input terminal. One end of the third resistor R3 away from the second resistor R2 is connected to the input terminal of the fourth switching transistor M4 and serves as the second input terminal.

[0069] In one embodiment, the resistance value of the fourth resistor R4 is greater than the resistance value of the fifth resistor R5.

[0070] In this embodiment, the working principle of the adjustment module includes two parts: when the first power switching transistor Mp1 of the power supply circuit is turned on and the second power switching transistor Mp2 is turned off, and when the first power switching transistor Mp1 of the power supply circuit is turned off and the second power switching transistor Mp2 is turned on.

[0071] When the first power switch transistor Mp1 of the power supply circuit is turned on and the second power switch transistor Mp2 is turned off, the working principle of the adjustment module is as follows: At this time, no current flows through the first resistor R1, and the voltage of the sixth node A is PGND. The control terminal voltages of the third switch transistor M3 and the fourth switch transistor M4 are pulled up through the second resistor R2 and the third resistor R3 respectively, while the output terminal voltages of the third switch transistor M3 and the fourth switch transistor M4 are pulled down through the fourth resistor R4 and the fifth resistor R5 respectively. Therefore, the third switch transistor M3 and the fourth switch transistor M4 are turned on. At this time, if the current flowing through the third switch transistor M3 is equal to the current flowing through the fourth switch transistor M4, and since the resistance value of the fourth resistor R4 is greater than the resistance value of the fifth resistor R5, the output terminal voltage Vs3 of the third switch transistor M3 should be greater than the output terminal voltage Vs4 of the fourth switch transistor M4. Then, the voltage difference Vgs3 between the control terminal and the output terminal of the third switch transistor M3 should be less than the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switch transistor M4. Then, the current flowing through the third switch transistor M3 should be less than the current flowing through the fourth switch transistor M4, which is self-contradictory. If the current flowing through the third switch transistor M3 is greater than the current flowing through the fourth switch transistor M4, since the resistance value of the fourth resistor R4 is greater than the resistance value of the fifth resistor R5, the output terminal voltage Vs3 of the third switch transistor M3 should be greater than the output terminal voltage Vs4 of the fourth switch transistor M4. Then, the voltage difference Vgs3 between the control terminal and the output terminal of the third switch transistor M3 should be less than the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switch transistor M4. Then, the current flowing through the third switch transistor M3 should also be less than the current flowing through the fourth switch transistor M4, which is self-contradictory. Therefore, at this time, the current flowing through the third switch transistor M3 must be less than the current flowing through the fourth switch transistor M4, and the output terminal voltage Vs3 of the third switch transistor M3 must be greater than the output terminal voltage Vs4 of the fourth switch transistor M4, so that the voltage difference Vgs3 between the control terminal and the output terminal of the third switch transistor M3 is less than the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switch transistor M4, and then the current flowing through the third switch transistor M3 is less than the current flowing through the fourth switch transistor M4, which is consistent.

[0072] When the circuit is stable, the current module makes the current I1 flowing through the first switch transistor M1 equal to the current I2 flowing through the second switch transistor M2. Therefore, currents flowing from the input terminal of the third switch transistor M3 to the input terminal of the fourth switch transistor M4 are generated in the second resistor R2 and the third resistor R3, so that the output terminal voltage of the first switch transistor M1 is greater than the output terminal voltage of the second switch transistor M2.

[0073] When the first power switch transistor Mp1 of the power supply circuit is turned off and the second power switch transistor Mp2 is turned on, the working principle of the adjustment module is as follows: At this time, the measured current ID flowing from PGND to the sixth node A flows through the first resistor R1, and the voltage of the sixth node A is , and the voltage at the output terminal of the third switching transistor M3 is positively correlated with the voltage at the sixth node A. From the analysis of the operating principle of the adjustment module when the first power switching transistor Mp1 of the above power supply circuit is turned on and the second power switching transistor Mp2 is turned off, when the voltage at the sixth node A is PGND, the voltage at the output terminal of the first switching transistor M1 is greater than the voltage at the output terminal of the second switching transistor M2. If it is assumed that the current to be measured ID is ∞, then the voltage at the sixth node A is -∞, and the voltage at the output terminal of the third switching transistor M3 is also -∞. At this time, the voltage difference Vgs3 between the control terminal and the output terminal of the third switching transistor M3 is greater than the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switching transistor M4. Then the current flowing through the third switching transistor M3 is greater than the current flowing through the fourth switching transistor M4. Also, since the current I1 flowing through the first switching transistor M1 is equal to the current I2 flowing through the second switching transistor M2, therefore, a current flowing from the input terminal of the fourth switching transistor M4 to the input terminal of the third switching transistor M3 is generated in the second resistor R2 and the third resistor R3, thereby making the voltage at the output terminal of the first switching transistor M1 less than the voltage at the output terminal of the second switching transistor M2.

[0074] From this, it can be seen that as the current ID to be measured increases, the voltage Vs3 at the output terminal of the third switching transistor M3 will gradually decrease. Then the voltage at the output terminal of the first switching transistor M1 will gradually change from being greater than the voltage at the output terminal of the second switching transistor M2 to being less than the voltage at the output terminal of the second switching transistor M2. Therefore, when the current ID to be measured in the present invention reaches the threshold current ID0, the voltage at the output terminal of the first switching transistor M1 is equal to the voltage at the output terminal of the second switching transistor M2. Then the current flowing through the third switching transistor M3, the current I1 flowing through the first switching transistor M1, the current I2 flowing through the second switching transistor M2, and the current flowing through the fourth switching transistor M4 are all equal. The voltage Vs3 at the output terminal of the third switching transistor M3 is equal to the voltage Vs4 at the output terminal of the fourth switching transistor M4. Therefore, the voltage difference Vgs3 between the control terminal and the output terminal of the third switching transistor M3 is equal to the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switching transistor M4. From this, it can be seen that the voltage Vs3 at the output terminal of the third switching transistor M3 is equal to the sum of the voltage of the fourth resistor R4 and the voltage at the sixth node A. At the same time, the voltage Vs3 at the output terminal of the third switching transistor M3 is also equal to the voltage Vs4 at the output terminal of the fourth switching transistor M4, which is the voltage of the fifth resistor R5, that is , thus obtaining the threshold current .

[0075] From the above analysis, it can be seen that when the current ID to be measured is less than the threshold current ID0, that is When the output terminal voltage Vs3 of the third switching transistor M3 is greater than the output terminal voltage Vs4 of the fourth switching transistor M4, the voltage difference Vgs3 between the control terminal and the output terminal of the third switching transistor M3 is less than the voltage difference Vgs4 between the control terminal and the output terminal of the fourth switching transistor M4, a current flowing from the output terminal of the third switching transistor M3 to the output terminal of the fourth switching transistor M4 is generated in the second resistor R2 and the third resistor R3, and the voltage at the output terminal of the first switching transistor M1 is greater than the voltage at the output terminal of the second switching transistor M2.

[0076] When the measured current ID is greater than the threshold current ID0, that is When the output terminal voltage of the third switching transistor M3 is less than the output terminal voltage of the fourth switching transistor M4, the voltage difference Vgs3 between the control terminal and its output terminal of the third switching transistor M3 is greater than the voltage difference Vgs4 between the control terminal and its output terminal of the fourth switching transistor M4, a current flowing from the input terminal of the fourth switching transistor M4 to the input terminal of the third switching transistor M3 is generated in the second resistor R2 and the third resistor R3, and the voltage at the output terminal of the first switching transistor M1 is less than the voltage at the output terminal of the second switching transistor M2.

[0077] In summary, when the first power switching transistor Mp1 of the power supply circuit is turned off and the second power switching transistor Mp2 is turned on, the regulating unit can make the voltage at the output terminal of the first switching transistor M1 greater than the voltage at the output terminal of the second switching transistor M2 when ID < ID0, and make the voltage at the output terminal of the first switching transistor M1 less than the voltage at the output terminal of the second switching transistor M2 when ID > ID0. Also, when the first power switching transistor Mp1 of the power supply circuit is turned on and the second power switching transistor Mp2 is turned off, that is, when there is no measured current ID, the voltage at the output terminal of the first switching transistor M1 is greater than the voltage at the output terminal of the second switching transistor M2.

[0078] In some embodiments, the comparison module includes a comparison unit and an output unit. The comparison unit includes a second current source B2, an eleventh switching transistor M11, a twelfth switching transistor M12, a seventh resistor R7, and an eighth resistor R8. The resistance value of the seventh resistor R7 is equal to the resistance value of the eighth resistor R8. In the comparison unit, the power supply voltage VDD is grounded through the second current source B2, the eleventh switching transistor M11, and the seventh resistor R7 in sequence, and the power supply voltage VDD is also grounded through the second current source B2, the twelfth switching transistor M12, and the eighth resistor R8 in sequence. The control terminal of the eleventh switching transistor M11 is connected to the output terminal of the second switching transistor M2, and the control terminal of the twelfth switching transistor M12 is connected to the output terminal of the first switching transistor M1. The fourth node F1 between the eleventh switching transistor M11 and the seventh resistor R7 and the fifth node F2 between the twelfth switching transistor M12 and the eighth resistor R8 are both connected to the output unit. The output unit is configured to adjust the level of the output voltage VO in the output unit according to the magnitude relationship between the fourth node F1 and the fifth node F2.

[0079] In some embodiments, the output unit includes a third current source B3, a thirteenth switching transistor M13, a fourteenth switching transistor M14, a fifteenth switching transistor M15, a sixteenth switching transistor M16, a seventeenth switching transistor M17, an eighteenth switching transistor M18, a nineteenth switching transistor M19, and a twentieth switching transistor M20. In this output unit, the power supply voltage VDD is grounded successively through the third current source B3, the thirteenth switching transistor M13, and the fourteenth switching transistor M14. The power supply voltage VDD is also grounded successively through the third current source B3, the fifteenth switching transistor M15, and the sixteenth switching transistor M16. The control terminal of the thirteenth switching transistor M13 is connected to the fourth node F1. The control terminal of the fifteenth switching transistor M15 is connected to the fifth node F2. The control terminal of the fourteenth switching transistor M14 is connected to the input terminal of the fourteenth switching transistor M14. The control terminal of the sixteenth switching transistor M16 is connected to the input terminal of the sixteenth switching transistor M16. The power supply voltage VDD is also grounded successively through the seventeenth switching transistor M17 and the eighteenth switching transistor M18. The power supply voltage VDD is also grounded successively through the nineteenth switching transistor M19 and the twentieth switching transistor M20. The control terminal of the seventeenth switching transistor M17 is connected to the control terminal of the nineteenth switching transistor M19 and is incorporated into the output terminal of the seventeenth switching transistor M17. The control terminal of the eighteenth switching transistor M18 is connected to the control terminal of the fourteenth switching transistor M14. The control terminal of the twentieth switching transistor M20 is connected to the control terminal of the sixteenth switching transistor M16. The output terminal of the current detection circuit is located between the nineteenth switching transistor M19 and the twentieth switching transistor M20.

[0080] In some embodiments, the fourteenth switching transistor M14 and the eighteenth switching transistor M18 form a 1:1 current mirror structure. The sixteenth switching transistor M16 and the twentieth switching transistor M20 form a 1:1 current mirror structure. The seventeenth switching transistor M17 and the nineteenth switching transistor M19 form a 1:1 current mirror structure.

[0081] In some embodiments, when the current to be measured ID is less than the threshold current ID0, the output voltage VO is a first level signal. When the current to be measured ID is greater than the threshold current ID0, the output voltage VO is a second level signal. The first level corresponding to the first level signal is lower than the second level corresponding to the second level signal.

[0082] Taking Figure 5 the circuit structure of the comparison module as an example, the working principle of the comparison module in the embodiments of the present invention is described below. The working principle of this comparison module includes two parts: when the current to be measured ID is less than the threshold current ID0 and when the current to be measured ID is greater than the threshold current ID0.

[0083] When the current ID to be measured is less than the threshold current ID0, from the above analysis, it can be seen that at this time, the voltage at the output end of the first switching transistor M1 is greater than the voltage at the output end of the second switching transistor M2. The working principle of the comparison module is as follows: At this time, the voltage at the control end of the eleventh switching transistor M11 is less than the voltage at the control end of the twelfth switching transistor M12. Also, since the input voltages of the eleventh switching transistor M11 and the twelfth switching transistor M12 are both pulled up to the power supply voltage VDD through the second current source B2, therefore, the voltage difference between the control end and the input end of the eleventh switching transistor M11 is greater than the voltage difference between the control end and the input end of the twelfth switching transistor M12. Then, the current flowing through the eleventh switching transistor M11 is greater than the current flowing through the twelfth switching transistor M12. And since the resistance values of the seventh resistor R7 and the eighth resistor R8 are equal, the voltage at the fourth node F1 is greater than the voltage at the fifth node F2. Then, the voltage at the control end of the thirteenth switching transistor M13 is greater than the voltage at the control end of the fifteenth switching transistor M15. At this time, the input voltages of the thirteenth switching transistor M13 and the fifteenth switching transistor M15 are both pulled up to the power supply voltage VDD through the third current source B3. Therefore, the voltage difference between the control end and the input end of the fifteenth switching transistor M15 is greater than the voltage difference between the control end and the input end of the thirteenth switching transistor M13. Then, the current flowing through the fifteenth switching transistor M15 is greater than the current flowing through the thirteenth switching transistor M13. Also, since the fourteenth switching transistor M14 and the eighteenth switching transistor M18 form a 1:1 current mirror structure, the sixteenth switching transistor M16 and the twentieth switching transistor M20 form a 1:1 current mirror structure, and the seventeenth switching transistor M17 and the nineteenth switching transistor M19 form a 1:1 current mirror structure. Therefore, the current flowing through the thirteenth switching transistor M13 is equal to the current flowing through the nineteenth switching transistor M19, and the current flowing through the fifteenth switching transistor M15 is equal to the current flowing through the twentieth switching transistor M20. Then, the current flowing through the twentieth switching transistor M20 is greater than the current flowing through the nineteenth switching transistor M19. The output voltage VO of this comparison module is a first-level signal, that is, a low-level signal.

[0084] When the current ID to be measured is greater than the threshold current ID0, from the above analysis, it can be known that at this time, the voltage at the output end of the first switching transistor M1 is less than the voltage at the output end of the second switching transistor M2. The working principle of the comparison module is as follows: At this time, the voltage at the control end of the eleventh switching transistor M11 is greater than the voltage at the control end of the twelfth switching transistor M12. Also, since the input voltages of the eleventh switching transistor M11 and the twelfth switching transistor M12 are both pulled up to the power supply voltage VDD through the second current source B2, therefore, the voltage difference between the control end and the input end of the eleventh switching transistor M11 is less than the voltage difference between the control end and the input end of the twelfth switching transistor M12. Then, the current flowing through the eleventh switching transistor M11 is less than the current flowing through the twelfth switching transistor M12. Also, since the resistance values of the seventh resistor R7 and the eighth resistor R8 are equal, the voltage at the fourth node F1 is less than the voltage at the fifth node F2. Then, the voltage at the control end of the thirteenth switching transistor M13 is less than the voltage at the control end of the fifteenth switching transistor M15. At this time, the input voltages of the thirteenth switching transistor M13 and the fifteenth switching transistor M15 are both pulled up to the power supply voltage VDD through the third current source B3. Therefore, the voltage difference between the control end and the input end of the fifteenth switching transistor M15 is less than the voltage difference between the control end and the input end of the thirteenth switching transistor M13. Then, the current flowing through the fifteenth switching transistor M15 is less than the current flowing through the thirteenth switching transistor M13. Also, since the fourteenth switching transistor M14 and the eighteenth switching transistor M18 form a 1:1 current mirror structure, the sixteenth switching transistor M16 and the twentieth switching transistor M20 form a 1:1 current mirror structure, and the seventeenth switching transistor M17 and the nineteenth switching transistor M19 form a 1:1 current mirror structure. Therefore, the current flowing through the thirteenth switching transistor M13 is equal to the current flowing through the nineteenth switching transistor M19, and the current flowing through the fifteenth switching transistor M15 is equal to the current flowing through the twentieth switching transistor M20. Then, the current flowing through the twentieth switching transistor M20 is less than the current flowing through the nineteenth switching transistor M19. The output voltage VO of this comparison module is a second-level signal, that is, a high-level signal.

[0085] From the above analysis, it can be known that when the second power switching transistor Mp2 is turned off, that is, no current flows through, the output voltage VO of the current detection circuit is at a low level. When the second power switching transistor Mp2 is turned on, that is, current flows through, and the current to be measured , that is, when the current ID to be measured does not reach the threshold current ID0, the output voltage VO of the current detection circuit is at a low level. When the current to be measured , that is, when the current ID to be measured reaches the threshold current ID0, the output voltage VO of the current detection circuit is at a high level.

[0086] In some embodiments, the current module includes a fifth switching transistor M5, a sixth switching transistor M6, a first triode Q1, a second triode Q2, and a sixth resistor R6. In this current module, the power supply voltage VDD is grounded successively through the fifth switching transistor M5 and the first triode Q1, and the power supply voltage VDD is also grounded successively through the sixth switching transistor M6, the sixth resistor R6, and the second triode Q2. The control terminal of the fifth switching transistor M5 is connected to the control terminal of the sixth switching transistor M6 and is incorporated into the control terminal of the first switching transistor M1. Both the first triode Q1 and the second triode Q2 are connected in a diode configuration.

[0087] In some embodiments, the current module further includes a seventh switching transistor M7, an eighth switching transistor M8, a ninth switching transistor M9, a tenth switching transistor M10, and a first current source B1. In this current module, the power supply voltage VDD is grounded successively through the seventh switching transistor M7, the eighth switching transistor M8, and the first current source B1. The power supply voltage VDD is also grounded successively through the ninth switching transistor M9, the tenth switching transistor M10, and the first current source B1. The control terminal of the seventh switching transistor M7 is connected to the control terminal of the ninth switching transistor M9 and is incorporated into the output terminal of the ninth switching transistor M9. The control terminal of the eighth switching transistor M8 is connected to a first node C1 between the fifth switching transistor M5 and the first triode Q1. The control terminal of the tenth switching transistor M10 is connected to a second node C2 between the sixth switching transistor M6 and the sixth resistor R6. A third node E between the seventh switching transistor M7 and the eighth switching transistor M8 is connected to the control terminal of the fifth switching transistor M5.

[0088] In some embodiments, the fifth switching transistor M5, the sixth switching transistor M6, the first switching transistor M1, and the second switching transistor M2 form a current mirror structure with a ratio of 1:1:M:M. The number ratio of the first triode Q1 to the second triode Q2 is 1:N. The seventh switching transistor M7 and the ninth switching transistor M9 form a current mirror structure with a ratio of 1:1.

[0089] Taking Figure 5 the circuit structure of the current module as an example, the working principle of the current module according to the embodiments of the present invention will be described below.

[0090] After the circuit of the current module is powered on, the fifth switch tube M5, the sixth switch tube M6, the seventh switch tube M7, the eighth switch tube M8, the ninth switch tube M9, the tenth switch tube M10, etc. all complete conduction startup. Since the fifth switch tube M5, the sixth switch tube M6, the first switch tube M1, and the second switch tube M2 form a current mirror structure of 1:1:M:M, the current flowing through the fifth switch tube M5 is equal to the current flowing through the sixth switch tube M6, that is, the current I3 flowing through the first triode Q1 is equal to the current I4 flowing through the second triode Q2. Also, since the number ratio of the first triode Q1 to the second triode Q2 is 1:N, the voltage difference between the base and the emitter of the first triode Q1 must be greater than the voltage difference between the base and the emitter of the second triode Q2. Moreover, since both the first triode Q1 and the second triode Q2 are connected in diode configuration and the bases are grounded, the emitter voltage VEQ1 of the first triode Q1 must be greater than the emitter voltage VEQ2 of the second triode Q2. At this time, the voltage of the first node C1 is the emitter voltage VEQ1 of the first triode Q1, that is, VC1 = VEQ1, and the voltage of the second node C2 is the sum of the emitter voltage VEQ2 of the second triode Q2 and the voltage of the sixth resistor R6, that is, VC2 = VR6 + VEQ2. When the circuit is just powered on, the currents I3 flowing through the first triode Q1 and I4 flowing through the second triode Q2 are both small. Therefore, in the initial stage of power-on of the circuit, the voltage difference VR6 across the sixth resistor R6 is small, and the voltage VC1 of the first node C1 is greater than the voltage VC2 of the second node C2, that is, the control terminal voltage of the tenth switch tube M10 is less than the control terminal voltage of the eighth switch tube M8. Since the output terminal of the tenth switch tube M10 is connected to the output terminal of the eighth switch tube M8, it can be obtained that the voltage difference between the control terminal and the output terminal of the eighth switch tube M8 is greater than the voltage difference between the control terminal and the output terminal of the tenth switch tube M10. Since the seventh switch tube M7 and the ninth switch tube M9 form a 1:1 current mirror structure and the ninth switch tube M9 is connected in series with the tenth switch tube M10, the current flowing from the third node E to the eighth switch tube M8 is greater than the current flowing from the seventh switch tube M7 to the third node E, and the voltage of the third node E is pulled down. The third node E is connected to the control terminals of the fifth switch tube M5 and the sixth switch tube M6, so the voltages of the control terminals of the fifth switch tube M5 and the sixth switch tube M6 decrease, and the voltage difference between the control terminals and the output terminals of the fifth switch tube M5 and the sixth switch tube M6 increases. Then the currents flowing out of the fifth switch tube M5 and the sixth switch tube M6 increase. Therefore, the current I3 flowing through the first triode Q1 and the current I4 flowing through the second triode Q2 both increase. At this time, as the currents I3 and I4 increase, the voltage difference VR6 across the sixth resistor R6 becomes larger and larger, causing the voltage VC2 of the second node C2 to gradually increase. When the voltage VC2 of the second node C2 increases to be greater than the voltage VC1 of the first node C1, the control terminal voltage of the tenth switch tube M10 is greater than the control terminal voltage of the eighth switch tube M8.At this time, the voltage difference between the control terminal and the output terminal of the tenth switching transistor M10 is greater than that of the eighth switching transistor M8. Therefore, the current flowing from the third node E to the eighth switching transistor M8 is less than the current flowing from the seventh switching transistor M7 to the third node E. Then, the voltage of the third node E increases, resulting in a decrease in the voltage difference between the control terminal and the output terminal of the fifth switching transistor M5 and the sixth switching transistor M6. As a result, the current flowing out of the fifth switching transistor M5 and the sixth switching transistor M6 decreases, and the circuit enters the next cycle.

[0091] It can be seen therefrom that when the circuit is in a stable state, the voltage of the first node C1 is equal to that of the second node C2, that is , then , where Vt represents the thermal voltage value of the first triode Q1 and the second triode Q2, which has a positive temperature coefficient, and IS represents the reverse saturation current of the first triode Q1 and the second triode Q2. At this time, since the fifth switching transistor M5, the sixth switching transistor M6, the first switching transistor M1 and the second switching transistor M2 form a current mirror structure of 1:1:M:M, when the circuit is in a stable state, the current I1 flowing through the first switching transistor M1 is equal to the current I2 flowing through the second switching transistor M2, that is .

[0092] In some embodiments, in the formula for the rate of change of the above threshold current ID0 with temperature T, the formula for the constant P is:

[0093] ;

[0094] where represents the resistance value of the first resistor R1 at room temperature, represents the thermal voltage value of the first triode Q1 and the second triode Q2 at room temperature.

[0095] In some embodiments, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are all resistors of the same type inside the chip.

[0096] From the above analysis, it can be seen that the threshold current of the current detection circuit in the present invention, and because , then , and the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are all resistors of the same type inside the chip. Therefore, the temperature coefficients of the resistors in the numerator and denominator of the formula can be cancelled out, that is, the formula is independent of temperature and can be regarded as a constant, and M and lnN are also constants. The first resistor R1 is a metal resistor with a positive temperature coefficient. At the same time, the thermal voltage value Vt of the first triode Q1 and the second triode Q2 also has a positive temperature coefficient. From this, the formula for the temperature-related part in the threshold current ID0 is as follows:

[0097] ;

[0098] According to this formula, the parameters in the numerator and denominator of the threshold current ID0 both have a positive temperature coefficient, and the influence of temperature on these parameters cancels each other out to a certain extent, thus effectively reducing the overall temperature coefficient of the threshold current ID0.

[0099] Express all the temperature-independent constant parameters in the formula related to temperature in the threshold current ID0 as P, then . At this time, the threshold current ID0 can be expressed as: . Taking the derivative of the parameter T representing temperature in the formula of this threshold current ID0, the rate formula for the change of the threshold current ID0 with temperature T can be obtained as:

[0100] ;

[0101] where P, T0, and a are all constants. Therefore, is inversely proportional to the square of the temperature T, that is, as the temperature T increases, the rate of change of the threshold current ID0 with temperature T decreases, that is, the sensitivity of the threshold current ID0 to temperature decreases.

[0102] According to the embodiments of the present invention, by using a positive temperature coefficient resistor outside the power control chip and cooperating with the internal circuit of the power control chip, while realizing basic functions such as current detection, the threshold current of the current detection circuit also has a low temperature coefficient, thereby effectively reducing the influence of temperature change on the detection accuracy. At the same time, the present invention adopts optimized designs such as current mirrors, resistor networks, and multi-stage switch tube controls to improve the stability and sensitivity of current detection.

[0103] The following further explains with a specific implementation process that the threshold current ID0 of the current detection circuit of the present invention has a low temperature coefficient.

[0104] When the constant N is 4, the constant M is 5, the constant a is 0.0038, the resistance value of the resistor R6 is , the resistance value difference between the resistor R4 and the resistor R5 is , the room temperature T0 is 300K, and the resistance value of the first resistor R1 at room temperature is , and the thermal voltage values of the first triode Q1 and the second triode Q2 at room temperature are both , that is , , , , , , , , at this time, if the temperature T is 300K, substituting it into the formula for the rate of change of the threshold current ID0 with respect to the temperature T for calculation, we can obtain: , and when the temperature T is 400K, substituting it into the formula for the rate of change of the threshold current ID0 with respect to the temperature T for calculation, we can obtain: . Figure 6 shows a schematic diagram of the change of the threshold current of the current detection circuit with low temperature coefficient according to an embodiment of the present invention with respect to temperature. As Figure 6 shown, the threshold current of the current detection circuit with low temperature coefficient of the present invention is always around 1.2A. Combining the above calculation results, it can be known that the temperature coefficient of the threshold current of the present invention is a fraction of , far lower than several in the prior art, and is at least one order of magnitude lower than the temperature coefficient in the prior art.

[0105] In addition, Figure 7 shows a schematic diagram of the rate of change of the threshold current of the current detection circuit with low temperature coefficient according to an embodiment of the present invention with respect to temperature. From Figure 7 it can be seen that in the current detection circuit of the present invention, as the temperature increases, the slope of the rate of change of the threshold current with respect to temperature decreases, that is, the change in the threshold current decreases. That is to say, the higher the temperature, the smaller the temperature coefficient of the threshold current of the current detection circuit in the present invention.

[0106] It can be seen from this that the current detection circuit in the present invention has a relatively low temperature coefficient, and the higher the operating temperature, the lower the temperature coefficient of the threshold current.

[0107] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0108] The above-described embodiments only represent several implementation manners of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent should be subject to the appended claims.

Claims

1. A galvanometer circuit with a low temperature coefficient, characterized in that, For detecting the current signal of a circuit under test, the circuit under test includes a first resistor R1, and the current detection circuit includes a current module, an adjustment module, and a comparison module. The adjustment module includes: An adjustment unit having a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first output terminal is connected to one end of the first resistor R1, the second output terminal is grounded, and the other end of the first resistor R1 is grounded; A first switching transistor M1, with its input terminal connected to the power supply voltage VDD, its output terminal connected to the first input terminal of the adjustment unit and the comparison module, and its control terminal connected to the current module; A second switching transistor M2, with its input terminal connected to the power supply voltage VDD, its output terminal connected to the second input terminal of the adjustment unit and the comparison module, and its control terminal connected to the control terminal of the first switching transistor M1; Wherein, the adjustment unit is configured to be able to adjust the voltage magnitude relationship between the output terminals of the first switching transistor M1 and the second switching transistor M2 according to the magnitude relationship between the current ID under test of the circuit under test and the threshold current ID0, and further adjust the level of the output voltage VO at the output terminal of the current detection circuit. The sensitivity of the threshold current ID0 to temperature decreases as the temperature increases; The adjustment unit includes a second resistor R2 and a third resistor R3 connected in series, a third switching transistor M3 and a fourth resistor R4 connected in sequence, and a fourth switching transistor M4 and a fifth resistor R5 connected in sequence; The control terminal of the third switching transistor M3 is connected to the control terminal of the fourth switching transistor M4 and is incorporated between the second resistor R2 and the third resistor R3. The end of the fourth resistor R4 far from the third switching transistor M3 serves as the first output terminal; the end of the fifth resistor R5 far from the fourth switching transistor M4 serves as the second output terminal; The end of the second resistor R2 far from the third resistor R3 is connected to the input terminal of the third switching transistor M3 and serves as the first input terminal. The end of the third resistor R3 far from the second resistor R2 is connected to the input terminal of the fourth switching transistor M4 and serves as the second input terminal; In the current module, the power supply voltage VDD is grounded through a fifth switching transistor M5 and a first triode Q1 in sequence; the power supply voltage VDD is also grounded through a sixth switching transistor M6, a sixth resistor R6, and a second triode Q2 in sequence; The control terminal of the fifth switching transistor M5 is connected to the control terminal of the sixth switching transistor M6 and is incorporated into the control terminal of the first switching transistor M1. Both the first triode Q1 and the second triode Q2 are connected in diode configuration; The power supply voltage VDD is also grounded through a seventh switching transistor M7, an eighth switching transistor M8, and a first current source B1 in sequence; the power supply voltage VDD is also grounded through a ninth switching transistor M9, a tenth switching transistor M10, and the first current source B1 in sequence; The control terminal of the seventh switching transistor M7 is connected to the control terminal of the ninth switching transistor M9 and incorporated into the output terminal of the ninth switching transistor M9. The control terminal of the eighth switching transistor M8 is connected to a first node C1 between the fifth switching transistor M5 and the first triode Q1. The control terminal of the tenth switching transistor M10 is connected to a second node C2 between the sixth switching transistor M6 and the sixth resistor R6. A third node E between the seventh switching transistor M7 and the eighth switching transistor M8 is connected to the control terminal of the fifth switching transistor M5; The fifth switching transistor M5, the sixth switching transistor M6, the first switching transistor M1, and the second switching transistor M2 form a current mirror structure of 1:1:M:M; The number ratio of the first triode Q1 to the second triode Q2 is 1:N; The seventh switching transistor M7 and the ninth switching transistor M9 form a current mirror structure of 1:

1.

2. The galvanometer circuit according to claim 1, characterized in that, The rate formula for the threshold current ID0 varying with temperature T is: ； where P is a constant, a represents the temperature coefficient of the first resistor R1, and a > 0, T0 represents room temperature, represents the rate of change of the threshold current with temperature.

3. The current detection circuit according to claim 2, wherein In the rate formula for the threshold current ID0 varying with temperature T, the formula for the constant P is: ； Among them, represents the resistance value of the first resistor R1 at room temperature, represents the thermal voltage values of the first triode Q1 and the second triode Q2 at room temperature.

4. The galvanometer circuit according to any one of claims 1-3, characterized in that, The comparison module includes a comparison unit and an output unit; In the comparison unit, the power supply voltage VDD is grounded successively through a second current source B2, an eleventh switching transistor M11, and a seventh resistor R7. The power supply voltage VDD is also grounded successively through the second current source B2, a twelfth switching transistor M12, and an eighth resistor R8. The control terminal of the eleventh switching transistor M11 is connected to the output terminal of the second switching transistor M2. The control terminal of the twelfth switching transistor M12 is connected to the output terminal of the first switching transistor M1; A fourth node F1 between the eleventh switching transistor M11 and the seventh resistor R7 and a fifth node F2 between the twelfth switching transistor M12 and the eighth resistor R8 are both connected to the output unit. The output unit is configured to adjust the level of the output voltage VO in the output unit according to the magnitude relationship between the fourth node F1 and the fifth node F2.

5. The current detection circuit according to claim 4, wherein In the output unit, the power supply voltage VDD is grounded successively through a third current source B3, a thirteenth switching transistor M13, and a fourteenth switching transistor M14. The power supply voltage VDD is also grounded successively through the third current source B3, a fifteenth switching transistor M15, and a sixteenth switching transistor M16. The control terminal of the thirteenth switching transistor M13 is connected to the fourth node F1. The control terminal of the fifteenth switching transistor M15 is connected to the fifth node F2. The control terminal of the fourteenth switching transistor M14 is connected to the input terminal of the fourteenth switching transistor M14. The control terminal of the sixteenth switching transistor M16 is connected to the input terminal of the sixteenth switching transistor M16; The power supply voltage VDD is also grounded successively through the seventeenth switching transistor M17 and the eighteenth switching transistor M18; the power supply voltage VDD is also grounded successively through the nineteenth switching transistor M19 and the twentieth switching transistor M20; the control terminal of the seventeenth switching transistor M17 is connected to the control terminal of the nineteenth switching transistor M19 and is incorporated into the output terminal of the seventeenth switching transistor M17; the control terminal of the eighteenth switching transistor M18 is connected to the control terminal of the fourteenth switching transistor M14, and the control terminal of the twentieth switching transistor M20 is connected to the control terminal of the sixteenth switching transistor M16; The output terminal of the current detection circuit is located between the nineteenth switching transistor M19 and the twentieth switching transistor M20.

6. The galvanometer circuit according to claim 5, characterized in that The fourteenth switching transistor M14 and the eighteenth switching transistor M18 form a 1:1 current mirror structure; The sixteenth switching transistor M16 and the twentieth switching transistor M20 form a 1:1 current mirror structure; The seventeenth switching transistor M17 and the nineteenth switching transistor M19 form a 1:1 current mirror structure.

7. The galvanometer circuit according to any one of claims 5-6, characterized in that, When the current ID to be measured is less than the threshold current ID0, the output voltage VO is a first level signal; When the current ID to be measured is greater than the threshold current ID0, the output voltage VO is a second level signal; The first level corresponding to the first level signal is lower than the second level corresponding to the second level signal.

8. A power supply circuit, characterized in that, Comprising a circuit to be measured, a logic circuit, and a current detection circuit according to any one of claims 1-7; In the circuit to be measured, the input power supply VIN is grounded successively through the first power switching transistor Mp1, the second power switching transistor Mp2, and the first resistor R1; the control terminals of the first power switching transistor Mp1 and the second power switching transistor Mp2 are both connected to the logic circuit; The circuit to be measured further includes a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is connected between the first power switching transistor Mp1 and the second power switching transistor Mp2, and the other end is connected to the output terminal VOUT of the power supply circuit; one end of the first capacitor C1 is connected to the output terminal VOUT of the power supply circuit, and the other end is grounded; The current detection circuit is connected to the logic circuit and is used to output a voltage signal to the logic circuit; The current detection circuit is connected to the sixth node A between the first resistor R1 and the second power switching transistor Mp2, and the current detection circuit is grounded.

9. The power supply circuit according to claim 8, characterized in that When the first power switching transistor Mp1 is turned on and the second power switching transistor Mp2 is turned off, the output voltage VO is a first level signal.

10. The power supply circuit according to claim 8 or 9, characterized in that, When the first power switching transistor Mp1 is turned off and the second power switching transistor Mp2 is turned on, according to the magnitude relationship between the current ID to be measured of the circuit to be measured and the threshold current ID0, the magnitude relationship of the voltage between the output terminals of the first switching transistor M1 and the second switching transistor M2 is adjusted, and further the level of the output voltage VO of the current detection circuit is adjusted.

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