Sputtering target for forming oxide semiconductor thin film, method for producing same, oxide semiconductor thin film, thin film semiconductor device, and method for producing same

Abstract

The invention provides a sputtering target for forming an oxide semiconductor thin film and a method for manufacturing the same, an oxide semiconductor thin film, and a thin film semiconductor device and a method for manufacturing the same. The sputtering target for forming the oxide semiconductor thin film can form an oxide semiconductor thin film suitable for realizing an active layer with high mobility and high band gap at the same time. Provided is a sputtering target for forming an oxide semiconductor thin film, the sputtering target being used for forming an oxide semiconductor thin film, the sputtering target comprising an oxide sintered body containing a predetermined oxide, and when the element ratio of the predetermined oxide is InXSnYGaVGeWZnZ, X is 0.4-0.8, Y is 0-0.1, Z is 0.2-0.6, and X + Y + Z is in the range of X + Y + Z = 1, V / (V + W + X + Y + Z) is 0.01-0.22, and W / (V + W + X + Y + Z) is 0.01-0.06.

Description

Technical Field

[0001] The present invention relates to a sputtering target for forming an oxide semiconductor thin film, a method for manufacturing the sputtering target for forming an oxide semiconductor thin film, an oxide semiconductor thin film, a thin-film semiconductor device, and a method for manufacturing the same. Background Art

[0002] Thin-film transistors (TFTs) that use In-Ga-Zn-O-based oxide semiconductor thin films (IGZO) for the active layer can achieve higher mobility than TFTs that use conventional amorphous silicon films for the active layer, and therefore have been widely used in various displays in recent years (for example, refer to patent documents 1 to 3).

[0003] For example, Patent Document 1 discloses an organic EL display device in which the active layer of a TFT driving an organic EL element is composed of IGZO. Patent Document 2 discloses an organic EL display device in which the channel layer (active layer) is composed of a-IGZO and has a mobility of 5 cm 2 Patent Document 3 discloses a thin film transistor in which an active layer is composed of IGZO and an on-off current ratio (on / off current ratio) is 5 digits or more.

[0004] On the other hand, from the perspective of reducing the raw material cost of IGZO, Zn-Sn-O (ZTO) (Patent Document 4) or In-Sn-Zn-O (ITZO) (Patent Document 5) in which Sn is added instead of Ga in IGZO has been proposed. Among them, ITZO has a very high mobility compared to IGZO, and therefore has attracted attention as a material second only to IGZO.

[0005] In addition, considering that ITZO has a large thermal expansion coefficient, low thermal conductivity and is not suitable for sputtering targets among materials used for oxide semiconductors, a sputtering target having an oxide sintered body has been proposed. The oxide sintered body contains In+Sn+Zn+X elements and oxygen, and the atomic ratio of each element satisfies the following formula (1), and also contains a spinel structure compound represented by Zn2SnO4 (patent document 6). 0.001≤X / (In+Sn+Zn+X)≤0.05······(1) (The X element is selected from at least one of Ge, Si, Y, Zr, Al, Mg, Yb and Ga.) Prior Art Literature

[0006] Patent Literature Patent Document 1: Japanese Patent Application Publication No. 2009-31750 Patent Document 2: Japanese Patent Application Publication No. 2011-216574 Patent Document 3: WO2010 / 092810 Patent Document 4: Japanese Patent Application Publication No. 2017-36497 Patent Document 5: WO2013 / 179676 Patent Document 6: WO2019 / 026954 Summary of the invention Problems to be solved by the invention

[0007] In recent years, the demand for oxide semiconductors with higher mobility has been increasing due to the requirements for higher resolution, lower power consumption, and higher frame rates for various displays. However, in thin-film transistors using IGZO in the active layer, the mobility is difficult to exceed 10 cm 2 / Vs, it is required to develop materials for thin film transistors that show higher mobility.

[0008] On the other hand, when used in a high-mobility active layer, there is a problem that the threshold voltage at which the current switches from off to on is shifted upward. That is, there is a problem that the band gap of the high-mobility active layer tends to decrease.

[0009] As described above, as an active layer of a TFT used in a high-function display, a balance between high mobility and a large band gap is important, thereby improving the light resistance of the display and achieving high reliability. However, a product with an optimal composition from this point of view has not yet been realized.

[0010] Furthermore, when used as an active layer of a TFT, the etching rate of the etchant is also an important point.

[0011] In view of the above situation, an object of the present invention is to provide a sputtering target for forming an oxide semiconductor thin film, a method for manufacturing a sputtering target for forming an oxide semiconductor thin film, an oxide semiconductor thin film, and a thin film semiconductor device and a method for manufacturing the same, wherein the sputtering target is capable of forming an oxide semiconductor thin film having an active layer suitable for simultaneously achieving high mobility and a high band gap. Means of solving problems

[0012] The present inventors have conducted various studies to achieve the above-mentioned object and have found that an oxide thin film containing indium, zinc, and tin and containing gallium and germanium is suitable as a target active layer, thereby completing the present invention. Such the present invention is as follows.

[0013] A first aspect of the present invention is a sputtering target for forming an oxide semiconductor thin film, which is used for forming an oxide semiconductor thin film. It is composed of an oxide sintered body containing a predetermined oxide. The element ratio of the predetermined oxide is In X Sn Y GaV Ge W Zn Z When X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is 0.01 to 0.22, and W / (V+W+X+Y+Z) is 0.01 to 0.06.

[0014] A second aspect of the present invention is the sputtering target for forming an oxide semiconductor thin film according to the first aspect, wherein the oxide sintered body further contains a group A element, and the group A element is at least one element selected from Ti, Ta, Zr, Y, Al, Mg and Sb.

[0015] A third aspect of the present invention is that in the sputtering target for forming an oxide semiconductor thin film according to the second aspect, Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, and Sb is 9 at% or less. The content of the A group elements is less than 10 at %.

[0016] A fourth aspect of the present invention is the sputtering target for forming an oxide semiconductor thin film according to any one of the first to third aspects, wherein the relative density is 90% or more.

[0017] The fifth embodiment of the present invention is a method for manufacturing a sputtering target for forming an oxide semiconductor thin film for forming an oxide semiconductor thin film, wherein indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide and germanium oxide powder are mixed and molded into a molded body, and the above-mentioned molded body is sintered at a temperature of not less than 1100° C. and not more than 1650° C. to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body as described in any one of the first to fourth embodiments.

[0018] The sixth embodiment of the present invention is a method for manufacturing a sputtering target for forming an oxide semiconductor thin film for forming an oxide semiconductor thin film, wherein a precursor powder obtained by mixing oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium and pre-sintering at a temperature of not less than 600°C and not more than 1500°C is molded into a molded body, and the molded body is sintered at a temperature of not less than 1100°C and not more than 1650°C to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body as described in any one of embodiments 1 to 4.

[0019] A seventh aspect of the present invention is an oxide semiconductor thin film composed of an oxide semiconductor containing a predetermined oxide. Here, the element ratio of the predetermined oxide is In X Sn Y Ga V Ge W ZnZ When X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.22, and W / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.06.

[0020] An eighth aspect of the present invention is the oxide semiconductor thin film according to the seventh aspect, wherein the mobility is 15 to 30 cm 2 / V·s, and the band gap is greater than 2.75 eV.

[0021] A ninth aspect of the present invention is that in the oxide semiconductor thin film according to the seventh or eighth aspect, an etching rate when etching is performed with a phosphoric acid-acetic acid etchant (phosphoric acid and acetic acid etchant) is 1 nm / s or more.

[0022] A tenth aspect of the present invention is the oxide semiconductor thin film according to any one of the seventh to ninth aspects, further comprising a group A element, wherein the group A element is at least one element selected from the group consisting of Ti, Ta, Zr, Y, Al, Mg and Sb.

[0023] An eleventh aspect of the present invention is that in the oxide semiconductor thin film according to the tenth aspect, Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, and Sb is 9 at% or less. The content of the A group elements is less than 10 at %.

[0024] A twelfth aspect of the present invention is a thin film semiconductor device comprising: Gate electrode (gate electrode), A gate insulating film provided on the gate electrode, an active layer formed of a high-mobility oxide semiconductor thin film provided on the gate insulating film, and A source electrode (source electrode) and a drain electrode (drain electrode) connected to the active layer, wherein the active layer is formed of the oxide semiconductor thin film according to any one of the seventh to eleventh aspects.

[0025] A thirteenth aspect of the present invention is the thin-film semiconductor device according to the twelfth aspect, further comprising a cap layer provided so as to cover the active layer.

[0026] A fourteenth aspect of the present invention is the thin-film semiconductor device according to the thirteenth aspect, wherein the cap layer is suitable for an etching ratio when patterned together with the active layer.

[0027] A fifteenth aspect of the present invention is a method for manufacturing a thin-film semiconductor device according to the twelfth aspect, comprising the following steps: forming a gate insulating film on the gate electrode, forming an active layer composed of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering, patterning the active layer, forming a metal layer with the patterned active layer as a base film, The metal layer is patterned by wet etching to form a source electrode and a drain electrode.

[0028] A 16th aspect of the present invention is a method for manufacturing a thin-film semiconductor device according to the 13th or 14th aspect, comprising the following steps: forming a gate insulating film on the gate electrode, forming an active layer composed of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering, forming the cap layer on the active layer by sputtering, Patterning the stacked film of the active layer and the cover layer, forming a metal layer with the patterned active layer and the cap layer as a base film, The metal layer is patterned by wet etching to form a source electrode and a drain electrode. Effects of the Invention

[0029] The present invention can realize a sputtering target for forming an oxide semiconductor thin film, which can form an oxide semiconductor thin film, which can achieve a good balance between high mobility and large band gap as an active layer of a TFT for a high-function display, and has a good etching rate using a predetermined etchant. As a result, the light resistance of the display is improved, and high reliability can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] [ Figure 1 ] indicates the mobility of the In, Sn and Zn ternary composite oxide film, the mobility is between 15 and 30 cm 2 / V·s range. [ Figure 2 ] is a graph showing that the band gap of the In, Sn and Zn ternary composite oxide thin film is in the range of 2.75 eV or more. [ Figure 3 ] is a graph showing that the etching rate of the In, Sn and Zn ternary composite oxide thin film using a phosphoric acid / acetic acid based etchant is in the range of 1 nm / s or more. [ Figure 4 ] means to Figure 1 to Figure 3 A graph of the ranges combined together. [ Figure 5] is a diagram showing the schematic structure of an example of a thin film transistor of the present invention. [ Figure 6 ] is a diagram showing the schematic structure of another example of the thin film transistor of the present invention. [ Figure 7 ] is a diagram showing the schematic structure of an example of a manufacturing process of a thin film transistor of the present invention. [ Figure 8 ] is a diagram showing the schematic structure of an example of a manufacturing process of a thin film transistor of the present invention. [ Fig. 9 ] is a graph comparing the initial characteristics of the thin film transistors of Examples 21 and 22 of the thin film transistor of the present invention and Comparative Example 21, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [ Fig.10 ] are diagrams comparing the PBTS of the thin film transistors of Examples 21 and 22 of the thin film transistor of the present invention and Comparative Example 21, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [ Fig.11 ] are diagrams comparing the NBTS of the thin film transistors of Examples 21 and 22 of the thin film transistor of the present invention and Comparative Example 21, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [ Fig.12 ] is a graph comparing the NBITS of the thin film transistors of Examples 21 and 22 of the thin film transistor of the present invention and the thin film transistor of Comparative Example 21, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21. [ Fig.13 ] is a graph comparing the initial characteristics of the thin film transistors of Examples 23 and 24 of the thin film transistor of the present invention and Comparative Example 22, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [ Fig.14 ] is a diagram comparing the PBTS of the thin film transistors of Examples 23 and 24 of the thin film transistor of the present invention and Comparative Example 22, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [ Fig.15 ] are diagrams comparing the NBTS of the thin film transistors of Examples 23 and 24 of the thin film transistor of the present invention and Comparative Example 22, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. [ Fig.16 ] is a graph comparing the NBITS of the thin film transistors of Examples 23 and 24 of the thin film transistor of the present invention and the thin film transistor of Comparative Example 22, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22. DETAILED DESCRIPTION

[0031] Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, before describing the sputtering target for forming an oxide semiconductor thin film according to the present embodiment, the characteristics of an oxide semiconductor thin film formed using the sputtering target will be described.

[0032] [Oxide semiconductor thin film] The oxide semiconductor thin film is used for a high-mobility active layer (inversion layer) in a thin film transistor such as a so-called bottom-gate field effect transistor, for example. Here, the high mobility active layer refers to a layer with a mobility of 15 to 30 cm 2 / V·s, and an active layer with a band gap of 2.75 eV or more.

[0033] The oxide semiconductor thin film of the present invention is composed of an oxide sintered body containing a predetermined oxide, and when the element ratio of the predetermined oxide is In X Sn Y Ga V Ge W Zn Z When X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.22, and W / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.06.

[0034] The present invention is designed to have the following composition: In is used as a carrier generator; Sn is used as a substance having an etching control function and a mobility control function, and Zn is used as a substance having an etching control function; Ge is added as a carrier control agent (carrier killer). In the ternary system of In-Sn-Zn, a high mobility and high band gap system is formed, and a range of high etching rate using a specified etchant is specified, and a specified amount of Ge and a specified amount of Ga as an element having a carrier killer function are added thereto. Even if a large amount of the specified amount of Ge is added, the reduction in the band gap is small and the influence on the etching rate is also small. The specified amount of Ga has the function of controlling the mobility and the function of controlling the etching of phosphoric acid and acetic acid etchants.

[0035] The reason for using this quinary system composition as the basis is that, for a system in which In and Zn are mixed in a ratio of 1:1, the relationship between the amount of each element added and the degree of decrease in mobility, and the relationship between the amount of each element added and the degree of increase in band gap were measured, and insights were obtained from these results.

[0036] For a system in which In and Zn are mixed in a ratio of 1:1, the relationship between the amount of each element added and the degree of mobility reduction was measured. It was found that the system in which Ge was added to In and Zn had a small decrease in mobility and a large increase in band gap.

[0037] In addition, for systems where In and Zn are mixed in a ratio of 1:1, the relationship between the amount of each element added and the degree of increase in the band gap was measured, and it was found that Sn, which has etching control functions and mobility control functions, is suitable for adding to these systems.

[0038] Furthermore, when using a phosphoric acid-acetic acid-based etchant, it was found that the elements that caused the least reduction in etching rate even when added were Ge and Ga, and that the proportion of reduction in etching rate was particularly small when Ga was added.

[0039] Therefore, in the present invention, in the quinary composition of In, Zn, Sn, Ga, and Ge, a composition range capable of achieving high mobility and a high band gap as well as a high etching rate of a predetermined etchant is determined as follows.

[0040] Specifically, first, in X Sn Y Zn Z The relationship between the mobility, band gap, and etching rate and composition ratio of the ternary oxide semiconductor was measured. The etchant is a phosphoric acid-acetic acid etchant, that is, a mixed solution of phosphoric acid: H3PO4 less than 80%, nitric acid: HNO3 less than 5%, and acetic acid: CH3COOH less than 10%.

[0041] Calculate the values ​​that make the mobility 15 to 30 cm 2 The overlapping range of the three is determined as follows: the range of / V·s, the range of the band gap being 2.75 eV or more, and the range of the etching rate being 1 nm / s or more.

[0042] First, the mobility of the In, Sn and Zn ternary composite oxide film was measured to make the mobility 15 to 30 cm 2 / V·s. The mobility was measured as follows. A metal for contacting is applied near the four vertices of a 10 mm square semiconductor sample to prepare a sample.

[0043] Next, a current is passed through the sample, and the current acts perpendicularly to the magnetic field, thereby generating an electromotive force perpendicular to both the current and the magnetic field, which is identified as the Hall electromotive force. The Hall electromotive force has the property of being proportional to the electric current and the magnetic field, respectively, and its proportionality coefficient is a physical quantity inherent in the sample. By measuring the conductivity (resistance) of the sample simultaneously with the coefficient, information such as the mobility of the sample can be obtained.

[0044] Figure 1 The results are shown in Figure 2. As a result, the mobility was 15 to 30 cm 2 The range of / V·s is: 0.4≤X<0.8, 0≤Y≤0.6, 0≤Z≤0.6. This range is preferred because it is a condition that enables the target high mobility to be achieved.

[0045] Next, the band gap of the In, Sn and Zn ternary composite oxide thin film was measured. The band gap was measured as follows. 1. Measure the transmittance T and reflectance R by a spectrometer. 2. Calculate the absorption coefficient α according to the following formula. α=((-ln(T / (1-R)) / n) / (T / (1-R)) n: film thickness [cm]; T, R: measurement data / 100 3. Calculate (α×hω)^(1 / 2) hω(photon energy)[eV]:1239.8 / wavelength[nm] 4. In the graph with the horizontal axis: hω[eV] and the vertical axis: (α×hω)^(1 / 2), the intersection of the tangent with the largest slope and the x-axis is taken as the band gap.

[0046] Figure 2 The results are shown in FIG. As a result, the range in which the band gap is 2.75 eV or more is: 0≤X≤0.8, 0≤Y≤0.8, 0.2≤Z≤1. Here, the band gap is preferably 2.75 eV or more because this is a condition that can achieve high mobility and a high band gap.

[0047] Next, the range in which the etching rate of phosphoric acid and acetic acid-based etchants is above 1 nm / s is measured. The etchant used is a mixed solution PAN of phosphoric acid: H3PO4 less than 80%, nitric acid: HNO3 less than 5%, and acetic acid: CH3COOH less than 10%. In the measurement of the etching rate, a dip method (Dip method) is used in which a single film cap layer of a newly formed oxide semiconductor thin film is immersed in an etchant controlled at 40°C.

[0048] Figure 3 The results are shown in FIG. 1. As a result, the range in which the etching rate is 1 nm / s or more is: 0≤X≤0.8, 0≤Y≤0.1, 0.2≤Z≤1. The above range is preferred because it is a condition that can achieve high mobility and a high band gap, and a high etching rate with respect to a phosphoric acid-acetic acid-based etchant.

[0049] Figure 4 express Figure 1 to Figure 3 The result is that the composition is set to In X Sn Y Ge w Zn Z When the above-mentioned excellent properties are satisfied, the range is: X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and it is the range of X+Y+Z = 1. The reason for selecting this range is that when Ge is added thereto, the target high mobility and high band gap, as well as the high etching rate for phosphoric acid and acetic acid etchants can be achieved.

[0050] It was also found that when the amount of Ge added was such that W / (V+W+X+Y+Z) was 0.01 or more and 0.03 or less, a mobility of 15 to 30 cm 2 / V·s, a high mobility and a high band gap of 2.75 eV or more, and an etching rate of 1 nm / s or more when etching with a phosphoric acid-acetic acid-based etchant.

[0051] The oxide semiconductor thin film of the present invention may further contain a Group A element, where the Group A element is at least one element selected from the group consisting of Ti, Ta, Zr, Y, Al, Mg, and Sb. The amount of these group A elements added is within the range of Ti being 2 at% or less, Ta being 2 at% or less, Zr being 3 at% or less, Y being 4 at% or less, Al being 5 at% or less, Mg being 5 at% or less, and Sb being 9 at% or less, and the content of group A elements being less than 10 at%, and this range is preferred because it is the range in which the oxide semiconductor film can have a 10 cm 2 The invention can achieve a high mobility of 1.177 mW / V·s or more and a high band gap range of 2.75 eV or more.

[0053] [Sputtering target] Next, the sputtering target according to the present embodiment will be described.

[0054] The sputtering target may be a planar target or a cylindrical rotating target. The sputtering target is composed of an oxide sintered body containing In, Sn, Ga, Ge and Zn, and the composition ratio is the same as that of the above-mentioned oxide semiconductor thin film, and the preferred composition ratio is also the same, so repeated description is omitted.

[0055] The composition range of the oxide sintered body of the sputtering target of the present invention is composed of an oxide sintered body containing indium, tin and zinc, and containing oxides of gallium and germanium, and In X Sn Y Ga V Ge W Zn ZWhen X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.22, and W / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.06.

[0056] The oxide sintered body constituting the sputtering target of the present invention may further contain a group A element, wherein the group A element is at least one element selected from the group consisting of Ti, Ta, Zr, Y, Al, Mg and Sb.

[0057] The addition amounts of these group A elements are: Ti is 2 at% or less, Ta is 2 at% or less, Zr is 3 at% or less, Y is 4 at% or less, Al is 5 at% or less, Mg is 5 at% or less, and Sb is 9 at% or less. The total content of group A elements is less than 10 at%. The oxide semiconductor film preferably has a thickness of 10 cm 2 The invention can achieve a high mobility of 1.177 mW / V·s or more and a high band gap range of 2.75 eV or more.

[0058] In addition, the oxide semiconductor thin film formed by sputtering the oxide sintered body is preferably such that the thickness of the oxide semiconductor thin film can be 15 to 30 cm 2 / V·s and can achieve a high band gap range of 2.75 eV or more.

[0059] The oxide semiconductor thin film formed using the sputtering target of the present invention can have a thickness of 15 to 30 cm 2 / V·s, and can achieve a high band gap of 2.75 eV or more. In addition, it can achieve an etching rate of 1 nm / s or more with a phosphoric acid-acetic acid-based etchant.

[0060] (Method for producing sputtering target) The method for producing the sputtering target of the present invention is not particularly limited as long as it is a method that can obtain an oxide sintered body having the above-mentioned composition, and for example, the following two production methods can be exemplified.

[0061] The first method is a method of manufacturing a sputtering target having an oxide sintered body by mixing indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide powder and germanium oxide powder, forming the mixture into a molded body, and sintering the molded body at a temperature of 1100° C. to 1650° C. The weight ratio of the raw material powder depends on whether or not the target element ratio of the above-mentioned oxide sintered body can be obtained.

[0062] In addition, the second method is a method of manufacturing a sputtering target having an oxide sintered body by mixing oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium and pre-sintering the resulting precursor powder at 600°C to 1500°C to form a molded body, and sintering the above-mentioned molded body at a temperature of not less than 1100°C and not more than 1650°C. The weight ratio of the raw material powder depends on whether or not the target element ratio of the above-mentioned oxide sintered body can be obtained.

[0063] Hereinafter, the second method will be further exemplified and the production method will be described in detail. In this embodiment, the raw material powder is granulated by a spray drying method that can perform drying and granulation at one time. By adding a binder, a pulverizing operation with poor pulverizability is not required, and by using spherical powder with good fluidity, the composition distribution of the sputtering target can be easily made uniform.

[0064] The raw material powder contains at least oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium. In addition, powders of one or more oxides selected from elements in group A may be mixed. In addition, a dispersant or the like may be added during the mixing of the raw material powders.

[0065] As a method for crushing and mixing the raw material powder, a ball mill can be used. In addition to the ball mill, other medium stirring mills such as a bead mill and a rod mill can also be used. A resin coating or the like can also be applied to the surface of the balls or beads as stirring media. This can effectively prevent impurities from mixing into the powder.

[0066] The mixed granular powder is pre-sintered at a temperature of 600°C to 1500°C. When the sintering temperature is lower than 600°C, the composite oxide cannot be completely formed due to insufficient pre-sintering. When the sintering temperature exceeds 1500°C, the sintering proceeds through the pre-sintering, and the particle shape of the primary particles becomes larger, so that the sintering density does not increase in the subsequent formal sintering. The pre-calcined powder is wet-pulverized again with a ball mill or the like together with a dispersant, a binder, and the like, and granulated by spray drying.

[0067] The average particle size of the granulated powder is 500 μm or less. When the average particle size of the granulated powder exceeds 500 μm, cracks and fissures of the molded body become significant, and granular spots are generated on the surface of the sintered body. If such a sintered body is used as a sputtering target, it may cause abnormal discharge or particle generation.

[0068] The more preferred average particle size of the granulated powder is 20 μm or more and 100 μm or less. As a result, the volume change (compression rate) before and after CIP (Cold Isostatic Press) molding is small, cracks in the molded body are suppressed, and a long molded body can be stably produced. It should be noted that when the average particle size is less than 20 μm, the powder is easy to fly and handling becomes difficult.

[0069] Here, the “average particle size” refers to a value at which the cumulative % of the particle size distribution measured by a sieving particle size distribution measuring device is 50%. In addition, as the value of the average particle size, a value measured by “Robot Sifter RPS-105M” manufactured by Seishin Enterprise Co., Ltd. is used.

[0070] Granulated powder at 100MPa / cm 2 The molding is carried out under a pressure of 100 MPa or more. Thus, a sintered body with a relative density of 97% or more can be obtained. When the molding pressure is less than 100 MPa, the molded body is easily damaged, difficult to handle, and the relative density of the sintered body is reduced.

[0071] As a molding method, CIP (cold isostatic pressing) method is used. The form of CIP can be a typical vertical load type vertical method, preferably a horizontal load type horizontal method. This is because if a long strip-shaped molded body is made by vertical CIP, the offset of the powder in the mold will cause uneven thickness or breakage due to its own weight during processing.

[0072] Furthermore, the molded body is fired at 1100° C. to 1650° C. to obtain a sintered body. When the sintering temperature is lower than 1100°C, the conductivity and relative density become low, and it is not suitable for sputtering target use. On the other hand, when the sintering temperature exceeds 1650°C, some components evaporate, the composition of the sintered body is deviated, or the strength of the sintered body is reduced due to coarsening of the crystal grains.

[0073] The molded body is fired in air or in an oxidizing atmosphere, thereby stably producing a target oxide sintered body.

[0074] In the preparation of the granulated powder, a powder having an average primary particle size of 0.3 μm or more and 1.5 μm or less is used. This can shorten the mixing and pulverizing time and improve the dispersibility of the raw material powder in the granulated powder.

[0075] The angle of repose of the granulated powder is preferably 32° or less. This improves the fluidity of the granulated powder, and improves the moldability and sinterability.

[0076] (Processing steps) The sintered body produced as described above is machined into a plate-like shape having a desired shape, size, and thickness to produce a sputtering target composed of an In-Sn-Ga-Ge-Zn-O-based sintered body. The sputtering target and the backing plate are brazed together to form a body.

[0077] According to this embodiment, a long strip sputtering target with a length of more than 1000 mm in the longitudinal direction can be manufactured. Thus, a large sputtering target without a segmented structure can be manufactured, thereby preventing the degradation of film properties that may be caused by sputtering of the bonding material (solder) invading the gap (joint) of the segmented portion, and stably forming the film. In addition, it is not easy to generate particles caused by the reattachment (redeposition) of the sputtered particles accumulated in the above-mentioned gap.

[0078] [Evaluation of sputtering target] (Resistivity distribution) The resistivity value was measured by a direct current four-probe method using Model sigma-5+ manufactured by NPS. The average resistivity value of five points on the sputtered surface side after the sintered body processing was taken as the resistivity value.

[0079] (Relative density) The density of the sintered body can be obtained by the mercury Archimedean method or by direct calculation from the dimensions and weight.

[0080] (Crystal Structure) The formation of the complex oxide in the oxide sintered body and whether the oxide semiconductor thin film is amorphous are confirmed by XRD: X-ray diffraction method.

[0081] An example of an apparatus and measurement conditions used in X-ray diffraction is as follows. X-ray diffraction equipment: RINT manufactured by Rigaku Corporation Scanning method: 2θ / θ method Target: Cu Tube voltage: 40kV Tube current: 20mA Scanning speed: 2.000° / min Sampling width: 0.050° Divergence slit: 1° Scattering slit: 1° Light receiving slit: 0.3mm

[0082] (composition) The composition of the oxide sintered body was confirmed by SEM-EDX: Energy Dispersive X-ray Spectroscopy.

[0083] An example of the apparatus and measurement conditions used in the composition analysis is as follows. SEM-EDX: TM3030 Hitachi High-Tech Corporation Accelerating voltage: 15 kV Detection element type: Silicon drift detector Component area: 30mm 2 Energy resolution: 154eV (Cu-Kα) Detectable elements: B5~Am 95 Qualitative analysis: automatic / manual Quantitative analysis: standard-free method

[0084] [Thin Film Transistor] Figure 5 A schematic structure of an example of a thin film transistor of the present invention is shown. The thin film transistor 100 of this embodiment includes a gate electrode 11 , a gate insulating film 12 , an active layer 13 , a cap layer 14 , a source electrode 15S, a drain electrode 15D, and a protective film 16 on a substrate 10 .

[0085] The gate electrode 11 is composed of a conductive film formed on the surface of the substrate 10. The substrate 10 is typically a transparent glass substrate. The gate electrode 11 is typically composed of a metal single layer film or a metal multilayer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), etc., and is formed, for example, by sputtering. In the present embodiment, the gate electrode 11 is composed of molybdenum. The thickness of the gate electrode 11 is not particularly limited, and is, for example, 200 nm. The gate electrode 11 is formed by, for example, sputtering, vacuum evaporation, etc.

[0086] The active layer 13 functions as a channel layer of the thin film transistor 100. The film thickness of the active layer 13 is, for example, 10 nm to 200 nm. The active layer 13 is formed of the oxide semiconductor thin film of the present invention. The active layer 13 is formed by, for example, sputtering.

[0087] The cap layer 14 can be a cap layer most suitable for the high-mobility and high-bandgap oxide semiconductor thin film of the present invention, and a known cap layer that can suppress etching damage and the influence of hydrogen in the CVD process can be used.

[0088] The cap layer 14 is patterned together with the active layer 13. As the etchant, the above-mentioned etchant can be used.

[0089] The gate insulating film 12 is formed between the gate electrode 11 and the active layer 13. The gate insulating film 12 is made of, for example, a silicon oxide film (SiO x ), silicon nitride film (SiN x ) or a stacked film thereof. The film forming method is not particularly limited, and may be CVD, sputtering, vapor deposition, etc. The film thickness of the gate insulating film 12 is not particularly limited, and is, for example, 200 nm to 400 nm.

[0090] The source electrode 15S and the drain electrode 15D are formed on the active layer 13 and the cap layer 14 at intervals. The source electrode 15S and the drain electrode 15D can be composed of, for example, a metal single layer film such as aluminum, molybdenum, copper, titanium, or a multilayer film of these metals. As described later, the source electrode 15S and the drain electrode 15D can be formed simultaneously by patterning the metal film. The thickness of the metal film is, for example, 100 nm to 200 nm. The source electrode 15S and the drain electrode 15D are formed by, for example, sputtering, vacuum evaporation, or the like.

[0091] The source electrode 15S and the drain electrode 15D are covered by a protective film 16. The protective film 16 is made of an electrically insulating material such as a silicon oxide film, a silicon nitride film, or a laminated film thereof. The protective film 16 is used to shield the element portion including the active layer 13 and the cap layer 14 from the outside air. The film thickness of the protective film 16 is not particularly limited, and is, for example, 100 nm to 300 nm. The protective film 16 is formed by, for example, a CVD method.

[0092] After the protective film 16 is formed, an annealing process is performed. Thus, the active layer 13 is activated. The annealing conditions are not particularly limited, but in this embodiment, the annealing is performed at about 30° C. in the atmosphere for 1 hour. At this time, it is believed that the cap layer 14 has the function of inhibiting the diffusion of hydrogen from the protective film 16 to the active layer 13 caused by heat.

[0093] Interlayer connection holes 16S and 16D for connecting the source electrode 15S and the drain electrode 15D to a wiring layer (not shown) are provided at appropriate positions of the protective film 16. The wiring layer is used to connect the thin film transistor 100 to a peripheral circuit (not shown) and is made of a transparent conductive film such as ITO.

[0094] Figure 6 The schematic structure of another example of the thin film transistor of the present invention is shown. Figure 5 The thin film transistor has a cap layer 14 other than the cap layer 14. Figure 8 The same, therefore repeated description is omitted.

[0095] Thus, a thin film semiconductor transistor using the oxide semiconductor thin film of the present invention as an active layer can be Figure 5 or Figure 6 Any structure can be used as a TFT for high-function displays, thereby improving the light resistance of the display and achieving high reliability.

[0096] (Method for manufacturing thin film transistor) Reference Figure 7 and Figure 8 An example of a method for manufacturing a thin film transistor of the present invention is described. like Figure 7As shown in (a), first, a gate electrode material layer 11a is formed on a substrate 10 by sputtering at room temperature. Figure 7 As shown in (b), the gate electrode 11 is formed by wet patterning. Figure 7 As shown in (c), the gate insulating film 12 is formed by CVD. Here, SiO X / SiN X Then, as Figure 7 As shown in (d), the active layer material layer 13a and the cap layer material layer 14a are sequentially formed by sputtering with the substrate 10 at a temperature of 100°C. Figure 8 As shown in (a), the active layer material layer 13a and the cap layer material layer 14a are patterned by etching to form the active layer 13 and the cap layer 14. As an etchant, for example, a sulfuric acid / nitric acid-based etchant is used for etching, and then, for example, annealing is performed at 400°C for 1 hour in the atmosphere. Figure 8 As shown in (b), a metal material layer 15a for source and drain is formed by sputtering at room temperature. Figure 8 As shown in (c), the source electrode 15S and the drain electrode 15D are formed by patterning. Figure 8 As shown in (d), a protective film material layer 16a is formed by CVD. The protective film material layer 16a is, for example, SiOx with a film thickness of 300 nm. After annealing at 300° C. in the atmosphere, the protective film material layer 16a is patterned by dry etching to form interlayer connection holes 16S and 16D to the source electrode 15S and the drain electrode 15D.

[0097] In the thin film transistor of the present invention described above, if the oxide thin film containing indium, magnesium and tin is used as the cap layer 14, the material of the high mobility active layer 13 having a tendency to reduce the band gap Eg does not cause the V of the TFT to decrease when stacked with the cap layer 14. th The deviation has the effect of suppressing external factors during TFT manufacturing. Specifically, the cap layer 14 of the present invention has a function of suppressing damage to the active layer 13 during a hydrogen process during TFT fabrication and during patterning of the source electrode 15S and the drain electrode 15D.

[0098] Figure 6 The thin film semiconductor transistor shown without the cap layer 14 can be manufactured in the same manner except that the cap layer 14 is not formed. In summary, the thin film semiconductor transistor using the oxide semiconductor thin film of the present invention as the active layer is Figure 5 or Figure 6 Any structure can be used as a TFT for high-function displays, thereby improving the light resistance of the display and achieving high reliability. Example

[0099] (Sputtering target examples 1-6, comparative examples 1-4) Indium oxide, gallium oxide, germanium oxide, zinc oxide, and optionally tin oxide were weighed to give the composition shown in Table 2 below, and mixed using a ball mill. The mixed particle powder was sintered in the atmosphere to obtain a sintered body.

[0100] The results of measuring the relative density and resistivity of the sintered body are shown in Table 2. Furthermore, the results of confirming the presence or absence of composition deviation of the mixed granular powder and the oxide sintered body before and after sintering by EDX are also shown. The formation of composite oxides of various compositions can be confirmed by XRD.

[0101] In the embodiment, indium oxide, gallium oxide, germanium oxide, zinc oxide, and tin oxide (optional) are used as raw materials, and sintered in the atmosphere to obtain a sintered body having a relative density of 90% or more. The sintered body has a relative density of 97% or more and a resistivity of 10 mΩ·cm or less, especially when sintered at 1300° C. or above.

[0102] In the comparative example, when the sintering temperature was less than 1100°C, sintering did not proceed sufficiently and the relative density was less than 90%. In addition, when sintering was performed at 1650°C or higher, the weight before and after sintering decreased by about 7% due to the sublimation of zinc oxide, and the composition deviated.

[0104] (Oxide Semiconductor Thin Film Examples 11 and 12) An oxide semiconductor thin film was produced using the sputtering targets of Sputtering Target Examples 1 and 2, and the mobility, band gap, and etching rate of a predetermined etchant were measured as described above.

[0105] (Oxide Semiconductor Thin Film Comparative Examples 11-13) Using a plurality of sputtering targets, oxide semiconductor thin films having the compositions shown in Table 3 were produced, and the mobility, band gap, and etching rate of a predetermined etchant were measured as described above. In addition, whether or not the thin films were amorphous was confirmed by XRD. The results are shown in Table 3.

[0106] As a result, the oxide semiconductor thin films of Examples 11 and 12 obtained desired characteristics in all items of mobility, band gap, and etching rate, but in Comparative Examples 11 to 13, none of the desired characteristics were obtained.

[0108] (Thin Film Transistor Examples 21 and 22) Manufacturing Figure 6 The thin film transistors of Examples 21 and 22 do not have a cap layer 14 as in the structure of . As the active layer 13, In-Sn-Ga-Ge-O of Examples 11 and 12 shown in Table 3 was used, and the film thickness was set to 50 nm.

[0109] The embodiment is to set the element ratio of the oxide to In X Sn Y Ga V Ge W Zn Z When using a thin film transistor having an active layer with X in the range of 0.4 to 0.8, Y in the range of 0 to 0.1, Z in the range of 0.2 to 0.6, in the range of X+Y+Z=1, V / (V+W+X+Y+Z) in the range of 0.01 to 0.22, and W / (V+W+X+Y+Z) in the range of 0.01 to 0.06, the TFT characteristics were measured.

[0110] (Thin Film Transistor Comparative Example 21) The production was carried out in the same manner as in Example 21 except that commercially available ITGZO was used as the active layer 13 and the film thickness was set to 50 nm. The comparative example is a thin film transistor using conventional material ITGZO as an active layer, and the TFT characteristics thereof were measured.

[0111] (Thin Film Transistor Examples 23 and 24) Manufacturing Figure 5 The thin film transistors of Examples 23 and 24 have a cap layer 14 like the structure of . As the active layer 13, In-Sn-Ga-Ge-O of Examples 11 and 12 shown in Table 3 was used, and the film thickness was set to 50 nm. As the cap layer, commercially available IGZO136 was used, and the film thickness was set to 15 nm.

[0112] The embodiment is to set the element ratio of the oxide to In X Sn Y Ga V Ge W Zn Z When using a thin film transistor having an active layer with X in the range of 0.4 to 0.8, Y in the range of 0 to 0.1, and Z in the range of 0.2 to 0.6, in the range of X+Y+Z=1, V / (V+W+X+Y+Z) in the range of 0.01 to 0.22, and W / (V+W+X+Y+Z) in the range of 0.01 to 0.06, and a cap layer provided on the upper layer, the TFT characteristics were measured.

[0113] (Thin Film Transistor Comparative Example 22) The production was carried out in the same manner as in Example 23 except that commercially available IGZO was used as the active layer 13 and the film thickness was set to 50 nm. The comparative example is a thin film transistor using conventional material ITGZO as an active layer and a cap layer as an upper layer, and the TFT characteristics thereof were measured.

[0114] (TFT Characteristics Comparison) The initial characteristics, PBTS (Positive Bias Temperature Stress), NBTS (Negative Bias Temperature Stress), and NBITS (Negative Bias Illustration Temperature Stress) of the thin film transistors of Examples 21, 22, and Comparative Example 21 were measured, respectively. The results are as follows: Figures 9 to 12 As shown. Figures 9 to 12 In the figure, (a) corresponds to Example 21, (b) corresponds to Example 22, and (c) corresponds to Comparative Example 21.

[0115] From these results, it was confirmed that the Examples can obtain characteristics of mobility equal to or higher than that of the Comparative Examples and light resistance (NBITS) equal to or higher than that of the Comparative Examples. It can be seen from this that according to the material concept of the present invention, the characteristics can be improved with respect to stress testing.

[0116] (TFT Characteristics Comparison) The initial characteristics, PBTS (Positive Bias Temperature Stress), NBTS (Negative Bias Temperature Stress), and NBITS (Negative Bias Illustration Temperature Stress) of the thin film transistors of Examples 23, 24 and Comparative Example 22 were measured respectively. The results are as follows: Figure 13 to Figure 16 As shown. Figure 13 to Figure 16 In the figure, (a) corresponds to Example 23, (b) corresponds to Example 24, and (c) corresponds to Comparative Example 22.

[0117] From this result, it can be confirmed that the Example can obtain characteristics with a mobility equal to or higher than that of the Comparative Example and with good reliability (PBTS, NBTS).

[0118] Description of Reference Numerals 10. Substrate 11. Gate electrode 11a Gate electrode material layer 12 Gate insulation film 13 Active layer 13a Active layer material layer 14 Covering layer 14a Covering material layer 15a Metal material layer for source and drain 15S Source electrode 15D Drain electrode 16 Protective film 16a Protective film material layer 16S, 16D interlayer connection holes 100 Thin Film Transistor

Claims

1. A sputtering target for forming an oxide semiconductor thin film, which is used to form an oxide semiconductor thin film. It is composed of an oxide sintered body containing a predetermined oxide. The element ratio of the predetermined oxide is In X Sn Y Ga V Ge W Zn Z When X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is 0.01 to 0.22, and W / (V+W+X+Y+Z) is 0.01 to 0.

06.

2. The sputtering target for forming an oxide semiconductor thin film according to claim 1, wherein The oxide sintered body further contains a group A element, and the group A element is at least one element selected from the group consisting of Ti, Ta, Zr, Y, Al, Mg, and Sb.

3. The sputtering target for forming an oxide semiconductor thin film according to claim 2, wherein: Ti is less than 2 at%, Ta is less than 2 at%, Zr is less than 3 at%, Y is less than 4 at%, Al is less than 5 at%, Mg is less than 5 at%, Sb is less than 9 at%, The content of the A group elements is less than 10 at %. 4 . The sputtering target for forming an oxide semiconductor thin film according to claim 1 , wherein the sputtering target has a relative density of 90% or more.

5. The method for producing a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body according to any one of claims 1 to 4, wherein: The sputtering target is used to form an oxide semiconductor thin film. The method mixes indium oxide powder, tin oxide powder, zinc oxide powder, gallium oxide and germanium oxide powder and forms a molded body, and sinters the molded body at 1100° C. to 1650° C. to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body.

6. The method for producing a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body according to any one of claims 1 to 4, wherein: The sputtering target is used to form an oxide semiconductor thin film. The method comprises mixing oxides, hydroxides or carbonates of indium, tin, zinc, gallium and germanium and pre-sintering the mixture at 600°C to 1500°C to obtain a precursor powder, molding the obtained precursor powder into a molded body, and sintering the molded body at a temperature between 1100°C and 1650°C to manufacture a sputtering target for forming an oxide semiconductor thin film having an oxide sintered body.

7. An oxide semiconductor thin film composed of an oxide semiconductor containing a predetermined oxide, in, The element ratio of the predetermined oxide is In X Sn Y Ga V Ge W Zn Z When X is 0.4 to 0.8, Y is 0 to 0.1, and Z is 0.2 to 0.6, and is in the range of X+Y+Z=1, V / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.22, and W / (V+W+X+Y+Z) is greater than or equal to 0.01 and less than or equal to 0.

06.

8. The oxide semiconductor thin film according to claim 7, wherein the mobility is 15 to 30 cm 2 / V·s, and the band gap is greater than 2.75 eV. 9 . The oxide semiconductor thin film according to claim 7 , wherein the etching rate of the oxide semiconductor thin film when etched with a phosphoric acid and acetic acid-based etchant is 1 nm / s or more. 10 . The oxide semiconductor thin film according to claim 7 , further comprising a group A element, wherein the group A element is at least one element selected from the group consisting of Ti, Ta, Zr, Y, Al, Mg and Sb.

11. The oxide semiconductor thin film according to claim 10, wherein Ti is less than 2 at%, Ta is less than 2 at%, Zr is less than 3 at%, Y is less than 4 at%, Al is less than 5 at%, Mg is less than 5 at%, Sb is less than 9 at%, The content of the A group elements is less than 10 at %.

12. A thin film semiconductor device comprising: Gate electrode, A gate insulating film provided on the gate electrode, an active layer formed of a high-mobility oxide semiconductor thin film provided on the gate insulating film, and A source electrode and a drain electrode connected to the active layer; in, The active layer is formed of the oxide semiconductor thin film according to any one of claims 7 to 11. 13 . The thin-film semiconductor device according to claim 12 , comprising a cap layer provided so as to cover the active layer.

14. The thin film semiconductor device according to claim 13, wherein: The cap layer is suitable for an etching ratio when patterned together with the active layer.

15. The method for manufacturing a thin film semiconductor device according to claim 12, comprising the following steps: forming a gate insulating film on the gate electrode, forming an active layer composed of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering, patterning the active layer, forming a metal layer with the patterned active layer as a base film, and The metal layer is patterned by wet etching to form a source electrode and a drain electrode.

16. The method for manufacturing a thin film semiconductor device according to claim 13 or 14, comprising the following steps: forming a gate insulating film on the gate electrode, forming an active layer composed of a high-mobility oxide semiconductor thin film on the gate insulating film by sputtering, forming the cap layer on the active layer by sputtering, Patterning the stacked film of the active layer and the cover layer, forming a metal layer with the patterned active layer and the cap layer as a base film, and The metal layer is patterned by wet etching to form a source electrode and a drain electrode.

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