Miniature LED structure and miniature LED panel
By vertically stacking three mini LEDs in the micro LED structure and adding reflective layers, the problem of difficult to reduce the pixel size is solved, and higher lighting efficiency and resolution are achieved.
Patent Information
- Application Number
- CN202380055497.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-30
- Publication Date
- 2025-05-06
AI Technical Summary
The existing micro LED technology faces the problem of difficulty in reducing the pixel size, which makes it impossible to adapt to more pixels in the same display area. Especially in full-color micro LED panels, the size of sub-pixels and spatial arrangement have a direct impact on the pixel size.
A micro LED structure is formed by placing three vertically stacked micro LEDs on different layers of the micro LED structure and electrically connecting to the integrated circuit (IC) backplane. In addition, a reflective layer is added to improve light efficiency and reduce structural space occupancy through the cutout design.
This micro LED structure effectively improves the lighting efficiency in a single pixel area, and improves the resolution of the micro LED panel, reducing the pixel size, thereby adapting to more pixels in the same display area.
Smart Images

Figure CN119949058A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to micro light emitting diode (LED) technology, and more particularly to a micro LED structure and a full-color micro LED panel using the micro LED structure. Background Art
[0002] Inorganic micro-light emitting diodes are also referred to as "micro-LEDs". They are becoming increasingly important due to their use in a variety of applications including, for example, self-emissive micro-displays, visible light communications, and optogenetics. Micro-LEDs have greater output performance than conventional LEDs due to better strain relaxation, improved light extraction efficiency, uniform current spreading, etc. In addition, compared to conventional LEDs, the micro-LEDs have improved thermal effects, improved operation at higher current densities, better responsivity, a larger operating temperature range, higher resolution, higher color gamut, higher contrast, lower power consumption, etc.
[0003] Micro LED panels are manufactured by integrating an array of thousands or even millions of micro LEDs with a driver circuit backplane. Each pixel of the micro LED panel is formed by one or more micro LEDs. The micro LED panel can be a monochrome panel or a multi-color panel. In particular, for a full-color LED panel, each pixel can also include a plurality of sub-pixels formed by a plurality of micro LEDs, each of which corresponds to a different color. For example, three micro LEDs corresponding to red, green, and blue, respectively, can be superimposed to form a pixel. Different colors can be mixed to produce a wide array of colors.
[0004] However, existing micro-LED technology faces several challenges. For example, one challenge is to reduce the pixel size so that more pixels can fit into the same display area. For full-color micro-LEDs, the pixel size is also determined by the size of the sub-pixels and how they are arranged in space. Therefore, it is desirable to develop a micro-LED structure that can efficiently arrange the sub-pixels in the pixel. Summary of the invention
[0005] The present disclosure provides a micro LED structure that solves problems in the related art, such as the above-mentioned problems. In particular, the disclosed micro LED structure integrates three vertically stacked micro LEDs by placing them on different layers of the micro LED structure and electrically connecting them to an integrated circuit (IC) backplane. The micro LED structure effectively improves the lighting efficiency within a single pixel area while improving the resolution of the micro LED panel.
[0006] Furthermore, the disclosed micro-LED structure further improves light efficiency by including a reflective layer, which not only effectively increases the amount of light emitted by each vertically stacked micro-LED, but also reduces crosstalk between the vertically stacked micro-LEDs.
[0007] Consistent with the disclosed embodiments, a plurality of disclosed micro-LED structures can be arranged in a micro-LED array to form a micro-LED panel. Each of the plurality of micro-LED structures corresponds to a pixel of the disclosed micro-LED structure, and a plurality of vertically stacked micro-LEDs in the pixel correspond to a plurality of sub-pixels, respectively.
[0008] Consistent with the disclosed embodiments, each layer of the disclosed micro-LED structure can have other simple shapes, with one or more cutouts as needed to allow vias to pass through. This arrangement can reduce the footprint of the micro-LED structure and thus lead to higher resolution of the LED panel.
[0009] In some embodiments, the disclosed micro LED structure includes an IC backplane, at least three mesa structures stacked along a vertical axis, and a final conductive layer formed over the at least three mesa structures.
[0010] In some embodiments, the at least three mesa structures include a first mesa structure formed on the IC backplane, a second mesa structure formed on the first mesa structure, and a third mesa structure formed on the second mesa structure.
[0011] In some embodiments, there may be a dielectric layer between two adjacent mesa structures. The dielectric layer may bond the two adjacent mesa structures together. The dielectric layer may be made of silicon dioxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), silicon nitride carbon (SiCN), titanium dioxide (TiO2), or aluminum oxide (Al2O3).
[0012] In some embodiments, each of the three mesa structures includes, from bottom to top, a bottom conductive layer, a light emitting layer, and an optional top conductive layer. Each of these layers may have cutouts. The top and bottom conductive layers may be films made of transparent conductive oxides (TCOs), such as indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimony-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO).
[0013] In some embodiments, the top sides of the light emitting layers may each have a top contact through which each light emitting layer is electrically connected to the final conductive layer. The top contact may be an N-type contact or a P-type contact.
[0014] In some embodiments, the top contact can be disposed on top of the light emitting layer. In some embodiments, the top contact can be disposed on top of the top conductive layer. In some embodiments, the top contact can be disposed on the bottom of the top conductive layer.
[0015] In some embodiments, the second and third mesa structures can each optionally have a top conductive layer.
[0016] In some embodiments, the bottom conductive layer of the first mesa structure can be electrically connected to the IC backplate through a pad. The bottom conductive layers of the second and third mesa structures can each be electrically connected to the IC backplate through a pad.
[0017] In some embodiments, the conductive layer can have a first conductivity type, and the second and third semiconductor layers have a second conductivity type.
[0018] In some embodiments, each light-emitting layer includes a P-type semiconductor layer, an N-type semiconductor layer, and a quantum well layer located between the P-type semiconductor layer and the N-type semiconductor layer. For example, each light-emitting layer may include a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top, thereby forming a PN junction; or alternatively, each light-emitting layer may include an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top, thereby forming an NP connection.
[0019] In some embodiments, adjacent micro-LED structures in the LED panel can connect their final conductive layers and form a groove. The formed groove is located between adjacent micro-LED structures, and its bottom surface can be lower than the top surface of the first light-emitting layer or at least flush with the top surface of the first light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 is a top view of a micro-LED structure according to some embodiments of the present disclosure;
[0021] Figures 2A-2C According to some embodiments of the present disclosure, Figure 1 Cross-sectional views of the micro-LED structure at different cross-sections;
[0022] Figure 3 is a cross-sectional view of an exemplary micro LED panel according to some embodiments of the present disclosure. DETAILED DESCRIPTION
[0023] Reference will now be made in detail to exemplary embodiments to provide a further understanding of the present disclosure. The specific embodiments and drawings discussed merely illustrate specific ways to make and use the present disclosure and do not limit the scope of the present disclosure or the appended claims.
[0024] Figure 1 is a top view of a micro LED structure 10 according to some embodiments of the present disclosure. Figures 2A-2C are along Figure 1 10A- 10A′, 10B- 10B′, and 10C- 10C′ are cross-sectional views of the micro LED structure 10 .
[0025] Specifically, Figure 2A According to some embodiments of the present disclosure, along Figure 1 FIG. 1 is a cross-sectional view of the micro-LED structure 10 taken along line 10A-10A'. Figure 2A As shown, the micro LED structure 10 includes an IC backplane 500, and the IC backplane 500 has at least three pads 510, 520 and 530 (530 is Figure 2A Not shown, but in Figure 1 ) and at least three mesa structures 100, 200, and 300 stacked along a vertical axis. In some embodiments, the at least three mesa structures include, from bottom to top, a first mesa structure 100 formed on an IC backplane 500, a second mesa structure 200 formed on the first mesa structure 100, and a third mesa structure 300 formed on the second mesa structure 200. In some embodiments, a first dielectric layer 410 may be formed between the first mesa structure 100 and the second mesa structure 200; a second dielectric layer 420 may be formed between the second mesa structure 200 and the third mesa structure 300.
[0026] In some embodiments, each of the at least three mesa structures may include a bottom conductive layer, a light-emitting layer, and an optional top conductive layer from bottom to top. Each layer may have other substantially regular shapes with cutouts (e.g., a circle, a rectangle with or without rounded corners, etc.). For example, the first mesa structure 100 includes a first light-emitting layer 110 with a first cutout 112, a first bottom conductive layer 120 with a first cutout (not shown), and a first top conductive layer 130 with a first cutout (not shown); the second mesa structure includes a second light-emitting layer 210 with a first cutout 212, a second cutout 214, and a third cutout 216, and a second bottom conductive layer 220 with a first cutout 222 and a second cutout 226, and the third mesa structure 300 includes a third light-emitting layer 310 and a third bottom conductive layer 320 with a first cutout 322. In some embodiments, the final conductive layer 430 covers all of the at least three mesa structures.
[0027] In some embodiments, the top sides of the light emitting layers can each have a top contact through which each light emitting layer is electrically connected to the final conductive layer 430. The top contact can be an N-type contact or a P-type contact.
[0028] In some embodiments, the top contact can be disposed on top of the light-emitting layer. For example, the top contact 340 is disposed on top of the third light-emitting layer 300, connecting the top side of the third light-emitting layer 300 to the final conductive layer 430; the top contact 240 (e.g. Figure 2B As shown in the figure, it is arranged on the top of the second light-emitting layer 200 to connect the top side of the second light-emitting layer 200 to the final conductive layer 430.
[0029] In some embodiments, a top contact may be disposed on top of the top conductive layer. Figure 2C As shown, a top contact 140 is disposed on top of the first top conductive layer 130 , connecting the top side of the first light emitting layer 100 to the final conductive layer 430 .
[0030] In some embodiments, at least three pads are each connected to a conductive layer. For example, a first pad 510 of at least three pads of the IC back plate 500 is electrically connected to the first bottom conductive layer 120; a second pad 520 of at least three pads of the IC back plate 500 is electrically connected to the second bottom conductive layer 220 through a first via; a third pad 530 of at least three pads of the IC back plate 500 is electrically connected to the third bottom conductive layer through a second via 700.
[0031] In some embodiments, the first bottom conductive layer 120 can be a bottom bonding layer that bonds the first light emitting layer 110 to the IC backplate 500. In some embodiments, the first bottom conductive layer 120 can be bonded to the IC backplate 500 by an additional bonding layer 440. In some embodiments, the bonding layer 440 can be a metal bonding layer.
[0032] Re-reference Figure 1 . When the layers of the micro LED structure are projected vertically onto a horizontal plane, each layer forms a projected area on the horizontal plane. Each projected area on the horizontal plane has an outline, which is referred to herein as the projected outline in the top view (i.e., top view). In some embodiments, the disclosed micro LED structure 10 is configured so that the projected outline of the upper light emitting layer in the top view is located within the projected shape of the lower light emitting layer in the top view, thereby forming a plurality of mesa structures with different widths. The top conductive layer 430 may cover all three mesa structures. In some embodiments, the projected outline in the top view of the upper layer may be substantially located within the projected shape of the top view of the lower layer, that is, the projected outline in the top view of the upper layer may be located within the projected shape of the lower layer.
[0033] More specifically, in some embodiments, the projection contour of the light-emitting layer 310 is located within the projection contour of the third bottom conductive layer 320; the projection contour of the light-emitting layer 210 is located within the contour of the second bottom conductive layer 220, and the projection contour of the first light-emitting layer 110 is located within the projection contour of the first bottom conductive layer 120.
[0034] In some embodiments, the top connection layer may be optional. When a top connection layer is present, the projected profile of the top connection layer may be the same as or only slightly smaller than the projected profile of the light emitting layer directly below it. For example, the top conductive layer 130 may have a projected profile that overlaps with the projected profile of the first light emitting layer 110, or more precisely, due to the inclined sidewalls, the top conductive layer 130 may have a projected profile that is only slightly smaller than the projected profile of the first light emitting layer 110, which will be discussed in further detail in a later section.
[0035] In some embodiments, the first bottom conductive layer 120, the first light-emitting layer 110, the first top conductive layer 130, the first dielectric layer 410, the second bottom conductive layer 220, the second light-emitting layer 210, the second dielectric layer 420, the third bottom conductive layer 320, and the third light-emitting layer 310 all have other regular shapes with cutouts (e.g., a circle, an ellipse, a rectangle with or without rounded corners, etc.).
[0036] More generally, if Figures 2A-2C As shown, comparing any two layers, i.e., the first bottom conductive layer 120, the first light-emitting layer 110, the first top conductive layer 130, the first dielectric layer 410, the second bottom conductive layer 220, the second light-emitting layer 210, the second dielectric layer 420, the third bottom conductive layer 320, and the third bottom light-emitting layer 310, the first outline of the top view formed by the upper layer can be set within the second outline of the top view formed by the lower layer.
[0037] In some embodiments, the sidewalls of an upper layer are offset from the sidewalls of its adjacent lower layer. Figures 2A-2C As shown, the sidewalls of each layer of the micro LED structure can be aligned with an inclined straight line from a side view, with occasional steps. In some exemplary embodiments, each of the first dielectric layer, the second bottom conductive layer, the second light-emitting layer, the second dielectric layer, the third bottom conductive layer, and the third light-emitting layer includes a sidewall that is generally aligned along a straight line in a side view, and the straight line is inclined at a certain angle. In some exemplary embodiments, the layer may have a basic rectangle with a cutout. Thus, the micro LED structure can have four sides, and the edges of the layers on each side are inclined at a certain angle. The angles may or may not be consistent for all four edges.
[0038] In some embodiments, vias (i.e., 600, 700) may be provided and accommodated in the cutouts. For example, the first via 600 electrically connects the second pad 520 and the second bottom conductive layer 220, and passes through the second light-emitting layer 210 in its second cutout 214; the second via 700 electrically connects the third pad 530 to the third bottom conductive layer 320 from its top side, and passes through the first bottom conductive layer 120 in its first cutout 122, the first light-emitting layer 110 in its first cutout 112, and the first light-emitting layer 110 in its first cutout 114. Figure 1 The first top conductive layer in the first cutout 222 thereof, the second bottom conductive layer 220 in the first cutout 212 thereof, and the third bottom conductive layer 320 in the first cutout 322 thereof.
[0039] In some embodiments, the top contact may also be disposed and accommodated in the cutouts. For example, the top contact 140 is disposed in the third cutout 226 of the first light emitting layer 110 and the second cutout 216 of the second bottom connection layer 220. It is worth noting that because the top contact connects each light emitting layer to the final conductive layer disposed above each light emitting layer, and because the upper layer always has a smaller projected profile than the layer below it, the top contact does not always need to be disposed in the cutout to achieve the goal of having a smaller LED structure footprint.
[0040] In some embodiments, the vias (ie, 600, 700) and the final conductive layer 430 can be tilted at an angle to the adjacent sides of the micro LED structure. Figures 2A-2C As shown, the vias (eg, first via 600, second via 700) and final conductive layer 430 may each be the same distance from the layers of the micro LED structure at their heights.
[0041] In some embodiments, the sidewalls of the first dielectric layer 410, the second bottom conductive layer 220, the second light emitting layer 210, the second dielectric layer 420, and the third bottom conductive layer 320 are all sloped. In some embodiments, the sidewalls can be sloped at the same ratio as adjacent vias.
[0042] Continue to refer Figure 1 A. In some embodiments, dielectric material 800 may be filled around the mesa structure. In some embodiments, dielectric material 800 may be filled in the gaps of micro LED structure 10, thereby preventing the light-emitting layers (e.g., light-emitting layers 100, 200, 300) from being electrically connected to each other. In some embodiments, dielectric material 800 may also be filled in the gaps between vias and structural layers (i.e., conductive layers and light-emitting layers), and finally between conductive layer 430 and structural layers (i.e., conductive layers and light-emitting layers).
[0043] In some embodiments, the light emitting layers 110, 210, 310 can emit light or light patterns of different colors. In some exemplary embodiments, the light emitting layer 110 is selected as a red light emitting layer, the light emitting layer 210 is selected as a green light emitting layer, and the light emitting layer 310 is selected as a blue light emitting layer. The above color assignments are for illustrative purposes only. Consistent with the disclosed embodiments, other combinations of light colors can be assigned to the light emitting layers to obtain any desired results.
[0044] In some embodiments, each of the light emitting layers 110, 210, 310 may include two semiconductor layers of different conductivity types (e.g., P-type and N-type), and a quantum well layer between the two different types of semiconductor layers. In some embodiments, the light emitting layers 110, 210, 310 may each have a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top. In some other embodiments, each of the light emitting layers 110, 210, 310 may have an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top.
[0045] In some embodiments, the conductive layer can be transparent or opaque. In some embodiments, the material of the conductive bonding layer is selected from one of metal, composite metal or transparent conductive material. In some embodiments, the transparent conductive material can be made of transparent plastic (resin) or silicon dioxide (SiO2), such as spin-on glass (SOG), adhesive Micro Resist BCL-1200, etc. The metal can be selected from copper (Cu), gold (Au), etc. In some embodiments, the thickness of the conductive bonding layer can be in the range of about 0.1 micron to about 5 microns. In some embodiments, the metal composition for the bonding layer may include Au-Au bonding, Au-Sn bonding, Au-In bonding, Ti-Ti bonding, Cu-Cu bonding, or a combination thereof. For example, when Au-Au bonding is required, two layers of Au each need a chromium (Cr) coating as an adhesive layer, and a platinum (Pt) coating between the gold layer and the chromium coating as an anti-diffusion layer. The Cr layer and the Pt layer can be formed on the two Au layers to be bonded. In some embodiments, when the thickness of the two Au layers to be bonded is approximately the same, Au interdiffusion on the two Au layers can bond the two layers together under high pressure and temperature. Exemplary bonding techniques may include eutectic bonding, thermocompression bonding, and transient liquid phase (TLP).
[0046] In some embodiments, the dielectric layer (eg, 410, 420) may be a SiO2-SiO2 bonding layer. SiO2-SiO2 bonding may further reduce the thickness of the bonding layer while achieving higher bonding strength.
[0047] In some embodiments, the material of the conductive layer can be selected from a transparent conductive material, for example. In some embodiments, the transparent conductive material can be a transparent conductive oxide (TCO), for example, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimony-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO). In some embodiments, the thickness of the ITO layer can be in the range of about 0.01 micrometers to about 1 micrometer.
[0048] In some exemplary embodiments, the light-emitting layer 110 in the micro-LED structure 10 is designed to emit red light. Examples of red light-emitting layers include III-V nitrides, III-V arsenides, III-V-phosphides, and III-V antimonide epitaxial structures. In some embodiments, the film within the red light-emitting layer may include a layer of a P-type (Al)(In)(Ga)P, (Al)INGaP light-emitting layer, an N-type (Al)(In, Ga)P, or N-type GaAs. In some embodiments, the P-type may be Mg-doped or C-doped, and the N-type may be Si-doped. In some embodiments, the thickness of the light-emitting layer 110 may be in the range of about 0.3 microns to about 5 microns.
[0049] In some embodiments, the light emitting layer 210 in the micro LED structure 10 is designed to emit green light. Examples of green light emitting layers include III-V nitrides, III-V arsenides, III-V-phosphides, and III-V antimonide epitaxial structures. In some embodiments, the film within the green light emitting layer 210 may include a layer of P-type GaN / InGaN light emitting layer / N-type GaN. In some embodiments, the P-type may be doped with Mg, and the N-type may be doped with Si. In some embodiments, the thickness of the light emitting layer 210 may be in the range of about 0.3 microns to about 5 microns.
[0050] In some embodiments, the light emitting layer 310 in the micro LED structure 10 is designed to emit blue light. Examples of blue light emitting layers include III-V nitrides, III-V arsenides, III-V-phosphides, and III-V antimonide epitaxial structures. In some embodiments, the film within the blue light emitting layer 310 may include a layer of P-type GaN, InGaN light emitting layer, or N-type GaN. In some embodiments, the P-type may be doped with Mg, and the N-type may be doped with Si. In some embodiments, the thickness of the blue light emitting layer 310 may be in the range of about 0.3 microns to about 5 microns.
[0051] In some embodiments, in micro LED structure 10, the top conductive layer 430 of the topmost micro LED structure is disposed on light emitting layer 310. In some embodiments, the thickness of final connection layer 430 (ITO layer) can be about 0.01 micron to about 1 micron.
[0052] In some embodiments, microlens 900 can be formed on top of micro LED structure 10 .
[0053] In some embodiments, such as Figure 3 As shown, a plurality of micro LED structures 10 can be arranged into a micro LED array. In some embodiments, the final conductive layer 430 of each of the plurality of micro LED structures 10 is connected. In some embodiments, the connected final conductive layer 430 of each of the plurality of micro LED structures 10 can form a groove 60 between adjacent micro LED structures. The groove 60 formed between adjacent micro LED structures 10 can provide current management benefits for micro LED structure protection.
[0054] In some embodiments, the bottom of the trench 60 is flush with or lower than the top surface of the first light-emitting layer 110 , that is, not higher than the top surface of the first light-emitting layer 100 .
[0055] The micro-LED described in the disclosed embodiments has a very small volume. The micro-LED may be an organic LED or an inorganic LED. In some embodiments, the micro-LED may be applied to a micro-LED array panel. The light-emitting area of the micro-LED array panel may be very small, such as 1mm×1mm, 3mm×5mm, etc. In some embodiments, the light-emitting area may be the area of the micro-LED array in the micro-LED array panel. The micro-LED array panel may include one or more micro-LED arrays, which form a pixel array in which the micro-LED is a pixel, such as a 1600×1200, 680×480 or 1920×1080 pixel array. The diameter of the micro-LED may be in the range of about 100nm to 20μm, about 150nm to 10μm, or about 200nm to 2μm. In some embodiments, an IC backplane may be formed at the rear surface of the micro-LED array and electrically connected to the micro-LED array. In some embodiments, the IC backplane may obtain a signal, such as image data, from the outside via a signal line to control the on / off (e.g., emitting light or not) of the corresponding micro-LED.
[0056] Thus, different types of display panels can be manufactured. For example, in some embodiments, the resolution of the display panel can range from 8×8 to 3840×2160. Common display resolutions include QVGA with a resolution of 320×240 and an aspect ratio of 4:3, XGA with a resolution of 1024×768 and an aspect ratio of 4:3, D with a resolution of 1280×720 and an aspect ratio of 16:9, FHD with a resolution of 1920x1080 and an aspect ratio of 16:9, UHD with a resolution of 3840×2160 and an aspect ratio of 1:9, and 4K with a resolution of 4096×2160 and an aspect ratio of 1.9. There can also be a variety of pixel sizes, from sub-micron and below to 10 mm and above. The size of the entire display area can also vary greatly, from as small as a few tens of microns or less to hundreds of inches or more on the diagonal.
[0057] It should be understood by those skilled in the art that the micro LED display panel is not limited to the above structure and may include more or fewer components than those shown, or may combine some components, or utilize different components.
[0058] It should be noted that relational terms, such as "first" and "second", are used herein only to distinguish one entity or operation from another entity or operation, and do not require or imply any actual relationship or order between these entities or operations. In addition, the terms "comprises", "having", "containing", and "including" and other similar forms are intended to have equivalent meanings and are open-ended, in that one or more items following any of these terms are not intended to be an exhaustive list of these items, nor are they intended to be limited to the listed items.
[0059] As used herein, unless otherwise specifically stated, the term "or" includes all possible combinations unless otherwise feasible. For example, if it is stated that a database may include A or B, then, unless otherwise specifically stated or not feasible, the database may include A or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless otherwise specifically stated or not feasible, the database may include A or B or C, or A and B, or A and C, or B and C, or A and B and C.
[0060] Those skilled in the art will appreciate that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing the relevant hardware. The program may be stored in the above flash memory, the above conventional computer device, the above central processing module, the above adjustment module, etc.
[0061] The above description is only an embodiment of the present disclosure, and the present disclosure is not limited thereto. Modifications, equivalent substitutions and improvements made without departing from the concepts and principles of the present disclosure should fall within the scope of protection of the present disclosure.
Claims
1. A micro light emitting diode (LED) structure, comprising: An integrated circuit (IC) backplane comprising at least a first conductive pad, a second conductive pad, and a third conductive pad; At least three mesa structures stacked along a vertical axis, the at least three mesa structures comprising: a first mesa structure formed on the IC backplane; a second mesa structure formed on the first mesa structure; and a third mesa structure formed on the second mesa structure; and a first dielectric layer formed between the first mesa structure and the second mesa structure; a second dielectric layer formed between the second mesa structure and the third mesa structure; and Final conductive layer; Wherein, the first table structure comprises: a first light-emitting layer comprising at least one cutout; A first bottom conductive layer formed below the first light emitting layer, the first bottom conductive layer comprising at least one cutout; A first top conductive layer formed on the first light emitting layer, the first top conductive layer comprising at least one cutout; and a first top contact electrically connected to the first light emitting layer; The second mesa structure comprises: a second light emitting layer comprising at least one cutout; A second bottom conductive layer formed below the first light emitting layer, the second bottom conductive layer comprising at least one cutout; and a second top contact electrically connected to the second light emitting layer; The third table structure comprises: A third light-emitting layer; A third bottom conductive layer formed below the first light emitting layer, the third bottom conductive layer comprising at least one cutout; and a third top contact electrically connected to the third light emitting layer; The first conductive pad is electrically connected to the first bottom conductive structure; The second conductive pad is electrically connected to the second bottom conductive structure through a first via; The third conductive pad is electrically connected to the third bottom conductive structure through a second via hole; The final conductive layer is electrically connected to the first, second and third top contacts.
2. The micro LED structure according to claim 1, wherein: The second mesa structure further comprises: a second top conductive layer formed on the second light emitting layer, the second top conductive layer comprising at least one cutout; The second top contact electrically connects the second light emitting layer to the final conductive layer through the second top conductive layer.
3. The micro LED structure according to claim 1, wherein: The third table structure also includes: a third top conductive layer formed on the third light emitting layer; The third top contact electrically connects the third light emitting layer to the final conductive layer through the third top conductive layer.
4. The micro-LED structure according to claim 1, wherein: Each of the third bottom conductive layer, the second light emitting layer, the second bottom conductive layer, the first top conductive layer, the first light emitting layer, and the first bottom conductive layer includes a cutout aligned with the first via hole.
5. The micro LED structure according to claim 1, wherein: The cutout of the second light emitting layer is aligned with the cutout of the second bottom conductive layer.
6. The micro-LED structure according to claim 1, comprising a first layer and a second layer, wherein the first layer and the second layer are selected from: the first bottom conductive layer, the first light emitting layer, the first top conductive layer, the second bottom conductive layer, the second light emitting layer, the third bottom conductive layer, and the third light emitting layer; in, The first layer is below the second layer, the first layer forms a first outline in a top view, and the second layer forms a second outline in a top view, the second outline being disposed within the first outline.
7. The micro LED structure according to claim 1, wherein: Each of the first dielectric layer, the second bottom conductive layer, the second light emitting layer, the second dielectric layer, the third bottom conductive layer, and the third light emitting layer includes a sidewall aligned with a substantially straight line in a side view, the substantially straight line being inclined at a first angle.
8. The micro LED structure according to claim 7, wherein: In the side view, each of the first via and the second via is separated by the same distance from at least one sidewall of the first dielectric layer, the second bottom conductive layer, the second light emitting layer, the second dielectric layer, the third bottom conductive layer, or the third light emitting layer.
9. The micro LED structure according to claim 1, wherein: Side walls of the first dielectric layer, the second bottom conductive layer, the second light emitting layer, the second dielectric layer, the third bottom conductive layer, and the third light emitting layer are all inclined. 10 . The micro LED structure of claim 1 , further comprising a bottom bonding layer bonding the first mesa structure to the first pad.
11. The micro LED array according to claim 1, wherein: Each of the first, second and third light emitting layers includes a P-type epitaxial layer, a light emitting layer and an N-type epitaxial layer.
12. The micro LED array according to claim 1, wherein: Each of the first, second and third light emitting layers is a quantum well layer.
13. The micro LED array of claim 1, wherein the first dielectric layer, the second dielectric layer, the first bottom conductive layer, the first top conductive layer, and the third bottom conductive layer are all transparent.
14. The micro LED structure according to claim 1, wherein: The first dielectric layer and the second dielectric layer are made of silicon dioxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), silicon carbon nitride (SiCN), titanium dioxide (TiO2) or aluminum oxide (Al2O3).
15. The micro-LED structure according to claim 1, wherein the first bottom conductive layer, the first top conductive layer, the second bottom conductive layer, the third bottom conductive layer, and the final conductive layer are made of indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimony-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO).
16. The micro LED structure according to claim 1, wherein: Each of the first, second and third top contacts is an N-type contact or a P-type contact. 17 . A micro LED array comprising a plurality of micro LED structures according to claim 1 , wherein the final conductive layers of the plurality of micro LED structures are connected.
18. The micro LED array of claim 17, wherein the connected final conductive layer forms trenches between adjacent micro LED structures of the plurality of micro LED structures.
19. The micro LED array according to claim 18, wherein: The bottom of the groove is flush with or lower than the top surface of the first light emitting layer of the plurality of micro LED structures.