Method for preparing poly-Si thin film based on thermal field design of vertical double-layer hot wire array

Abstract

The present invention discloses a method for preparing poly-Si thin films based on the thermal field design of a vertical double-layer hot wire array. By adjusting the layer spacing of the double-layer hot wire array and the current of the double-layer hot wire, the surface temperature of the hot wire and the range of the pyrolysis high-temperature zone are changed, the pyrolysis time and space of silane are expanded, the secondary pyrolysis of silane is promoted, the components and concentration distribution of the silane pyrolysis intermediate products reaching the substrate surface can be effectively controlled, and the ratio of SiH / SiH2 active groups is increased; under a vacuum of 0.5 Pa - 5.0 Pa, the poly-Si thin film is deposited at a substrate temperature of 200 - 560 °C and a deposition time of 10 - 60 min. After the deposition is completed, the substrate temperature is raised to 200 - 650 °C, and the grown poly-Si thin film is subjected to vacuum annealing to obtain a poly-Si thin film with a high crystallization rate. The present invention uses the thermal field design of a vertical double-layer hot wire array, the high-temperature hot wire silane pyrolysis technology and the vacuum annealing technology to grow poly-Si thin films, and the crystallization quality can be significantly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of thin film preparation, and particularly to a method for preparing poly-Si thin film based on the thermal field design of a vertical double-layer hot wire array. Background Art

[0002] Due to the large-scale production of tunnel oxide passivated contact cells (TOPCon cells), the cell recombination loss has become a current research hotspot. To ensure the efficient selective transport of photo-generated carriers, it is necessary to improve the passivation performance of the back surface of the cell, and at the same time, it is also necessary to improve the crystallization rate of the poly-Si thin film in order to increase the carrier concentration and mobility.

[0003] The existing poly-Si thin films for TOPCon cells are mainly prepared by the following two methods, but both have defects:

[0004] 1. Plasma-enhanced chemical vapor deposition (PECVD): Due to the action of plasma on silane, there are a large number of free radicals, cations, and anions, and the working reaction pressure is relatively high. Groups with different charges are prone to agglomeration to generate dust.

[0005] 2. Low-pressure chemical vapor deposition (LPCVD): The thermal field distribution of low-pressure chemical vapor deposition is difficult to design. The cracking degree is inconsistent in some areas, and the concentration of intermediate products fluctuates greatly, resulting in an increase in the defect concentration of the poly-Si thin film. The distance between the cracking source and the center position of the quartz tube (the silicon wafer at the center position) is relatively far, and the active groups are prone to agglomeration during transmission. There is a phenomenon of silicon microparticle dust in the reaction chamber, which directly affects the uniformity and stability of the poly-Si thin film. Summary of the Invention

[0006] The purpose of the present invention is to provide a method for preparing poly-Si thin film based on the thermal field design of a vertical double-layer hot wire array to solve the above technical problems.

[0007] To achieve the above purpose, the technical solution provided by the present invention is:

[0008] A method for preparing poly-Si thin film based on the thermal field design of a vertical double-layer hot wire array, comprising the following steps:

[0009] (1) Substrate pretreatment: Pretreat the single-crystalline silicon substrate.

[0010] (2) Thin film deposition: Use the thermal field design of a vertical double-layer hot wire array and the high-temperature hot wire silane cracking technology to deposit and grow a poly-Si thin film on the single-crystalline silicon substrate.

[0011] (3) Annealing: Use vacuum annealing technology to anneal the grown poly-Si thin film.

[0012] In some embodiments, there are three ways of arranging the first-layer hot wires and the second-layer hot wire arrays, namely, a vertical double-layer head-to-head parallel-aligned hot wire array, a vertical double-layer head-to-foot parallel-aligned hot wire array, and a vertical double-layer staggered hot wire array, so as to realize the thermal cracking of silane by using the thermal field of the vertical double-layer hot wire array.

[0013] In some embodiments, each of the double-layer hot wires has an independent power supply, and the surface temperature of the hot wires and the range of the pyrolysis high-temperature zone are adjusted by independently controlling the hot wire currents of each layer, the component ratio and concentration distribution of the silane pyrolysis intermediate products are adjusted, and the ratio of SiH / SiH2 active groups is increased.

[0014] In some embodiments, the use of the vertical double-layer hot wire array thermal field design and the high-temperature hot wire silane pyrolysis technology to deposit and grow a poly-Si thin film on a single-crystalline silicon substrate includes:

[0015] The single-crystalline silicon substrate is heated to 200 - 560 °C, a mixed gas of SiH4 and H2 is introduced, the SiH4 / H2 gas flow ratio is controlled to be 1:3 - 1:9, the gate valve is adjusted to make the vacuum degree of the growth chamber 0.5 Pa - 5.0 Pa, the hot wire power supplies are respectively turned on, the current of the first-layer hot wires is adjusted to make the surface temperature of the first-layer hot wires 1700 - 1950 °C, and then the current of the second-layer hot wires is adjusted to make the surface temperature of the second-layer hot wires 1750 - 2250 °C, and the surface temperature of the second-layer hot wires is always higher than that of the first-layer hot wires. The silane pyrolysis active groups are deposited on the surface of the single-crystalline silicon substrate, and a poly-Si thin film with a thickness of 20 - 100 nm is grown at a single-crystalline silicon substrate temperature of 200 - 560 °C and a deposition time of 10 - 60 min.

[0016] In some embodiments, the use of the vacuum annealing technology to anneal the grown poly-Si thin film includes:

[0017] Stop introducing SiH4 and H2 gases, turn off the hot wire power supplies, heat the single-crystalline silicon substrate with the formed poly-Si thin film to 200 - 650 °C, and perform vacuum annealing on the grown poly-Si thin film for 10 - 60 min.

[0018] In some embodiments, the pretreatment of the single-crystalline silicon substrate includes:

[0019] Place the cleaned and dried single-crystalline silicon substrate on the sample rack of the hot wire chemical vapor deposition growth chamber, turn on the vacuum dry pump and the molecular pump in sequence to make the vacuum degree of the growth chamber reach below 1.0×10 -3 Pa, heat the single-crystalline silicon substrate to 150 °C, and degas the single-crystalline silicon substrate for half an hour.

[0020] In some embodiments, by controlling the flow rates and ratios of SiH4 and H2, adjusting the vacuum pressure in the growth chamber, and adjusting the temperatures and spacings of the first-layer hot wire and the second-layer hot wire, the cracking time and cracking space of silane are controlled to achieve the control of the composition and concentration of the active groups reaching the substrate. A film is deposited under a reasonable temperature regime, and the deposited film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si film.

[0021] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0022] The poly-Si film preparation method based on the thermal field design of a vertical double-layer hot wire array provided by the embodiments of the present application uses a vertical double-layer distributed hot wire array to thermally crack silane to prepare a poly-Si film with a high crystallization rate. After silane is cracked multiple times, the composition ratio and energy of the active groups reaching the substrate surface are well controlled. After combining with the vacuum annealing treatment of the grown film, the crystallization rate of the poly-Si film is significantly improved, which has good application prospects for the development of photovoltaic cells and optoelectronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings described herein are used to provide a further understanding of the present invention, and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention.

[0024] Figure 1 It is a schematic diagram of the layout of the vertical double-layer distributed hot wire array in the growth chamber of the present invention and the thermal cracking of silane.

[0025] Figure 2 It shows a schematic structural diagram of the first-layer hot wire.

[0026] Figure 3 It shows a schematic structural diagram of the second-layer hot wire.

[0027] Figure 4 It shows a three-dimensional schematic diagram of the first distribution (head-to-head parallel alignment) of the first-layer hot wire and the second-layer hot wire.

[0028] Figure 5 It shows a left view of the first distribution (head-to-head parallel alignment) of the first-layer hot wire and the second-layer hot wire.

[0029] Figure 6 It shows a three-dimensional schematic diagram of the second distribution (head-to-foot parallel alignment) of the first-layer hot wire and the second-layer hot wire.

[0030] Figure 7 It shows a left view of the second distribution (head-to-foot parallel alignment) of the first-layer hot wire and the second-layer hot wire.

[0031] Figure 8A three-dimensional schematic diagram showing the third distribution (double-layer dislocation) of the first-layer hot wire and the second-layer hot wire is shown.

[0032] Figure 9 A left view showing the third distribution (double-layer dislocation) of the first-layer hot wire and the second-layer hot wire is shown. Detailed implementation manners

[0033] This part will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The role of the accompanying drawings is to supplement the description of the text part of the specification, enabling people to intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the protection scope of the present invention.

[0034] Please refer to Figures 1 to 9 As shown, the embodiment of the present application provides a method for preparing a poly-Si thin film based on the thermal field design of a vertical double-layer hot wire array, including the following steps:

[0035] (1) Substrate pretreatment: Pretreat the single-crystalline silicon substrate.

[0036] For example, the pretreatment includes: placing the cleaned and dried single-crystalline silicon substrate on the sample rack of the hot wire chemical vapor deposition growth chamber, sequentially turning on the vacuum dry pump and the molecular pump, making the vacuum degree of the growth chamber reach below 1.0×10 -3 Pa, heating the single-crystalline silicon substrate to 150 °C, and degassing the single-crystalline silicon substrate for half an hour.

[0037] (2) Film deposition: Use the thermal field design of a vertical double-layer hot wire array and the high-temperature hot wire silane cracking technology to deposit and grow a poly-Si thin film on the single-crystalline silicon substrate.

[0038] As an example, the vertical double-layer hot wire array is composed of a first-layer hot wire and a second-layer hot wire, and there are specifically the following three distribution methods.

[0039] For example, as Figure 4 and Figure 5 show the first distribution (head-to-head parallel alignment) of the first-layer hot wire and the second-layer hot wire. The first-layer hot wire and the second-layer hot wire form the first vertical double-layer hot wire array (i.e., the vertical double-layer head-to-head parallel alignment hot wire array). Among them, Figure 4 the left hot wire in

[0040] is the first-layer hot wire. Figure 6 and Figure 7 show the second distribution (head-to-foot parallel alignment) of the first-layer hot wire and the second-layer hot wire. The first-layer hot wire and the second-layer hot wire form the second vertical double-layer hot wire array (i.e., the vertical double-layer head-to-foot parallel alignment hot wire array). Among them, Figure 6 the left hot wire in

[0041] For example, as Figure 8 and Figure 9 show the third distribution (double - layer dislocation) of the first - layer hot wire and the second - layer hot wire. The first - layer hot wire and the second - layer hot wire form the third vertical double - layer hot wire array (i.e., the vertical double - layer dislocated hot wire array). Among them, Figure 8 the hot wire on the left in

[0042] is the first - layer hot wire.

[0043] Therefore, there are three ways to arrange the first - layer hot wire and the second - layer hot wire array, namely, the vertical double - layer head - to - head parallel - aligned hot wire array, the vertical double - layer head - to - foot parallel - aligned hot wire array, and the vertical double - layer dislocated hot wire array.

[0044] It should be understood that for the above - mentioned three - type vertical double - layer hot wire arrays with different distributions, the thermal cracking of silane can be realized by using the thermal field of the vertical double - layer hot wire array. Compared with the existing hot - wire chemical vapor deposition (CVD) with only a single - layer wire array, it has the following advantages: 1. The temperature uniformity of the double - layer hot wire mapped to the substrate surface is improved; 2. The collision probability of silane with the hot wire increases, and the cracking efficiency of silane will be improved; 3. By adjusting the distance between the hot wire arrays, the range of the high - temperature zone can be adjusted, the polymerization of the active groups after cracking can be reduced, and the energy of the active groups reaching the substrate surface can also be increased; 4. By adjusting the surface temperature (hot - wire current) of the hot wire, the composition of the active groups after the cracking of silane can be controlled.

[0044] In some embodiments, each of the double - layer hot wires has an independent power supply. By independently controlling the hot - wire current of each layer, the surface temperature of the hot wire and the range of the cracking high - temperature zone can be adjusted, the component ratio and concentration distribution of the intermediate products of silane cracking can be adjusted, and the ratio of SiH / SiH2 active groups can be increased.

[0045] Preferably, the vertical double - layer dislocated hot wire array as shown in Figure 8 and Figure 9 is adopted to realize the thermal cracking of silane by using the thermal field of the vertical double - layer dislocated hot wire array.

[0046] Specifically, step (2) includes:

[0047] Heat the single-crystalline silicon substrate to 200 - 560 °C, introduce a mixed gas of SiH4 and H2, control the SiH4 / H2 gas flow ratio to be 1:3 - 1:9, adjust the gate valve to make the vacuum degree in the growth chamber 0.5 Pa - 5.0 Pa. Turn on the hot wire power supplies respectively, adjust the current of the first-layer hot wire to make the surface temperature of the first-layer hot wire 1700 - 1950 °C, then adjust the current of the second-layer hot wire to make the surface temperature of the second-layer hot wire 1750 - 2250 °C, and the surface temperature of the second-layer hot wire is always higher than that of the first-layer hot wire. The silane pyrolysis active groups are deposited on the surface of the single-crystalline silicon substrate, and a poly-Si thin film with a thickness of 20 - 100 nm is grown at a single-crystalline silicon substrate temperature of 200 - 560 °C and a deposition time of 10 - 60 min.

[0048] Therefore, by controlling the current of the first-layer hot wire and the second-layer hot wire, making the surface temperature of the first-layer hot wire 1700 - 1950 °C and the surface temperature of the second-layer hot wire 1750 - 2250 °C, after the silane enters the reaction chamber, it starts to crack when encountering the high-temperature hot wire. By adjusting the current of the first-layer hot wire, the current of the second-layer hot wire, and the distance between the first-layer hot wire and the second-layer hot wire, the component ratio and concentration distribution of the silane pyrolysis intermediate products (such as free radicals like SiH3, SiH2, SiH, etc.) reaching the substrate surface can be effectively controlled. At a substrate temperature of 200 - 560 °C and a deposition time of 10 - 60 min, a poly-Si thin film with a thickness of 20 - 100 nm is obtained. This method uses a vertical double-layer distributed hot wire array to improve the silane cracking efficiency, control the component ratio and concentration of the active groups reaching the substrate surface, and prepare a poly-Si thin film with a thickness of 20 - 100 nm under a reasonable temperature regime. The crystallization quality of the thin film is improved through vacuum annealing treatment.

[0049] As an example, in this step, by controlling the flow rate and ratio of SiH4 and H2, adjusting the vacuum pressure in the growth chamber, and by adjusting the temperatures and distances of the first-layer hot wire and the second-layer hot wire, the cracking time and cracking space of the silane are controlled, so as to achieve the control of the component and concentration of the active groups reaching the substrate, deposit the thin film under a reasonable temperature regime, and the deposited thin film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si thin film.

[0050] (3) Annealing: Use vacuum annealing technology to anneal the grown poly-Si thin film. Specifically, step (3) includes:

[0051] Stop introducing SiH4 and H2 gases, turn off the hot wire power supplies, heat the temperature of the single-crystalline silicon substrate with the grown poly-Si thin film to 200 - 650 °C, and conduct vacuum annealing on the grown poly-Si thin film for an annealing time of 10 - 60 min.

[0052] In summary, the embodiments of the present application adopt a vertical double-layer hot wire array thermal field design, a high-temperature hot wire silane cracking technology, and a vacuum annealing technology to achieve the preparation of poly-Si thin films with a high crystallization rate, which has good application prospects for the development of photovoltaic cells and optoelectronic devices. Specifically, by adjusting the layer spacing of the double-layer hot wire array and the current of the double-layer hot wire, the surface temperature of the hot wire and the range of the cracking high-temperature zone are changed, the silane cracking time and cracking space are expanded, the secondary cracking of silane is promoted, and the components and concentration distribution of the silane cracking intermediate products (such as free radicals such as SiH3, SiH2, and SiH) reaching the substrate surface can be effectively controlled, and the ratio of SiH / SiH2 active groups is increased; the poly-Si thin film is deposited at a substrate temperature of 200-560 °C and a deposition time of 10-60 min. After the deposition is completed, the substrate temperature is raised to 200-650 °C, and the grown poly-Si thin film is subjected to vacuum annealing for 10-60 min to obtain a poly-Si thin film with a high crystallization rate.

[0053] On the premise of no conflict, those skilled in the art can freely combine and superimpose the above additional technical features.

[0054] The above is only the preferred implementation mode of the present invention. As long as the technical solutions that achieve the purpose of the present invention by basically the same means fall within the protection scope of the present invention.

Claims

1. A method for preparing poly-Si thin films based on the thermal field design of a vertical double-layer hot wire array, characterized in that, It includes the following steps: (1) Substrate pretreatment: Pretreat the single-crystalline silicon substrate; (2) Thin film deposition: Use the vertical double-layer hot wire array thermal field design and high-temperature hot wire silane cracking technology to deposit and grow a poly-Si thin film on the single-crystalline silicon substrate; (3) Annealing: Use the vacuum annealing technology to anneal the grown poly-Si thin film; The depositing and growing of the poly-Si thin film on the single-crystalline silicon substrate by using the vertical double-layer hot wire array thermal field design and high-temperature hot wire silane cracking technology includes: Heat the single-crystalline silicon substrate to 200 - 560 °C, introduce a mixed gas of SiH4 and H2, control the SiH4 / H2 gas flow ratio to be 1:3 - 1:9, adjust the gate valve to make the vacuum degree of the growth chamber 0.5 Pa - 5.0 Pa, turn on the hot wire power supplies respectively, adjust the current of the first-layer hot wire to make the surface temperature of the first-layer hot wire 1700 - 1950 °C, then adjust the current of the second-layer hot wire to make the surface temperature of the second-layer hot wire 1750 - 2250 °C, and the surface temperature of the second-layer hot wire is always higher than that of the first-layer hot wire. The silane pyrolysis active groups are deposited on the surface of the single-crystalline silicon substrate, and a poly-Si thin film with a thickness of 20 - 100 nm is grown at a single-crystalline silicon substrate temperature of 200 - 560 °C and a deposition time of 10 - 60 min; There are three ways of arranging the first-layer hot wire and the second-layer hot wire array, namely the vertical double-layer head-to-head parallel aligned hot wire array, the vertical double-layer head-to-foot parallel aligned hot wire array, and the vertical double-layer staggered hot wire array, so as to realize the thermal cracking of silane by using the vertical double-layer hot wire array thermal field; Each of the double-layer hot wires has an independent power supply, and the surface temperature of the hot wire and the range of the pyrolysis high-temperature zone are adjusted by independently controlling the current of each layer of hot wire, the component ratio and concentration distribution of the silane pyrolysis intermediate products are adjusted, and the ratio of SiH / SiH2 active groups is increased.

2. The poly-Si thin film preparation method based on the thermal field design of a vertical double-layer hot wire array according to claim 1, wherein, The annealing of the grown poly-Si thin film by using the vacuum annealing technology includes: Stop introducing SiH4 and H2 gases, turn off the hot wire power supplies, heat the temperature of the single-crystalline silicon substrate with the formed poly-Si thin film to 200 - 650 °C, and perform vacuum annealing on the grown poly-Si thin film for 10 - 60 min.

3. The method for preparing poly-Si thin film based on the thermal field design of a vertical double-layer hot wire array according to claim 2, characterized in that The pretreatment of the single-crystalline silicon substrate includes: Place the cleaned and dried single-crystalline silicon substrate on the sample holder in the hot-wire chemical vapor deposition growth chamber. Sequentially turn on the dry vacuum pump and the molecular pump to make the vacuum degree in the growth chamber reach below 1.0×10 -3 Pa, heat the single-crystalline silicon substrate to 150 °C, and degas the single-crystalline silicon substrate for half an hour.

4. The poly-Si thin film preparation method based on the thermal field design of a vertical double-layer hot wire array according to claim 1, characterized in that, By controlling the flow rate and ratio of SiH4 and H2, adjusting the vacuum pressure in the growth chamber, and controlling the cracking time and cracking space of silane by adjusting the temperature and spacing of the first-layer hot wire and the second-layer hot wire, the control of the component and concentration of the active groups reaching the substrate is realized, the thin film is deposited under a reasonable temperature regime, and the deposited thin film is subjected to vacuum annealing, thereby improving the crystallization rate of the poly-Si thin film.

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