Chip sealing and resistance testing equipment and control methods

Abstract

This invention provides a chip sealing and resistance testing device and its control method, belonging to the field of chip testing technology. The device includes: a moving module comprising a horizontally movable base; a fixture fixed to the moving base, the fixture including a first cavity for positioning the chip under test; a resistance detection module fixed to the moving base and located below the fixture, the resistance detection module being used to detect the continuity of the resistive element of the chip under test at the detection position; and a sealing testing module disposed at the detection position and including a liftable sealing head and an airtightness test connector. The lower surface of the sealing head has a second cavity, the second cavity communicating with the airtightness test connector, the airtightness test connector being connected to an airtightness testing instrument. When the fixture is at the detection position, the sealing head descends to a height that fits against the fixture, so that the second cavity and the first cavity together form a sealed space. The testing device of this invention has high testing efficiency and a small overall size.

Description

Technical Field

[0001] This application relates to the field of chip testing technology, and in particular to a chip sealing and resistance testing device and its control method. Background Technology

[0002] During the chip manufacturing process, various performance tests are required. For chips with hermetic components and special resistance requirements, hermetic testing and resistance testing are usually performed.

[0003] Currently, airtightness testing and resistance testing are usually performed sequentially. At the airtightness testing station, an airtightness testing instrument is used to evacuate the area of ​​the chip under test and collect airtightness data. Then, a robotic arm or motion module transfers the chip to the resistance testing station for resistance testing. When a defective product is found during the airtightness testing process, it is removed through a dedicated channel, and then a qualified product proceeds to the next step of resistance testing.

[0004] Existing technologies for airtightness testing and resistance testing are inefficient and require large overall equipment. Summary of the Invention

[0005] One object of the present invention is to provide a chip sealing and resistance detection device with high detection efficiency and small overall size.

[0006] Another objective of this invention is to provide data support for further comprehensive analysis of chip conditions.

[0007] A further objective of this invention is to ensure the accuracy of the resistance detection location and to protect the probe.

[0008] Embodiments of the present invention provide a chip sealing and resistance testing device, comprising:

[0009] The mobile module includes a motion base that can move horizontally;

[0010] A fixture is fixed at the moving base, and the fixture includes a first cavity for positioning the chip under test;

[0011] A resistance detection module is fixed at the moving base and located below the fixture. The resistance detection module and the fixture move with the moving base from the receiving position to the detection position. The resistance detection module is used to detect the continuity of the resistive element of the chip under test at the detection position.

[0012] A sealing test module is provided at the test position and includes a liftable sealing head and an airtightness test connector. The lower surface of the sealing head is provided with a second cavity, which is connected to the airtightness test connector. The airtightness test connector is connected to an airtightness test instrument. When the fixture is located at the test position, the sealing head descends to a height that fits against the fixture, so that the second cavity and the first cavity together form a sealed space.

[0013] Optionally, the resistance detection module includes a probe base and a probe assembly mounted on the upper surface of the probe base;

[0014] One of the probe base and the fixture is provided with a guide sleeve, and the other is provided with a guide post. The guide sleeve and the guide post are adapted to ensure that the probe group is aligned with the probe point corresponding to the resistive element.

[0015] Optionally, the resistance detection module further includes a top block that can be raised and lowered relative to the probe base. The top block has through holes for each probe of the probe group to pass through. When the top block is not in contact with the chip under test, the probe is located in the through hole. After the top block contacts the chip under test, the probe can be controllably extended out of the through hole and contact the corresponding probe point.

[0016] Optionally, the probe is detachably connected to the probe base.

[0017] Optionally, the chip sealing and resistance testing equipment also includes a photoelectric sensor for detecting whether the chip under test has reached the detection position.

[0018] Optionally, resistance testing and sealing testing can be performed simultaneously.

[0019] In particular, the present invention also provides a chip sealing and resistance detection control method for controlling the chip sealing and resistance detection device described in any of the above claims, the method comprising:

[0020] Control the motion platform to move from the receiving position to the detection position;

[0021] When the moving base reaches the detection position, the resistance detection module and the sealing detection module are activated simultaneously.

[0022] After resistance and sealing tests are completed, the moving base is controlled to return from the detection position to the receiving position.

[0023] Optionally, the step of controlling the simultaneous activation of the resistance detection module and the sealing detection module includes:

[0024] Control the sealing head to press down until it fits against the fixture, and start the airtightness testing instrument;

[0025] Control the resistance detection module to move upward until the probe contacts the detection point.

[0026] Optionally, before the step of controlling the simultaneous activation of the resistance detection module and the sealing detection module when the moving base reaches the detection position, the method further includes:

[0027] The photoelectric sensor identifies whether the chip under test has reached the detection position.

[0028] Optionally, after the step of controlling the simultaneous activation of the resistance detection module and the sealing detection module, the method further includes:

[0029] Determine whether the airtightness meets the requirements;

[0030] If the airtightness does not meet the requirements, stop the resistance test or mark the resistance test data as abnormal.

[0031] When the airtightness meets the requirements, the airtightness test data and resistance test data are saved accordingly.

[0032] According to a first aspect of the present invention, a device is provided that can simultaneously perform sealing and resistance testing on a chip. By mounting the resistance testing module together with a fixture for positioning the chip under test on a moving base, the moving base moves the resistance testing module and the fixture together to a position below the sealing testing module. Then, the sealing testing module and the resistance testing module are activated, allowing both tests to be performed simultaneously at one workstation, thereby improving testing efficiency and saving space in the testing mechanism.

[0033] Furthermore, the device can simultaneously detect the chip's sealing and resistance, allowing sealing and resistance data to be obtained simultaneously and easily correlated. This enables the data to reflect the resistance under the current sealing condition, establishes a correlation between the two, and provides data support for further comprehensive analysis of the chip's condition.

[0034] According to a second aspect of the present invention, by providing a guide sleeve and a guide post between the probe base and the fixture, the positional alignment between each probe on the probe base and the probe point on the fixture can be ensured, thus ensuring that the test can be performed accurately.

[0035] Furthermore, the resistance detection module also includes a top block. After the resistance detection module is activated, the probe base and the top block rise together until the top block contacts the bottom surface of the chip under test. At this point, the probe is located within the through-hole of the top block and will not directly impact the chip under test, thus protecting the probe. By setting up a guiding mechanism and a top block, the alignment between the probe and the detection point is ensured, and the position of the probe is further defined by the through-hole in the top block, thus protecting the probe while ensuring positional accuracy.

[0036] According to a third aspect of the present invention, this application also provides a control method for a chip sealing and resistance detection device, used to stop resistance detection or mark the resistance detection data as abnormal when the airtightness does not meet the requirements. Stopping the resistance detection can save detection costs. Regardless of whether the airtightness meets or does not meet the requirements, corresponding with the resistance detection data can provide data support for further analysis of the performance of the chip under test. By marking the detection data when the airtightness does not meet the requirements as abnormal, targeted analysis can be easily performed. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the chip sealing and resistance detection device in the receiving state according to an embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of the chip sealing and resistance detection device in the detection state according to an embodiment of the present invention;

[0039] Figure 3 for Figure 1 A schematic diagram of the resistance detection module of the chip sealing and resistance detection device in the embodiment;

[0040] Figure 4 for Figure 1 A schematic diagram of the sealing detection module of the chip sealing and resistance detection device in the embodiment;

[0041] Figure 5 This is a schematic diagram of the resistance detection module and the chip under test in a chip sealing and resistance detection device according to an embodiment of the present invention;

[0042] Figure 6 This is a flowchart of a chip sealing and resistance detection control method according to an embodiment of the present invention;

[0043] Figure label:

[0044] 100-Chip sealing and resistance testing equipment, 10-Moving module, 11-Moving base, 111-Support, 12-Transverse cylinder, 20-Jig, 201-First cavity, 30-Resistance testing module, 31-Probe base, 32-Probe, 33-Guide post, 34-Top block, 35-Floating structure, 36-Lifting cylinder, 40-Sealing testing module, 41-Sealing pressure head, 42-Fixed bracket, 43-Pressure cylinder, 200-Chip under test. Detailed Implementation

[0045] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0046] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on the other component or there may be an intermediate component. When a component is considered to be "connected to" another component, it can be directly connected to the other component or there may be an intermediate component present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application's specification are for illustrative purposes only and do not represent the only possible implementation.

[0047] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0048] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature and the second feature are in indirect contact through an intermediate medium. Furthermore, "above," "over," and "on top" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0049] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items.

[0050] Figure 1 This is a schematic diagram of the structure of a chip sealing and resistance testing device 100 in the receiving state according to an embodiment of the present invention. Figure 2This is a schematic diagram of the structure of a chip sealing and resistance testing device 100 in the testing state according to an embodiment of the present invention. Figure 3 for Figure 1 A schematic diagram of the resistance detection module 30 of the chip sealing and resistance detection device 100 in the embodiment. Figure 4 for Figure 1 A schematic diagram of the sealing detection module 40 of the chip sealing and resistance detection device 100 in this embodiment. (See attached diagram.) Figure 1 As shown, in one embodiment of the present invention, the chip sealing and resistance testing device 100 includes a moving module 10, a fixture 20, a resistance testing module 30, and a sealing testing module 40. The moving module 10 includes a moving base 11 that can move horizontally. The fixture 20 is fixed to the moving base 11 and includes a first cavity 201 for positioning the chip 200 under test. The chip 200 under test is a chip with a cover plate on one side (the chip can be a semi-finished product). The cover plate has sealing requirements with the chip substrate, for example, the cover plate is an optical glass plate. The other side of the chip is the corresponding probe of the resistance element to be tested, which can be a thermistor. After the chip 200 under test is positioned in the fixture 20, the resistance testing module 30 and the sealing testing module 40 are respectively located on its two sides. In this embodiment, the resistance testing module 30 is below the fixture 20, and the sealing testing module 40 is above the fixture 20. In other embodiments, the placement positions of the two testing modules can also be interchanged, which is not limited here. The resistance detection module 30 is fixed at the moving base 11 and located below the fixture 20. The resistance detection module 30 and the fixture 20 follow the moving base 11 from the receiving position ( Figure 1 A) Move to the detection position ( Figure 1 In section B), the resistance detection module 30 is used to detect the continuity of the resistive element of the chip under test 200 at the detection position. The resistance detection module 30 uses a probe 32 that contacts the detection point and a corresponding detection circuit system to realize the detection function. The sealing test module 40 is set at the detection position and includes a liftable sealing head 41 and an airtightness test connector (not shown). The lower surface of the sealing head 41 is provided with a second cavity, which is connected to the airtightness test connector, which is connected to an airtightness testing instrument. When the fixture 20 is in the detection position, the sealing head 41 descends to a height that fits against the fixture 20, so that the second cavity and the first cavity 201 together form a sealed space. The sealed space here only needs to include the substrate and cover plate of the chip under test 200, and it is not necessary to completely seal the chip under test 200. In this embodiment, the bottom surface of the chip under test 200 is exposed to facilitate resistance detection. In this embodiment, resistance detection and sealing test can be performed simultaneously or in steps at the same station (detection position).

[0051] When performing a sealing test, the second cavity of the sealing head 41 and the first cavity 201 of the fixture 20 directly form a sealing space. As long as the fixture 20 is moved to the test position, the airtightness test instrument connected to the airtightness test connector can be activated by lowering the sealing head 41 to complete the vacuuming and testing.

[0052] This embodiment provides a device that can simultaneously perform sealing and resistance testing on a chip. By mounting the resistance testing module 30 and the fixture 20 for positioning the chip under test 200 together on the moving base 11, the moving base 11 moves the resistance testing module 30 and the fixture 20 together to below the sealing testing module 40. Then, by activating the sealing testing module 40 and the resistance testing module 30, both tests can be performed simultaneously at one workstation, improving testing efficiency and saving space in the testing mechanism.

[0053] Furthermore, the device can simultaneously detect the chip's sealing and resistance, allowing sealing and resistance data to be obtained simultaneously and easily correlated. This enables the data to reflect the resistance under the current sealing condition, establishes a correlation between the two, and provides data support for further comprehensive analysis of the chip's condition.

[0054] In a further embodiment, such as Figure 1 As shown, the moving module 10 includes a transverse cylinder 12, and the moving base 11 is moved by the transverse cylinder 12. The sealing test module 40 also includes a fixed bracket 42 and a pressing cylinder 43. The fixed bracket 42 is used to install the pressing cylinder 43, which is connected to the top of the sealing head 41 and is used to drive the sealing head 41 to move up and down. The airtightness test connector can be set on the side of the sealing head 41. Figure 3 As shown, the motion base includes an elevated support portion 111, the interior of which houses the resistance detection module 30. It should be noted that... Figure 3 The top horizontal plate of the support 111 is hidden to make the connection between the fixture 20 and the resistance detection module 30 clear.

[0055] Figure 5 This is a schematic diagram of the resistance detection module 30 and the chip under test 200 in a chip sealing and resistance detection device 100 according to an embodiment of the present invention. Figure 5As shown, in one embodiment, the resistance detection module 30 includes a probe base 31 and a probe group mounted on the upper surface of the probe base 31. The number of probe groups can be multiple, and each probe group includes two probes 32 corresponding to two probe points of a resistive element. One of the probe base 31 and the fixture 20 is provided with a guide sleeve (not shown), and the other is provided with a guide post 33. The guide sleeve and guide post 33 are adapted to ensure that the probe group is aligned with the probe points corresponding to the resistive element. The probe base 31 is connected to a lifting cylinder 36, which drives the probe base 31 to rise and fall. Figure 5 In the illustrated embodiment, the guide post 33 is disposed at the probe base 31, and the guide sleeve is disposed at the fixture 20. Further, the resistance detection module 30 also includes a top block 34 that can be raised and lowered relative to the probe base 31. The top block 34 has through holes for each probe 32 of the probe group to pass through. When the top block 34 is not in contact with the chip under test 200, the probe 32 is located within the through holes. After the top block 34 contacts the chip under test 200, the probe 32 controllably extends out of the through holes and contacts the corresponding probe point. Here, a floating structure 35 can be provided between the top block 34 and the probe base 31. This floating structure 35 includes springs at both ends connected to the top block 34 and the probe base 31 respectively, with a guide post disposed in the middle of the springs. In other embodiments, the top block 34 can also be provided with a lifting drive mechanism for actively controlling the height of the top block 34 relative to the probe base 31.

[0056] In this embodiment, by setting a guide sleeve and a guide post 33 between the probe base 31 and the fixture 20, the positional alignment between each probe on the probe base 31 and the probe point on the fixture 20 can be ensured, thus ensuring that the test can be performed accurately.

[0057] Furthermore, the resistance detection module 30 also includes a top block 34. After the resistance detection module 30 is activated, the probe base 31 and the top block 34 rise together until the top block 34 contacts the bottom surface of the chip under test 200. At this time, the probe is located in the through hole of the top block 34 and will not directly impact the chip under test 200, thus protecting the probe. As the probe base 31 continues to rise, the top block 34 remains stationary, and the probe protrudes from the through hole of the top block 34 for resistance testing. This embodiment, by setting a guiding mechanism and a top block 34, ensures the alignment of the probe with the test point, and further limits the position of the probe through the through hole in the top block 34, thus protecting the probe while ensuring positional accuracy.

[0058] In one embodiment, the probe is detachably connected to the probe base 31. For example, it is connected to the probe base 31 by a threaded connection, thereby facilitating replacement.

[0059] In a further embodiment, the chip sealing and resistance testing device 100 also includes a photoelectric sensor for detecting whether the chip under test 200 has reached the detection position. The presence of the photoelectric sensor can be determined at the detection position, thereby facilitating automated testing.

[0060] Figure 6 This is a flowchart of a chip sealing and resistance detection control method according to an embodiment of the present invention. Figure 6 As shown, this application also provides a control method for controlling the chip sealing and resistance detection device 100 in any of the above embodiments, the method comprising:

[0061] Step S100: Control the motion base 11 to move from the receiving position to the detection position;

[0062] Step S200: Identify whether the chip under test 200 has reached the detection position;

[0063] In step S300, when the moving base 11 reaches the detection position, the control resistance detection module 30 and the sealing detection module 40 are started simultaneously.

[0064] In step S400, after the resistance detection and sealing detection are completed, the motion base 11 is controlled to return from the detection position to the receiving position.

[0065] In step S100, the moment when the motion base 11 starts to move can be determined by detecting whether the chip under test 200 has reached the detection position or by the sign that the previous process has ended (e.g., the robot releases the fixture 20).

[0066] In step S200, detection can be performed using photoelectric sensors or other commonly used position sensors, and there are no restrictions on this.

[0067] Step S300 specifically includes: controlling the sealing head 41 to press down to fit against the fixture 20, and starting the airtightness testing instrument; at the same time, controlling the resistance testing module 30 to move up until the probe contacts the test point.

[0068] In a further embodiment, step S300 may also include a step of detecting the top block 34, that is, detecting the moment when the top block 34 contacts the chip under test 200. When the top block 34 is detected to be in contact with the chip under test 200, the moving speed of the probe base 31 is reduced so that the probe can slowly move to the probe point, thereby further protecting the probe.

[0069] Furthermore, step S300 includes the following:

[0070] Determine whether the airtightness meets the requirements;

[0071] If the airtightness does not meet the requirements, stop the resistance test or mark the resistance test data as abnormal.

[0072] When the airtightness meets the requirements, the airtightness test data and resistance test data are saved accordingly.

[0073] The airtightness testing instrument can detect whether the airtightness of the chip under test 200 meets the requirements. If the airtightness of the chip under test 200 does not meet the requirements, the resistance test can be stopped or the resistance test data bits can be marked as abnormal. This is because airtightness has a certain impact on whether the resistance test is qualified. For example, poor airtightness will also lead to the resistance test failing. Therefore, resistance test data with poor airtightness can be considered unreliable. Stopping the resistance test in this case can save testing costs. Of course, regardless of whether the airtightness meets or does not meet the requirements, corresponding with the resistance test data can provide data support for further analysis of the performance of the chip under test 200. By marking the test data when the airtightness does not meet the requirements as abnormal, targeted analysis can be easily carried out.

[0074] Furthermore, this application can transfer products that fail the airtightness test and / or resistance test to the same non-conforming production line (NG line), while qualified products proceed to the next process. Each product in the non-conforming production line carries specific test data, thus making it easy to distinguish what kind of non-conformity it is. For example, products that fail the airtightness test and interrupt the resistance test, or products that pass the airtightness test but fail the resistance test, etc., without the need to set up multiple non-conforming production lines to output the corresponding products, thereby further saving equipment space.

[0075] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A device for detecting chip sealing performance and resistance, characterized in that, include: The mobile module includes a motion base that can move horizontally; A fixture is fixed at the moving base. The fixture includes a first cavity for positioning the chip under test. The chip under test includes a substrate and a cover plate located on the substrate. A resistance detection module is fixed at the moving base and located below the fixture. The resistance detection module and the fixture move with the moving base from the receiving position to the detection position. The resistance detection module is used to detect the continuity of the resistive element of the chip under test at the detection position. A sealing performance testing module is disposed at the testing position and includes a liftable sealing head and an airtightness test connector. The lower surface of the sealing head is provided with a second cavity, which is connected to the airtightness test connector. The airtightness test connector is connected to an airtightness testing instrument. When the fixture is located at the testing position, the sealing head descends to a height that fits against the fixture, so that the second cavity and the first cavity together form a sealing space. The sealing space is used to seal the substrate and the cover plate. The resistance detection module includes a probe base and a probe assembly mounted on the upper surface of the probe base; One of the probe base and the fixture is provided with a guide sleeve, and the other is provided with a guide post. The guide sleeve and the guide post are adapted to ensure that the probe group is aligned with the probe point corresponding to the resistive element. The resistance detection module also includes a top block that can be raised and lowered relative to the probe base. The top block has through holes for each probe of the probe group to pass through. When the top block is not in contact with the chip under test, the probe is located in the through hole. After the top block contacts the chip under test, the probe can be controllably extended out of the through hole and contact the corresponding probe point. Resistance testing and sealing testing are performed simultaneously.

2. The chip sealing and resistance testing equipment according to claim 1, characterized in that, The probe is detachably connected to the probe base.

3. The chip sealing and resistance testing equipment according to claim 1 or 2, characterized in that, It also includes a photoelectric sensor for detecting whether the chip under test has reached the detection position.

4. A chip sealing and resistance detection control method, used to control the chip sealing and resistance detection equipment according to any one of claims 1-3, characterized in that, The method includes: Control the motion platform to move from the receiving position to the detection position; When the moving base reaches the detection position, the resistance detection module and the sealing detection module are activated simultaneously. After resistance and sealing tests are completed, the moving base is controlled to return from the detection position to the receiving position.

5. The chip sealing and resistance detection and control method according to claim 4, characterized in that, The steps for controlling the simultaneous activation of the resistance detection module and the sealing detection module include: Control the sealing head to press down until it fits against the fixture, and start the airtightness testing instrument; Control the resistance detection module to move upward until the probe contacts the detection point.

6. The chip sealing and resistance detection control method according to claim 4, characterized in that, Before the step of simultaneously activating the resistance detection module and the sealing detection module when the moving base reaches the detection position, the following method is also included: The photoelectric sensor identifies whether the chip under test has reached the detection position.

7. The chip sealing and resistance detection and control method according to any one of claims 4-6, characterized in that, Following the step of simultaneously activating the resistance detection module and the sealing detection module, the method further includes: Determine whether the airtightness meets the requirements; If the airtightness does not meet the requirements, stop the resistance test or mark the resistance test data as abnormal. When the airtightness meets the requirements, the airtightness test data and resistance test data are saved accordingly.

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