A chip functional security vulnerability detection method and system

Abstract

The present invention discloses a chip functional security vulnerability detection method and system, which relates to the field of chip security vulnerability detection technology, including chip data collection, preliminary waveform analysis of the collected data; energy consumption characteristic analysis and preliminary identification of vulnerabilities, verification of functionality and task integrity; vulnerability analysis, and processing decisions. The chip functional security vulnerability detection method provided by the present invention combines energy consumption characteristic analysis with functional verification to provide a multi-dimensional vulnerability detection method that can cover two types of problems: side channel attacks and functional vulnerabilities. Through the optimization of orthogonal polynomial filters and anomaly detection algorithms, the accuracy of vulnerability detection is significantly improved; through the intelligent repair mechanism, dynamic repair of vulnerabilities and secure startup enhancement are achieved. The present invention achieves better results in terms of detection coverage, real-time performance, and repair efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of chip security vulnerability detection, and in particular to a chip functional security vulnerability detection method and system. Background Art

[0002] With the widespread adoption of embedded devices, IoT terminals, and intelligent hardware, the functionality and security of chips in scenarios such as data encryption, authentication, and task execution have become a research focus. Modern chips often integrate complex security modules, such as cryptographic engines, secure boot circuits, and performance monitoring units (PMUs), to mitigate external threats and internal functional anomalies. Furthermore, side-channel attacks, as a non-invasive attack method that obtains sensitive information through methods such as energy consumption analysis, have become a major threat to chip security. Furthermore, the functionality and integrity of chip tasks are also exposed to challenges such as code tampering and unauthorized memory access. Therefore, to ensure chip security and stability, research on how to comprehensively detect functional security vulnerabilities in chips, identify risks promptly, and address them has become a key development direction in chip security technology.

[0003] Existing chip security detection technologies mainly focus on single-dimensional vulnerability analysis, such as side channel analysis based on energy consumption characteristics or functional verification based on task integrity. However, these technologies have significant limitations in practical applications. First, detection methods for side channel attacks are mostly limited to single analysis in the frequency domain or time domain, lacking effective feature extraction and risk quantification mechanisms, making it difficult to fully capture energy leakage risks. Secondly, functional verification technologies are usually based on hash comparison or static instruction flow analysis of task codes, and are unable to dynamically monitor the real-time execution process of tasks, especially in complex task switching and multi-threading scenarios, which can easily lead to omissions or misjudgments. In addition, existing technologies generally lack systematic vulnerability classification and repair mechanisms. Faced with different types of vulnerabilities, such as side channel leaks and memory privilege escalation, it is difficult to adopt targeted repair strategies in a timely manner. Summary of the Invention

[0004] In view of the above-mentioned problems, the present invention is proposed.

[0005] Therefore, the technical problems solved by the present invention are: the existing chip functional safety detection methods have insufficient side channel leakage detection accuracy, limited dynamic task integrity verification capabilities, imperfect vulnerability repair mechanisms, and how to achieve multi-dimensional collaborative detection and intelligent repair mechanisms for energy consumption analysis and functional verification.

[0006] To address the above technical issues, the present invention provides the following technical solution: a method for detecting functional security vulnerabilities in chips, comprising collecting chip data and performing preliminary waveform analysis on the collected data. Energy consumption characteristics are analyzed to preliminarily identify vulnerabilities, verifying functionality and mission integrity. Vulnerability analysis is then performed and a decision is made regarding the vulnerability.

[0007] As a preferred embodiment of the chip functional security vulnerability detection method of the present invention, the chip data acquisition includes initializing the detection environment, connecting an oscilloscope and a power analyzer, and setting a sampling frequency and a sampling period;

[0008] Activate the chip's encryption engine and digital signature module, start executing tasks, and record energy consumption data in real time;

[0009] A low-pass filter is used to denoise the collected signal and filter out high-frequency noise.

[0010] As a preferred embodiment of the chip functional security vulnerability detection method described in the present invention, the energy consumption characteristic analysis and preliminary vulnerability identification include extracting the frequency domain characteristics of the energy waveform using a fast Fourier transform (FFT), analyzing the periodic changes in the calculation phase, setting a peak amplitude threshold, and marking a potential vulnerability as a peak with an amplitude exceeding a preset value in the dynamic phase of the calculation task. A Z-Score-based anomaly detection algorithm is used to determine whether the energy fluctuation exceeds the normal range. If the Z-Score exceeds the set value, it is determined to be an abnormal fluctuation.

[0011] The extracted features are compared with the normal energy consumption feature database, which includes the standard energy consumption patterns of computing tasks. If the current waveform differs from the normal pattern in the database by more than a preset value, it is marked as a potential vulnerability. The frequency domain energy component extracted by FFT is combined to calculate the quantitative value of the leakage feature, which is expressed as:

[0012]

[0013] in, represents the frequency domain leakage risk value, is the frequency domain component extracted by FFT, is an orthogonal polynomial filter function, is the frequency weighting function, which mainly weights high-frequency signals. is the target frequency range, As the frequency cutoff point, take the chip main frequency When the value exceeds the preset value, it is determined that there is a leak.

[0014] As a preferred solution of the chip functional security vulnerability detection method described in the present invention, the verification of functionality and task integrity includes obtaining the hash value of the currently executing task code and comparing it with the pre-stored reference hash value. When the hash value does not match, it indicates that the task code may have been tampered with and vulnerability analysis needs to be triggered.

[0015] After each task stage is completed, a hash value check is performed. The chip performance monitoring unit (PMU) is used to capture the instruction execution flow to ensure that the instructions are executed in the scheduled order. If an illegal instruction is skipped or re-entered, it is marked as an exception. When it is marked as an exception, the energy fluctuation characteristics and real-time instruction flow characteristics are combined to construct a comprehensive anomaly detection index, which is expressed as:

[0016]

[0017] in, represents the comprehensive anomaly detection score, For the period The temporal anomaly ZScore, is the execution time, Indicates time period The deviation of the execution time from the reference time, is the normal instruction running time, For the period The number of instruction jumps or exception executions, is the total number of time periods.

[0018] As a preferred embodiment of the chip functional security vulnerability detection method of the present invention, the verification of functionality and task integrity further includes calculating a task integrity score by hash verification of task code and monitoring memory access, which is expressed as:

[0019]

[0020] in, represents the task completeness score, Task code snippet The hash value of is the reference hash value, is a hash matching function, if , then the value is 1, otherwise it is 0. Represents a code segment The amount of memory access, is the threshold for normal memory access, is the total number of task code segments.

[0021] As a preferred solution of the chip functional security vulnerability detection method of the present invention, wherein: the vulnerability analysis includes: The functional verification results are used to confirm whether the chip can perform all tasks normally. If there are functional anomalies, they are marked as functional vulnerabilities, and there are problems with task code integrity or memory access control.

[0022] As a preferred solution of the chip functional security vulnerability detection method described in the present invention, the processing decision includes triggering a repair strategy when a vulnerability is detected, setting the chip's security pin to a high level, triggering a repair operation, downloading the repair code from a backup storage area or through a secure server, and reloading it into the chip.

[0023] After the repair is completed, the chip is powered off and restarted, and the task code and function verification are performed again. After the retest is qualified, the chip's security pin is restored to a low level and the chip's safe boot circuit is forcibly enabled.

[0024] Another object of the present invention is to provide a chip functional security vulnerability detection system, which can solve the technical problem that the current chip security detection technology lacks comprehensiveness and pertinence through a multi-dimensional collaborative detection method of comprehensive energy consumption analysis and functional verification. It can also efficiently identify side channel leakage risks, dynamically verify task integrity, and repair vulnerabilities in a timely manner, overcoming the shortcomings of traditional detection technology in terms of insufficient detection accuracy, poor real-time performance, and lack of repair mechanism.

[0025] A preferred embodiment of the chip functional security vulnerability detection system described in the present invention includes a data acquisition module, a vulnerability detection module, and a decision-making module. The data acquisition module is used to collect chip data and perform preliminary waveform analysis on the collected data. The vulnerability detection module is used to analyze energy consumption characteristics and preliminarily identify vulnerabilities, verifying functionality and mission integrity. The decision-making module is used to analyze vulnerabilities and make processing decisions.

[0026] A computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement a method for detecting functional security vulnerabilities in a chip.

[0027] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of a chip functional security vulnerability detection method.

[0028] The present invention demonstrates the following benefits: The chip functional security vulnerability detection method combines energy consumption signature analysis with functional verification, providing a multi-dimensional vulnerability detection approach that covers both side-channel attacks and functional vulnerabilities. Through the optimization of orthogonal polynomial filters and anomaly detection algorithms, vulnerability detection accuracy is significantly improved. Through intelligent repair mechanisms, dynamic vulnerability repair and secure boot enhancement are achieved, resulting in superior detection coverage, real-time performance, and repair efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 This is an overall flow chart of a chip functional security vulnerability detection method provided by the first embodiment of the present invention. DETAILED DESCRIPTION

[0031] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, the following detailed description of the specific embodiments of the present invention is given in conjunction with the accompanying drawings. It is obvious that the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in this field without creative work should fall within the scope of protection of the present invention.

[0032] Example 1, with reference to Figure 1 , as one embodiment of the present invention, provides a chip functional security vulnerability detection method, comprising:

[0033] S1: Collect chip data and perform preliminary waveform analysis on the collected data.

[0034] Furthermore, chip data acquisition involves initializing the test environment, connecting an oscilloscope and power analyzer, and setting the sampling frequency to 1 MHz with a sampling period of 1 µs. This frequency was chosen to capture the rapidly changing energy consumption of the chip during computational tasks; 1 MHz can capture small fluctuations during high-frequency computations.

[0035] Activate the chip's encryption engine and digital signature module, start executing tasks, and record energy consumption data in real time.

[0036] When the energy consumption is less than 2mW, the chip is in standby or idle state. This value is set according to the chip design and process differences. Generally, when idle, the energy consumption of low-power chips is less than 2mW.

[0037] When the energy consumption fluctuation exceeds 5mW and lasts for more than 50ms, the identification chip is in working state and is determined to be in the dynamic stage.

[0038] A low-pass filter with a cutoff frequency of 500kHz is used to denoise the acquired signal and filter out high-frequency noise. This frequency, 500kHz, is within the frequency range of most computing tasks and effectively removes noise caused by environmental interference.

[0039] S2: Perform energy consumption signature analysis and preliminary vulnerability identification to verify functionality and mission integrity.

[0040] Furthermore, energy consumption characteristic analysis and preliminary vulnerability identification include using fast Fourier transform (FFT) to extract the frequency domain characteristics of the energy waveform, analyzing the periodic changes in the calculation phase, setting the peak amplitude threshold, and marking it as a potential vulnerability if a peak with an amplitude exceeding 3mW appears in the energy waveform during the dynamic phase of the calculation task. A Z-Score-based anomaly detection algorithm is used to determine whether the energy fluctuation exceeds the normal range. If the Z-Score exceeds the set value of 3, it is determined to be an abnormal fluctuation.

[0041] The extracted features are compared with the normal energy consumption feature database, which includes the standard energy consumption patterns of computing tasks. If the current waveform differs from the normal pattern in the database by more than 10%, it is marked as a potential vulnerability. The frequency domain energy components extracted by FFT are combined to calculate the quantitative value of the leakage feature, which is expressed as:

[0042]

[0043] in, represents the frequency domain leakage risk value, is the frequency domain component extracted by FFT, is an orthogonal polynomial filter function, is the frequency weighting function, which mainly weights high-frequency signals. is the target frequency range, As the frequency cutoff point, take the chip main frequency When the value exceeds the preset value, it is determined that there is a leak.

[0044] The Z-Score is a standardized statistical tool used to quantify fluctuations. This method, introduced in the present invention, can be used to assess energy fluctuations, enabling rapid identification of abnormal fluctuations. During chip task execution, energy consumption is affected by factors such as task type and environmental fluctuations. While these fluctuations can result in some discrete values, the majority of data is concentrated around the mean. This means that the data conforms to a normal distribution, with values ​​greater than 3 representing 0.3% of extreme values ​​or outliers.

[0045] It should be noted that verifying functionality and task integrity includes obtaining the hash value of the currently executing task code and comparing it with the pre-stored reference hash value. When the hash values ​​do not match, it means that the task code may have been tampered with and vulnerability analysis needs to be triggered.

[0046] After each task stage is completed, a hash value check is performed. The chip performance monitoring unit (PMU) is used to capture the instruction execution flow to ensure that the instructions are executed in the scheduled order. If an illegal instruction is skipped or re-entered, it is marked as an exception. When it is marked as an exception, the energy fluctuation characteristics and real-time instruction flow characteristics are combined to construct a comprehensive anomaly detection index, which is expressed as:

[0047]

[0048] in, represents the comprehensive anomaly detection score, For the period The temporal anomaly ZScore, is the execution time, Indicates time period The deviation of the execution time from the reference time, is the normal instruction running time, For the period The number of instruction jumps or exception executions, is the total number of time periods.

[0049] It should also be noted that verifying functionality and task integrity also includes calculating the task integrity score by hash verification of task code and monitoring memory access, which is expressed as:

[0050]

[0051] in, represents the task completeness score, Task code snippet The hash value of is the reference hash value, is a hash matching function, if , then the value is 1, otherwise it is 0. Represents a code segment The amount of memory access, is the threshold for normal memory access, is the total number of task code segments.

[0052] S3: Perform vulnerability analysis and make processing decisions.

[0053] Furthermore, vulnerability analysis includes The functional verification results are used to confirm whether the chip can perform all tasks normally. If there are functional anomalies, they are marked as functional vulnerabilities, and there are problems with task code integrity or memory access control.

[0054] It should be noted that the processing decision includes triggering a repair strategy when a vulnerability is detected, setting the chip's security pin to a high level, triggering a repair operation, downloading the repair code from a backup storage area or through a secure server, and reloading it into the chip.

[0055] After the repair is completed, the chip is powered off and restarted, and the task code and function verification are performed again. After the retest is qualified, the chip's security pin is restored to a low level and the chip's safe boot circuit is forcibly enabled.

[0056] Vulnerabilities are categorized. Side-channel vulnerabilities are detected through energy consumption signature analysis and are typically related to the energy leakage of sensitive information during the computation process. Energy leakage can lead to key recovery, such as recovering private keys through side-channel analysis during elliptic curve cryptography. High-frequency energy leakage can reveal the operating mode of a cryptographic algorithm. Functional vulnerabilities are related to task code integrity, memory access control, or hardware function failures. These typically manifest as code tampering or unauthorized access to specific memory areas during chip execution. These vulnerabilities primarily manifest as malicious task tampering, such as the insertion of malicious code, memory access control failure, resulting in the leakage or illegal modification of confidential data, and chip malfunction, preventing the task from executing correctly. Hardware defects are related to the operation of the chip's physical hardware or hardware modules and may be caused by manufacturing processes, design issues, or hardware aging during long-term operation. These defects primarily manifest as chip startup failure or abnormal operation. Functional modules fail to function properly. Hardware resources cannot be generated or used during critical operations.

[0057] Example 2, an embodiment of the present invention, provides a chip functional security vulnerability detection method. In order to verify the beneficial effects of the present invention, scientific demonstration is carried out through economic benefit calculation and simulation experiments.

[0058] First, the chip's operating state during different mission phases was simulated, and potential vulnerabilities were identified, analyzed, and remediated. The experiment used an embedded chip with an encryption engine and digital signature module, primarily evaluating its energy consumption characteristics during mission execution, mission integrity verification, and the effectiveness of remediation strategies. An oscilloscope and power analyzer were connected to the target chip, with a sampling frequency of 1MHz and a sampling period of 1µs to ensure accurate acquisition of high-frequency features.

[0059] A low-pass filter is configured with a cutoff frequency of 500 kHz to eliminate the interference of high-frequency noise on the energy consumption signal.

[0060] Activate the chip's encryption engine and digital signature module, allowing the chip to enter a normal task execution state while recording its energy consumption data in real time.

[0061] Table 1 Experimental data comparison table

[0062]

[0063] The energy consumption in the static phase remained at 1.7-1.9 mW, which was consistent with the expected value of less than 2 mW, proving that the method can accurately distinguish between the static and dynamic phases.

[0064] The average energy consumption in the dynamic phase exceeds the set threshold (5mW), and the peak amplitude is between 3.5-4.0mW, clearly identifying the potential risk of side channel leakage.

[0065] During the dynamic phase of task execution, the task integrity scores were 0.72, 0.65, and 0.68, respectively, all below the security threshold (0.9), indicating that the task code may have been tampered with or memory access may be abnormal.

[0066] After the repair, the scores all increased to 1.0, proving the effectiveness of the repair strategy and successfully restoring the normal execution of the task.

[0067] Existing methods typically rely solely on time-domain energy consumption analysis, making it difficult to identify anomalies in high-frequency fluctuations. This method significantly improves the accuracy and sensitivity of vulnerability identification by extracting frequency-domain features using FFT and the Z-Score anomaly detection algorithm.

[0068] In terms of task integrity verification, the combination of hash value comparison and instruction flow monitoring can dynamically detect task tampering and instruction anomalies. Traditional methods mainly focus on static code analysis and cannot respond to anomalies in real time.

[0069] Example 3, an embodiment of the present invention, provides a chip functional security vulnerability detection system, including a data acquisition module, a vulnerability detection module, and a decision module.

[0070] The data acquisition module collects chip data and performs preliminary waveform analysis on the collected data. The vulnerability detection module analyzes energy consumption characteristics and preliminarily identifies vulnerabilities, verifying functionality and mission integrity. The decision module analyzes vulnerabilities and makes processing decisions.

[0071] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the method of the present invention. The aforementioned storage medium includes various media that can store program code, such as USB flash drives, mobile hard drives, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0072] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0073] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting, or processing it in another suitable manner as necessary, and then storing it in a computer memory.

[0074] It should be understood that various aspects of the present invention may be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods may be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one or a combination of the following technologies known in the art may be used: a discrete logic circuit having logic gates for implementing logic functions on data signals, an application-specific integrated circuit having suitable combinational logic gates, a programmable gate array (PGA), a field-programmable gate array (FPGA), etc. It should be noted that the above embodiments are intended only to illustrate the technical solutions of the present invention and are not intended to be limiting. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art will understand that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and such modifications are intended to be encompassed by the claims of the present invention.

[0075] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A chip functional security vulnerability detection method, characterized in that: include: Collect chip data and perform preliminary waveform analysis on the collected data; Conduct energy consumption signature analysis and preliminary vulnerability identification to verify functionality and mission integrity; Conduct vulnerability analysis and make handling decisions; The energy consumption feature analysis and preliminary vulnerability identification include using Fast Fourier Transform (FFT) to extract frequency domain features of the energy waveform, analyzing periodic changes during the calculation phase, setting a peak amplitude threshold, and marking it as a potential vulnerability if an amplitude exceeding a preset peak appears in the energy waveform during the dynamic phase of the calculation task. An anomaly detection algorithm based on Z-Score is used to determine whether the energy fluctuation exceeds the normal range. If the Z-Score exceeds the set value, it is determined to be an abnormal fluctuation. The extracted features are compared with the normal energy consumption feature database, which includes the standard energy consumption patterns of computing tasks. If the current waveform differs from the normal pattern in the database by more than a preset value, it is marked as a potential vulnerability. The frequency domain energy component extracted by FFT is combined to calculate the quantitative value of the leakage feature, which is expressed as: Among them, R f represents the frequency domain leakage risk value, X k is the frequency domain component extracted by FFT, is an orthogonal polynomial filter function, is the frequency weighting function, which mainly weights high-frequency signals, f1, f2 are the target frequency ranges, and f c The frequency cutoff point is 1 / 2 of the chip's main frequency. When it exceeds the preset value, it is identified as a leak. Verifying functionality and task integrity involves obtaining a hash value of the currently executing task code and comparing it with a pre-stored reference hash value. If the hash values ​​do not match, it indicates that the task code may have been tampered with, triggering a vulnerability analysis. After each task stage is completed, a hash value check is performed. The chip performance monitoring unit (PMU) is used to capture the instruction execution flow to ensure that the instructions are executed in the scheduled order. If an illegal instruction is skipped or re-entered, it is marked as an exception. When it is marked as an exception, the energy fluctuation characteristics and real-time instruction flow characteristics are combined to construct a comprehensive anomaly detection index, which is expressed as: Among them, S e represents the comprehensive anomaly detection score, Z i is the time anomaly ZScore of period i, T i is the execution time, ΔT i represents the deviation between the execution time of period i and the reference time, T th is the normal instruction running time, M i is the number of instruction jumps or exception executions in period i, and N2 is the total number of periods; Verifying functionality and task integrity also includes calculating a task integrity score by hash verification of task code and monitoring memory access, which is expressed as: Among them, I t represents the task completeness score, H i is the hash value of task code segment i, H ref For the reference hash value, match(H j ,H ref ) is the hash matching function, mem j Indicates the memory access amount of code segment j, mem th is the threshold of normal memory access, N3 is the total number of task code segments; The vulnerability analysis includes: t The functional verification results are used to confirm whether the chip can perform all tasks normally. If there are functional anomalies, they are marked as functional vulnerabilities, and there are problems with task code integrity or memory access control.

2. The chip functional security vulnerability detection method according to claim 1, wherein: The chip data acquisition includes initializing the detection environment, connecting the oscilloscope and the power analyzer, and setting the sampling frequency and sampling period; Activate the chip's encryption engine and digital signature module, start executing tasks, and record energy consumption data in real time; A low-pass filter is used to denoise the collected signal and filter out high-frequency noise.

3. The chip functional security vulnerability detection method according to claim 2, wherein: The processing decision includes triggering a repair strategy when a vulnerability is detected, setting the chip's security pin to a high level, triggering a repair operation, downloading the repair code from a backup storage area or through a secure server, and reloading it into the chip; After the repair is completed, the chip is powered off and restarted, and the task code and function verification are performed again. After the retest is qualified, the chip's security pin is restored to a low level and the chip's safe boot circuit is forcibly enabled.

4. A system using the chip functional security vulnerability detection method according to any one of claims 1 to 3, characterized in that: Including data collection module, vulnerability detection module, and decision-making module; The data acquisition module is used to collect chip data and perform preliminary waveform analysis on the collected data; The vulnerability detection module is used to analyze energy consumption characteristics and preliminarily identify vulnerabilities, verifying functionality and mission integrity; The decision module is used to perform vulnerability analysis and make processing decisions.

5. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the chip functional security vulnerability detection method according to any one of claims 1 to 3 are implemented.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the chip functional security vulnerability detection method according to any one of claims 1 to 3 are implemented.

Images