Inverter, control method thereof and photovoltaic system

Abstract

The invention provides an inverter, a control method thereof and a photovoltaic system, PWM signals generated by a controller of the inverter take a power grid angle as a unified reference, the PWM signals have multiple frequencies in a power frequency period, a switching tube of a main circuit executes switching actions at the multiple frequencies, and electromagnetic interference can be reduced. The jitter frequency period of the PWM signals of the inverters is one integral multiple of the power frequency period of the power grid, that is, a fixed number of jitter frequency periods are executed in each power frequency period, so that the jitter frequency periods of the grid-connected inverters can be set by adopting a unified standard under the condition of no communication, and jitter frequency synchronization is realized. Moreover, in different power frequency periods of the power grid, the number of pulses of the PWM signals with the same frequency needs to be the same, so that the phases of the PWM signals can be set by all grid-connected inverters by adopting a unified standard under the condition of no communication, and the phase synchronization of the PWM signals is realized.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to an inverter, a control method thereof and a photovoltaic system. Background Art

[0002] As photovoltaic systems continue to mature, more and more photovoltaic systems are being used in the market. Inverters are the core components of photovoltaic systems. Switching devices in them perform switching actions at a fixed frequency, which will cause electromagnetic interference problems. Moreover, as the switching frequency increases, the electromagnetic interference problem will be aggravated. Changing the switching frequency of the switching device, that is, using a frequency jittering solution, can reduce electromagnetic interference.

[0003] In a photovoltaic system, when multiple inverters are connected in parallel to the grid, there will be a common-mode circulating current problem, which will increase the ripple of the grid-connected current. This is caused by the asynchronous switching of each inverter, which leads to high-frequency circulating current. At present, the method of synchronous carrier of each inverter connected to the grid is adopted to suppress the generation of circulating current.

[0004] Since the frequency change produced by the frequency jittering scheme will affect the relative phase relationship between the carriers of each inverter, thereby destroying the synchronization of the carriers, it is currently impossible to simultaneously implement the frequency jittering scheme and the carrier synchronization scheme without communication. Summary of the invention

[0005] The present application provides an inverter, a control method thereof and a photovoltaic system for realizing a frequency jittering scheme and carrier synchronization without communication.

[0006] In the first aspect, the present application provides an inverter, comprising a main circuit and a controller. The main circuit comprises at least one switch tube, and the main circuit is used to convert the direct current provided by the direct current source into alternating current and output it to the power grid. The controller is used to generate a pulse width modulation (PWM) signal, and the PWM signal is used to control the switch tube in the main circuit to continuously switch between on and off. The PWM signal generated by the controller has multiple frequencies within the power frequency cycle of a power grid, and the frequency jitter period of the PWM signal is one of an integer multiple of the power frequency cycle of the power grid. In different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same.

[0007] In the present application, the PWM signal of the inverter is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The frequency jitter cycle of the PWM signal of the inverter is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of frequency jitter cycles are executed in each power frequency cycle, so that each inverter connected to the grid can set the frequency jitter cycle according to a unified standard without communication to achieve frequency jitter synchronization. Specifically, the PWM signal of the inverter can execute N frequency jitter cycles in a power frequency cycle of a grid, where N is a positive integer, for example, one frequency jitter cycle can be executed in one power frequency cycle, or two frequency jitter cycles can be executed in one power frequency cycle. In addition, in different power frequency cycles of the grid, the number of pulses of the PWM signal of the same frequency needs to be the same, so that each inverter connected to the grid can set the phase of the PWM signal according to a unified standard without communication to achieve phase synchronization of the PWM signal. The phase synchronization of PWM signals means that the pulse centers of the two PWM signals are on the same time axis.

[0008] In some embodiments of the present application, the controller can control the PWM signal to enter a new frequency jittering cycle when the voltage of the power grid is zero. Specifically, in one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal in each power frequency cycle, that is, two frequency jittering cycles are set in one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, in one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0009] In some embodiments of the present application, the controller can control the PWM signal to start the frequency jitter cycle from the reference frequency within a frequency jitter cycle, that is, the reference frequency is used as the starting point of a frequency jitter cycle. Within a frequency jitter cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner at the beginning of the frequency jitter cycle. The PWM signal is set to the reference frequency setting duration, and then the PWM signal is adjusted to the first transition frequency setting duration after increasing the set frequency on the basis of the reference frequency, and then the PWM signal is adjusted to the second transition frequency setting duration after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting duration, and then the PWM signal is adjusted to the third transition frequency setting duration after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting duration, and then the PWM signal is adjusted to the fourth transition frequency setting duration after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0010] In some embodiments of the present application, in order to facilitate adjustment and control, the controller can control the frequency difference between two adjacent frequencies to be the same within a frequency jittering cycle. For example, 65kHz is used as the reference frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the reference frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0011] In some embodiments of the present application, the controller can also control the maximum frequency and the minimum frequency in a plurality of frequencies to have the same time proportion within a frequency jitter cycle, and the maximum frequency and the minimum frequency have a greater proportion than the other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0012] In some embodiments of the present application, after fixing each frequency in the frequency jittering cycle, the controller can maintain a fixed number of carrier signals at each frequency, and different frequencies can maintain different numbers of carrier signals, or they can maintain the same number of carrier signals, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby achieving phase synchronization of the PWM signal.

[0013] In the second aspect, the present application provides a control method for an inverter, comprising: generating a PWM signal, the PWM signal is used to control the switch tube in the inverter to switch between on and off. The PWM signal has multiple frequencies within the power frequency cycle of a power grid, and the frequency jitter period of the PWM signal is one of an integer multiple of the power frequency cycle. In different power frequency cycles, the number of pulses of the PWM signal of the same frequency is the same.

[0014] In the present application, the generated PWM signal is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The jittering period of the PWM signal is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of jittering periods are executed in each power frequency cycle, so that each inverter connected to the grid can set the jittering period according to a unified standard without communication to achieve jittering synchronization. Specifically, the PWM signal can execute N jittering periods in a power frequency cycle of a grid, where N is a positive integer, for example, one jittering period can be executed in one power frequency cycle, or two jittering periods can be executed in one power frequency cycle. In addition, in different power frequency cycles of the grid, the number of pulses of the PWM signal of the same frequency needs to be the same, so that each inverter connected to the grid can set the phase of the PWM signal according to a unified standard without communication to achieve phase synchronization of the PWM signal. Phase synchronization of PWM signals refers to the co-time axis of the pulse centers of the two PWM signals.

[0015] In some embodiments of the present application, it may also include: when the voltage of the power grid is zero, controlling the PWM signal to enter a new frequency jittering cycle. Specifically, in one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal in each power frequency cycle, that is, two frequency jittering cycles are set in one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, in one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0016] In some embodiments of the present application, it may also include: within a frequency jittering cycle, controlling the PWM signal to enter the frequency jittering cycle from the reference frequency, that is, the reference frequency is used as the starting point of a frequency jittering cycle. Within a frequency jittering cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner at the beginning of the frequency jittering cycle. The PWM signal is set to the reference frequency setting duration, and then the PWM signal is adjusted to the first transition frequency setting duration after increasing the set frequency on the basis of the reference frequency, and then the PWM signal is adjusted to the second transition frequency setting duration after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting duration, and then the PWM signal is adjusted to the third transition frequency setting duration after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting duration, and then the PWM signal is adjusted to the fourth transition frequency setting duration after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0017] In some embodiments of the present application, in order to facilitate adjustment and control, the frequency difference between two adjacent frequencies can be controlled to be the same within a frequency jittering cycle. For example, 65kHz is used as the base frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the base frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0018] In some embodiments of the present application, within a frequency jitter cycle, the time proportion of the maximum frequency and the minimum frequency among multiple frequencies can also be controlled to be the same, and the proportion of the maximum frequency and the minimum frequency is greater than the time proportion of other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0019] In some embodiments of the present application, after each frequency in a fixed frequency jittering cycle, a fixed number of carrier signals can be maintained at each frequency, and different frequencies can maintain different numbers of carrier signals, or the same number of carrier signals can be maintained, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby achieving phase synchronization of the PWM signal.

[0020] In a third aspect, the present application provides a photovoltaic system, including a plurality of inverters connected in parallel, and the plurality of inverters may specifically include a first inverter and a second inverter. The first inverter and the second inverter both include a main circuit and a controller, the main circuit includes at least one switch tube, and the main circuit is used to convert the DC power provided by the DC source into AC power and output it to the power grid. The controller is used to: generate a pulse width modulation PWM signal, and the PWM signal is used to control the switch tube to switch between on and off. The PWM signal has multiple frequencies within the power frequency cycle of a power grid, and the frequency jitter period of the PWM signal is one of an integer multiple of the power frequency cycle. The PWM signal of the first inverter and the PWM signal of the second inverter are phase synchronized.

[0021] In the present application, the PWM signal of each inverter is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The jittering period of the PWM signal of each inverter is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of jittering periods are performed in each power frequency cycle, so that each inverter connected to the grid can set the jittering period in a unified standard without communication to achieve jittering synchronization. Specifically, the PWM signal of each inverter can execute N jittering periods in a power frequency cycle of a grid, where N is a positive integer, for example, one jittering period can be executed in one power frequency cycle, or two jittering periods can be executed in one power frequency cycle. In addition, the phase synchronization of the PWM signals of each inverter can realize jittering synchronization and carrier synchronization without communication, and reduce electromagnetic interference and common-mode circulating current without increasing additional hardware costs.

[0022] In some embodiments of the present application, within any one of the multiple frequencies, the controller can control the phase synchronization of the PWM signal of the inverter. The phase synchronization of the PWM signal refers to the pulse centers of the two PWM signals being on the same time axis.

[0023] In some embodiments of the present application, within different power frequency cycles of the power grid, the controller can control the number of pulses of the PWM signal of the same frequency to be the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal without communication, thereby achieving phase synchronization of the PWM signal.

[0024] In some embodiments of the present application, the controller can control the PWM signal to enter a new frequency jittering cycle when the voltage of the power grid is zero. Specifically, in one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal in each power frequency cycle, that is, two frequency jittering cycles are set in one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, in one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0025] In some embodiments of the present application, the controller can control the PWM signal to start the frequency jitter cycle from the reference frequency within a frequency jitter cycle, that is, the reference frequency is used as the starting point of a frequency jitter cycle. Within a frequency jitter cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner at the beginning of the frequency jitter cycle. The PWM signal is set to the reference frequency setting duration, and then the PWM signal is adjusted to the first transition frequency setting duration after increasing the set frequency on the basis of the reference frequency, and then the PWM signal is adjusted to the second transition frequency setting duration after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting duration, and then the PWM signal is adjusted to the third transition frequency setting duration after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting duration, and then the PWM signal is adjusted to the fourth transition frequency setting duration after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0026] In some embodiments of the present application, in order to facilitate adjustment and control, the controller can control the frequency difference between two adjacent frequencies to be the same within a frequency jittering cycle. For example, 65kHz is used as the reference frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the reference frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0027] In some embodiments of the present application, the controller can also control the maximum frequency and the minimum frequency in a plurality of frequencies to have the same time proportion within a frequency jitter cycle, and the maximum frequency and the minimum frequency have a greater proportion than the other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0028] In some embodiments of the present application, after fixing each frequency in the frequency jittering cycle, the controller can maintain a fixed number of carrier signals at each frequency, and different frequencies can maintain different numbers of carrier signals, or they can maintain the same number of carrier signals, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby achieving phase synchronization of the PWM signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of generating a frequency jittering cycle for an inverter provided in an embodiment of the present application;

[0030] Figure 2 Another schematic diagram of generating a frequency jittering cycle by an inverter provided in an embodiment of the present application;

[0031] Figure 3 A schematic diagram of generating a PWM signal by an inverter provided in an embodiment of the present application;

[0032] Figure 4 A schematic diagram of the structure of a photovoltaic system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as being limited to the embodiments described herein; on the contrary, these embodiments are provided to make the present application more comprehensive and complete, and to fully convey the concepts of the example embodiments to those skilled in the art. The same figure marks in the figures represent the same or similar structures, and thus their repeated descriptions will be omitted. The words expressing position and direction described in this application are all explained using the accompanying drawings as examples, but changes may be made as needed, and all changes are included in the scope of protection of this application. The drawings of this application are only used to illustrate the relative position relationship and do not represent the true proportions.

[0034] It should be noted that specific details are described in the following description to facilitate a full understanding of the present application. However, the present application can be implemented in a variety of other ways different from those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific implementation methods disclosed below. The subsequent description of the specification is a preferred implementation method for implementing the present application, but the description is for the purpose of illustrating the general principles of the present application and is not intended to limit the scope of the present application. The scope of protection of the present application shall be determined by the definition of the attached claims.

[0035] In order to facilitate understanding of the embodiments of the present application, the relevant technologies involved in the embodiments of the present application are first introduced below.

[0036] The terms used in the following embodiments are only for the purpose of describing specific embodiments and are not intended to be used as limitations on the present application. As used in the specification and appended claims of the present application, the singular expressions "one", "a kind of" and "the" are intended to also include expressions such as "one or more", unless there is a clear indication to the contrary in the context. It should also be understood that in the following embodiments of the present application, "at least one" refers to one, two or more than two.

[0037] References to "one embodiment" and the like described in this specification mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some embodiments", "in other embodiments", etc. that appear at different places in this specification do not necessarily all refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0038] At present, in order to solve the electromagnetic interference problem caused by the switching devices in the inverter performing switching actions at a fixed frequency, a frequency jittering solution is adopted, that is, changing the switching action frequency of the switching devices, which can reduce electromagnetic interference. Since the frequency change caused by the frequency jittering solution will affect the relative phase relationship between the carriers of each inverter connected to the grid, thereby destroying the synchronization of the carrier, it is currently impossible to simultaneously implement the frequency jittering solution and the carrier synchronization solution without communication.

[0039] The embodiments of the present application provide an inverter, a control method thereof, and a photovoltaic system, which can simultaneously realize non-communication frequency jitter synchronization and carrier synchronization based on the grid perspective, and reduce electromagnetic interference and common-mode circulating current without increasing additional hardware costs.

[0040] The inverter provided in the embodiment of the present application may specifically include: a main circuit and a controller. Among them, the main circuit includes at least one switch tube, and the main circuit is used to convert the direct current provided by the direct current source into alternating current and output it to the power grid. The controller is used to generate a pulse width modulation (PWM) signal, and the PWM signal is used to control the switch tube in the main circuit to continuously switch between on and off. The PWM signal generated by the controller has multiple frequencies within the power frequency cycle of a power grid, and the frequency jitter period of the PWM signal is one of an integer multiple of the power frequency cycle of the power grid. In different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same.

[0041] In the present application, the PWM signal of the inverter is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The frequency jitter cycle of the PWM signal of the inverter is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of frequency jitter cycles are executed in each power frequency cycle, so that each inverter connected to the grid can set the frequency jitter cycle according to a unified standard without communication to achieve frequency jitter synchronization. Specifically, the PWM signal of the inverter can execute N frequency jitter cycles in a power frequency cycle of a grid, where N is a positive integer, for example, one frequency jitter cycle can be executed in one power frequency cycle, or two frequency jitter cycles can be executed in one power frequency cycle. In addition, in different power frequency cycles of the grid, the number of pulses of the PWM signal of the same frequency needs to be the same, so that each inverter connected to the grid can set the phase of the PWM signal according to a unified standard without communication to achieve phase synchronization of the PWM signal. The phase synchronization of PWM signals means that the pulse centers of the two PWM signals are on the same time axis.

[0042] Reference Figure 1 and Figure 2In some embodiments of the present application, the controller can control the PWM signal to enter a new frequency jittering cycle when the voltage of the power grid is zero. Specifically, within one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal within each power frequency cycle, that is, two frequency jittering cycles are set within one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, within one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0043] Reference Figure 1 and Figure 2 In some embodiments of the present application, the controller can control the PWM signal to start the frequency jitter cycle from the reference frequency within a frequency jitter cycle, that is, the reference frequency is used as the starting point of a frequency jitter cycle. Within a frequency jitter cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner by controlling the PWM signal to set the reference frequency at the beginning of the frequency jitter cycle, and then adjusting the PWM signal to the first transition frequency setting time after increasing the set frequency on the basis of the reference frequency, and then adjusting the PWM signal to the second transition frequency setting time after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting time, and then the PWM signal is adjusted to the third transition frequency setting time after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting time, and then the PWM signal is adjusted to the fourth transition frequency setting time after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0044] Reference Figure 1 and Figure 2In some embodiments of the present application, in order to facilitate adjustment and control, the controller can control the frequency difference between two adjacent frequencies to be the same within a frequency jittering cycle. For example, 65kHz is used as the reference frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the reference frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0045] Reference Figure 1 In some embodiments of the present application, in order to facilitate adjustment and control, the controller can control the time proportion of multiple frequencies to be the same within a frequency jittering cycle.

[0046] Reference Figure 2 In some other embodiments of the present application, the controller can also control the maximum frequency and the minimum frequency in a plurality of frequencies to have the same time proportion within a frequency jitter cycle, and the maximum frequency and the minimum frequency have a greater proportion than the other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0047] Reference Figure 3 In some embodiments of the present application, after fixing each frequency in the frequency jittering cycle, the controller can maintain a fixed number of carrier signals at each frequency, and different frequencies can maintain different numbers of carrier signals, or they can maintain the same number of carrier signals, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby realizing the phase synchronization of the PWM signal. Figure 3 In the figure, four carrier signals are maintained at each frequency as an example for illustration. The period of each carrier signal corresponding to the maximum frequency is the shortest, and the period of each carrier signal corresponding to the minimum frequency is the longest.

[0048] Based on the same inventive concept, the embodiment of the present application further provides a control method for an inverter, including:

[0049] Generate a PWM signal, which is used to control the switch in the inverter to switch between on and off. The PWM signal has multiple frequencies within a power frequency cycle of a power grid, and the frequency jitter cycle of the PWM signal is one of an integer multiple of the power frequency cycle. In different power frequency cycles, the number of pulses of the PWM signal with the same frequency is the same.

[0050] In the present application, the generated PWM signal is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The jittering period of the PWM signal is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of jittering periods are executed in each power frequency cycle, so that each inverter connected to the grid can set the jittering period according to a unified standard without communication to achieve jittering synchronization. Specifically, the PWM signal can execute N jittering periods in a power frequency cycle of a grid, where N is a positive integer, for example, one jittering period can be executed in one power frequency cycle, or two jittering periods can be executed in one power frequency cycle. In addition, in different power frequency cycles of the grid, the number of pulses of the PWM signal of the same frequency needs to be the same, so that each inverter connected to the grid can set the phase of the PWM signal according to a unified standard without communication to achieve phase synchronization of the PWM signal. Phase synchronization of PWM signals refers to the co-time axis of the pulse centers of the two PWM signals.

[0051] In some embodiments of the present application, it may also include: when the voltage of the power grid is zero, controlling the PWM signal to enter a new frequency jittering cycle. Specifically, in one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal in each power frequency cycle, that is, two frequency jittering cycles are set in one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, in one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0052] In some embodiments of the present application, it may also include: within a frequency jittering cycle, controlling the PWM signal to start the frequency jittering cycle from the reference frequency, that is, the reference frequency is used as the starting point of a frequency jittering cycle. Within a frequency jittering cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner at the beginning of the frequency jittering cycle. The PWM signal is set to the reference frequency setting duration, and then the PWM signal is adjusted to the first transition frequency setting duration after increasing the set frequency on the basis of the reference frequency, and then the PWM signal is adjusted to the second transition frequency setting duration after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting duration, and then the PWM signal is adjusted to the third transition frequency setting duration after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting duration, and then the PWM signal is adjusted to the fourth transition frequency setting duration after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0053] In some embodiments of the present application, in order to facilitate adjustment and control, the frequency difference between two adjacent frequencies can be controlled to be the same within a frequency jittering cycle. For example, 65kHz is used as the base frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the base frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0054] In some embodiments of the present application, within a frequency jitter cycle, the time proportion of the maximum frequency and the minimum frequency among multiple frequencies can also be controlled to be the same, and the proportion of the maximum frequency and the minimum frequency is greater than the time proportion of other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0055] In some embodiments of the present application, after each frequency in a fixed frequency jittering cycle, a fixed number of carrier signals can be maintained at each frequency, and different frequencies can maintain different numbers of carrier signals, or the same number of carrier signals can be maintained, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby achieving phase synchronization of the PWM signal.

[0056] Reference Figure 4 , an embodiment of the present application also provides a photovoltaic system, including multiple inverters connected in parallel, and the multiple inverters may specifically include a first inverter and a second inverter. The first inverter and the second inverter both include a main circuit and a controller, the main circuit includes at least one switch tube, and the main circuit is used to convert the direct current provided by the direct current source into alternating current and output it to the power grid. The controller is used to: generate a pulse width modulation PWM signal, and the PWM signal is used to control the switch tube to switch between on and off. The PWM signal has multiple frequencies within the power frequency cycle of a power grid, and the frequency jitter period of the PWM signal is one of an integer multiple of the power frequency cycle. The PWM signal of the first inverter and the PWM signal of the second inverter are phase synchronized.

[0057] In the present application, the PWM signal of each inverter is based on the grid angle as a unified reference, and the phase of the grid is from 0 degrees to 360 degrees as one power frequency cycle. In one power frequency cycle, the PWM signal has multiple frequencies, so that the switch tube of the main circuit performs switching actions at multiple frequencies, which can reduce electromagnetic interference. The jittering period of the PWM signal of each inverter is one of the integer multiples of the power frequency cycle of the grid, that is, a fixed number of jittering periods are performed in each power frequency cycle, so that each inverter connected to the grid can set the jittering period in a unified standard without communication to achieve jittering synchronization. Specifically, the PWM signal of each inverter can execute N jittering periods in a power frequency cycle of a grid, where N is a positive integer, for example, one jittering period can be executed in one power frequency cycle, or two jittering periods can be executed in one power frequency cycle. In addition, the phase synchronization of the PWM signals of each inverter can realize jittering synchronization and carrier synchronization without communication, and reduce electromagnetic interference and common-mode circulating current without increasing additional hardware costs.

[0058] In some embodiments of the present application, within any one of the multiple frequencies, the controller can control the phase synchronization of the PWM signal of the inverter. The phase synchronization of the PWM signal refers to the pulse centers of the two PWM signals being on the same time axis.

[0059] In some embodiments of the present application, within different power frequency cycles of the power grid, the controller can control the number of pulses of the PWM signal of the same frequency to be the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal without communication, thereby achieving phase synchronization of the PWM signal.

[0060] In some embodiments of the present application, the controller can control the PWM signal to enter a new frequency jittering cycle when the voltage of the power grid is zero. Specifically, in one power frequency cycle, the voltage of the power grid is zero when the phase is 0 degrees, and the voltage of the power grid is also zero when the phase is 180 degrees. Therefore, in order to facilitate the synchronization of the frequency jittering cycles of each inverter, the voltage of the power grid can be zero as a reference, as the starting point of each frequency jittering cycle of the PWM signal in each power frequency cycle, that is, two frequency jittering cycles are set in one power frequency cycle. In some other embodiments of the present application, other phase angles of the power grid can also be used as a reference. For example, in one power frequency cycle, every 60 degrees is set as the starting point of the frequency jittering cycle of the PWM signal, that is, when the phase of the power grid is 0 degrees, 60 degrees, 120 degrees, 180 degrees, 240 degrees, and 300 degrees, they are respectively used as the starting points of each frequency jittering cycle of the PWM signal.

[0061] In some embodiments of the present application, the controller can control the PWM signal to start the frequency jitter cycle from the reference frequency within a frequency jitter cycle, that is, the reference frequency is used as the starting point of a frequency jitter cycle. Within a frequency jitter cycle, multiple frequencies of the PWM signal can be controlled to change in a step-like manner, so that the controller can calculate and control the frequency of the PWM signal. Specifically, the multiple frequencies of the PWM signal can change in a step-like manner at the beginning of the frequency jitter cycle. The PWM signal is set to the reference frequency setting duration, and then the PWM signal is adjusted to the first transition frequency setting duration after increasing the set frequency on the basis of the reference frequency, and then the PWM signal is adjusted to the second transition frequency setting duration after increasing the set frequency on the basis of the first transition frequency, and so on, until the PWM signal is adjusted to the maximum frequency setting duration, and then the PWM signal is adjusted to the third transition frequency setting duration after reducing the set frequency on the basis of the maximum frequency, and so on, until the PWM signal is adjusted to the minimum frequency setting duration, and then the PWM signal is adjusted to the fourth transition frequency setting duration after increasing the set frequency on the basis of the minimum frequency, and so on, until the PWM signal is adjusted to the reference frequency. In other embodiments of the present application, within a frequency jittering cycle, the minimum frequency or the maximum frequency may also be used as the starting point, and the frequency variation within a frequency jittering cycle is not limited to the above rules, which are not listed here in exhaustive form.

[0062] In some embodiments of the present application, in order to facilitate adjustment and control, the controller can control the frequency difference between two adjacent frequencies to be the same within a frequency jittering cycle. For example, 65kHz is used as the reference frequency, 68kHz is used as the maximum frequency, 62kHz is used as the minimum frequency, and 100Hz is used as the frequency step for increasing or decreasing to set each frequency within the frequency jittering cycle. In addition, the frequency step can be set according to the difference between the reference frequency and the peak frequency (including the maximum frequency and the minimum frequency). Generally, the larger the difference, the larger the frequency step.

[0063] In some embodiments of the present application, the controller can also control the maximum frequency and the minimum frequency in a plurality of frequencies to have the same time proportion within a frequency jitter cycle, and the maximum frequency and the minimum frequency have a greater proportion than the other frequencies. This can improve low-frequency (generally less than 1MHz) electromagnetic interference.

[0064] In some embodiments of the present application, after fixing each frequency in the frequency jittering cycle, the controller can maintain a fixed number of carrier signals at each frequency, and different frequencies can maintain different numbers of carrier signals, or they can maintain the same number of carrier signals, which is not limited here. In this way, it can be ensured that in different frequency jittering cycles, at the same frequency, the number of pulses of the PWM signal generated according to the carrier signal is the same. It is ensured that in different power frequency cycles of the power grid, the number of pulses of the PWM signal of the same frequency is the same, so that each inverter connected to the grid can use a unified standard to set the phase of the PWM signal at different frequencies without communication, thereby achieving phase synchronization of the PWM signal.

[0065] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An inverter, characterized in that: include: A main circuit and a controller, wherein the main circuit includes at least one switch tube; The main circuit is used to: convert the direct current provided by the direct current source into alternating current and output it to the power grid; The controller is used to: generate a pulse width modulation (PWM) signal, wherein the PWM signal is used to control the switch tube to switch between on and off; The PWM signal has multiple frequencies within a power frequency cycle of the power grid, and a frequency jitter cycle of the PWM signal is one of an integer multiple of the power frequency cycle; In different power frequency cycles, the PWM signal with the same frequency has the same number of pulses.

2. The inverter according to claim 1, characterized in that: The controller is used to control the PWM signal to enter the frequency jittering period when the voltage of the power grid is zero.

3. The inverter according to claim 1 or 2, characterized in that: The controller is used to control the multiple frequencies of the PWM signal within one frequency jittering cycle to change in a step-like manner.

4. The inverter according to claim 3, characterized in that: The controller is used to control the frequency difference between two adjacent frequencies of the PWM signal within one frequency jittering period to be the same.

5. The inverter according to claim 3 or 4, characterized in that: The controller is used to control the PWM signal so that the ratio of the maximum frequency and the ratio of the minimum frequency among the multiple frequencies in one frequency jittering cycle are the same and both are greater than the ratios of other frequencies.

6. A control method for an inverter, characterized in that: include: Generate a pulse width modulation (PWM) signal, wherein the PWM signal is used to control the switch tube in the inverter to switch between on and off; The PWM signal has multiple frequencies within a power frequency cycle of the power grid, and a frequency jitter cycle of the PWM signal is one of an integer multiple of the power frequency cycle; In different power frequency cycles, the PWM signal with the same frequency has the same number of pulses.

7. The control method according to claim 6, characterized in that: Also includes: When the voltage of the power grid is zero, the PWM signal is controlled to enter the frequency jittering period.

8. The control method according to claim 6 or 7, characterized in that: Also includes: The multiple frequencies of the PWM signal within one frequency jittering period are controlled to change in a step-like manner.

9. The control method according to claim 8, characterized in that: Also includes: The frequency difference between two adjacent frequencies of the PWM signal within one frequency jittering period is controlled to be the same.

10. The control method according to claim 8 or 9, characterized in that: The controller is used to control the PWM signal so that the ratio of the maximum frequency and the ratio of the minimum frequency among the multiple frequencies in one frequency jittering cycle are the same and both are greater than the ratios of other frequencies.

11. A photovoltaic system, characterized in that: include: A first inverter and a second inverter connected in parallel; the first inverter and the second inverter each include a main circuit and a controller, and the main circuit includes at least one switch tube; The main circuit is used to: convert the direct current provided by the direct current source into alternating current and output it to the power grid; The controller is used to: generate a pulse width modulation (PWM) signal, wherein the PWM signal is used to control the switch tube to switch between on and off; The PWM signal has multiple frequencies within a power frequency cycle of the power grid, and a frequency jitter cycle of the PWM signal is one of an integer multiple of the power frequency cycle; The phases of the PWM signal of the first inverter and the PWM signal of the second inverter are synchronized.

12. The photovoltaic system according to claim 11, characterized in that: The controller is used to control the PWM signal to enter the frequency jittering period when the voltage of the power grid is zero.

13. The photovoltaic system according to claim 11 or 12, characterized in that: The controller is used to control the multiple frequencies of the PWM signal within one frequency jittering cycle to change in a step-like manner.

14. The photovoltaic system according to claim 13, characterized in that: The controller is used to control the frequency difference between two adjacent frequencies of the PWM signal within one frequency jittering period to be the same.

15. The photovoltaic system according to claim 13 or 14, characterized in that: The controller is used to control the PWM signal so that the ratio of the maximum frequency and the ratio of the minimum frequency among the multiple frequencies in one frequency jittering cycle are the same and both are greater than the ratios of other frequencies.

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