SEPIC and Cuk Based Bridgeless PFC Converter with Wide Output and Low Ripple

Through the parallel design of SEPIC and Cuk circuit unit, the diode device is reduced and single-voltage closed-loop control is adopted, which solves the high voltage stress and large loss problems of the buck-boost PFC converter, and realizes the wide voltage range energy conversion with low loss and low ripple.

CN119995343BActive Publication Date: 2025-07-29SOUTHWEST JIAOTONG UNIV
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Patent Information

Application Number
CN202510165156.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-14
Publication Date
2025-07-29
Estimated Expiration
2045-02-14

AI Technical Summary

Technical Problem

The existing buck-boost PFC converter with buck-boost output capability requires two-stage circuits, which have problems such as high voltage stress on the switch tube, large conduction loss on the switch tube, and large electromagnetic interference.

Method used

SEPIC and Cuk circuit units are used to connect inputs and outputs in parallel to reduce diode devices, and design wide output low ripple bridgeless PFC converter based on SEPIC and Cuk, using single-voltage closed-loop control and the same switch tube driving signal.

Benefits of technology

Reduces the converter operation loss, simplifies the circuit structure, maintains the low output ripple characteristics, and realizes stable energy conversion over a wide voltage range.

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Abstract

The present invention discloses a bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk, which relates to the technical field of PFC converters; the topological structure of the PFC converter includes a SEPIC circuit unit, a Cuk circuit unit, an input diode D<subgt;RS< / subgt>, an input diode D<subgt;RC< / subgt>, and an output capacitor C<subgt;o; the SEPIC circuit unit includes a switching tube S<subgt;S, an input inductor L<subgt;S1, an intermediate capacitor C<subgt;S, a diode D<subgt;S, and an inductor L<subgt;S2; the Cuk circuit unit includes a switching tube S<subgt;C, an input inductor L<subgt;C1, an intermediate capacitor C<subgt;C, a diode D<subgt;C, and an inductor L<subgt;C2; the SEPIC circuit unit and the Cuk circuit unit are connected in parallel at the input and in parallel at the output to achieve step-up and step-down voltage output. The present invention proposes a cascaded topology of a PFC converter based on SEPIC and Cuk, which reduces the diode devices and thus reduces the operating loss of the converter, and retains other main components of SEPIC and Cuk, that is, retains the LC filter network characteristics of the input and output of these two converters, and their corresponding low output ripple characteristics.
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Description

Technical Field

[0001] The present invention belongs to the technical field of PFC converters, and particularly relates to a bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk. Background Art

[0002] With the more extensive application of new energy power generation technologies, battery packs, as energy storage systems for renewable energy sources (such as solar energy or wind energy, etc.), will be more widely used. However, when the DC power input from new energy is not available, such as in the absence of sunlight or available wind power, a small-power AC-DC buck-boost battery charger with power factor correction (PFC) function is usually required to supply power to the battery pack through the AC mains. These battery charging systems may face a wide range of input voltage fluctuations, especially under different weather and load conditions. In a globalized power system and mobile power supply applications, some power devices may need to support a wide voltage range from 85V to 265V. Therefore, a PFC converter with buck-boost function is required to effectively regulate the input voltage and output voltage, ensure a stable charging process and improve the energy conversion efficiency. In practical applications, it is of great help to improve the energy efficiency of the power supply and reduce the grid load. Therefore, a wide-voltage operating range power factor correction converter with buck-boost function has good application prospects.

[0003] The front-stage circuit of traditional battery chargers in the range of several hundred watts to several kilowatts usually adopts a boost PFC converter with a rectifier bridge. The boost PFC converter needs to be equipped with a post-stage DC-DC buck converter to meet the wide-voltage operating range requirements of the battery pack, and its power conversion requires two-stage circuits. On the other hand, a buck-boost PFC converter with buck-boost output ability has problems such as high switch voltage stress, large switch conduction loss, and large electromagnetic interference. Therefore, it is usually only applicable to LED lighting occasions of dozens of watts.

[0004] As Figure 1 shown, the traditional SEPIC PFC converter topology can be regarded as an integrated circuit of boost and buck-boost respectively, and the traditional Cuk PFC converter topology can be regarded as an integrated circuit of boost and buck respectively. Therefore, both traditional SEPIC and Cuk PFC converters have the ability of wide output voltage; and because both their input and output sides have an inductor-capacitor network, they have a natural ability of low output ripple.

[0005] Therefore, based on two converter topologies, the present invention proposes a bridgeless PFC converter with low output ripple by connecting two conversion units in parallel at the input and in parallel at the output. It has the ability to operate efficiently and has good step-up and step-down voltage capabilities. Moreover, due to the characteristics of multiple inductors and intermediate capacitors in the SEPIC and Cuk conversion units, smoother input of energy can be achieved to realize the low output ripple characteristic. Summary of the Invention

[0006] The purpose of the present invention is to provide a bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk, so as to solve the problems in the prior art of buck-boost PFC converters with step-up and step-down output capabilities. Their power conversion requires two-stage circuits and there are problems such as high voltage stress on the switching tubes, large conduction losses of the switching tubes, and large electromagnetic interference.

[0007] To achieve the above purpose, the present invention is implemented by adopting the following technical solutions:

[0008] The present invention proposes a bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk. The topology of the PFC converter includes a SEPIC circuit unit, a Cuk circuit unit, input diode D RS , input diode D RC and output capacitor C o ;

[0009] The SEPIC circuit unit includes switching tube S S , input inductor L S1 , intermediate capacitor C S , diode D S and inductor L S2 ; The Cuk circuit unit includes switching tube S C , input inductor L C1 , intermediate capacitor C C , diode D C and inductor L C2 ;

[0010] The SEPIC circuit unit and the Cuk circuit unit are connected in parallel at the input and in parallel at the output to achieve step-up and step-down voltage output.

[0011] Preferably, one end of the AC input side is connected to the anode of input diode D RS and the cathode of input diode D RC ; The cathode of input diode D RS is connected to one end of input inductor L S1 , and the other end of input inductor L S1 is connected to the drain of switching tube S S and intermediate capacitor C Sis connected to the positive electrode; intermediate capacitor C S The negative electrode of is connected to inductor L S2 One end of, diode D S is connected to the anode;

[0012] Input diode D RC The anode of is connected to input inductor L C1 One end of, input inductor L C1 The other end of is connected to switch tube S C The source electrode of, intermediate capacitor C C The negative electrode of is connected; intermediate capacitor C C The positive electrode of is connected to diode D C The cathode of, inductor L C2 One end of, inductor L C2 The other end of is connected to output capacitor C o The positive electrode of, diode D S The cathode of, load R L One end of is connected;

[0013] The other end of the AC input side is connected to switch tube S S The source electrode of, switch tube S C The drain electrode of, diode D C The anode of, inductor L S2 The other end of, output capacitor C o The negative electrode of, load R L The other end is connected.

[0014] Preferably, one end of the AC input side is connected to the cathode of input diode D RS is connected to the anode of input diode D RC The anode of input diode D RS is connected to one end of input inductor L S1 One end of, input inductor L S1 The other end of is connected to switch tube S S The source electrode of, intermediate capacitor C S The negative electrode of is connected; intermediate capacitor C S The positive electrode of is connected to one end of inductor L S2 One end of, diode D S is connected to the cathode;

[0015] Input diode D RC The cathode of is connected to one end of input inductor L C1 One end of, input inductor L C1 The other end of is connected to switch tube S C The drain electrode of, intermediate capacitor C C The positive electrode of is connected; intermediate capacitor C C The negative electrode of is connected to the anode of diode D C One end of, inductor L C2is connected to one end; Inductor L C2 The other end is connected to the output capacitor C o The negative electrode of, diode D S The anode of, load R L One end is connected;

[0016] The other end of the AC input side is connected to the switch tube S C The source electrode of, switch tube S S The drain electrode of, diode D C The cathode of, inductor L S2 The other end of, output capacitor C o The positive electrode of, load R L The other end is connected.

[0017] Preferably, in the operating mode of the PFC converter in the positive half AC input cycle, the SEPIC circuit unit is mainly used, specifically as follows:

[0018] Operating mode 1: Switch tube S S , input diode D RS Is in the conducting state, and switch tube S C Is in the conducting state throughout the positive half cycle but no current flows through; The input end passes through the input diode D RS , switch tube S S To charge the input inductor L S1 ; At the same time, the intermediate capacitor C S Passes through the switch tube S S To charge the inductor L S2 , and the output capacitor C o Supplies energy to the load R L ; In this stage, the input inductor current i LS1 , inductor current i LS2 Rises linearly; The output capacitor C o Supplies energy to the load R L ;

[0019] Operating mode 2: Switch tube S S Turns off, and the input diode D RS , diode D S Is in the conducting state; The input end and the energy stored in the input inductor L S1 Charge the intermediate capacitor C S , and jointly pass through the diode D S To supply energy to the subsequent output capacitor C o And load R L ; At the same time, the inductor current i LS2 Passes through the diode D S To conduct freewheeling and transfer energy to the subsequent output capacitor C o And load R L ; In this stage, the input inductor current iLS1 、 The inductor current i LS2 linearly decreases;

[0020] Operating mode 3: The switch S S remains off. This operating mode starts when the input inductor current i LS1 and the inductor current i LS2 both linearly decrease to zero. At this time, i LS1 = i LS2 = 0, and only the output capacitor C o supplies energy to the load R L .

[0021] Preferably, the operating mode of the PFC converter in the negative half-cycle of the AC input is mainly based on the Cuk circuit unit, as follows:

[0022] Operating mode 4: The switch S C , the input diode D RC are in the conducting state. The switch S S is in the conducting state throughout the negative half-cycle but no current flows through it; the input terminal supplies energy to the input inductor L RC through the input diode D C and the switch S C1 ; at the same time, the intermediate capacitor C C supplies energy to the inductor L C , the output capacitor C C2 and supplies energy to the load R o through the switch S L ; at this stage, the input inductor current i LC1 , the inductor current i LC2 linearly increases;

[0023] Operating mode 5: The switch S C turns off. The input diode D RC , the diode D C are in the conducting state. The energy stored in the input inductor L C1 at the input terminal charges the intermediate capacitor C C and supplies energy to the subsequent output capacitor C S and the load R o together through the diode D L ; at the same time, the inductor current i LC2 freewheels through the diode D C and transfers energy to the subsequent output capacitor C o and the load R L ; at this stage, the input inductor current i LC1 , the inductor current i LC2 linearly decreases;

[0024] Operating mode 6: The switch SC Remain off. This operating mode starts when the input inductor current i LC1 and the inductor current i LC2 both linearly decrease to zero. At this time, i LC1 = i LC2 = 0, and only the output capacitor C o supplies energy to the load R L .

[0025] Preferably, the PFC converter uses single-voltage closed-loop control to implement the control of the switching transistors S C and the switching transistor S S , and the same control driving signal is used for the switching transistor S C and the switching transistor S S .

[0026] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0027] (1). The topologies used in traditional SEPIC and Cuk PFC converters use multiple diodes for rectification in multiple operating modes, resulting in operating losses. Based on this, the present invention proposes a cascaded topology of a PFC converter based on SEPIC and Cuk, which reduces the number of diode devices, thereby reducing the operating losses of the converter, and retains other main components of SEPIC and Cuk, that is, retains the LC filter network characteristics of the input and output of these two converters, and their corresponding low output ripple characteristics. Therefore, by reducing the number of input diodes and using only one input diode in a single operating mode, the circuit of the present invention reduces energy loss and simplifies the circuit structure.

[0028] (2). The present invention connects the SEPIC converter and the Cuk converter in parallel at the input and in parallel at the output, retaining the smooth power conversion of the SEPIC and Cuk converters and their corresponding low output ripple characteristics.

[0029] (3). The circuit in the present invention can use simple single-voltage loop feedback to implement closed-loop control, and the two switching transistors can use exactly the same driving signal to implement closed-loop control. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is the topology structure diagram of traditional SEPIC and Cuk PFC converters in the background technology of the present invention;

[0031] Figure 2 is the topology structure diagram of the wide-output low-ripple bridge-less PFC converter based on SEPIC and Cuk in the present invention;

[0032] Figure 3It is the working mode diagram of the positive half AC input cycle of the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk in the present invention;

[0033] Figure 4 It is the working mode diagram of the negative half AC input cycle of the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk in the present invention;

[0034] Figure 5 It is the schematic diagram of the closed-loop control circuit of the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk in the present invention;

[0035] Figure 6 It is the waveform diagram of key devices within half a power frequency cycle of the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk in the present invention;

[0036] Figure 7 It is the simulation waveform diagram of key devices of the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk in the present invention. Detailed implementation manners

[0037] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0038] Embodiment 1:

[0039] Refer to Figure 2-7 , for the bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk, Figure 2 two hybrid input parallel output parallel bridgeless circuits of the present invention are given. The circuit topology mainly includes a SEPIC circuit unit and a Cuk circuit unit. The switching tube S S , input inductor L S1 , intermediate capacitor C S , input diode D RS , diode D S , inductor L S2 constitute the SEPIC circuit unit; the switching tube S C , input inductor L C1 , intermediate capacitor C C , input diode D RC , diode D C , inductor L C2 constitute the Cuk circuit unit.

[0040] Specifically, Figure 2 In (a), one end of the AC input side is connected to the anode of the input diode D RS and the cathode of the input diode D RC . The cathode of the input diode D RS is connected to one end of the input inductor L S1 . The other end of the input inductor L S1 is connected to the drain of the switching transistor S S and the positive electrode of the intermediate capacitor C S . The negative electrode of the intermediate capacitor C S is connected to one end of the inductor L S2 and the anode of the diode D S . The anode of the input diode D RC is connected to one end of the input inductor L C1 . The other end of the input inductor L C1 is connected to the source of the switching transistor S C , the negative electrode of the intermediate capacitor C C . The positive electrode of the intermediate capacitor C C is connected to one end of the inductor L C2 and the cathode of the diode D C . The positive electrode of the output capacitor C o is connected to the other end of the inductor L C2 , the cathode of the diode D S and one end of the load R L . The other end of the AC input side is connected to the source of the switching transistor S S , the drain of the switching transistor S C , the anode of the diode D C , the other end of the inductor L S2 , the negative electrode of the output capacitor C o and the other end of the load R L .

[0041] Specifically, Figure 2 In (b), one end of the AC input side is connected to the cathode of the input diode D RS and the anode of the input diode D RC . The anode of the input diode D RS is connected to one end of the input inductor L S1 . The other end of the input inductor L S1 is connected to the source of the switching transistor S S and the negative electrode of the intermediate capacitor C S . The positive electrode of the intermediate capacitor C S is connected to one end of the inductor L S2 and the cathode of the diode D S . The cathode of the input diode D RC is connected to one end of the input inductor L C1is connected to one end of the input inductor L C1 and the other end is connected to the drain of the switching transistor S C and the positive electrode of the intermediate capacitor C C . The negative electrode of the intermediate capacitor C C is connected to one end of the inductor L C2 and the anode of the diode D C . The negative electrode of the output capacitor C o is connected to the other end of the inductor L C2 and the anode of the diode D S and one end of the load R L . The other end of the AC input side is connected to the source of the switching transistor S C , the drain of the switching transistor S S , the cathode of the diode D C , the other end of the inductor L S2 , the positive electrode of the output capacitor C o and the other end of the load R L .

[0042] Figure 2 Two hybrid input parallel output parallel bridgeless circuits based on SEPIC and Cuk are proposed in the present invention. Since Figure 2 (a) and Figure 2 (b) have circuit symmetry and performance similarity, therefore, the operation principle of the converter is mainly introduced with the circuit in Figure 2 (a).

[0043] The operation mode diagram of the positive half AC input cycle of the circuit of the present invention is as shown in Figure 3 . Figure 3 (a) is the equivalent circuit of the operation mode 1 of the AC-DC bridgeless PFC converter mainly based on the SEPIC circuit in the positive half cycle of the AC input; Figure 3 (b) is the equivalent circuit of the operation mode 2 of the AC-DC bridgeless PFC converter mainly based on the SEPIC circuit in the positive half cycle of the AC input; Figure 3 (c) is the equivalent circuit of the operation mode 3 of the AC-DC bridgeless PFC converter mainly based on the SEPIC circuit in the positive half cycle of the AC input.

[0044] The operation mode diagram of the negative half AC input cycle of the circuit of the present invention is as shown in Figure 4 . Figure 4 (a) is the equivalent circuit of the operation mode 4 of the AC-DC bridgeless PFC converter mainly based on the Cuk circuit in the negative half cycle of the AC input; Figure 4 (b) is the equivalent circuit of the operation mode 5 of the AC-DC bridgeless PFC converter mainly based on the Cuk circuit in the negative half cycle of the AC input; Figure 4(c) is the equivalent circuit of the working mode 6 of the AC-DC bridgeless PFC converter mainly based on the Cuk circuit during the negative half-cycle of the AC input.

[0045] Working mode 1: The switch S S , the input diode D RS are in the conducting state. The switch S C is in the conducting state throughout the positive half-cycle but no current flows through it. The input terminal charges the input inductor L RS through the input diode D S and the switch S S1 ; at the same time, the intermediate capacitor C S charges the inductor L S through the switch S S2 , and the output capacitor C o supplies energy to the load R L . During this stage, the input inductor current i LS1 , the inductor current i LS2 rises linearly. The output capacitor C o supplies energy to the load R L .

[0046] Working mode 2: The switch S S turns off, and the input diode D RS , the output diode D S are in the conducting state. The energy stored in the input inductor L S1 at the input terminal charges the intermediate capacitor C S , and they jointly supply energy to the subsequent output capacitor C S and the load R o through the diode D L . At the same time, the current i S2 of the inductor L LS2 freewheels through the diode D S and transfers energy to the subsequent output capacitor C o and the load R L . During this stage, the input inductor current i LS1 , the inductor current i LS2 drops linearly.

[0047] Working mode 3: The switch S S remains off. This working mode starts when both the inductor current i LS1 and the inductor current i LS2 linearly drop to zero. At this time, i LS1 = i LS2 = 0, and only the output capacitor C o supplies energy to the load R L .

[0048] Working mode 4: The switch S C, input diode D RC is in the conducting state, and switch S S is in the conducting state throughout the negative half-cycle but no current flows through it. The input terminal is connected to the input inductor L RC , switch S C to charge the input inductor L C1 ; at the same time, the intermediate capacitor C C charges the inductor L C and the output capacitor C C2 through switch S o and supplies energy to the load R L . During this stage, the input inductor current i LC1 , inductor current i LC2 rises linearly.

[0049] Operating mode 5: Switch S C turns off, the input diode D RC , diode D C is in the conducting state, and the energy stored in the input inductor L C1 at the input terminal charges the intermediate capacitor C C and supplies energy to the subsequent-stage output capacitor C S and the load R o together through diode D L . At the same time, the current i C2 in the inductor L LC2 flows through diode D C for freewheeling and transfers energy to the subsequent-stage output capacitor C[[ID=,50]] o and the load R L . During this stage, the input inductor current i LC1 , inductor current i LC2 drops linearly.

[0050] Operating mode 6: Switch S C remains off. This operating mode starts when both the inductor current i LC1 and the inductor current i LC2 drop linearly to zero, at which time i LC1 = i LC2 = 0, and only the output capacitor C o supplies energy to the load R L .

[0051] The closed-loop control circuit of the circuit of the present invention is as shown in Figure 5 . Figure 5 This is the main control principle of the bridge-less PFC converter of the present invention. It can be seen that the present invention mainly uses a simple single-voltage closed-loop control to achieve the control of the two switches. Moreover, the two switches S C and switch S S adopt the same control drive signal, avoiding complex control.

[0052] Figure 6 This is the theoretical waveform diagram of the key devices of the bridgeless PFC converter of the present invention. Among them, d on is the conduction duty cycle, and d off is the duty cycle of the inductor current freewheeling turn-off, and T s is a switching period. It can be seen from Figure 6 that the key devices of the conversion unit mainly operate within half of the power frequency period and do not interfere with each other.

[0053] System simulation results:

[0054] To verify the operation feasibility of the present invention under 220Vac input, the PSIM simulation software is used to simulate and verify this circuit. Specific parameters: the peak value of the AC input voltage is 311V, the effective value is 220Vac, the frequency is 50Hz, the input inductor L S1 is 2mH, the input inductor L C1 is 500uH, the inductor L S2 = L C2 is 25uH, the intermediate capacitor C C = C S is 1uF, the switching frequency of the PFC converter is 50kHz, P is 1 and I is 0.005 in the PI parameters, and the output voltage of the converter can be 100 - 200V.

[0055] Figure 7 This is the waveform simulation diagram of the key devices of the bridgeless PFC converter. It can be seen from Figure 7 that under the condition of AC input 220Vac (i.e., the peak value of the AC input voltage is 311V) and frequency 50Hz, the bridgeless PFC converter realizes a regulated output voltage of 160V. Moreover, the switching tubes S S and the switching tube S C are simultaneously turned on and off during the positive and negative half cycles of the input voltage v in , realizing the bridgeless operation of the AC-DC circuit of the present invention. In addition, the dual conversion unit circuit only operates within each half of the power frequency period, and the inductor currents do not interfere with each other, which is consistent with the theoretical key device waveforms shown in Figure 6 , verifying the working principle of the converter without a rectifier bridge, and at the same time indicating that the converter can achieve closed-loop stable operation through the system closed-loop control scheme shown in Figure 5 .

[0056] Table 1 gives the operation simulation results of the present invention under a wide output voltage. It can be seen from Table 1 that the PF value of the converter proposed by the present invention is higher than 0.94 in a wide operation range, having good PF value and THDi performance; and its output voltage ripple (peak-to-peak value) is low in a wide operation range, indicating that the converter still has the characteristic of low output voltage ripple.

[0057] Table 1 Comparison of the converter performance of the present invention under 220Vac input

[0058]

[0059] According to the above theoretical analysis and simulation results, it can be seen that the bridgeless PFC converter based on Cuk and SEPIC circuits proposed by the present invention can achieve a wide output voltage of 100 - 200V under 220Vac AC input voltage through simple single - voltage closed - loop control. And the two switching tubes can adopt exactly the same driving signals, and the circuit control scheme is simple and reliable.

[0060] As mentioned above, it is only used to help understand the method of the present invention and its core idea. However, the protection scope of the present invention is not limited thereto. For those of ordinary skill in the art within the technical scope disclosed by the present invention, any equivalent replacement or change made according to the technical solution and inventive concept of the present invention should be covered within the protection scope of the present invention. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk, characterized in that, The topological structure of the PFC converter includes a SEPIC circuit unit, a Cuk circuit unit, an input diode D RS , an input diode D RC and an output capacitor C o ; The SEPIC circuit unit includes a switching transistor S S , an input inductor L S1 , an intermediate capacitor C S , a diode D S , and an inductor L S2 ; The Cuk circuit unit includes a switching transistor S C , an input inductor L C1 , an intermediate capacitor C C , a diode D C , and an inductor L C2 ; The SEPIC circuit unit is connected in parallel at the input and output with the Cuk circuit unit to achieve step-up and step-down voltage output; One end of the AC input side is connected to the anode of the input diode D RS ; the cathode of the input diode D RC is connected; the cathode of the input diode D RS is connected to one end of the input inductor L S1 ; the other end of the input inductor L S1 is connected to the drain of the switching transistor S S and the positive electrode of the intermediate capacitor C S ; the negative electrode of the intermediate capacitor C S is connected to one end of the inductor L S2 and the anode of the diode D S . Input diode D RC The anode of which is connected to the input inductor L C1 One end of the input inductor L C1 The other end of which is connected to the source of the switching transistor S C And the negative electrode of the intermediate capacitor C C One end of the intermediate capacitor C C The positive electrode of which is connected to the cathode of the diode D C And one end of the inductor L C2 The other end of the inductor L C2 Is connected to the positive electrode of the output capacitor C o The cathode of the diode D S And one end of the load R L Are connected; The other end of the AC input side is connected to the source electrode of the switching transistor S S , the drain electrode of the switching transistor S C , the anode of the diode D C , the other end of the inductor L S2 , the negative electrode of the output capacitor C o , and the other end of the load R L ; In the operating mode of the PFC converter during the positive half-cycle of the AC input, the SEPIC circuit unit is the main one, specifically as follows: Operating mode 1: Switching transistor S S , input diode D RS are in the conducting state, and switching transistor S C is in the conducting state throughout the entire positive half-cycle but no current flows through it; The input terminal passes through the input diode D RS , switch tube S S Give the input inductor L S1 Charging; at the same time, the intermediate capacitor C S Through the switch tube S S To the inductor L S2 Charging, output capacitor C o Give load R L Energy supply; in this stage, the input inductor current i LS1 , inductor current i LS2 Linear rise; output capacitance C o To the load R L Energy supply; Working mode 2: Switching transistor S S Turned off, input diode D RS and diode D S are in the conducting state; The energy stored in the input inductor L at the input terminal S1 charges the intermediate capacitor C S and together passes through diode D S to supply energy to the subsequent output capacitor C o and load R L ; At the same time, the inductor current i LS2 flows through diode D S for freewheeling and transfers energy to the subsequent output capacitor C o and load R L ; During this stage, the input inductor current i LS1 and inductor current i LS2 decrease linearly; Operating mode 3: Switching transistor S S Remains off. This operating mode starts when the input inductor current i LS1 and the inductor current i LS2 both linearly decrease to zero, at which time i LS1 = i LS2 = 0, and only the output capacitor C o supplies energy to the load R L .

2. The bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk according to claim 1, wherein The specific connection of the topology of the PFC converter is replaced by: One end of the AC input side is connected to the cathode of the input diode D RS ; the anode of the input diode D RC is connected; the anode of the input diode D RS is connected to one end of the input inductor L S1 ; the other end of the input inductor L S1 is connected to the source of the switching transistor S S and the negative electrode of the intermediate capacitor C S ; the positive electrode of the intermediate capacitor C S is connected to one end of the inductor L S2 and the cathode of the diode D S ; Input diode D RC The cathode of which is connected to one end of the input inductor L C1 The other end of the input inductor L C1 Is connected to the drain of the switching transistor S C And the positive electrode of the intermediate capacitor C C The negative electrode of the intermediate capacitor C C Is connected to the anode of the diode D C And one end of the inductor L C2 The other end of the inductor L C2 Is connected to the negative electrode of the output capacitor C o The anode of the diode D S And one end of the load R L Are connected together; The other end of the AC input side is connected to the source of the switching transistor S C , the drain of the switching transistor S S , the cathode of the diode D C , the other end of the inductor L S2 , the positive electrode of the output capacitor C o , and the other end of the load R L .

3. The bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk according to claim 1 or 2, characterized in that, In the operating mode of the PFC converter during the negative half-cycle of the AC input, the Cuk circuit unit is the main one, specifically as follows: Operating mode 4: Switching transistor S C , input diode D RC is in the conducting state, and switching transistor S S is in the conducting state throughout the negative half-cycle but no current flows through it; The input terminal is connected to the input inductor L through the input diode D RC and the switching transistor S C to charge the input inductor L C1 ; at the same time, the intermediate capacitor C C charges the inductor L C and the output capacitor C C2 through the switching transistor S o and supplies power to the load R L ; during this stage, the input inductor current i LC1 and the inductor current i LC2 rise linearly; Working mode 5: Switching transistor S C Turned off, input diode D RC and diode D C are in the conducting state, the energy stored in the input inductor L C1 at the input terminal charges the intermediate capacitor C C and together they pass through diode D S to supply energy to the output capacitor C o at the subsequent stage and the load R L ; meanwhile, the inductor current i LC2 passes through diode D C for freewheeling and transfers energy to the output capacitor C o at the subsequent stage and the load R L ; during this stage, the input inductor current i LC1 and the inductor current i LC2 decrease linearly; Operating Mode 6: Switching transistor S C Remains off. This operating mode starts when the input inductor current i LC1 and the inductor current i LC2 both linearly decrease to zero, at which point i LC1 = i LC2 = 0, and only the output capacitor C o supplies energy to the load R L .

4. The bridgeless PFC converter with wide output and low ripple based on SEPIC and Cuk according to claim 3, wherein The PFC converter uses single-voltage closed-loop control to implement the control of switch S C and switch S S and uses the same control drive signal for switch S C and switch S S ​

Citation Information

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