Composite terminal structure of silicon carbide PIN diode and design method thereof

Abstract

The invention discloses a composite terminal structure of a silicon carbide PIN diode and a design method of the composite terminal structure. The composite terminal structure comprises a device cell and a device terminal. The device cell comprises an N + type heavily doped substrate, an N-type lightly doped drift layer and a P + type heavily doped layer which are arranged in sequence; the device terminal is located in the N-type lightly doped drift layer, the device terminal comprises two parts of P + type junction terminal expansion regions and three groups of P + type field limiting ring structures, P + injection rings formed by P + type ion injection are arranged in the P + type junction terminal expansion regions, a plurality of P + injection rings form the P + type field limiting ring structures, the adjacent P + injection rings are separated by the P + type junction terminal expansion regions, and the P + type field limiting ring structures are arranged in the N-type lightly doped drift layer. And the upper surfaces of the P + type junction terminal expansion region and the P + injection ring are covered with oxide layers. The high-voltage power device has the advantages of being compact in structure, small in device area, low in production cost and the like, higher breakdown voltage, better process robustness and long-term reliability are achieved within the limited chip area, and the requirements of the next-generation high-voltage power device are met.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a composite terminal structure of a silicon carbide PIN diode and a design method thereof. Background Art

[0002] As an important power semiconductor device, silicon carbide PIN diodes are widely used in high-voltage rectification, radio frequency switching and power electronic systems due to their high breakdown voltage, low conduction loss and fast switching characteristics. However, as power electronic equipment develops towards high voltage, high frequency and high reliability, the terminal structure of traditional PIN diodes faces severe challenges. Under high-voltage working conditions, the electric field concentration effect in the edge area of ​​the device will cause local breakdown, severely limiting the device's voltage resistance and affecting long-term reliability.

[0003] In recent years, for the terminal optimization of high-voltage devices, some studies have attempted to combine junction termination extension (JTE) with field limiting ring (FLR) technology to synergistically improve the terminal withstand voltage performance. For example, by using JTE as the main terminal structure, supplemented by a small number of field limiting rings, the electric field distribution can be further regulated through the ring structure while reducing the surface electric field. However, the existing scheme still has the problem of a small optimal injection concentration range of the JTE structure. Therefore, in order to solve the process robustness problem of the existing structure, it is urgent to develop a new PIN diode terminal structure. By optimizing the integrated design of JTE and field limiting rings, higher breakdown voltage, better process robustness and long-term reliability can be achieved within a limited chip area to meet the needs of the next generation of high-voltage power devices. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a composite terminal structure of a silicon carbide PIN diode with a compact structure, good process robustness and high stability and a design method thereof in view of the problem that the reverse breakdown voltage of the existing silicon carbide PIN diode is easily affected by processing errors.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is: A composite terminal structure of a silicon carbide PIN diode, including a device cell and a device terminal: The device cell comprises an N+ type heavily doped substrate, an N- type lightly doped drift layer and a P+ type heavily doped layer, a homoepitaxial N- type lightly doped drift layer is formed on the N+ type heavily doped substrate, and a homoepitaxial P+ type heavily doped layer is formed on the N- type lightly doped drift layer and is connected to an anode metal; The device terminal is located in the N-type lightly doped drift layer, and the device terminal includes two parts of P+ type junction terminal expansion areas and three groups of P+ type field limiting ring structures. The P+ type junction terminal expansion area is provided with a P+ injection ring formed by P+ type ion implantation. Multiple P+ injection rings constitute a P+ type field limiting ring structure, and adjacent P+ injection rings are separated by the P+ type junction terminal expansion area. The upper surfaces of the P+ type junction terminal expansion area and the P+ injection ring are covered with an oxide layer. As a further improvement of the present invention, the P+ type junction terminal expansion area includes a P+ type JTE1 terminal expansion area and a P+ type JTE2 terminal expansion area arranged in sequence, and the P+ type field limiting ring structure includes a first group of P+ type field limiting ring structures, a second group of P+ type field limiting ring structures and a third group of P+ type field limiting ring structures arranged in sequence; the first group of P+ type field limiting ring structures is located in the P+ type JTE1 terminal expansion area, the second group of P+ type field limiting ring structures is located in the P+ type JTE2 terminal expansion area, and the third group of P+ type field limiting ring structures is located outside the P+ type JTE2 terminal expansion area. As a further improvement of the present invention, the device terminal is formed by two ion implantations, the P+ type JTE1 terminal expansion area and the second group of P+ type field limiting ring structures are formed by the first ion implantation, and the first group of P+ type field limiting ring structures, the P+ type JTE2 terminal expansion area and the third group of P+ type field limiting ring structures are formed by the second ion implantation. As a further improvement of the present invention, the first group of P+ type field limiting ring structures, the second group of P+ type field limiting ring structures and the third group of P+ type field limiting ring structures all include three P+ injection rings. As a general technical concept, the present invention also provides a design method for a composite terminal structure suitable for the above-mentioned silicon carbide PIN diode, comprising the following steps: Step S1, designing several dual-zone JTE terminal structures with different doping concentrations for the silicon carbide PIN diode, performing process simulation and device simulation on each dual-zone JTE terminal structure, determining the dual-zone JTE terminal structure according to the simulation results, and obtaining the first-stage terminal structure; Step S2, adding a plurality of groups of field limiting ring structures to the first-stage terminal structure determined in step S1, and adjusting the number of field rings of each group of field limiting ring structures, performing process simulation and device simulation on the first-stage terminal structures provided with different numbers of field rings, selecting the terminal structure with the best device performance according to the simulation results, and obtaining the second-stage terminal structure; Step S3, changing the implantation concentration of the JTE region on the second-stage terminal structure determined in step S2, and simulating the second-stage terminal structures with different JTE concentrations, and determining the terminal structure of the final silicon carbide PIN diode according to the simulation results.

[0006] As a further improvement of the present invention, in step S1, the device simulation includes reverse breakdown voltage simulation. As a further improvement of the present invention, in step S2, in each group of field limiting ring structures, the lateral doping concentrations between the field rings are distributed in a trapezoidal shape. As a further improvement of the present invention, in step S2, the field limiting ring structures are three groups. As a further improvement of the present invention, in step S2, three field rings are provided in each group of field limiting ring structures. As a further improvement of the present invention, the simulation software used in the simulation process is Sentaurus TCAD.

[0007] Compared with the prior art, the advantages of the present invention are: 1. The composite terminal structure of the silicon carbide PIN diode of the present invention is a new composite terminal structure, which has both a dual-zone JTE structure and a three-group field limiting ring structure. Compared with a single JTE terminal structure, the silicon carbide PIN diode using the composite terminal structure has better process robustness by modulating the internal electric field distribution of the device. Compared with a single field ring terminal, the composite terminal structure requires fewer rings under the same withstand voltage, which greatly reduces the production cost.

[0008] 2. The composite terminal structure design method of the silicon carbide PIN diode of the present invention first designs several dual-zone JTE terminal structures with different doping concentrations, and determines the optimal dual-zone JTE terminal structure according to the simulation results; then, three groups of field limiting ring structures are added on the basis of the determined dual-zone JTE terminal structure, and the number of field rings and the number of field limiting rings in each group of field limiting rings are adjusted on this basis, and the optimal terminal structure is obtained after simulation; finally, the concentration of the JTE terminal structure is adjusted, and when the final simulation results meet the design requirements and cost requirements, the terminal structure of the final silicon carbide PIN diode is determined. The JTE terminal structure can combine the advantages of uniform electric field distribution with the field limiting ring structure that can eliminate local electric field concentration, and achieve higher breakdown voltage, better process robustness and long-term reliability within a limited chip area, which well meets the needs of the next generation of high-voltage power devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a schematic diagram of the structural principle of the composite terminal structure of the silicon carbide PIN diode in a specific embodiment of the present invention; Figure 2 It is a schematic diagram of the structure of a single field limit loop terminal; Figure 3 This is a comparison chart of reverse breakdown voltage simulation results of the composite terminal structure and the single field limiting ring terminal structure; Figure 4 This is a comparison chart of reverse breakdown voltage simulation results of the composite terminal structure and the single field limiting ring terminal structure under different injection concentrations; Figure 5 This is the simulation result diagram of the device surface electric field distribution under the optimal injection concentration; Legend: 1. N+ type heavily doped substrate; 2. N- type lightly doped drift layer; 3. P+ type heavily doped layer; 4. The first group of P+ type field limiting ring structures; 5. P+ type JTE1 terminal expansion area; 6. The second group of P+ type field limiting ring structures; 7. P+ type JTE2 terminal expansion area; 8. The third group of P+ type field limiting ring structures; 9. P+ injection ring. DETAILED DESCRIPTION

[0010] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0011] In the description of the present invention, it should be understood that the terms "side", "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0012] In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0013] Example 1 This embodiment provides a design method for a composite terminal structure of a silicon carbide PIN diode. All simulations in this embodiment are performed using Sentaurus TCAD software. The design method includes the following steps: Step S1, designing several dual-zone JTE terminal structures with different doping concentrations for silicon carbide PIN diodes, performing process simulation and device simulation on each dual-zone JTE terminal structure, determining the optimal dual-zone JTE terminal structure according to the simulation results, and obtaining the first-stage terminal structure.

[0014] Specifically, firstly, the process simulation module of Sentaurus TCAD software is used to design several dual-zone JTE terminal structures with different doping concentrations, and process simulation is performed on different types of dual-zone JTE terminal structures, including lithography, etching, ion implantation and other process steps. The parameters in the actual tape-out process are used in the simulation process to verify the feasibility of the process. Subsequently, the device simulation module of Sentaurus TCAD software is used to perform device simulation on different dual-zone JTE terminal structure schemes, mainly for the analysis of the reverse breakdown voltage of the device. According to the design requirements, the terminal structure scheme that is compatible with the current process and has the best improvement in the electrical characteristics of the device is selected, and the doping concentration of the dual-zone JTE terminal structure is determined. Since the dual-zone JTE terminal structure of the silicon carbide PIN diode mainly optimizes the voltage resistance performance of the device and has poor process robustness, the subsequent simulation focuses on how to improve the process robustness of the device. Step S2, adding three sets of field limiting ring structures to the first-stage terminal structure determined in step S1, so that the lateral doping concentration achieves a trapezoidal distribution concentration. Then, the number of field rings of each set of field limiting ring structures is adjusted, and process simulation and device simulation are performed on the first-stage terminal structures with different numbers of field rings. According to the simulation results, the terminal structure with the best device performance is selected to obtain the second-stage terminal structure.

[0015] It can be seen that the introduction of the field limiting ring structure is intended to modulate the electric field distribution and expand the optimal doping concentration range of the dual-zone JTE terminal structure, thereby enhancing the process robustness of the device. The process simulation and device simulation were performed on field limiting ring structures of different numbers. The simulation results show that after adding the field limiting ring structure, the optimal doping concentration range of the JTE structure of the device is significantly improved. The more field limiting rings there are, the higher the withstand voltage performance. However, when the number of field limiting rings increases to a certain extent, the improvement in withstand voltage performance will become small and negligible. Therefore, the number of field limiting rings is not the more the better, and there is an optimal value. In addition, the increase in the number of field limiting rings will lead to an increase in the chip area. Therefore, under the premise of meeting the design requirements, the terminal structure with the smallest occupied area should be used as much as possible. Through the analysis of the simulation results, the number of field limiting rings that is optimal for improving the process robustness of the device is selected. In this embodiment, three field rings are provided in each group of field limiting ring structures, and the lateral doping concentrations between the field rings are distributed in a trapezoidal shape.

[0016] Step S3, changing the implantation concentration of the JTE region on the second-stage terminal structure determined in step S2, and simulating the second-stage terminal structures with different JTE concentrations, and determining the terminal structure of the final silicon carbide PIN diode according to the simulation results.

[0017] In this embodiment, after the simulation of step S1 and step S2, the pressure resistance performance of the composite terminal structure meets the pressure resistance design requirements, and there is design redundancy. Therefore, according to the actual product pressure resistance requirements, the composite terminal structure is optimized. The optimization process mainly focuses on the injection concentration of the JTE area in the composite terminal structure. By increasing or decreasing the concentration of the JTE area and performing simulation comparison, a composite terminal solution that meets the pressure resistance requirements and is economical and applicable is finally selected.

[0018] In this embodiment, by optimizing the doping concentration and length of the JTE region, as well as the number and distribution of field limiting rings, the Sentaurus TCAD simulation software is used to determine the optimal structure, achieve uniform electric field distribution, and improve the voltage resistance and process robustness of the device. The designed composite terminal structure reduces the chip area and production cost while meeting the voltage resistance requirements, has high economy and practicality, and is suitable for high-voltage rectification, radio frequency switching, power electronic systems and other fields.

[0019] Example 2 like Figure 1 As shown, the composite terminal structure of the silicon carbide PIN diode of the present invention is obtained by the design method in Example 1, and the composite terminal structure includes a device cell and a device terminal.

[0020] The device cell includes an N+ type heavily doped substrate 1, an N- type lightly doped drift layer 2 and a P+ type heavily doped layer 3. The homoepitaxial N- type lightly doped drift layer 2 is formed on the N+ type heavily doped substrate 1, and the homoepitaxial P+ type heavily doped layer 3 on the N- type lightly doped drift layer 2 is connected to the anode metal.

[0021] The device terminal is located in the N-type lightly doped drift layer 2, and the device terminal includes two parts of the P+ type junction terminal expansion area and three groups of P+ type field limiting ring structures. The P+ type junction terminal expansion area is provided with a P+ injection ring 9 formed by P+ type ion implantation. Three P+ injection rings 9 form a P+ type field limiting ring structure, and adjacent P+ injection rings 9 are separated by the P+ type junction terminal expansion area. The lateral injection lengths of the three P+ injection rings 9 decrease successively, so that the overall lateral doping concentration of the field limiting ring area decreases slowly, avoiding large step changes, which is conducive to the uniformity of the electric field distribution on the device surface. The upper surfaces of the P+ type junction terminal expansion area and the P+ injection ring 9 are covered with an oxide layer. like Figure 1As shown, the P+ type junction terminal expansion area includes a P+ type JTE1 terminal expansion area 5 and a P+ type JTE2 terminal expansion area 7 which are arranged in sequence, and the P+ type field limiting ring structure includes a first group of P+ type field limiting ring structures 4, a second group of P+ type field limiting ring structures 6 and a third group of P+ type field limiting ring structures 8 which are arranged in sequence. Among them, the first group of P+ type field limiting ring structures 4 are located in the P+ type JTE1 terminal expansion area 5, the second group of P+ type field limiting ring structures 6 are located in the P+ type JTE2 terminal expansion area 7, and the third group of P+ type field limiting ring structures 8 are located outside the P+ type JTE2 terminal expansion area 7. The first group of P+ type field limiting ring structures 4 and the second group of P+ type field limiting ring structures 6 are separated by the P+ type JTE1 terminal expansion area 5, and the second group of P+ type field limiting ring structures 6 and the third group of P+ type field limiting ring structures 8 are separated by the P+ type JTE2 terminal expansion area 7.

[0022] In this embodiment, the device terminal is formed by two ion implantations, and the P+ type JTE1 terminal expansion area 5 and the second group of P+ type field limiting ring structures 6 are formed by the first ion implantation. The first group of P+ type field limiting ring structures 4, the P+ type JTE2 terminal expansion area 7 and the third group of P+ type field limiting ring structures 8 are formed by the second ion implantation. The upper surfaces of the P+ type JTE1 terminal expansion area 5, the P+ type JTE2 terminal expansion area 7, the first group of P+ type field limiting ring structures 4, the second group of P+ type field limiting ring structures 6 and the third group of P+ type field limiting ring structures 8 are all covered with an oxide layer. The oxide layer is made of silicon dioxide.

[0023] like Figure 1 As shown in Figure 2, the implantation depth of the P+ type JTE1 terminal extension region 5 is 1 μm, the implantation length is 100 μm, and the implantation concentration is 1.75×10 17 cm -3 In addition, the number of field limiting rings in the second group of P+ type field limiting ring structures 6 is three, the injection depths of the three P+ injection rings 9 are all 1 μm, the injection lengths are 5 μm, 4 μm, and 3 μm from left to right, and the intervals between the three adjacent P+ injection rings 9 are 10 μm and 11 μm, respectively. Among them, the distance between the first injection ring 9 and the left boundary of the P+ type JTE2 terminal extension area 7 is 9 μm, and the injection concentrations of the three P+ injection rings 9 are all 1.75×10 17 cm -3 .

[0024] like Figure 1 As shown in the figure, the implantation depth of the P+ type JTE2 terminal extension region 7 is 1 μm, the implantation length is 100 μm, and the implantation concentration is 1.17×10 17 cm -3; In addition, the number of field limiting rings in the first group of P+ type field limiting ring structures 4 is three, the injection depths of the three P+ injection rings 9 are all 1 μm, the injection lengths are 5 μm, 4 μm, and 3 μm from left to right, and the intervals between the three adjacent P+ injection rings 9 are 10 μm and 11 μm, respectively. Among them, the distance between the first injection ring 9 and the left boundary of the P+ type JTE1 terminal extension area 5 is 9 μm, and the injection concentrations of the three P+ injection rings 9 are all 1.17×10 17 cm -3 .

[0025] like Figure 1 As shown in FIG. 1 , the number of field limiting rings in the third group of P+ type field limiting ring structures 8 is three, the injection depths of the three P+ injection rings 9 are all 1 μm, the injection lengths are 5 μm, 4 μm, and 3 μm from left to right, and the intervals between the three adjacent P+ injection rings 9 are 10 μm and 11 μm, respectively. Among them, the distance between the first injection ring 9 and the right boundary of the P+ type JTE2 terminal region 7 is 9 μm, and the injection concentrations of the three P+ injection rings 9 are all 1.17×10 17 cm -3 .

[0026] In this embodiment, by combining the JTE terminal with the FLR structure, a laterally variable doping concentration distribution is formed near the main junction inside the device, which is beneficial to regulating the electric field strength distribution inside the device, thereby improving the process robustness of the device.

[0027] The above simulation structure is simulated, and the Figure 2 The single field limiting loop structure shown in the figure is simulated, and the reverse breakdown voltage comparison results of the two structures are shown in Figure 3 As shown in the simulation results, the reverse breakdown voltage of the two structures obtained by simulation is about 1140 V. By comparison, it is found that when the reverse withstand voltage is approximately the same, compared with the single field limiting ring terminal structure, the total number of field limiting rings in the composite terminal structure of this embodiment is reduced from 14 to 9, a reduction of 35%, which saves chip area and improves terminal efficiency.

[0028] like Figure 4 In the simulation results of the reverse breakdown voltage of the terminal structure under different injection concentrations shown in , the dotted line clearly marks the optimal working range of the device terminal structure. This range corresponds to the injection concentration range of 0.4×10 17 cm -3 to 3.6×10 17 cm -3In this concentration range, the reverse breakdown voltage of the device reaches a peak value of about 1150 V. Compared with the traditional single terminal structure, the optimal working range of the composite terminal structure of this embodiment is significantly widened, and the concentration range width is increased from 1.2×10 17 cm -3 Expanded to 3.2×10 17 cm -3 , an increase of about 2.67 times. This extended concentration range not only significantly improves the device's robustness to process fluctuations, but also optimizes the device's withstand voltage performance, providing a key theoretical basis for the design and process optimization of SiC device terminal structures, and helping to further improve the performance and reliability of the device.

[0029] The injection concentration corresponding to the reverse breakdown voltage peak of 1150 V was selected as the optimal injection concentration, and the surface electric field distribution was simulated and analyzed. The simulation results of the device surface electric field distribution are shown in Figure 2. Figure 5 As shown in the figure, the analysis found that the electric field concentration phenomenon of the composite terminal structure is significantly reduced. By reasonably setting the concentration and position of the injection ring, the device terminal structure can give full play to the multi-zone effect within the optimal injection concentration range, and realize a gradual decrease in the concentration gradient from the main junction to the terminal end, thereby significantly improving the overall voltage resistance performance of the device. This optimized electric field distribution not only effectively avoids local breakdown, but also further improves the long-term reliability and process compatibility of the device.

[0030] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A composite terminal structure of a silicon carbide PIN diode, characterized in that: Including device cells and device terminals: The device cell comprises an N+ type heavily doped substrate (1), an N- type lightly doped drift layer (2) and a P+ type heavily doped layer (3); the homoepitaxial N- type lightly doped drift layer (2) is formed on the N+ type heavily doped substrate (1); and the homoepitaxial P+ type heavily doped layer (3) is formed on the N- type lightly doped drift layer (2) and is connected to an anode metal; The device terminal is located in an N-type lightly doped drift layer (2), and the device terminal comprises two P+ type junction terminal expansion areas and three groups of P+ type field limiting ring structures. A P+ injection ring (9) formed by P+ type ion injection is provided in the P+ type junction terminal expansion area, and a plurality of P+ injection rings (9) form a P+ type field limiting ring structure, and adjacent P+ injection rings (9) are separated by the P+ type junction terminal expansion area. The upper surfaces of the P+ type junction terminal expansion area and the P+ injection rings (9) are both covered with an oxide layer.

2. The composite terminal structure of the silicon carbide PIN diode according to claim 1, characterized in that: The P+ type junction terminal expansion area comprises a P+ type JTE1 terminal expansion area (5) and a P+ type JTE2 terminal expansion area (7) which are arranged in sequence, and the P+ type field limiting ring structure comprises a first group of P+ type field limiting ring structures (4), a second group of P+ type field limiting ring structures (6) and a third group of P+ type field limiting ring structures (8) which are arranged in sequence; the first group of P+ type field limiting ring structures (4) is located in the P+ type JTE1 terminal expansion area (5), the second group of P+ type field limiting ring structures (6) is located in the P+ type JTE2 terminal expansion area (7), and the third group of P+ type field limiting ring structures (8) is located outside the P+ type JTE2 terminal expansion area (7).

3. The composite terminal structure of the silicon carbide PIN diode according to claim 2, characterized in that: The device terminal is formed by two ion implantations, the P+ type JTE1 terminal expansion region (5) and the second group of P+ type field limiting ring structures (6) are formed by the first ion implantation, and the first group of P+ type field limiting ring structures (4), the P+ type JTE2 terminal expansion region (7) and the third group of P+ type field limiting ring structures (8) are formed by the second ion implantation.

4. The composite terminal structure of the silicon carbide PIN diode according to claim 3, characterized in that: The first group of P+ type field limiting ring structures (4), the second group of P+ type field limiting ring structures (6) and the third group of P+ type field limiting ring structures (8) all include three P+ injection rings (9).

5. A method for designing a composite terminal structure of a silicon carbide PIN diode according to any one of claims 1 to 4, characterized in that: The following steps are involved: Step S1, designing several dual-zone JTE terminal structures with different doping concentrations for the silicon carbide PIN diode, performing process simulation and device simulation on each dual-zone JTE terminal structure, determining the dual-zone JTE terminal structure according to the simulation results, and obtaining the first-stage terminal structure; Step S2, adding a plurality of groups of field limiting ring structures to the first-stage terminal structure determined in step S1, and adjusting the number of field rings of each group of field limiting ring structures, performing process simulation and device simulation on the first-stage terminal structures provided with different numbers of field rings, selecting the terminal structure with the best device performance according to the simulation results, and obtaining the second-stage terminal structure; Step S3, changing the implantation concentration of the JTE region on the second-stage terminal structure determined in step S2, and simulating the second-stage terminal structures with different JTE concentrations, and determining the terminal structure of the final silicon carbide PIN diode according to the simulation results.

6. The design method according to claim 5, characterized in that: In the step S1, the device simulation includes reverse breakdown voltage simulation.

7. The design method according to claim 5, characterized in that: In the step S2, in each group of field limiting ring structures, the lateral doping concentrations between the field rings are distributed in a trapezoidal shape.

8. The design method according to claim 5, characterized in that: In the step S2, the field limiting ring structures are three groups.

9. The design method according to claim 8, characterized in that: In the step S2, three field rings are provided in each group of field limiting ring structures.

10. The design method according to any one of claims 5 to 9, characterized in that: The simulation software used in the simulation process is SentaurusTCAD.

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