Display panel and preparation method thereof

Abstract

Embodiments of the present application disclose a display panel and a preparation method thereof. The display panel and the preparation method thereof adopt one photo mask to form a patterned first pixel definition layer and a second pixel definition layer, thereby saving one photo mask process. The first pixel definition layer is an inorganic layer, thereby saving one heat process and reducing the risk of negative bias of a thin film transistor. In addition, the second pixel definition layer is additionally provided with a first barrier wall in a second direction, so that the second pixel definition layer is divided into a plurality of ink printing areas in the second direction. When the light-emitting layer is baked, the flow path of solute along the solvent is blocked, thereby reducing the risk of mass transfer of solute from the middle area to the edge area in the whole panel, and improving the film thickness uniformity of the light-emitting layer.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a preparation method thereof. BACKGROUND

[0002] In the existing OLED display panel, after forming the oxide thin film transistor, a pixel definition layer is usually arranged. The pixel definition layer includes two layers of organic pixel definition layers. One layer of the organic pixel definition layer includes a first barrier wall extending along a horizontal direction, and the other layer of the organic pixel definition layer includes a second barrier wall extending along a vertical direction. The first barrier wall and the second barrier wall intersect to form a pixel opening for printing ink material. In addition, based on the structure of the linear pixel definition layer, one row or one column of ink of one color is usually printed at a time to reduce the printing times and reduce the printing precision.

[0003] In the research and practice of the prior art, the inventors of the present application found that a long time of high temperature environment can cause negative bias of the oxide thin film transistor. Forming the first organic pixel definition layer and the second organic pixel definition layer requires two heat processes, which can easily cause the oxide thin film transistor to have a risk of negative bias. In addition, during the ink baking process, based on the fact that the ink is connected in a whole row or a whole column and the baking rate of the edge region of the panel is greater than that of the middle region, the solute in the middle region flows to the edge region with the solvent, causing uneven thickness of the light-emitting layer. SUMMARY

[0004] The embodiments of the present application provide a display panel and a preparation method thereof, which can reduce the risk of negative bias of the thin film transistor, save masks, and improve the thickness uniformity of the light-emitting layer.

[0005] The embodiments of the present application provide a preparation method of a display panel, which includes the following steps:

[0006] A thin film transistor structure layer, a first electrode, a first pixel definition layer, and a second pixel definition layer are sequentially formed on a substrate. The first pixel definition layer is an inorganic layer, and the second pixel definition layer is an organic photoresist layer.

[0007] The second pixel definition layer is patterned, the second pixel definition layer comprising a first photoresist bar, a second photoresist bar, and a third photoresist bar, the first photoresist bar and the second photoresist bar extending along a first direction and spaced apart in a second direction, the third photoresist bar extending along the second direction, the first direction intersecting the second direction, the first photoresist bar and the second photoresist bar respectively cross-connecting with the third photoresist bar to form a plurality of openings, the thickness of the first photoresist bar being less than the thickness of the second photoresist bar, the thickness of the second photoresist bar being less than the thickness of the third photoresist bar, one opening being arranged corresponding to one first electrode, and the pattern of the opening being within the region of the first electrode when viewed from above;

[0008] Using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode;

[0009] A light emitting layer is formed in the pixel opening.

[0010] Optionally, in some embodiments of the present application, in the step of etching the first pixel definition layer while ashing the second pixel definition layer using the second pixel definition layer as a mask, the thickness of the first photoresist strip is less than or equal to the thickness of the first pixel definition layer, the etching rate of the first pixel definition layer is a first rate, and the etching rate of the second pixel definition layer is a second rate, and the second rate is less than the first rate.

[0011] Optionally, in some embodiments of the present application, the thickness of the first pixel definition layer is between 1500 angstroms and 5500 angstroms, the thickness of the first retaining wall is between 5500 angstroms and 10000 angstroms, and the thickness of the second retaining wall is between 6000 angstroms and 15000 angstroms.

[0012] Optionally, in some embodiments of the present application, in the step of etching the first pixel definition layer while ashing the second pixel definition layer using the second pixel definition layer as a mask, the first electrode is etched to form a groove connected to the pixel opening.

[0013] Optionally, in some embodiments of the present application, using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer includes the following steps:

[0014] The first pixel definition layer and the second pixel definition layer are simultaneously etched using a first gas, so that the second pixel definition layer is thinned as a whole and a recessed groove is formed in the first pixel definition layer, and the distance between the bottom surface of the recessed groove and the first electrode is between 10 nanometers and 80 nanometers;

[0015] A second gas is used to simultaneously etch the first pixel definition layer and the second pixel definition layer, remove the first photoresist bar, thin the second photoresist bar to form a first barrier wall, thin the third photoresist bar to form a second barrier wall, and etch the second pixel definition layer to form a pixel opening exposing the first electrode; the second gas etches the first electrode at a rate less than the first gas etches the first electrode.

[0016] Optionally, in some embodiments of the present application, in the step of ashing the second pixel definition layer and etching the first pixel definition layer using the second pixel definition layer as a mask, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius.

[0017] Optionally, in some embodiments of the present application, in the second direction, a plurality of the first blocking walls are arranged at intervals, and at least two pixel openings are spaced between two adjacent first blocking walls;

[0018] In the step of forming a light-emitting layer in the pixel opening, the light-emitting layer is formed in the pixel opening by inkjet printing, wherein the light-emitting layer includes a plurality of light-emitting parts, and the light-emitting parts continuously cover at least two of the pixel openings. In the second direction, a first blocking wall is provided between two adjacent light-emitting parts, and in the first direction, a second blocking wall is provided between two adjacent light-emitting parts.

[0019] Optionally, in some embodiments of the present application, the colors of any two adjacent light-emitting portions are different.

[0020] Accordingly, an embodiment of the present application further provides a display panel, comprising:

[0021] substrate;

[0022] a thin film transistor structure layer, disposed on the substrate;

[0023] A first electrode is provided on a side of the thin film transistor structure layer away from the substrate;

[0024] a first pixel definition layer, disposed on a side of the thin film transistor structure layer away from the substrate, the first pixel definition layer being an inorganic layer, the first pixel definition layer comprising a plurality of first pixel definition portions and a plurality of second pixel definition portions, the first pixel definition portions and the second pixel definition portions being cross-connected to form a plurality of pixel openings exposing the first electrode;

[0025] a second pixel definition layer, disposed on a side of the first pixel definition layer away from the substrate, the second pixel definition layer being an organic layer, comprising a plurality of first retaining walls and a plurality of second retaining walls, the thickness of the first retaining walls being smaller than the thickness of the second retaining walls, the first retaining walls and the first pixel definition portion extending along a first direction, the second retaining walls and the second pixel definition portion extending along a second direction intersecting the first direction, and at least two pixel openings being spaced apart between two adjacent first retaining walls in the second direction;

[0026] The light-emitting layer covers the pixel opening.

[0027] Optionally, in some embodiments of the present application, the light-emitting layer includes a plurality of light-emitting portions, the light-emitting portions continuously covering at least two of the pixel openings, and in the second direction, a first blocking wall is provided between two adjacent light-emitting portions, and in the first direction, a second blocking wall is provided between two adjacent light-emitting portions;

[0028] In the second direction, the colors of any two adjacent light-emitting portions are the same or different.

[0029] Optionally, in some embodiments of the present application, the pixel opening includes a first opening and a second opening, the first opening is connected to the side of the second opening away from the substrate, the opening width of the first opening is greater than the opening width of the second opening, and the depth of the first opening is greater than the depth of the second opening.

[0030] The display panel and manufacturing method of the present invention employ a single photomask to form a patterned first and second pixel definition layers, eliminating a single photomask process. Furthermore, the first pixel definition layer is an inorganic layer, eliminating a thermal process and reducing the risk of negative bias in the thin-film transistors. Furthermore, a first retaining wall is added to the second pixel definition layer in the second direction, dividing the layer into multiple ink-printed areas. This wall blocks the flow path of solutes with the solvent during baking of the light-emitting layer, reducing the risk of large-scale transfer of solutes from the central region to the edge regions across the entire panel and improving the film thickness uniformity of the light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1is a schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0032] Figure 2 is a schematic diagram of step B101 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0033] Figure 3 is a schematic diagram of step B102 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0034] Figure 4 is a schematic diagram of step B103 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0035] Figure 5 is a schematic diagram of step B031 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0036] Figure 6 yes Figure 5 Enlarged view of part A1;

[0037] Figure 7 is a schematic diagram of step B032 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0038] Figure 8 yes Figure 7 A magnified view of part A2;

[0039] Figure 9 1 is a plan view of step B104 of the method for manufacturing a display panel provided in an embodiment of the present application;

[0040] Figure 10 yes Figure 9 Schematic diagram of the cross section along line c1c1;

[0041] Figure 11 is a schematic diagram of the planar structure of a display panel provided in an embodiment of the present application;

[0042] Figure 12 yes Figure 11 Schematic diagram of the cross section along line c2c2. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described here are only used to illustrate and explain the present application and are not used to limit the present application. In this application, the various embodiments can be combined with each other but will not be repeated one by one. In addition, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inner" and "outer" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as labels and do not impose numerical requirements or establish an order.

[0044] The present application provides a display panel and a method for manufacturing the same, which are described in detail below. It should be noted that the order in which the following embodiments are described does not limit the preferred order of the embodiments.

[0045] Please refer to Figure 1 , an embodiment of the present application provides a method for manufacturing a display panel, which includes the following steps:

[0046] Step B101, forming a thin film transistor structure layer, a first electrode, a first pixel definition layer, and a second pixel definition layer in sequence on a substrate, wherein the first pixel definition layer is an inorganic layer, and the second pixel definition layer is an organic photoresist layer;

[0047] Step B102: patterning the second pixel definition layer, the second pixel definition layer comprising a first photoresist bar, a second photoresist bar, and a third photoresist bar, the first photoresist bar and the second photoresist bar extending along a first direction and spaced apart in a second direction, the third photoresist bar extending along the second direction, the first direction intersecting the second direction, the first photoresist bar and the second photoresist bar respectively cross-connecting with the third photoresist bar to form a plurality of openings, the thickness of the first photoresist bar being less than the thickness of the second photoresist bar, the thickness of the second photoresist bar being less than the thickness of the third photoresist bar, one opening being arranged corresponding to one first electrode, and the pattern of the opening being within the region of the first electrode when viewed from above;

[0048] Step B103, using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode;

[0049] Step B104: forming a light-emitting layer in the pixel opening.

[0050] It should be noted that the method for manufacturing the display panel in the embodiment of the present application uses a single photomask to form the patterned first and second pixel definition layers, saving a photomask process. Furthermore, the first pixel definition layer is an inorganic layer, which saves a thermal process and reduces the risk of negative bias in the thin-film transistors. Furthermore, a first retaining wall is added to the second pixel definition layer in the second direction, dividing it into multiple ink-printed areas in the second direction. This serves to block the flow path of solutes with the solvent during baking of the light-emitting layer. This reduces the risk of large-scale solute transfer from the central region to the edge regions across the entire panel, thereby improving the film thickness uniformity of the light-emitting layer.

[0051] The following describes the specific steps of the method for manufacturing a display panel according to an embodiment of the present application.

[0052] Please refer to Figure 2 In step B101, a thin film transistor structure layer 12, a first electrode 13, a first pixel definition layer 14, and a second pixel definition layer 15 are sequentially formed on a substrate 11. The first pixel definition layer 14 is an inorganic layer, and the second pixel definition layer 15 is an organic photoresist layer.

[0053] It should be noted that, compared with the existing technology in which both pixel definition layers are organic layers, the method for preparing the display panel in the embodiment of the present application sets the material of the first pixel definition layer 14 to an inorganic layer, thereby reducing a thermal process that affects the thin-film transistor device, thereby reducing the risk of negative bias caused by stability degradation of the thin-film transistor device.

[0054] Optionally, the substrate 11 may be a rigid substrate or a flexible substrate. The material of the substrate 11 includes one of glass, sapphire, silicon, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene diphthalate, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, aromatic fluorotoluene containing polyarylate, polycyclic olefin, polyimide, or polyurethane.

[0055] Optionally, the thin film transistor structure layer 12 includes devices such as thin film transistors and capacitors.

[0056] Optionally, the channel material of the thin film transistor may be an oxide semiconductor. The oxide semiconductor may include an oxide based on titanium, hafnium, zirconium, aluminum, tantalum, germanium, zinc, gallium, tin or indium, and a composite oxide thereof (such as indium gallium zinc oxide, indium zinc oxide, zinc tin oxide, indium gallium oxide, indium tin oxide, indium zirconium oxide, indium zirconium zinc oxide, indium zirconium tin oxide, indium zirconium gallium oxide, indium aluminum oxide, indium zinc aluminum oxide, indium tin aluminum oxide, indium aluminum gallium oxide, indium tantalum oxide, indium tantalum zinc oxide, indium tantalum tin oxide, indium tantalum gallium oxide, indium germanium oxide, indium germanium zinc oxide, indium germanium tin oxide, indium germanium gallium oxide, titanium indium zinc oxide and hafnium indium zinc oxide).

[0057] Optionally, the first electrode 13 may be an anode or a cathode, and the embodiment of the present application is described by taking the first electrode 13 as an anode as an example. The first electrode 13 is connected to the driving thin film transistor.

[0058] Optionally, the first pixel definition layer 14 may be formed by vapor deposition. The thickness of the first pixel definition layer 14 is less than the thickness of the second pixel definition layer 15 .

[0059] Among them, the material of the second pixel definition layer 15 is organic photoresist. Compared with non-organic photoresist, the preparation method of the embodiment of the present application does not need to set an additional photoresist layer to pattern the second pixel definition layer 15, but can directly use the second pixel definition layer 15 as a photoresist mask layer.

[0060] Then go to step B102.

[0061] Please refer to Figure 3 In step B102 , the second pixel definition layer 15 is patterned.

[0062] The second pixel definition layer 15 includes a first photoresist bar 151, a second photoresist bar 152, and a third photoresist bar 153. The first photoresist bar 151 and the second photoresist bar 152 extend along a first direction x and are spaced apart in a second direction y. The third photoresist bar 153 extends along the second direction y and is spaced apart along the first direction x. The first direction x intersects the second direction y. The first photoresist bar 151 and the second photoresist bar 152 are cross-connected with the third photoresist bar 153 to form a plurality of openings k1. The thickness of the first photoresist bar 151 is less than that of the second photoresist bar 152. The thickness of the second photoresist bar 152 is less than that of the third photoresist bar 153. An opening k1 is provided corresponding to a first electrode 13. The pattern of the opening k1, when viewed from above, is within the region of the first electrode 13.

[0063] Optionally, the first direction x and the second direction y intersect vertically. Figure 9 's hint.

[0064] It can be understood that, by directly exposing and developing the second pixel definition layer 15 with one mask mk, the patterned second pixel definition layer 15 is formed, and the first pixel definition layer 14 is etched with the patterned second pixel definition layer 15 as a mask, thereby saving the mask process.

[0065] Optionally, the mask mk includes a first light-transmitting part m1, a second light-transmitting part m2, a third light-transmitting part m3, and a light-blocking part m4, the light-transmitting rates of the first light-transmitting part m1, the second light-transmitting part m2, the third light-transmitting part m3, and the light-blocking part m4 decrease, the light-transmitting rate of the first light-transmitting part m1 is 100%, and the light-transmitting rate of the light-blocking part m4 is 0%. The first light-transmitting part m1 corresponds to the opening k1, the second light-transmitting part m2 corresponds to the first photoresist strip 151, the third light-transmitting part m3 corresponds to the second photoresist strip 152, and the light-blocking part m4 corresponds to the third photoresist strip 153.

[0066] Optionally, in some embodiments, the third photoresist strip 153 is further connected with another first photoresist strip 151 on the side close to the opening k1, the extending directions of the another first photoresist strip 151 and the third photoresist strip 153 are consistent, so that the opening k1 is defined by two first photoresist strips 151 extending along the second direction y, one first photoresist strip 151 extending along the first direction x, and one second photoresist strip 152 extending along the first direction x. Based on the fact that the opening k1 is formed by three first photoresist strips 151 with the same thickness, the depth uniformity of the opening k1 can be better controlled, and the depth uniformity of the subsequent pixel opening s1 can be better controlled, thereby improving the thickness uniformity of the light-emitting layer 16.

[0067] Of course, in some embodiments, the opening k1 can also be formed by two third photoresist strips 153, one first photoresist strip 151, and one second photoresist strip 152.

[0068] Then turn to step B103.

[0069] Please refer to Figure 4 In step B103, the second pixel definition layer 15 is used as a mask to etch the first pixel definition layer 14 while ashing the second pixel definition layer 15.

[0070] In step B103, the first photoresist strip 151 is removed, the second photoresist strip 152 is thinned to form the first stop wall 15a, the third photoresist strip 153 is thinned to form the second stop wall 15b, and the second pixel definition layer 15 is etched to form the pixel opening s1 exposing the first electrode 13.

[0071] Optionally, in step B102, the thickness of the first photoresist strip 151 is less than or equal to the thickness of the first pixel definition layer 14. In step B103, the first pixel definition layer 14 is etched at a first rate, and the second pixel definition layer 15 is etched at a second rate, which is less than the first rate.

[0072] It can be understood that the same gas is used to etch the first pixel definition layer 14 and the second pixel definition layer 15, wherein the etching rate of the first pixel definition layer 14 is faster than the etching rate of the second pixel definition layer 15. Since the second pixel definition layer 15 is a photoresist, the required thickness of the second pixel definition layer 15 can be thinned, saving costs while maintaining the first retaining wall 15a and the second retaining wall 15b with a relatively thick thickness to separate the subsequent light-emitting layer 16.

[0073] Optionally, in some embodiments of the present application, the thickness of the first pixel definition layer 14 is between 1500 angstroms and 5500 angstroms, for example, it can be 1500 angstroms, 2000 angstroms, 2500 angstroms, 3000 angstroms, 3500 angstroms, 4000 angstroms, 4500 angstroms, 5000 angstroms or 5500 angstroms.

[0074] The thickness of the first barrier 15a is between 5500 angstroms and 10000 angstroms, for example, 5500 angstroms, 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms or 10000 angstroms.

[0075] The thickness of the second retaining wall 15b is between 6000 angstroms and 15000 angstroms, for example, it can be 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms, 10000 angstroms, 10500 angstroms, 11000 angstroms, 11500 angstroms, 12000 angstroms, 12500 angstroms, 13000 angstroms, 13500 angstroms, 14000 angstroms, 14500 angstroms or 15000 angstroms.

[0076] It is understood that both the first retaining walls 15a and the second retaining walls 15b are used to prevent the ink material of the light-emitting layer 16 from being interconnected, thereby preventing the ink material of the light-emitting layer 16 from being connected to each other in an entire column or row. The first retaining walls 15a are arranged at intervals along the second direction y, dividing the entire column of light-emitting layer 16 into multiple regions. This reduces the risk of solute migration along the long-distance path of the solvent, thereby improving the thickness uniformity of the light-emitting layer 16.

[0077] Optionally, in some embodiments, the thickness of the first retaining wall 15a is less than that of the second retaining wall 15b. It is understood that during the subsequent baking of the ink material of the light-emitting layer 16, the thinner first retaining wall 15a allows for a slow release of some of the air pressure in the second direction y, reducing the risk of localized high pressure. For example, in the initial stages of baking, when the solvent evaporates rapidly, the thinner first retaining wall 15a can buffer the sudden increase in air pressure, reducing the risk of solutes being pushed to the edges by the high pressure, and thus reducing the risk of sudden changes in film thickness. Furthermore, the thinner first retaining wall 15a allows for moderate air pressure release in the second direction y, reducing the pressure gradient difference between the center and side regions of the panel, reducing the driving force for solute migration to the edges, and thereby ensuring a uniform baking atmosphere, thereby improving the thickness uniformity of the subsequent light-emitting layer 16.

[0078] Furthermore, the thicker second retaining wall 15b provides stronger mechanical support, while the thinner first retaining wall 15a creates a height difference between the first and second retaining walls 15a, which cushions external impacts and better protects the panel. Furthermore, the thinner first retaining wall 15a reduces obstruction of the edge of the pixel opening s1, improving the aperture ratio and enhancing display brightness.

[0079] Optionally, in step B103 , the first electrode 13 is etched to form a groove 13 a communicating with the pixel opening s1 .

[0080] It is understandable that the groove 13 a is formed on the first electrode 13 to ensure that the area of ​​the pixel opening s1 is free from the material of the first pixel definition layer 14 , thereby reducing the risk of the material of the first pixel definition layer 14 remaining in the pixel opening s1 .

[0081] Optionally, in some embodiments, in step B103 , the control gas may not etch the first electrode 13 .

[0082] Optionally, in some embodiments of the present application, a single etching process may be used to form the pixel opening s1 in step B103 .

[0083] Optionally, in some embodiments of the present application, in step B103, two etching processes may be used to form the pixel opening s1. For example, step B103 includes the following steps:

[0084] Please refer to Figure 5 and Figure 6 In step B031, the first pixel definition layer 14 and the second pixel definition layer 15 are simultaneously etched using a first gas, so that the second pixel definition layer 15 is thinned as a whole, and a recessed groove 14a is formed in the first pixel definition layer 14. The distance d1 from the bottom surface of the recessed groove 14a to the first electrode 13 is between 10 nanometers and 80 nanometers.

[0085] Optionally, the distance d1 from the bottom surface of the recessed groove 14 a to the first electrode 13 may be 10 nanometers, 20 nanometers, 30 nanometers, 40 nanometers, 50 nanometers, 60 nanometers, 70 nanometers or 80 nanometers.

[0086] Then go to step B032.

[0087] Please refer to Figure 7 and Figure 8 In step B032, the second gas is used to simultaneously etch the first pixel definition layer 14 and the second pixel definition layer 15, removing the first photoresist strips 151, thinning the second photoresist strips 152 to form first retaining walls 15a, thinning the third photoresist strips 153 to form second retaining walls 15b, and etching the second pixel definition layer 15 to form a pixel opening s1 exposing the first electrode 13. The second gas etches the first electrode 13 at a rate lower than the first gas etches the first electrode 13.

[0088] It should be noted that the first gas and the second gas can each be a single etching gas, or a mixed gas of at least two gases.

[0089] It is understandable that the first pixel definition layer 14 and the second pixel definition layer 15 are etched twice using two gases to reduce the risk of over-etching the first electrode 13 .

[0090] Among them, the distance d1 from the bottom surface of the recessed groove 14a to the first electrode 13 is between 10 nanometers and 80 nanometers as the timing for switching to the secondary etching, and based on the fact that the etching rate of the first electrode 13 by the second gas is less than the etching rate of the first gas by the first electrode 13, the overall etching time can be avoided from being too long while reducing the risk of over-etching the first electrode 13.

[0091] It can be understood that, in some embodiments, due to the two etching processes in step B103 , the pixel opening s1 is a stepped opening.

[0092] The pixel opening s1 includes a first opening s01 and a second opening s02. The first opening s01 is connected to the side of the second opening s02 away from the substrate 11. The first opening s01 is wider than the second opening s02, and the first opening s01 is deeper than the second opening s02.

[0093] The pixel opening s1 is a stepped opening, which can improve the continuity of subsequent film coverage and reduce the risk of breakage. Secondly, the stepped pixel opening s1 can disperse capillary force and reduce the risk of liquid accumulation at the edge under a single slope.

[0094] Optionally, in some embodiments, the slope a2 of the second opening s02 is less than the slope a1 of the first opening s01. It is understood that when the slope of the second opening s02 is gentler, the capillary flow of the ink at the bottom can be smoother, reducing the tendency of edge aggregation. The steeper slope of the first opening s01 may reduce the edge liquid film accumulation rate by limiting the lateral flow in the top area. In other words, by adjusting the slopes of the first opening s01 and the second opening s02, the risk of ink material accumulation at the edge of the pixel opening s1 can be reduced, thereby improving the thickness uniformity of the light-emitting layer 16.

[0095] Optionally, in some embodiments of the present application, in step B103, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius, for example, it can be 10 degrees Celsius, 15 degrees Celsius, 20 degrees Celsius, 25 degrees Celsius, 30 degrees Celsius, 35 degrees Celsius or 40 degrees Celsius.

[0096] It is understandable that the ambient temperature in step B103 is relatively low and will not affect the stability of the thin film transistor.

[0097] Then go to step B104.

[0098] Please refer to Figure 9 and Figure 10 In step B104 , a light emitting layer 16 is formed in the pixel opening s1 .

[0099] Optionally, in some embodiments of the present application, in the second direction y, a plurality of first blocking walls 15 a are arranged at intervals, and at least two pixel openings s1 are spaced between two adjacent first blocking walls 15 a.

[0100] In step B104, a light-emitting layer 16 is formed within the pixel opening s1 using inkjet printing. The light-emitting layer 16 includes multiple light-emitting portions 161, with each light-emitting portion 161 continuously covering at least two pixel openings s1. A first barrier 15a is provided between adjacent light-emitting portions 161 in the second direction y, and a second barrier 15b is provided between adjacent light-emitting portions 161 in the first direction x.

[0101] It is understood that one light-emitting portion 161 continuously covers at least two pixel openings s1, and one nozzle is used to print at least two pixel openings s1. Multiple drops of ink can be printed at a time, allowing the ink to flow between two adjacent pixel openings s1, but is blocked by the first and second blocking walls 15a and 15b. Based on this, compared to the traditional method of one nozzle corresponding to one pixel opening, the embodiment of the present application can reduce nozzle printing accuracy and improve printing efficiency.

[0102] In addition, the ink does not flow between the two pixel openings s1 adjacent to the first barrier wall 15 a , and the ink does not flow between the two pixel openings s1 adjacent to the second barrier wall 15 b .

[0103] Based on this, optionally, in some embodiments of the present application, the colors of any two adjacent light-emitting portions 161 are different.

[0104] Compared to the second direction y, the colors of the two adjacent light emitting portions 161 are the same. In the embodiment of the present application, any two adjacent light emitting portions 161 have different colors, which can improve the light uniformity of the display panel.

[0105] Optionally, in some embodiments of the present application, in the second direction y, two adjacent light emitting portions 161 have the same color. For example, the color of the entire row of light emitting portions 161 is the same.

[0106] Optionally, in some embodiments, in addition to printing the light-emitting layer 16 , other light-emitting functional layers may also be printed, such as a hole injection layer and a hole transport layer, etc. Furthermore, an electron transport layer and an electron injection layer may also be formed on the light-emitting layer 16 .

[0107] Subsequently, a cathode and an encapsulation layer may be formed on the light emitting layer 16 .

[0108] This completes the method for manufacturing the display panel according to the embodiment of the present application.

[0109] Please refer to Figure 11 and Figure 12 Accordingly, an embodiment of the present application further provides a display panel 100 , which includes a substrate 11 , a thin film transistor structure layer 12 , a first electrode 13 , a first pixel definition layer 14 , a second pixel definition layer 15 and a light-emitting layer 16 .

[0110] The thin film transistor structure layer 12 is disposed on the substrate 11 . The first electrode 13 is disposed on a side of the thin film transistor structure layer 12 away from the substrate 11 .

[0111] The first pixel definition layer 14 is disposed on a side of the thin-film transistor structure layer 12 away from the substrate 11. The first pixel definition layer 14 is an inorganic layer. The first pixel definition layer 14 includes a plurality of first pixel definition portions 141 and a plurality of second pixel definition portions 142. The first pixel definition portions 141 and the second pixel definition portions 142 intersect and connect to form a plurality of pixel openings s1 that expose the first electrodes 13.

[0112] The second pixel definition layer 15 is disposed on a side of the first pixel definition layer 14 away from the substrate 11. The second pixel definition layer 15 is an organic layer. The second pixel definition layer 15 includes a plurality of first retaining walls 15a and a plurality of second retaining walls 15b. The thickness of the first retaining walls 15a is smaller than that of the second retaining walls 15b. The first retaining walls 15a and the first pixel definition portion 141 extend along a first direction x. The second retaining walls 15b and the second pixel definition portion 142 extend along a second direction y that intersects the first direction x. In the second direction y, at least two pixel openings s1 are separated between adjacent first retaining walls 15a.

[0113] The light emitting layer 16 covers the pixel opening s1 .

[0114] It should be noted that the display panel 100 of the embodiment of the present application is manufactured by any one of the above-mentioned methods for manufacturing a display panel.

[0115] It should be noted that, compared with the prior art in which both pixel definition layers are organic layers, the display panel 100 of the embodiment of the present application sets the material of the first pixel definition layer 14 to be an inorganic layer, thereby reducing a thermal process that affects the thin film transistor device, thereby reducing the risk of negative bias caused by stability degradation of the thin film transistor device.

[0116] Secondly, both the first retaining walls 15a and the second retaining walls 15b are used to prevent the ink material of the light-emitting layer 16 from being interconnected, thereby preventing the ink material of the light-emitting layer 16 from being connected to each other in an entire column or row. The first retaining walls 15a are arranged at intervals along the second direction y, dividing the entire column of light-emitting layer 16 into multiple regions. This reduces the risk of solute migration along the long-distance path of the solvent, thereby improving the thickness uniformity of the light-emitting layer 16.

[0117] Because the thickness of the first retaining wall 15a is smaller than that of the second retaining wall 15b, it is understood that during the subsequent baking of the ink material of the light-emitting layer 16, the thinner first retaining wall 15a allows for a slow release of some of the air pressure in the second direction y, reducing the risk of localized high pressure. For example, in the initial baking phase, when the solvent evaporates rapidly, the thinner first retaining wall 15a can buffer the sudden increase in air pressure, reducing the risk of solutes being pushed to the edges by the high pressure, and thus reducing the risk of sudden changes in film thickness. Furthermore, the thinner first retaining wall 15a allows for moderate air pressure release in the second direction y, reducing the pressure gradient difference between the center and side regions of the panel, reducing the driving force for solute migration to the edges, and thereby ensuring a uniform baking atmosphere, thereby improving the thickness uniformity of the subsequent light-emitting layer 16.

[0118] Furthermore, the thicker second retaining wall 15b provides stronger mechanical support, while the thinner first retaining wall 15a creates a height difference between the first and second retaining walls 15a, which cushions external impacts and better protects the panel. Furthermore, the thinner first retaining wall 15a reduces obstruction of the edge of the pixel opening s1, improving the aperture ratio and enhancing display brightness.

[0119] Optionally, in some embodiments of the present application, the light-emitting layer 16 includes a plurality of light-emitting portions 161. The light-emitting portions 161 continuously cover at least two pixel openings s1. In the second direction y, a first retaining wall 15a is provided between two adjacent light-emitting portions 161, and in the first direction x, a second retaining wall 15b is provided between two adjacent light-emitting portions 161.

[0120] In the second direction y, the colors of any two adjacent light emitting portions 161 are the same or different.

[0121] It is understood that, compared to the second direction y, the colors of two adjacent light emitting portions 161 are the same. In the embodiment of the present application, any two adjacent light emitting portions 161 have different colors, which can improve the light uniformity of the display panel.

[0122] Optional, please refer to Figure 8 In some embodiments of the present application, the pixel opening s1 includes a first opening s01 and a second opening s02. The first opening s01 is connected to the side of the second opening s02 away from the substrate 11. The opening width of the first opening s01 is greater than the opening width of the second opening s02, and the depth of the first opening s01 is greater than the depth of the second opening s02.

[0123] The pixel opening s1 is a stepped opening, which can improve the continuity of subsequent film coverage and reduce the risk of breakage. Secondly, the stepped pixel opening s1 can disperse capillary force and reduce the risk of liquid accumulation at the edge under a single slope.

[0124] Optionally, in some embodiments, the slope a2 of the second opening s02 is less than the slope a1 of the first opening s01. It is understandable that when the slope of the second opening s02 is gentler, the capillary flow of the ink at the bottom may be smoother, reducing the tendency of edge aggregation. The steeper slope of the first opening s01 may reduce the edge liquid film accumulation rate by limiting the lateral flow in the top area. In other words, by adjusting the slopes of the first opening s01 and the second opening s02, the risk of ink material accumulation at the edge of the pixel opening s1 can be reduced, thereby improving the thickness uniformity of the light-emitting layer 16.

[0125] The display panel 100 of the embodiment of the present application adopts one photo mask to form the patterned first pixel definition layer 14 and the second pixel definition layer 15, thereby saving one photo mask process, and the first pixel definition layer 14 is an inorganic layer, thereby saving one thermal process and reducing the risk of negative bias of the thin film transistor. Secondly, the second pixel definition layer 15 is additionally provided with the first barrier wall 15a in the second direction y, so that it is divided into a plurality of ink printing areas in the second direction y, and when the light emitting layer 16 is baked, the flow path of the solute along with the solvent is blocked, thereby reducing the risk of large transfer of the solute in the middle area to the edge area in the whole panel, so as to improve the film thickness uniformity of the light emitting layer.

[0126] The display panel and the preparation method thereof provided by the embodiment of the present application are described in detail above, and the principle and the implementation manner of the present application are described by applying specific examples; the above embodiment is only used to help understand the method and the core idea of the present application; meanwhile, according to the idea of the present application, the specific implementation manner and the application range will be changed by the person skilled in the art, and the above description should not be understood as the limitation of the present application.

Claims

1. A method for preparing a display panel, characterized in that: The following steps are involved: forming a thin film transistor structure layer, a first electrode, a first pixel definition layer and a second pixel definition layer on a substrate in sequence, wherein the first pixel definition layer is an inorganic layer and the second pixel definition layer is an organic photoresist layer; The second pixel definition layer is patterned, the second pixel definition layer comprising a first photoresist bar, a second photoresist bar, and a third photoresist bar, the first photoresist bar and the second photoresist bar extending along a first direction and spaced apart in a second direction, the third photoresist bar extending along the second direction, the first direction intersecting the second direction, the first photoresist bar and the second photoresist bar respectively cross-connecting with the third photoresist bar to form a plurality of openings, the thickness of the first photoresist bar being less than the thickness of the second photoresist bar, the thickness of the second photoresist bar being less than the thickness of the third photoresist bar, one opening being arranged corresponding to one first electrode, and the pattern of the opening being within the region of the first electrode when viewed from above; Using the second pixel definition layer as a mask, the second pixel definition layer is ashed while the first pixel definition layer is etched; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode, wherein the thickness of the first barrier wall is less than that of the second barrier wall; A light emitting layer is formed in the pixel opening.

2. The method for manufacturing a display panel according to claim 1, wherein: In the step of using the second pixel definition layer as a mask to asheath the second pixel definition layer and simultaneously etch the first pixel definition layer, the thickness of the first photoresist strip is less than or equal to the thickness of the first pixel definition layer, the etching rate of the first pixel definition layer is a first rate, and the etching rate of the second pixel definition layer is a second rate, and the second rate is less than the first rate.

3. The method for manufacturing a display panel according to claim 2, wherein: The thickness of the first pixel definition layer is between 1500 angstroms and 5500 angstroms, the thickness of the first barrier wall is between 5500 angstroms and 10000 angstroms, and the thickness of the second barrier wall is between 6000 angstroms and 15000 angstroms.

4. The method for preparing a display panel according to any one of claims 1 to 3, wherein: In the step of using the second pixel definition layer as a mask to ash the second pixel definition layer and simultaneously etch the first pixel definition layer, the first electrode is etched to form a groove communicating with the pixel opening.

5. The method for preparing a display panel according to any one of claims 1 to 3, wherein: Using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer, comprising the following steps: The first pixel definition layer and the second pixel definition layer are simultaneously etched using a first gas, so that the second pixel definition layer is thinned as a whole and a recessed groove is formed in the first pixel definition layer, and the distance between the bottom surface of the recessed groove and the first electrode is between 10 nanometers and 80 nanometers; A second gas is used to simultaneously etch the first pixel definition layer and the second pixel definition layer, remove the first photoresist bar, thin the second photoresist bar to form a first barrier wall, thin the third photoresist bar to form a second barrier wall, and etch the second pixel definition layer to form a pixel opening exposing the first electrode; the second gas etches the first electrode at a rate less than the first gas etches the first electrode.

6. The method for manufacturing a display panel according to any one of claims 1 to 3, wherein: In the step of using the second pixel definition layer as a mask to ash the second pixel definition layer and simultaneously etch the first pixel definition layer, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius.

7. The method for manufacturing a display panel according to any one of claims 1 to 3, wherein: In the second direction, a plurality of the first blocking walls are arranged at intervals, and at least two pixel openings are spaced between two adjacent first blocking walls; In the step of forming a light-emitting layer in the pixel opening, the light-emitting layer is formed in the pixel opening by inkjet printing, wherein the light-emitting layer includes a plurality of light-emitting parts, and the light-emitting parts continuously cover at least two of the pixel openings. In the second direction, a first blocking wall is provided between two adjacent light-emitting parts, and in the first direction, a second blocking wall is provided between two adjacent light-emitting parts.

8. The method for manufacturing a display panel according to claim 7, wherein: Any two adjacent light-emitting parts have different colors.

9. A display panel, characterized in that: include: substrate; a thin film transistor structure layer, disposed on the substrate; A first electrode is provided on a side of the thin film transistor structure layer away from the substrate; a first pixel definition layer, disposed on a side of the thin film transistor structure layer away from the substrate, the first pixel definition layer being an inorganic layer, the first pixel definition layer comprising a plurality of first pixel definition portions and a plurality of second pixel definition portions, the first pixel definition portions and the second pixel definition portions being cross-connected to form a plurality of pixel openings exposing the first electrode; a second pixel definition layer, disposed on a side of the first pixel definition layer away from the substrate, the second pixel definition layer being an organic layer, comprising a plurality of first retaining walls and a plurality of second retaining walls, the thickness of the first retaining walls being smaller than the thickness of the second retaining walls, the first retaining walls and the first pixel definition portion extending along a first direction, the second retaining walls and the second pixel definition portion extending along a second direction intersecting the first direction, and at least two pixel openings being spaced apart between two adjacent first retaining walls in the second direction; The light-emitting layer covers the pixel opening.

10. The display panel according to claim 9, wherein: The light-emitting layer includes a plurality of light-emitting portions, wherein the light-emitting portions continuously cover at least two of the pixel openings, and wherein a first blocking wall is provided between two adjacent light-emitting portions in the second direction, and wherein a second blocking wall is provided between two adjacent light-emitting portions in the first direction; In the second direction, the colors of any two adjacent light-emitting portions are the same or different.

11. The display panel according to claim 10, wherein: The pixel opening includes a first opening and a second opening, the first opening is connected to the side of the second opening away from the substrate, the opening width of the first opening is greater than the opening width of the second opening, and the depth of the first opening is greater than the depth of the second opening.

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