Impedance control of localized regions of substrate during plasma deposition on substrate within large PECVD chamber

Abstract

Embodiments of the present disclosure generally relate to methods and apparatus for measuring and controlling local impedance at a substrate support in a plasma processing chamber during substrate processing. The substrate support includes a plurality of substrate support pins, in which a radio frequency voltage, a current, and a phase of each of the plurality of substrate support pins are measured, and an impedance of the support pins is adjusted in real time. Each of the substrate support pins is coupled to an associated, remotely controllable, adjustable impedance circuit. In one embodiment, a variable capacitor is used to adjust the impedance of an impedance circuit coupled to an associated substrate support pin, and may be remotely adjusted with a stepping motor. In another embodiment, a microcontroller may control impedance adjustment of all of the plurality of substrate support pins, and may be used to track the impedances to each other and track the impedances with a body impedance of the plasma processing chamber.

Description

Technical Field

[0001] Embodiments of the present disclosure relate generally to apparatus for depositing films on substrates, and more particularly to apparatus for promoting uniform thickness of films deposited on substrates during plasma deposition on substrates in large plasma-enhanced chemical vapor deposition (PECVD) chambers. Background Art

[0002] Plasma enhanced chemical vapor deposition (PECVD) is a process that can deposit films onto substrates. Deposition of a variety of materials can be performed on large area substrates. For plasma deposition and etching and other processes utilizing plasma, process uniformity and repeatability within a chamber, from chamber to chamber, and from processing system to processing system are parameters used to control semiconductor device yield and semiconductor device performance tolerances so that the formed semiconductor devices perform as designed.

[0003] Electronic devices, such as thin film transistors (TFT), flat panel displays, photovoltaic (PV) devices, solar cells and other electronic devices, have been manufactured on thin dielectrics for many years. The substrate can be made of silicon, glass, polymers or other materials suitable for the formation of electronic devices. The substrate is usually processed in a tool (such as a cluster tool) having multiple chambers, and the substrate is transferred to and from each chamber performing different processing operations to form electronic devices on the substrate. In order to facilitate the transfer of the substrate into and out of the chamber, the substrate support pins are adapted to extend through the upper surface (top) of the substrate support when the substrate support is lowered. For example, when the substrate support is lowered, the substrate is supported and maintained in a stationary position by the substrate support pins, and the bottom of the substrate is vertically spaced from the top of the substrate support.

[0004] This spacing between the substrate and the substrate support allows a transfer mechanism (such as a robotic blade or end effector) to move between the bottom surface of the substrate and the top surface of the substrate support, thereby allowing the substrate to be moved without causing damage to the substrate support or the substrate. As the substrate support is raised, the top of the substrate support pins become substantially in the same plane as the top of the substrate support, thereby placing the substrate in contact with the top of the substrate support. The substrate support pins remain below the substrate during processing of the substrate in the plasma chamber.

[0005] However, the areas of the substrate where the substrate support pins are located suffer from suboptimal deposition compared to other areas of the substrate not over the substrate support pins. For example, areas of the substrate corresponding to the locations of the substrate support pins may have a film thickness that is less than the film thickness of other areas of the substrate not over the substrate support pins. Suboptimal deposition at locations of the substrate corresponding to the locations of the substrate support pins may create problems in the final display product, with one major problem being "clouding" or "cloudiness" of portions of the final display product that typically correspond to the locations of the substrate support pins.

[0006]

[0006] Therefore, what is needed is an apparatus and method to prevent or at least minimize non-uniform deposition over areas of a substrate related to the locations of substrate support pins. Summary of the invention

[0007] Embodiments of the present disclosure include a plasma processing system including a substrate support disposed within a processing space of the plasma processing system, the substrate support including a body having a plurality of openings formed between a substrate support surface and a back surface opposite to the substrate support surface. The plasma processing system further includes a substrate support leg attached to the back surface of the substrate support. An actuator is attached to the substrate support leg and is adapted to raise and lower the substrate support leg with the attached substrate support. The plasma processing system further includes a plurality of substrate support pins disposed in the plurality of openings of the substrate support, and a plurality of adjustable impedance circuits electrically connected to associated substrate support pins of the plurality of substrate support pins. When the substrate support is in a raised position, top portions of the plurality of substrate support pins are flush with or recessed below the substrate support surface. When the substrate support is in a lowered position, the substrate support pins extend above the substrate support surface.

[0008] Embodiments of the present disclosure include a plasma processing system including a plasma processing chamber; at least one radio frequency (RF) coil for generating plasma within an upper portion of the plasma processing chamber; an RF power supply; an RF impedance matching network coupled between the RF power supply and the at least one RF coil for generating plasma; a frequency detector; and a first RF voltage and current detector electrically coupled between the RF impedance matching network and the at least one RF coil for generating plasma. The plasma processing system further includes a substrate support disposed within the plasma processing chamber and below the at least one RF coil for generating plasma, the substrate support including a body having a plurality of openings formed between a substrate supporting surface and a back surface opposite to the substrate supporting surface. A substrate supporting leg is attached to the back surface of the substrate support. An actuator is attached to the substrate supporting leg and is adapted to raise and lower the substrate supporting leg with the attached substrate support. The plasma processing system further includes a plurality of substrate supporting pins disposed in the plurality of openings of the substrate support, and a plurality of adjustable impedance circuits electrically connected to associated substrate supporting pins of the plurality of substrate supporting pins. A second RF voltage and RF current detector is electrically coupled to each of the plurality of adjustable impedance circuits for detecting the RF voltage and RF current thereof. When the substrate support is in the raised position, the top portions of the plurality of substrate support pins are flush with or recessed below the substrate support surface of the substrate support. When the substrate support is in the lowered position, the substrate support pins extend above the surface of the substrate support.

[0009] Embodiments of the present disclosure include a method for improving plasma processing of a substrate, the method including an operation of positioning a substrate support disposed within a processing space of a plasma processing chamber, the substrate support including a body having a plurality of openings formed between a substrate supporting surface and a back surface opposite to the substrate supporting surface. The method further includes an operation of positioning a plurality of substrate supporting pins in the plurality of openings of the substrate support, wherein top portions of the plurality of substrate supporting pins are aligned with a plane of the substrate supporting surface of the substrate support or recessed below the substrate supporting surface. The method further includes an operation of placing a substrate to be processed on a surface of the substrate support and on top portions of the plurality of substrate supporting pins. The method further includes an operation of adjusting the impedance of a plurality of adjustable impedance circuits during substrate processing, the adjustable impedance circuits being electrically connected to associated substrate supporting pins of the plurality of substrate supporting pins. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to be able to understand the above-mentioned features of the present disclosure in detail, the present disclosure briefly summarized above may be more particularly described with reference to the embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate exemplary embodiments and therefore should not be considered as limiting the scope thereof, as the present disclosure may allow other equally effective embodiments.

[0011] Figure 1 A schematic cross-sectional elevation view of a plasma processing system is shown with a substrate support in a first position according to an embodiment.

[0012] Figure 2 A schematic cross-sectional elevation view of a plasma processing system is shown with a substrate support in a second position according to an embodiment.

[0013] Figure 3 A top plan view of a substrate support and substrate supporting pins therein are shown according to an embodiment.

[0014] Figure 4 A schematic block diagram of a circuit for controlling RF impedance of a local area of ​​a substrate according to an embodiment is shown.

[0015] Figure 5 A schematic isometric diagram of an RF voltage and current detector according to an embodiment is shown.

[0016] FIG. 6A to FIG. 6B It shows that according to the embodiment Figure 5 Schematic plan view and isometric view of a Rogowski coil RF current detector are shown.

[0017] 7A to 7C A schematic plan view of an RF voltage and current sensor fabricated on a printed circuit board is shown according to an embodiment.

[0018] To facilitate understanding of the embodiments disclosed herein, identical reference numerals have been used, where possible, to designate elements that are shared among the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION

[0019] Described herein are methods and apparatus for incorporating impedance control of localized regions of large substrates (flat panel displays) during plasma processing of the substrate using radio frequency (RF) voltage, current, and phase detectors and an array of adjustable impedance networks (e.g., motorized vacuum capacitors) in a large PECVD chamber.

[0020] Embodiments of the present disclosure include apparatus and methods for preventing or substantially minimizing non-uniform deposition of substrate regions adjacent to substrate support pins. Due to the local presence of electromagnetic discontinuities over regions of large substrates, deposited film quality (including but not limited to thickness, refractive index (RI) and / or wet etch rate) may exhibit local variations or film thickness degradation. However, when substrate support pins are used as a medium to affect local RF impedance, such variations in film properties can be substantially minimized to the surrounding background, thereby facilitating improved deposition process yield and / or flat panel utilization for end users.

[0021] Embodiments of the present disclosure determine the RF voltage, current, and phase (impedance) at each position of a substrate support pin, and utilize an adjustable impedance circuit coupled to an associated substrate support pin to control the impedance of the substrate support pin. Each impedance network may include lumped circuit elements connected in series, such as inductors and capacitors or a variety of combinations thereof. An exemplary embodiment of such a lumped inductor and capacitor circuit connected in series may be a variable capacitor and / or inductor that provides a change in the impedance of the RF circuit system including the support pin itself. In an embodiment where a variable capacitor is used to control impedance, a stepper motor drive mechanism may be used to precisely control the variable capacitor so that the RF impedance at a particular substrate support pin can operate under any one of an inductance, capacitance, series or parallel resonant impedance condition or a combination of an inductance, capacitance, series or parallel resonant impedance condition. In an embodiment, a method is taught on how to control and / or track the impedance at each substrate support pin in real time during a deposition process so that the local area impedances as measured by voltage, current, and phase detectors are significantly similar, or otherwise appear dissimilar but follow a certain spatial distribution pattern so that the local film properties are therefore significantly similar to the local film properties (e.g., thickness) found on bulk film deposition.

[0022] The present disclosure also teaches methods in which the local impedance of each substrate support pin tracks each other and further tracks the impedance of the output of a matching network coupled to a plasma chamber RF coil (bulk impedance). The matching network provides impedance matching of the bulk impedance of the plasma chamber to the impedance of the RF generator (50 ohms) so that maximum RF power can be delivered to the bulk plasma in the processing chamber.

[0023] It is further recognized based on the data obtained from each of the local arrays of voltage, current and phase detectors that methods for optimizing the local impedance of a particular process film chemistry may include, but are not limited to, methods including various dielectric films comprising, for example, silicon nitride, silicon oxide, silicon oxynitride, TEOS-based films; or other dielectric or non-dielectric, semiconductor or metal-containing single or multi-layer stack films for semiconductor device, flat panel display and solar panel device applications to improve film quality uniformity across the substrate area. It is contemplated and within the scope of the present disclosure that the local impedance may be significantly close to or substantially the same as the chamber global impedance, or the impedance may be different but follow a predetermined relationship with respect to the global chamber impedance. This desired impedance relationship may be a linear relationship in one example, or a non-linear relationship in other examples.

[0024] Embodiments of the present disclosure include a plasma enhanced chemical vapor deposition (PECVD) processing chamber operable to form one or more layers or films on a substrate. A plasma processing chamber as disclosed herein may be adapted to deliver excited species of a precursor gas generated in a plasma. The plasma may be generated by inductively coupling energy into a gas under vacuum. It should be understood that the embodiments discussed herein may be practiced in other chambers capable of providing a high density plasma.

[0025] Reference Figure 1 , shows a schematic cross-sectional elevation view of a plasma processing system according to an embodiment, wherein a substrate support is in a first position. The plasma processing system 10 may include a plasma processing chamber 100; a gas source 104; a radio frequency (RF) power source 108; an impedance matching network 106; an RF coil 120; a substrate support 122 attached to support legs 116 to form a substrate support assembly 118; and an actuator 114. The plasma processing chamber 100 includes a chamber lid 102; a chamber base 112 disposed opposite the chamber lid 102; and a sidewall 110. The substrate support 122 is disposed between the chamber lid 102 and the chamber base 112. The chamber lid 102 is disposed at an upper end of the plasma processing chamber 100, and the substrate support 122 is disposed within the plasma processing chamber 100.

[0026] An exemplary substrate 130 is shown on a substrate support 122 within the plasma processing chamber 100. The substrate support 122 is adapted to hold the substrate 130 during processing of the substrate. The support legs 116 are coupled to an actuator 114 adapted to move a substrate support assembly 118 vertically (in the Z direction) within the plasma processing chamber 100. Figure 1The substrate support assembly 118 is shown in the first processing position. However, the substrate assembly 118 can be lowered in the Z direction to a second position, such as Figure 2 As shown, the substrate 130 can be easily removed without damaging the substrate. For the sake of clarity, not all elements of the plasma processing system 10 are shown.

[0027] The process gas source 104 is coupled to the process chamber 100 and provides a process gas to be converted into plasma by RF energy transmitted from an inductively coupled RF coil 120 that generates plasma. The inductively coupled RF coil 120 may be a single RF coil 120, or at least two inductively coupled RF coils 120 coupled in series, and may be referred to as the inductively coupled RF coil 120 hereinafter. Each of the inductively coupled RF coils 120 may be coupled to an RF power source 108 and a ground 136 via an RF impedance matching network 106. Although Figure 1 and Figure 2 Each of the inductively coupled RF coils 120 is depicted connected in series to the RF power supply 108 and the ground 136, but parallel connections are also contemplated and within the scope of the present disclosure, such that each inductively coupled RF coil 130 can be independently connected and controlled to the RF power supply 108 and the ground 136. In some embodiments, the RF ground 136 can be via a capacitor (not shown). The RF power supply 108 can include an impedance matching network 106 adapted to match the output impedance (e.g., 50 ohms) of the RF power supply 108 to the chamber operating process impedance electrical characteristics to achieve maximum RF power transfer.

[0028] The RF voltage and RF current detectors (sensors) represented by VI-0...VI-5 can be used to determine RF parameters that can be used for the plasma process. In addition, the frequency detector 140 can be used in combination with the detected voltage, current and phase values ​​to determine the circuit node impedance. Figure 1 and Figure 2 As shown, RF voltage and RF current detectors VI-0...VI-5 and frequency detector 140 can be used to determine the RF power and complex impedance of RF power supply 108, RF impedance matching network 106 and multiple substrate support pins 128a to 128d in real time. The substrate support pin 128 can be, for example but not limited to, made of aluminum with a ceramic (alumina) sleeve.

[0029] The phase angle is determined by the lead or lag time between the RF voltage V(t) and RF current I(t) waveforms and is expressed in degrees θ. The RF power P(t) is the product of the voltage and current, or P(t) = V(t)*I(t), and the corresponding RMS (root mean square) value after detection is P = V*I*cosθ, where θ is the phase angle between the voltage and current waveforms. Using Ohm's law Z(t) = V(t) / I(t) or Z can be expressed as Z = R+jX, where R = Z cosθ and jX = Z sinθ. jX = jωL-j / ωC, where ω = 2πf, f is measured in frequency, C is measured in farads and L is measured in henries. R is the resistance in ohms and jX is the reactance in ohms, where +jX is the inductive reactance and -jX is the capacitive reactance. Power is independent of frequency, while impedance is frequency dependent.

[0030] Reference Figure 3 , depicts a top plan view of a substrate support and substrate support pins therein according to an embodiment. A plurality of openings are sized and arranged through the front and rear surfaces of the body of the substrate support 122 so that a plurality of substrate support pins 128 can pass through the body of the substrate support 122. Return to Reference Figure 1 When the substrate support 122 is in the raised (upward) first position, the top surface of the substrate support pins 128 is flush with or below the top surface (face) of the substrate support 122. This allows the bottom of the substrate 130 to contact the top surface (face) of the substrate support 122.

[0031] The substrate 130 is typically processed in a tool having multiple chambers (e.g., 100), such as a cluster tool (not shown), and the substrate 130 is moved into and out of each chamber 100 performing different processing operations to form electronic devices on the substrate. To facilitate moving the substrate 130 into and out of the chamber 100, the substrate support pins 128 remain stationary when the substrate support assembly 118 is lowered in the Z direction, and will thereby extend through the upper surface of the substrate support 122. The substrate support pins 128 may be movably retained within a roller bushing assembly (not shown) of the substrate support 122. The roller bushing assembly allows the CGT pins to move up and down relative to the chamber base 112 and the substrate support 122 during wafer processing, but remain stationary when the substrate support assembly 118 has reached its lowest Z position. At this point, the end portions of the substrate support pins 128 are in contact with the bottom plate of the chamber base 112.

[0032] Thus, the bottom of the substrate 130 rests on the top surface (face) of the substrate support pins 128, thereby spacing the bottom surface of the substrate 130 from the top surface of the substrate support 122 ( Figure 2). This spacing allows a transfer mechanism, such as a robotic blade or end effector (not shown), to move between the bottom of the substrate 130 and the top surface of the substrate support 122 and then lift the substrate 130 off the substrate support pins 128 without causing damage to the substrate support 122 or the substrate 130. Figure 1 ), the substrate support pins 128 are realigned with the substrate support 122, thereby once again forming a substantially flat surface and placing the substrate 130 in contact with the top surface of the substrate support 122 for processing.

[0033] Each of the substrate support pins 128 may be coupled to an adjustable impedance 134. The adjustable impedance 134 may be, for example, but not limited to, an inductor 144 and a capacitor 146 connected in series, such as Figure 1 and Figure 2 This impedance can be used, for example but not limited to, by the microcontroller 410 ( Figure 4 ) can be remotely changed (adjusted) by a stepper motor 132 controlled by a controller. A variable capacitor 146 (such as a vacuum variable capacitor for high power operation) and / or a variable inductor for inductor 144 can be controlled by a stepper motor 132. Optionally, a position sensor 142 can be coupled to the stepper motor 132 or the variable capacitor drive mechanism for determining the setting or position of the variable capacitor 146 so that the capacitance value of the capacitor 146 can be determined and / or preset to a desired capacitance.

[0034] Each adjustable impedance circuit 134 can be independently adjusted and controlled to provide improved deposition or etching results for the plasma process at the associated region of the substrate support pin 128. These local impedance adjustments can be static or dynamic during the plasma process. For example, during the plasma process, if the bulk impedance changes, the local impedance of the substrate support pin 128 can be similarly changed by the associated adjustable impedance circuit 134.

[0035] Reference Figure 4, depicts a schematic block diagram of a circuit for controlling the RF impedance of a local area of ​​a substrate according to an embodiment. The computing and control system for impedance control includes a microcontroller 410, a memory (volatile and / or non-volatile) 416, a communication interface 420, an input signal conditioning 414, and a stepper motor driver and position sensor 412. In addition, the microcontroller 410 may have digital signal processing (DSP) and fast Fourier transform (FFT) capabilities in an internal core processor or an external DSP / FFT processor 418. The voltage V(t) and current I(t) and frequency (f) data from each of the RF voltage and current detector VI and the frequency detector 140 may be input to the microcontroller 410 in real time. The microcontroller 410 may then determine the individual impedance at each position of the substrate support pin 128 and control the individual impedance.

[0036] The microcontroller 410 may further provide general purpose input and output (GPIO) to couple to input signal conditioning 414, and stepper motor driver and position sensor 412. The microcontroller 410 may also be adapted to communicate with a process controller 422 via a communication interface 420. The process controller 422 may further optimize the plasma process by controlling the impedance of each of the substrate support pins 128 and other plasma process variables in real time. The impedance information received by the process controller 422 may be used for machine learning to improve various plasma production processes. Machine learning may be further used in artificial intelligence (AI) systems to optimize plasma processes.

[0037] The communication interface 420 may be adapted to communicate with a user interface (e.g., a laptop computer and a plasma chamber tool) using protocols such as, but not limited to, Ethernet for Control Automation Technology (EtherCAT) or (ECAT) and serial RS-232, Ethernet, WiFi, and Bluetooth communications.

[0038] Reference Figure 5, depicts a schematic isometric diagram of an RF voltage and current detector according to an embodiment. A Rogowski coil 500 for measuring alternating current (AC) or high-speed current pulses is shown. The Rogowski coil 500 may include a spirally wound coil 502, wherein a lead wire passes through the center of the coil 502 from one end and returns to the other end, so that two terminals are located at the same end 504 of the coil 502. This method is sometimes referred to as a "reverse-wound Rogowski coil". The coil 502 surrounds a straight conductor 506 (the RF conductor from the RF power source 108 to the RF coil 120), the current of which is to be measured. The voltage induced in the coil 502 is proportional to the rate of change (derivative) of the current in the straight conductor 506, and the output of the Rogowski coil 500 is connected to an electronic integrator circuit 508 to provide an output signal, which is proportional to the current in the conductor 506. It is contemplated and within the scope of the present disclosure that the coil 500 may be implemented in any shape, such as, but not limited to, square, circular, rectangular, or hexagonal; and may be manufactured on a printed circuit board. Voltage detection coil 510 may be used to detect RF voltage on conductor 506. Voltage detection coil 510 may use both capacitive and inductive coupling to conductor 506 and have a high impedance when referenced to a common terminal or ground.

[0039] 6, a schematic diagram of a Figure 5 Schematic plan and isometric views of the Rogowski coil RF current detector shown in FIG. In FIG. 6( a), a return wire loop 512 of the coil 502 is shown. In FIG. 6( b), an electrostatic shield 614 surrounding the coil 500 is shown. The return wire loop 512 and the electrostatic shield 614 can be implemented with a printed circuit board.

[0040] Referring to FIG. 7 , a schematic plan view of an RF voltage and current detector fabricated on a printed circuit board according to an embodiment is depicted. The RF voltage and current detector can be implemented on a printed circuit board (PCB) 726, for example but not limited to, to accommodate the form factor of the RF conductor 506. The rectangular plan view is shown in (a) and can be implemented on a multilayer PCB 726 having a top conductor 720 and a bottom conductor 722 connected to vias 724, respectively, as shown in (b). The voltage detection coil 510 can also be fabricated on the PCB 726.

[0041] FIG. 7( c) shows an exemplary implementation of an RF voltage and current detector in a multilayer PCB, and is considered to be a feature of the embodiments disclosed herein. The electrostatic shield of the active sensor circuit can be enclosed in a metal shielding layer implemented in the same layer or a different layer of the multilayer PCB 726 a. If the shield is sufficient to prevent any RF noise or harmonics with undesirable frequencies from coupling into the active sensor circuit system, the PCB can have a shielding layer that occupies the entire corresponding layer or a portion of the corresponding layer. The active circuit can be isolated from external influences so that the RF shielded housing is protected with ground vias connected to the conductive shielding layer to protect the active electronic circuit associated with the RF voltage and current detector. Such ground vias can be sparse or sufficiently dense patterns so that electromagnetic energy (not intended to be measured) from the outside and inside of the chamber is substantially prevented from affecting the RF voltage and current detector measurement by the plasma processing chamber. The shielding layer (not shown) can be grounded to the chamber 100.

[0042] The methods, apparatus, and systems provided herein enable RF power processes for depositing films with uniform thickness over large substrate areas.

Claims

1. A plasma processing system, comprising: a substrate support disposed within a processing space of the plasma processing system, the substrate support comprising a body having a plurality of openings formed between a substrate supporting surface and a back surface opposite to the substrate supporting surface; a plurality of substrate support pins disposed in the plurality of openings of the substrate support, wherein top portions of the plurality of substrate support pins are flush with or recessed below the substrate support surface when the substrate support is in a raised position, and wherein the substrate support pins extend above the substrate support surface when in a lowered position; a plurality of adjustable impedance circuits in electrical communication with associated substrate support pins of the plurality of substrate support pins; as well as A radio frequency (RF) voltage and RF current detector is electrically coupled to each of the plurality of adjustable impedance circuits.

2. The plasma processing system of claim 1 , further comprising: substrate support legs attached to the back side of the substrate support; as well as An actuator is attached to the substrate supporting leg and is adapted to raise and lower the substrate supporting leg with the attached substrate support.

3. The plasma processing system of claim 2, wherein a phase detector is used to determine a phase angle (θ) between each of the detected RF voltage and the detected RF current.

4. The plasma processing system of claim 1 wherein each of said plurality of adjustable impedance circuits comprises an inductor and a capacitor having an adjustable capacitance.

5. The plasma processing system of claim 1 wherein adjustment of each of said plurality of adjustable impedance circuits is remotely controlled.

6. The plasma processing system of claim 1, wherein The substrate support is adapted to support a substrate when in the raised position; and The plurality of substrate support pins are adapted to support the substrate when the substrate support is in the lowered position.

7. The plasma processing system of claim 1 wherein said RF voltage and RF current detector comprises: a voltage detection coil adapted to detect an RF voltage on an electrical conductor; as well as a Rogowski coil adapted to detect a radio frequency current passing through the electrical conductor; The voltage detection coil and the Rogowski coil are manufactured on multiple layers of a printed circuit board (PCB).

8. The plasma processing system of claim 7, further comprising RF conductive shields on certain layers of the PCB.

9. A plasma processing system, comprising: a plasma processing chamber; at least one radio frequency (RF) coil for generating plasma within an upper portion of the plasma processing chamber; RF power supply; an RF impedance matching network coupled between the RF power source and the at least one plasma generating RF coil; Frequency detector; a first RF voltage and RF current detector electrically coupled between the RF impedance matching network and the at least one plasma generating RF coil; a substrate support disposed within the plasma processing chamber and below the at least one plasma generating RF coil, the substrate support comprising a body having a plurality of openings formed between a substrate supporting surface and a back surface opposite the substrate supporting surface; a plurality of substrate support pins disposed in the plurality of openings of the substrate support, wherein top portions of the plurality of substrate support pins are flush with or recessed below the substrate support surface when the substrate support is in a raised position, and wherein the substrate support pins extend above the substrate support surface when in a lowered position; a plurality of adjustable impedance circuits in electrical communication with associated substrate support pins of the plurality of substrate support pins; as well as A second RF voltage and RF current detector is electrically coupled to each of the plurality of adjustable impedance circuits for detecting the RF voltage and RF current of the adjustable impedance circuit.

10. The plasma processing system of claim 9 wherein each of said plurality of adjustable impedance circuits comprises an inductor and a capacitor having an adjustable capacitance.

11. The plasma processing system of claim 9, further comprising a monitoring and control system, the monitoring and control system providing: a plurality of inputs coupled to the first RF voltage and RF current detector and the second RF voltage and RF current detector associated with each of the plurality of adjustable impedance circuits; an input coupled to the frequency detector; as well as A plurality of outputs are adapted to control impedance adjustment of the plurality of adjustable impedance circuits.

12. The plasma processing system of claim 11, wherein the monitoring and control system: determining a phase angle (θ) between each pair of the detected first RF voltage and second RF voltage and the RF current; determining a first impedance at an output of the RF impedance matching network; determining a second impedance of each of the plurality of adjustable impedance circuits; as well as Impedance adjustment of the plurality of adjustable impedance circuits is controlled.

13. The plasma processing system of claim 12 wherein said monitoring and control system adjusts said second impedance of said plurality of adjustable impedance circuits to be proportional to said first impedance of said RF impedance matching network.

14. The plasma processing system of claim 12 wherein said monitoring and control system remotely controls adjustment of each of said plurality of adjustable impedance circuits.

15. The plasma processing system of claim 11, wherein the monitoring and control system comprises a microcontroller having: Memory; Digital signal processing and Fourier transform (FFT) capabilities to perform complex mathematical calculations; a general purpose input and output (GPIO) adapted to be coupled to the plurality of inputs and the plurality of outputs; and Communication interface, used to communicate with the main control system and user interface.

16. The plasma processing system of claim 11, wherein the communication interface is adapted to communicate with Ethernet (EtherCAT) for control automation technology.

17. A method for improving plasma processing of a substrate, the method comprising: a substrate support positioned within a processing volume of a plasma processing system, the substrate support including a body having a plurality of openings formed between a substrate supporting surface and a back surface opposite the substrate supporting surface; positioning a plurality of substrate supporting pins in the plurality of openings of the substrate support, wherein top portions of the plurality of substrate supporting pins are aligned planarly with or recessed below the substrate supporting surface of the substrate support; placing a substrate to be processed on the substrate supporting surface of the substrate support and the top portions of the plurality of substrate supporting pins; as well as Impedances of the plurality of adjustable impedance circuits are adjusted during substrate processing, the adjustable impedance circuits being in electrical communication with associated substrate support pins of the plurality of substrate support pins.

18. The method of claim 17, wherein the operation of adjusting the impedance of the plurality of adjustable impedance circuits comprises: The impedances are adjusted to be substantially the same impedance.

19. The method of claim 17, wherein the operation of adjusting the impedance of the plurality of adjustable impedance circuits comprises: The impedance is adjusted to a different impedance.

20. The method of claim 17, wherein the operation of adjusting the impedance of the plurality of adjustable impedance circuits comprises: The impedance of the plurality of adjustable impedance circuits is adjusted in proportion to changes in bulk processing chamber impedance during substrate processing.

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