Signal generation method, electronic device, receiver and computer readable storage medium

Abstract

This application provides a signal generation method, an electronic device, a receiver, and a computer-readable storage medium, relating to the field of data processing technology, capable of outputting PPS signals with a relatively long duration. The method is applied to an electronic device, which includes a target instruction transmitting device, an AND gate circuit, a signal generation device, and an event mask register. The target instruction transmitting device is connected to the signal generation device via the AND gate circuit, and the event mask register is also connected to the signal generation device via the AND gate circuit. The method includes: configuring the event mask register to a low level during a first time period; configuring the event mask register to a high level during a second time period; the first time period and the second time period are adjacent, the second duration is longer than the first duration, the second duration is the sum of a third duration and a fourth duration, the third duration is the duration of the first time period, the fourth duration is the duration of the second time period, and the fourth duration is shorter than the first duration.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, and in particular to a signal generation method, an electronic device, a receiver and a computer readable storage medium. BACKGROUND

[0002] A pulse per second (PPS) signal is a pulse position signal, and a GNSS positioning chip receiving a satellite signal can usually output a PPS signal once every 1 second.

[0003] In some cases, the GNSS positioning chip needs to output a PPS signal periodically with a larger time length, for example, output a PPS signal periodically with a time length of 2 seconds, 3 seconds or 4 seconds. SUMMARY

[0004] The present application provides a signal generation method, an electronic device, a receiver and a computer readable storage medium, which can output a PPS signal periodically with a larger time length.

[0005] To achieve the above object, the present application adopts the following technical solutions:

[0006] In a first aspect, a signal generation method is provided, which is applied to an electronic device. The electronic device includes a target instruction sending device, an AND gate circuit, a signal generation device and an event mask register. The target instruction sending device is connected to the signal generation device through the AND gate circuit, and the event mask register is connected to the signal generation device through the AND gate circuit. The target instruction sending device sends a target instruction to the signal generation device periodically with a first time length. The target instruction is used to make the signal generation device generate a PPS signal. The method includes: configuring the event mask register to a low level in a first time period; configuring the event mask register to a high level in a second time period; the first time period is adjacent to the second time period, the second time length is greater than the first time length, the second time length is the sum of a third time length and a fourth time length, the third time length is the time length of the first time period, the fourth time length is the time length of the second time period, and the fourth time length is less than the first time length.

[0007] In combination with the first aspect, in some embodiments of the first aspect, the method further includes: obtaining the first time length, the second time length and a first time; the signal generation device generates the PPS signal at the first time; taking a second time as a start time of the second time period and taking a third time as an end time of the second time period to obtain the second time period; the time length between the second time and the third time is less than the first time length, and the second time period includes the first time; taking a fourth time as a start time of the first time period and taking a fifth time as an end time of the first time period to obtain the first time period; the fifth time is adjacent to the second time, and the time length between the fourth time and the third time is the second time length.

[0008] With reference to the first aspect, in some embodiments of the first aspect, the target instruction sending apparatus comprises an input end and an event control register, the input end is connected with the event control register, the event control register is connected with the AND gate circuit, the target instruction sending apparatus periodically sends the target instruction to the signal generating apparatus with a first time length as a period, and the target instruction sending apparatus comprises: triggering the event control register in response to a target interrupt signal input by the input end; the event control register is configured to send the target instruction to the signal generating apparatus, and a period time length of an input period of the target interrupt signal is the first time length.

[0009] In a second aspect, an electronic device is provided for implementing the signal generation method of the first aspect. The electronic device comprises modules, units, or means corresponding to the above-mentioned method, which can be implemented by hardware, software, or by hardware executing corresponding software. The hardware or software comprises one or more modules or units corresponding to the above-mentioned functions. The electronic device comprises a target instruction sending apparatus, an AND gate circuit, a signal generating apparatus, and an event mask register, the target instruction sending apparatus is connected with the signal generating apparatus through the AND gate circuit, the event mask register is connected with the signal generating apparatus through the AND gate circuit, the target instruction sending apparatus periodically sends the target instruction to the signal generating apparatus with a first time length as a period, and the target instruction is configured to make the signal generating apparatus generate a PPS signal.

[0010] With reference to the second aspect, in some embodiments of the second aspect, the electronic device comprises: a processing module; the processing module is configured to configure the event mask register to a low level in a first time period; the processing module is configured to configure the event mask register to a high level in a second time period; the first time period is adjacent to the second time period, the second time length is greater than the first time length, the second time length is a sum of a third time length and a fourth time length, the third time length is a time length of the first time period, the fourth time length is a time length of the second time period, and the fourth time length is less than the first time length.

[0011] With reference to the second aspect, in some embodiments of the second aspect, the electronic device further comprises: an acquisition module; the acquisition module is configured to acquire the first time length, the second time length, and a first time; the signal generating apparatus generates the PPS signal at the first time; the processing module is further configured to take a second time as a start time of the second time period and take a third time as an end time of the second time period to obtain the second time period; a time length between the second time and the third time is less than the first time length, and the second time period comprises the first time; the processing module is further configured to take a fourth time as a start time of the first time period and take a fifth time as an end time of the first time period to obtain the first time period; the fifth time is adjacent to the second time, and a time length between the fourth time and the third time is the second time length.

[0012] In conjunction with the second aspect, in some embodiments of the second aspect, the target instruction sending device includes an input terminal and an event control register. The input terminal is connected to the event control register, and the event control register is connected to an AND gate circuit. The target instruction sending device periodically sends a target instruction to a signal generating device for a first duration, including: triggering the event control register in response to a target interrupt signal input at the input terminal; the event control register is used to send the target instruction to the signal generating device, and the period of the input cycle of the target interrupt signal is the first duration.

[0013] Thirdly, an electronic device is provided, comprising: at least one processor and a memory for storing processor-executable instructions; wherein the processor is configured to execute the instructions to implement the methods provided by the first aspect and any possible implementation thereof.

[0014] Fourthly, a computer-readable storage medium is provided, wherein when instructions in the computer-readable storage medium are executed by a processor of a problem base station determination device, the problem base station determination device is enabled to perform the method provided in the first aspect and any possible implementation thereof.

[0015] Fifthly, a computer program product containing instructions is provided that, when run on a computer, enables the computer to perform the methods provided in the first aspect and any possible implementation thereof.

[0016] In a sixth aspect, a receiver is provided that includes the electronic equipment provided in the third aspect.

[0017] The technical effects of any one of the second to sixth aspects can be found in the technical effects of the different embodiments of the first aspect described above, and will not be repeated here.

[0018] Based on the signal generation method provided in this application, in an electronic device including a target instruction sending device, an AND gate circuit, a signal generation device, and an event mask register, where the target instruction sending device is connected to the signal generation device via the AND gate circuit, and the event mask register is connected to the signal generation device via the AND gate circuit, and the target instruction sending device periodically sends a target instruction to the signal generation device for a first duration, wherein the target instruction is used to cause the signal generation device to generate a PPS signal, the event mask register is configured to a low level during the first time period and configured to a high level during the second time period; the first time period and the second time period are adjacent, the second duration is longer than the first duration, and the second duration is the [missing information - likely a number]. The sum of the third and fourth durations, where the third duration is the length of the first time period and the fourth duration is the length of the second time period, with the fourth duration being shorter than the first duration. Since the target instruction sending device and the event mask register are connected to the signal generating device via AND gate circuits, the event mask register is configured to a low level during the first time period. Even if the target instruction sending device transmits the target instruction during the first time period, the signal generating device will not generate a PPS signal. Only when the event mask register is configured to a high level during the second time period, and the target instruction sending device transmits the target instruction during the second time period, will the signal generating device generate a PPS signal, thus enabling the output of the PPS signal with a longer duration period. Attached Figure Description

[0019] Figure 1 A schematic diagram of the architecture of a signal generation system provided in this application;

[0020] Figure 2 A schematic flowchart of a signal generation method provided in this application;

[0021] Figure 3 A schematic diagram of the structure of an electronic device provided in this application;

[0022] Figure 4 A schematic diagram of the structure of another electronic device provided in this application. Detailed Implementation

[0023] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0024] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0025] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being better or more advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0026] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, various embodiments throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0027] It is understood that in this application, "when," "if," and "if" all refer to the corresponding processing that will be carried out under certain objective circumstances, and are not limited to a specific time, nor do they require that there must be a judgment action when implemented, nor do they imply any other limitations.

[0028] It is understood that some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current solution on which they are based, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in certain scenarios. Correspondingly, the apparatus given in the embodiments of this application can also implement these features or functions, which will not be elaborated here.

[0029] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments and implementation methods of the various embodiments in this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the implementation methods of the various embodiments are consistent and can be mutually referenced. The technical features in different embodiments and between the implementation methods of the various embodiments can be combined according to their inherent logical relationships to form new embodiments, implementation methods, implementation methods, or implementation approaches. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.

[0030] A Pulse Per Second (PPS) signal is a pulse position signal, also known as a PPS second pulse. It is a precise time signal obtained by the Global Navigation Satellite System (GNSS) positioning chip from satellites. Its function is to indicate the time in whole seconds, which is usually indicated by the rising edge of the PPS second pulse. The accuracy can be down to the nanosecond level (20-50ns), and there is no cumulative error.

[0031] GNSS positioning chips can typically output a PPS signal every second.

[0032] In some cases, GNSS positioning chips need to output PPS signals with a longer duration, such as 2 seconds, 3 seconds, or 4 seconds. Therefore, how to output PPS signals with a longer duration has become an urgent problem to be solved.

[0033] To address the aforementioned problems, this application provides a signal generation method that can be applied to a signal generation system. Figure 1 This is a schematic diagram of the architecture of a signal generation system provided in this application. The technical solutions of the embodiments of this application can be applied to... Figure 1 The electronic devices shown, such as Figure 1 As shown, the signal generation system 10 includes an electronic device 11 and an input device 12.

[0034] Electronic device 11 includes a target instruction sending device, an AND gate circuit, a signal generating device, and an event mask register.

[0035] The target instruction sending device is connected to the signal generating device via an AND gate circuit, and the event mask register is connected to the signal generating device via an AND gate circuit. The target instruction sending device periodically sends target instructions to the signal generating device with a first duration as the period. The target instructions are used to cause the signal generating device to generate a PPS signal.

[0036] Optionally, the electronic device 11 may also include an input terminal connected to the event control register.

[0037] Electronic device 11 can be a GNSS positioning chip. Of course, electronic device 11 can also be other devices. This application does not impose any specific restrictions on this.

[0038] In a design, such as Figure 1 As shown, the target instruction sending device includes an input terminal and an event control register. The input terminal is connected to the event control register, and the event control register is connected to an AND gate circuit. The target instruction sending device periodically sends target instructions to the signal generating device with a first duration as the period.

[0039] In this design, the target command sending device periodically sends target commands to the signal generating device with a first duration as the period, which may specifically include:

[0040] Electronic device 11 triggers the event control register in response to the target interrupt signal input at the input terminal.

[0041] The event control register is used to send target instructions to the signal generation device, and the input cycle of the target interrupt signal has a first duration.

[0042] It should be noted that, taking electronic device 11 as a GNSS positioning chip as an example, the target interruption signal can be an interruption signal generated by the GNSS positioning chip after receiving the PPS signal from the satellite.

[0043] In other words, the GNSS positioning chip receives a PPS signal from the satellite every second, and correspondingly, it also generates a target interrupt signal every second, triggering the event control register.

[0044] The signal generation method provided in the embodiments of this application will now be described with reference to the accompanying drawings.

[0045] Figure 2 This is a flowchart illustrating a signal generation method provided in this application, which is applied to... Figure 1 The electronic devices shown, such as Figure 2 As shown, the signal generation method includes the following steps:

[0046] S201, The electronic device acquires the first duration, the second duration, and the first moment.

[0047] The signal generating device generates a PPS signal at the first moment.

[0048] It should be noted that the target command sending device periodically sends target commands to the signal generating device with a first duration as the cycle.

[0049] The first duration can be 1 second.

[0050] The second duration is longer than the first duration. For example, the second duration can be 2 seconds, 3 seconds, or 4 seconds. Of course, the second duration can also be other durations. This application does not impose any specific restrictions on this.

[0051] The first time point can be 10:00:00:00 on January 1, 2024, 10:00:00:00 on February 1, 2024, or 10:00:00:00 on March 1, 2024. Of course, the first time point can also be other times, and this application does not impose specific restrictions on this.

[0052] As one possible implementation, the electronic device receives information from an input device, which includes a first duration, a second duration, and a first moment, and the electronic device obtains the first duration, the second duration, and the first moment from the information.

[0053] S202. The electronic device takes the second moment as the start moment of the second time period and the third moment as the end moment of the second time period to obtain the second time period.

[0054] The duration between the second and third moments is shorter than the first duration, and the second time period includes the first moment.

[0055] Understandably, the duration between the second and third moments is the duration of the second time period.

[0056] As one possible implementation, let's take the first moment as 10:00:00:00 on January 1, 2024, and the first duration as 1 second.

[0057] First, the electronic device determines the end time of the second time period, i.e., the third time period. The electronic device can use 10:00:00:00 on January 1, 2024 as the third time period, or it can use 10:00:00:01 on January 1, 2024 as the third time period, or it can use 10:00:00:02 on January 1, 2024 as the third time period, as long as the third time period is after the first time period and the duration between the third time period and the first time period is not greater than the duration of the first time period.

[0058] Subsequently, the electronic device determines the start time of the second time period, i.e., the second moment. If the third moment is 10:00:00:02 on January 1, 2024, the electronic device can use 09:59:59:03 on January 1, 2024 as the second moment, or it can use 09:59:59:04 on January 1, 2024, or it can use 09:59:59:05 on January 1, 2024 as the second moment. The only requirement is that the second moment is before the first moment, and the duration between the second moment and the third moment is less than the duration of the first moment. This application does not impose specific restrictions on the duration of the second time period.

[0059] S203. The electronic device takes the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period to obtain the first time period.

[0060] The fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0061] As one possible implementation, taking the second moment as 09:59:59:04 on January 1, 2024, and the second duration as 4 seconds, the electronic device would use 09:59:59:03 on January 1, 2024 as the fifth moment.

[0062] If the fifth time is 09:59:59:03 on January 1, 2024, the electronic device will take 09:59:55:03 on January 1, 2024 as the fourth time.

[0063] Based on S201-S203, by acquiring the first duration, the second duration, and the first moment, since the signal generating device generates a PPS signal at the first moment, the second moment can be used as the start moment of the second time period, and the third moment can be used as the end moment of the second time period to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; the fourth moment can be used as the start moment of the first time period, and the fifth moment can be used as the end moment of the first time period to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0064] After determining a first time period or a second time period, and after the first or second time period has elapsed, a new first time period or second time period can be determined. The duration between the start time of the new first time period and the start time of the current first time period is the second duration; the duration between the end time of the new first time period and the end time of the current first time period is the second duration; the duration between the start time of the new second time period and the start time of the current second time period is the second duration; and the duration between the end time of the next new second time period and the end time of the current second time period is the second duration. Thus, after determining a first time period or a second time period, only the second duration needs to be added to the original time to determine the next new first or second time period, without needing to re-execute S201-S203, reducing the computational burden on the electronic equipment.

[0065] S204. The electronic device configures the event mask register to low level during the first time period.

[0066] As one possible implementation, at the beginning of the first time period, the electronic device sends a first instruction to the event mask register. The first instruction is used to set the corresponding bit of the event mask register to 0, that is, to configure the event mask register to a low level.

[0067] S205, The electronic device configures the event mask register to high level during the second time period.

[0068] The first time period is adjacent to the second time period. The second time period is longer than the first time period. The second time period is the sum of the third and fourth time periods. The third time period is the length of the first time period. The fourth time period is the length of the second time period. The fourth time period is shorter than the first time period.

[0069] As one possible implementation, at the beginning of the second time period, the electronic device sends a second instruction to the event mask register. The first instruction is used to set the corresponding bit of the event mask register to 1, that is, to configure the event mask register to a high level.

[0070] Based on S204-S205, in an electronic device including a target instruction sending device, an AND gate circuit, a signal generating device, and an event mask register, where the target instruction sending device is connected to the signal generating device via the AND gate circuit, and the event mask register is connected to the signal generating device via the AND gate circuit, and the target instruction sending device periodically sends a target instruction to the signal generating device for a first duration, wherein the target instruction is used to cause the signal generating device to generate a PPS signal, the event mask register is configured to a low level during the first time period and a high level during the second time period; the first time period and the second time period are adjacent, the second duration is longer than the first duration, and the second duration is the third duration. The sum of the duration and the fourth duration, the third duration is the duration of the first time period, the fourth duration is the duration of the second time period, and the fourth duration is less than the first duration. Since the target instruction sending device and the event mask register are connected to the signal generating device through AND gate circuits, the event mask register is configured to a low level during the first time period. Even if the target instruction sending device sends a target instruction during the first time period, the signal generating device will not generate a PPS signal. Only when the event mask register is configured to a high level during the second time period, and the target instruction sending device sends a target instruction during the second time period, will the signal generating device generate a PPS signal, thus enabling the output of the PPS signal with a larger duration period.

[0071] The foregoing mainly describes the solutions provided by the embodiments of this application from the perspective of signal generation methods performed by electronic devices. To achieve the above functions, the electronic device includes corresponding hardware structures and / or software modules for performing each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0072] This application embodiment can divide the electronic device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. Optionally, the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. Furthermore, "module" here can refer to an application-specific integrated circuit (ASIC), a circuit, a processor and memory that executes one or more software or firmware programs, integrated logic circuits, and / or other devices that can provide the above functions.

[0073] When using functional module division Figure 3 A schematic diagram of the structure of an electronic device is shown. Figure 3 As shown, the electronic device 30 includes an acquisition module 301 and a processing module 302.

[0074] In some embodiments, the electronic device 30 may further include a storage module ( Figure 3 (Not shown in the image) is used to store program instructions and data.

[0075] The processing module 302 is used to configure the event mask register to a low level in the first time period; the processing module 302 is used to configure the event mask register to a high level in the second time period; the first time period and the second time period are adjacent, the second time period is longer than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the duration of the first time period, the fourth time period is the duration of the second time period, and the fourth time period is shorter than the first time period.

[0076] Optionally, the acquisition module 301 is used to acquire a first duration, a second duration, and a first moment; the signal generating device generates a PPS signal at the first moment; the processing module 302 is further used to take the second moment as the start moment of the second time period and the third moment as the end moment of the second time period to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; the processing module 302 is further used to take the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0077] Optionally, the target instruction sending device includes an input terminal and an event control register. The input terminal is connected to the event control register, and the event control register is connected to an AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as the period, including: triggering the event control register in response to a target interrupt signal input at the input terminal; the event control register is used to send the target instruction to the signal generating device, and the period of the input cycle of the target interrupt signal is the first duration.

[0078] All relevant content of each step involved in the above method embodiments can be referenced from the functional description of the corresponding functional module, and will not be repeated here.

[0079] When the functions of the above modules are implemented in hardware... Figure 4 A schematic diagram of the structure of yet another electronic device is shown. For example... Figure 4 As shown, the electronic device 40 includes a processor 401, a memory 402, and a bus 403. The processor 401 and the memory 402 can be connected via the bus 403.

[0080] Processor 401 is the control center of electronic device 40. It can be a single processor or a collective term for multiple processing elements. For example, processor 401 can be a general-purpose central processing unit (CPU) or other general-purpose processors. Among them, the general-purpose processor can be a microprocessor or any conventional processor.

[0081] As one embodiment, processor 401 may include one or more CPUs, for example Figure 4 CPU0 and CPU1 are shown in the diagram.

[0082] The memory 402 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.

[0083] As one possible implementation, the memory 402 can exist independently of the processor 401. The memory 402 can be connected to the processor 401 via a bus 403 and is used to store instructions or program code. When the processor 401 calls and executes the instructions or program code stored in the memory 402, it can implement the signal generation method provided in the embodiments of this application.

[0084] In another possible implementation, the memory 402 can also be integrated with the processor 401.

[0085] Bus 403 can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0086] It should be pointed out that, Figure 4 The structure shown does not constitute a limitation on the electronic device 40. Except... Figure 4 In addition to the components shown, the electronic device 40 may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0087] As an example, combined Figure 3 The functions implemented by the acquisition module 301 and the processing module 302 in the electronic device 30 are the same as those of the acquisition module 301 and the processing module 302. Figure 4 The processor 401 in it has the same function.

[0088] Optional, such as Figure 4 As shown, the electronic device 40 provided in this application embodiment may further include a communication interface 404.

[0089] Communication interface 404 is used to connect with other devices via a communication network. This communication network can be Ethernet, a wireless access network, a wireless local area network (WLAN), etc. Communication interface 404 may include a receiving unit for receiving data and a transmitting unit for transmitting data.

[0090] In one possible implementation, the communication interface 404 in the electronic device 40 provided in this application embodiment can also be integrated into the processor 401, and this application embodiment does not specifically limit this.

[0091] As a possible product form, the electronic device of the present application embodiment can also be implemented using one or more field programmable gate arrays (FPGAs), programmable logic devices (PLDs), controllers, state machines, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits capable of performing the various functions described throughout this application.

[0092] Through the above description of the embodiments, those skilled in the art will clearly understand that, for the sake of convenience and brevity, only the division of the above functional units is used as an example. In practical applications, the above functions can be assigned to different functional units as needed, that is, the internal structure of the device can be divided into different functional units to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0093] This application also provides a computer-readable storage medium storing a computer program or instructions thereon, which, when executed, causes a computer to perform the various steps in the method flow shown in the above method embodiments.

[0094] Embodiments of this application provide a computer program product containing instructions that, when executed on a computer, cause the computer to perform the various steps in the method flow shown in the above-described method embodiments.

[0095] This application provides a chip system, including: a processor and an interface circuit; the interface circuit is used to receive computer programs or instructions and transmit them to the processor; the processor is used to execute the computer programs or instructions so that the chip system performs each step in the method flow shown in the above method embodiments.

[0096] The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), registers, hard disks, optical fibers, compact disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing, or any other form of computer-readable storage medium in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may reside in a purpose-specific ASIC. In the embodiments of this application, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0097] Since the electronic device, computer-readable storage medium, and computer program product provided in this embodiment can be applied to the signal generation method provided in this embodiment, the technical effects they can achieve can also be referred to the above method embodiments. The embodiments of this application will not be repeated here.

[0098] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0099] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A signal generation method, characterized in that, The method is applied to an electronic device, which includes a target instruction sending device, an AND gate circuit, a signal generating device, and an event mask register. The target instruction sending device is connected to the signal generating device through the AND gate circuit, and the event mask register is connected to the signal generating device through the AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as the period. The target instruction is used to cause the signal generating device to generate a PPS signal. The method includes: The event mask register is configured to go low during the first time period; The event mask register is configured to go high during the second time period; the first time period is adjacent to the second time period, the second time period is longer than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is shorter than the first time period; The method further includes: The first duration, the second duration, and the first moment are acquired; the signal generating device generates the PPS signal at the first moment. The second time period is obtained by taking the second moment as the start moment of the second time period and the third moment as the end moment of the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment. The first time period is obtained by taking the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

2. The method according to claim 1, characterized in that, The target instruction sending device includes an input terminal and an event control register. The input terminal is connected to the event control register, and the event control register is connected to the AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as the period, including: In response to the target interrupt signal input at the input terminal, the event control register is triggered; the event control register is used to send the target instruction to the signal generating device, and the period of the input cycle of the target interrupt signal is a first duration.

3. An electronic device, characterized in that, The electronic device includes a target instruction sending device, an AND gate circuit, a signal generating device, and an event mask register. The target instruction sending device is connected to the signal generating device through the AND gate circuit, and the event mask register is connected to the signal generating device through the AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as the period. The target instruction is used to cause the signal generating device to generate a PPS signal. The electronic device includes a processing module. The processing module is configured to set the event mask register to a low level during a first time period; The processing module is configured to set the event mask register to a high level in the second time period; the first time period is adjacent to the second time period, the second time period is longer than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is shorter than the first time period; The electronic device further includes: an acquisition module; The acquisition module is used to acquire the first duration, the second duration, and the first moment; the signal generating device generates the PPS signal at the first moment. The processing module is further configured to take the second moment as the start moment of the second time period and the third moment as the end moment of the second time period to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; The processing module is further configured to take the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

4. The electronic device according to claim 3, characterized in that, The target instruction sending device includes an input terminal and an event control register. The input terminal is connected to the event control register, and the event control register is connected to the AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as the period, including: In response to the target interrupt signal input at the input terminal, the event control register is triggered; the event control register is used to send the target instruction to the signal generating device, and the period of the input cycle of the target interrupt signal is a first duration.

5. An electronic device, characterized in that, The electronic device includes: a processor coupled to a memory for storing programs or instructions that, when executed by the processor, cause the electronic device to perform the method as described in any one of claims 1 to 2.

6. A receiver, characterized in that, The receiver includes the electronic device as described in claim 5.

7. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, When the computer program or instructions are executed, they cause the computer to perform the method as described in any one of claims 1 to 2.

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