FC monitoring equipment B code stamping system and implementation method thereof

Abstract

The invention relates to an FC (Fiber Channel) monitoring equipment B code stamping system and an implementation method thereof, and the system comprises a time code generator interface, a time code receiving and converting unit, a time code stamping and storing unit and a PCIe (Peripheral Component Interconnect Express) interface unit which are connected in sequence, the time code receiving and converting unit comprises a time code receiving unit and a time code converting unit, the time code receiving unit receives differential IRIG-B time codes generated by the time code generator and transmits the differential IRIG-B time codes to the time code converting unit, the time code converting unit converts the differential IRIG-B time codes into single-end IRIG-B time codes, and the time code stamping and storing unit comprises a monitoring data stamping unit and a time code storing unit. The time code storage unit stores the single-end IRIG-B time code, outputs the single-end IRIG-B time code to the PCIe interface unit and uploads the single-end IRIG-B time code to an application layer through the PCIe interface unit, and the monitoring data stamping unit adds the IRIG-B time code to a local time mark position when monitoring FC frame data. According to the method, the data processing efficiency of the system maintenance module is improved, and the method can be applied to multi-node / multi-bus system equipment.

Description

Technical Field

[0001] The invention belongs to the field of bus network communication, and in particular relates to a B code stamping system of FC monitoring equipment and an implementation method thereof. Background Art

[0002] At present, when monitoring and recording, monitoring equipment (boards) use the local real-time clock designed by digital logic circuits as the reference to stamp and record data packets for subsequent flexible and effective data analysis. When real-time monitoring data is performed, an 8-byte local real-time time stamp value (a timer that increments with a resolution of 100 nanoseconds after power-on) is added before the data frame. The recorded data format is as follows: Figure 1 This design is more commonly used in subsystem unit laboratories, but there are various types of equipment in the laboratory simulation monitoring equipment of the whole system, such as Figure 2 As shown, for example, FC monitoring cards, 1394 monitoring cards, 1553 monitoring cards, etc., each device performs stamping processing when monitoring data in real time, and then uploads it to the system maintenance module by the aggregation module. When the system maintenance module processes it, it is generally filtered and processed according to time. Different types of boards may be installed on different industrial computers, and there is a sequence in which they are powered on. Therefore, the local real-time time stamp is not unified, which will cause the system maintenance module to be unable to process data efficiently.

[0003] Therefore, in multi-node / multi-bus system applications, the method of counting and stamping based on the local real-time clock when recording data is very limited. The user's upper-level application cannot analyze various types of data in the same time dimension, which will reduce work efficiency and increase usage costs. Summary of the invention

[0004] In order to solve the technical problems in the prior art, the present invention provides a B-code stamping system for FC monitoring equipment and its implementation method. When recording, a method that can be stamped with unified external timing is adopted, and multiple monitoring devices are uniformly timed to stamp and record when the underlying monitoring data is stamped, so that the system maintenance module can analyze the application data in the same time dimension, thereby improving work efficiency and reducing use costs.

[0005] The technical solution of the present invention is: the present invention is a B code stamping system for FC monitoring equipment, which is special in that: the FC monitoring equipment B code stamping system includes a time code generator interface, a time code receiving conversion unit, a time code stamping and storage unit and a PCIe interface unit connected in sequence, the time code generator interface receives synchronous satellite time, the time code receiving conversion unit includes a time code receiving unit and a time code conversion unit, the time code receiving unit receives the differential IRIG-B time code generated by the time code generator, and transmits it to the time code conversion unit, the time code conversion unit converts it into a single-ended IRIG-B time code, the time code stamping and storage unit includes a monitoring data stamping unit and a time code storage unit, the time code storage unit stores the single-ended IRIG-B time code, outputs it to the PCIe interface unit, and uploads it to the application layer through the PCIe interface unit, and when the monitoring data stamping unit monitors FC frame data, the IRIG-B time code is added to the local time stamp position.

[0006] Furthermore, the time code generator interface includes an external time code generator, and the external time code generator generates a differential IRIG-B time code by receiving satellite time.

[0007] Furthermore, the monitoring data stamping unit is connected to a configuration circuit including a power supply, a clock, and a storage.

[0008] Furthermore, the time code conversion unit is a MAX3490 chip.

[0009] A method for implementing the B-code stamping system of the FC monitoring device described above is special in that the method comprises the following steps:

[0010] 1) The synchronous satellite time is input to the time code generator interface, and the time code generator interface outputs the differential IRIG-B time code;

[0011] 2) The time code receiving unit inputs the differential IRIG-B time code outputted in step 1) into the time code conversion unit, converts the time code conversion unit to generate a single-ended IRIG-B time code, and outputs the single-ended IRIG-B time code;

[0012] 3) Input the single-ended IRIG-B time code to the time code storage unit, store it in the time code storage unit, and finally output the IRIG-B time code time register, which is transmitted to the software application layer through the PCIe interface unit for time system processing by the software;

[0013] 4) When FC frame data is monitored, the monitoring data stamping unit adds the single-ended IRIG-B time code in step 3) to the local time stamp position. The bit

[31] of word 0 at the time stamp position indicates whether the source of the local time stamp is the B code or the local RTC. When it is identified as the B code, bit [30:0] represents the day, hour, and minute information of the IRIG-B code, and bit [31:0] of word 1 represents the second, millisecond, and microsecond information of the IRIG-B code.

[0014] The B-code stamping system implementation method of the FC monitoring device of the present invention effectively solves the problem of inconsistent time of multiple device monitoring and recording data. When recording, a method that can be stamped with unified external timing is adopted, and multiple monitoring devices are uniformly timed to stamp and record when the underlying monitoring data is stamped, so that the system maintenance module can analyze the application data in the same time dimension. The system maintenance module improves the data processing efficiency, and can be used for the application of multi-node / multi-bus system equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The existing current monitoring data frame format;

[0016] Figure 2 The cross-link diagram of the laboratory simulation monitoring equipment for the existing whole machine system;

[0017] Figure 3 is a system block diagram of the present invention;

[0018] Figure 4 The IRIG-B time code time register of the present invention;

[0019] Figure 5 This is the FC monitoring device monitoring frame format of the present invention. DETAILED DESCRIPTION

[0020] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] The design circuits of the IRIG-B format time code source include a DC code circuit and an AC code circuit. According to the characteristics of the DC code and the AC code and in combination with the requirements of aviation airborne equipment, the present invention is implemented using a DC code circuit.

[0022] See also Figure 3The specific embodiment structure of the FC monitoring device B code stamping system of the present invention includes a time code generator interface, a time code receiving conversion unit, a time code stamping and storage unit and a PCIe interface unit connected in sequence. The time code generator interface receives synchronous satellite time. The time code receiving conversion unit includes a time code receiving unit and a time code conversion unit. The time code receiving unit receives the differential IRIG-B time code generated by the time code generator and transmits it to the time code conversion unit. The time code conversion unit converts it into a single-ended IRIG-B time code. The time code stamping and storage unit includes a monitoring data stamping unit and a time code storage unit. The time code storage unit stores the single-ended IRIG-B time code and outputs it to the PCIe interface unit, which is uploaded to the application layer through the PCIe interface unit. When the monitoring data stamping unit monitors the FC frame data, it adds the IRIG-B time code to the local time stamp position.

[0023] The time code generator interface includes an external time code generator, which generates a differential IRIG-B time code by receiving satellite time.

[0024] The monitoring data stamping unit is connected with configuration circuits such as power supply, clock, storage, etc.

[0025] The time code conversion unit is the MAX3490 chip.

[0026] The steps of the specific embodiment of the implementation method of the FC monitoring device B code stamping system of the present invention are as follows:

[0027] 1) The synchronous satellite time is input to the time code generator interface, and the time code generator interface outputs the differential IRIG-B time code;

[0028] 2) The differential IRIG-B time code outputted in step 1) is inputted into the time code receiving and converting unit, and a single-ended IRIG-B time code is generated through the MAX3490 chip, and the time code receiving and converting unit outputs the single-ended IRIG-B time code;

[0029] 3) Input the single-ended IRIG-B time code to the time code storage unit, store it through 8421BCD code, and finally output the IRIG-B time code time register. The IRIG-B time code time register is as follows: Figure 4 As shown, the data is transmitted to the software application layer through the PCIe interface unit for time system processing by the software;

[0030] 4) When the FC frame data is monitored, the time code stamping unit adds the single-ended IRIG-B time code in step 3) to the Figure 5The local time stamp position is shown. The bit

[31] field of word 0 of the time stamp position identifies the source of the local time stamp, which is B code or local RTC. When it is identified as B code, bit[30:0] represents the day, hour, and minute information of the IRIG-B code, and bit[31:0] of word 1 represents the second, millisecond, and microsecond information of the IRIG-B code.

[0031] The above are only specific embodiments disclosed in the present invention, but the protection scope of the present invention is not limited thereto. The protection scope of the present invention shall be based on the protection scope of the claims.

[0032] The content of the present invention and the technical content not specifically described in the above embodiments are the same as the prior art.

[0033] The present invention is not limited to the above embodiments, and all of the contents of the present invention can be implemented and have the above good effects.

Claims

1. A B-code stamping system for FC monitoring equipment, characterized in that: The FC monitoring device B code stamping system includes a time code generator interface, a time code receiving and conversion unit, a time code stamping and storage unit and a PCIe interface unit connected in sequence. The time code generator interface receives synchronous satellite time. The time code receiving and conversion unit includes a time code receiving unit and a time code conversion unit. The time code receiving unit receives the differential IRIG-B time code generated by the time code generator and transmits it to the time code conversion unit. The time code conversion unit converts it into a single-ended IRIG-B time code. The time code stamping and storage unit includes a monitoring data stamping unit and a time code storage unit. The time code storage unit stores the single-ended IRIG-B time code, outputs it to the PCIe interface unit, and uploads it to the application layer through the PCIe interface unit. When the monitoring data stamping unit monitors FC frame data, it adds the IRIG-B time code to the local time stamp position.

2. The FC monitoring equipment B code stamping system according to claim 1, characterized in that: The time code generator interface includes an external time code generator, and the external time code generator generates a differential IRIG-B time code by receiving satellite time.

3. The FC monitoring equipment B code stamping system according to claim 1 or 2, characterized in that: The monitoring data stamping unit is connected to a configuration circuit including a power supply, a clock, and a storage.

4. The FC monitoring equipment B code stamping system according to claim 3, characterized in that: The time code conversion unit is a MAX3490 chip.

5. A method for implementing the B-code stamping system of FC monitoring equipment according to claim 1, characterized in that: The method comprises the following steps: 1) The synchronous satellite time is input to the time code generator interface, and the time code generator interface outputs the differential IRIG-B time code; 2) The time code receiving unit inputs the differential IRIG-B time code outputted in step 1) into the time code conversion unit, converts the time code conversion unit to generate a single-ended IRIG-B time code, and outputs the single-ended IRIG-B time code; 3) Input the single-ended IRIG-B time code to the time code storage unit, store it in the time code storage unit, and finally output the IRIG-B time code time register, which is transmitted to the software application layer through the PCIe interface unit for time system processing by the software; 4) When FC frame data is monitored, the monitoring data stamping unit adds the single-ended IRIG-B time code in step 3) to the local time stamp position. The bit [31] of word 0 at the time stamp position indicates whether the source of the local time stamp is the B code or the local RTC. When it is identified as the B code, bit [30:0] represents the day, hour, and minute information of the IRIG-B code, and bit [31:0] of word 1 represents the second, millisecond, and microsecond information of the IRIG-B code.

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