Stepped package in 3D NAND fabrication

Abstract

Methods and apparatus are provided for depositing an encapsulation layer on a step structure during fabrication of a 3D NAND structure to prevent degradation of an oxide-oxide interface and to prevent word line punch-through. The encapsulation layer is a carbon-containing conformal film deposited on the stepped structure of alternating oxide and nitride layers prior to depositing the oxide on the stepped structure.

Description

This application is a divisional application of application number 201780072499.9, application date November 21, 2017, and invention name “Step Packaging in 3D NAND Manufacturing”. CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Patent Application No. 15 / 408,291, filed on January 17, 2017, entitled “STAIRCASE ENCAPSULATION IN 3D NAND FABRICATION,” which claims priority to U.S. Provisional Patent Application No. 62 / 426,035, filed on November 23, 2016, entitled “STAIRCASE ENCAPSULATION IN 3D NAND FABRICATION,” and U.S. Provisional Patent Application No. 62 / 435,500, filed on December 16, 2016, entitled “STAIRCASE ENCAPSULATION IN 3D NAND FABRICATION,” the entire contents of which are incorporated herein by reference and for all purposes. Background Art

[0002] Semiconductor device manufacturing involves the manufacture of flash memory. As devices shrink, structures for making efficient and multiple memory cells are used to maximize the density of memory cells in memory devices. 3D NAND technology addresses the challenges associated with two-dimensional NAND technology by vertically stacking memory cells in layers. Summary of the invention

[0003] Methods and apparatus for processing semiconductor substrates are provided herein. One aspect relates to a method for processing a semiconductor substrate to manufacture a 3D NAND structure, the method comprising: providing a substrate having alternating first oxide layers and nitride layers in a staircase pattern; and before depositing a second oxide on the staircase pattern, depositing a carbon-containing encapsulation layer to encapsulate both the first oxide layer and the nitride layer.

[0004] In various embodiments, the dry etching selectivity ratio of the second oxide to the carbon-containing encapsulation layer is between about 2: 1 and about 100: 1. The carbon-containing encapsulation layer can be deposited to a thickness between about 1 nm and about 250 nm.

[0005] In various embodiments, the carbon-containing encapsulation layer includes a material selected from the group consisting of silicon carbide, oxygen-doped silicon carbide, nitrogen-doped silicon carbide, boron- and nitrogen-doped silicon carbide, and combinations thereof.

[0006] In various embodiments, the carbon-containing encapsulation layer is deposited by the following steps: introducing silicon-containing and carbon-containing precursors; introducing a source gas in a plasma source remote from a chamber containing the substrate; generating one or more free radicals of the source gas from the source gas in the plasma source; and introducing the one or more free radicals of the source gas onto the substrate, wherein all or substantially all of the one or more free radicals of the source gas are in a substantially low energy state so as to react with the silicon-containing and carbon-containing precursors to form the carbon-containing encapsulation film.

[0007] In some embodiments, the carbon-containing encapsulation layer is deposited by atomic layer deposition. In some embodiments, the carbon-containing encapsulation layer is deposited by chemical vapor deposition.

[0008] In some embodiments, the carbon-containing encapsulation layer prevents degradation at the interface between the first oxide and the second oxide.In various embodiments, the thickness of each of the first oxide layer and the nitride layer is between about 10 nm and about 100 nm.

[0009] The staircase includes steps, each step including an oxide layer and a nitride layer, wherein each step includes a pad extending outwardly from an edge of an adjacent overlying step, the pad having a width of about 150 nm to about 1000 nm.

[0010] In various embodiments, the method further includes: depositing the second oxide on the stair pattern after depositing the carbon-containing encapsulation layer; etching vertical gaps in the stair pattern; selectively etching the nitride layer relative to the first oxide, the second oxide, and the carbon-containing encapsulation layer to form gaps between the first oxide layers; depositing tungsten in the gaps between the first oxide layers to form tungsten word lines; etching the second oxide to form vertical through holes in the second oxide that reach the tungsten word lines, wherein the second oxide is selectively etched relative to the carbon-containing encapsulation layer; selectively etching the encapsulation layer relative to the first oxide, the second oxide, and the tungsten word line to expose the tungsten word line at the bottom of the through hole; and depositing tungsten in the through hole to form tungsten interconnects with the tungsten word lines.

[0011] In some embodiments, the vertical through hole includes through holes with different depths. The vertical through hole can have a critical dimension between about 50nm and about 500nm. The depth can range from about 1 micron to about 12 microns.

[0012] In some embodiments, the first oxide layer is deposited at a deposition temperature that is different than a deposition temperature used to deposit the second oxide.

[0013] Another aspect relates to an apparatus for depositing a carbon-containing encapsulating film on a substrate to fabricate a 3D NAND structure, the apparatus comprising: a reaction chamber containing the substrate; a plasma source coupled to the reaction chamber and configured to generate plasma outside the reaction chamber; one or more first gas inlets coupled to the reaction chamber; a second gas inlet coupled to the reaction chamber; and a controller comprising instructions for: introducing silicon-containing and carbon-containing precursors; introducing a source gas in the plasma source remote from the reaction chamber containing the substrate; generating one or more free radicals of the source gas from the source gas in the plasma source; and introducing the one or more free radicals of the source gas onto the substrate, wherein all or substantially all of the one or more free radicals of the source gas are in a substantially low energy state so as to react with the silicon-containing and carbon-containing precursors to form the carbon-containing encapsulating film.

[0014] These and other aspects are further described below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Is a process flow diagram depicting the operations of a method.

[0016] Figure 2 , 3 and 4A are schematic diagrams of the substrate in the patterning scheme.

[0017] Figure 4B yes Figure 4A Half view of the substrate in.

[0018] Figure 5A , 6A , 7A, 8 and 9 are schematic diagrams of substrates in patterning schemes.

[0019] Figure 5B , 6B and 7B respectively Figure 5A , 6A and a side view of a schematic diagram of the substrate shown in 7A.

[0020] Fig.10 is a process flow diagram depicting the operations of methods performed according to certain disclosed embodiments.

[0021] Figure 11-17 is a schematic diagram of a substrate during a patterning scheme performed in accordance with certain disclosed embodiments.

[0022] Fig.18 , 20 22 are schematic diagrams of exemplary processing chambers for performing certain disclosed embodiments.

[0023] Fig.19 and 21 is a schematic diagram of an example processing tool for performing certain disclosed embodiments. DETAILED DESCRIPTION

[0024] In the following description, many specific details are set forth to provide a thorough understanding of the embodiments presented. The disclosed embodiments can be implemented without some or all of these specific details. In other cases, well-known processing operations are not described in detail to avoid unnecessarily making the embodiments of the present disclosure unclear. Although the disclosed embodiments will be described in conjunction with specific embodiments, it should be understood that this is not intended to limit the embodiments of the present disclosure.

[0025] The implementation disclosed below describes the deposition of materials on a substrate such as a wafer, substrate, or other workpiece. The workpiece can be of various shapes, sizes, and materials. In this application, the terms "semiconductor wafer", "wafer", "substrate", "wafer substrate", and "partially manufactured integrated circuit" are used interchangeably.

[0026] Semiconductor manufacturing generally involves the manufacture of memory devices. One example is the manufacture of 3D NAND structures. However, existing techniques for forming 3D NAND structures are limited to scaling to smaller devices, and patterning techniques may result in undesirable degradation of components in the structure. One technique for forming a 3D NAND structure is Figure 1 shown.

[0027] Figure 1 A process flow diagram of operations performed according to a method for forming a 3D NAND structure is shown. In operation 182, a substrate is provided. In various embodiments, the substrate is a semiconductor substrate. The substrate can be a silicon wafer, such as a 200 mm wafer, a 300 mm wafer, or a 450 mm wafer, including a wafer having one or more layers of material (e.g., a dielectric, conductive material, or semiconductive material) deposited thereon. Figure 2 An exemplary substrate 100 is provided as a schematic diagram.

[0028] return Figure 1 In operation 184, a film stack of alternating oxide and nitride films is deposited on the substrate. In various embodiments, the deposited oxide layer is a silicon oxide layer. In various embodiments, the deposited nitride layer is a silicon nitride layer.

[0029] In some embodiments, each oxide layer and nitride layer is deposited to approximately the same thickness, such as between about 10 nm and about 100 nm, or about The oxide layer may be deposited at a deposition temperature between about room temperature and about 600° C. It should be understood that “deposition temperature” (or “substrate temperature”) as used herein refers to the temperature at which the pedestal holding the substrate is set during deposition.

[0030] The oxide layers and nitride layers used to form the alternating oxide and nitride film stack may be deposited using any suitable technique, such as atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), or sputtering. In various embodiments, the oxide layers and nitride layers are deposited by PECVD.

[0031] The film stack may include 48 to 512 alternating oxide and nitride layers, whereby each oxide or nitride layer constitutes one layer. A film stack including alternating oxide and nitride layers may be referred to as an ONON stack.

[0032] Figure 3 An exemplary schematic diagram of a substrate 100 is shown on which alternating oxide (101) and nitride (102) films are deposited. Note that although Figure 3 The structure shown in shows that oxide is deposited first, then nitride, oxide, nitride, etc. are deposited in sequence, but nitride may be deposited first and then oxide, nitride, oxide, etc. are deposited in sequence.

[0033] After depositing the ONON stack, a channel can be etched in the substrate ( Figure 3 ). Subsequently, refer to Figure 1 , in operation 186, a stair pattern is formed on the substrate. The "stair pattern" referred to herein includes two or more steps, each step including an oxide layer and a nitride layer. It should be understood that the top layer of each set of oxide layers and nitride layers can be an oxide or nitride for forming the steps in the stair. In various embodiments, the stair pattern includes between 24 and 256 steps. The stair pattern can be formed using various patterning techniques. For example, one technique may include depositing a sacrificial layer on the substrate and masking an area of ​​the substrate to etch each set of oxide layers and nitride layers to form a stair.

[0034] Figure 4A An example of a substrate 100 is provided that includes a stepped pattern of oxide (111) and nitride (112) layers with a hard mask 110 on the topmost nitride layer. Figure 4A Four steps of the staircase pattern are shown, but it should be understood that the staircase pattern can have between 24 and 256 steps. Each step includes a nitride layer and an oxide layer, and as shown in FIG. Figure 4AThe distance d shown in can be between about 150 nm and about 1000 nm, such as about 500 nm.The area of ​​each step that extends outward from the edge of the step above the step can be referred to as a "pad."

[0035] For discussion purposes, the following discussion of substrates and subsequent schematic diagrams will include Figure 4B Half view 199 shown in .

[0036] exist Figure 1 In operation 188, an oxide is deposited on the substrate. In various embodiments, the oxide can have the same composition as the oxide deposited in the ONON stack. In various embodiments, the oxide deposited on the substrate is deposited at a deposition temperature different from the deposition temperature used to deposit the oxide layer in the ONON stack. The deposition temperature can be between room temperature and about 600° C. A vertical gap is then etched into the substrate after the oxide is deposited.

[0037] Figure 5A An exemplary substrate 100 is shown including an ONON step, a hard mask 110, and an oxide 122 deposited on the substrate. Figure 5B A side view of substrate 100 is shown after etching of vertical slits 130 .

[0038] In operation 190, the nitride is selectively etched relative to the oxide on the substrate. The etching can be performed using a selective dry etching process, such as by exposing the substrate to any one or more of the following gases: chlorine (Cl2), oxygen (O2), nitrous oxide (N2O), tetrafluoromethane (CF4), sulfur tetrafluoride (SF4), carbon dioxide (CO2), fluoromethane (CH3F), nitrogen trifluoride (NF3), nitrogen (N2), hydrogen (H2), ammonia (NH3), methane (CH4), sulfur hexafluoride (SF6), argon (Ar), carbonyl sulfide (COS), carbon disulfide (CS2), hydrogen sulfide (H2S) and nitric oxide (NO). This operation removes the nitride layer from the ONON stack, allowing the etching species to flow into the vertical gap and selectively etch the nitride. It should be understood that selective etching involves etching the first material at a faster rate than the rate at which the second material is etched. For example, selectively etching the nitride relative to the oxide means etching the nitride at a faster rate than the rate at which the oxide is etched. The nitride is selectively etched using a wet etching process, such as by exposing the substrate to phosphoric acid (H3PO4) and / or dilute hydrofluoric acid ("DHF") or a mixture of these solutions. However, conventional techniques for selectively removing nitrides risk degradation and removal of oxide material at various interfaces, such as at the oxide-oxide interface at the end of each step. Fig. 6AAn exemplary schematic diagram of a substrate 100 is shown having a horizontal gap 132 formed by etching nitride, but as shown in the enlarged view depicted in the circle at 170, a gap 134 is formed at the oxide-oxide interface due to etching species flowing into the gap 132 and etching away the oxide during the etching operation. Figure 6B A side view of a cross section of the substrate is shown whereby gaps 132 are formed by selectively etching the nitride.

[0039] In operation 192, tungsten is deposited into the gap of the substrate to form a tungsten wordline. The tungsten may be deposited by any suitable technique, such as ALD, CVD, PEALD, and / or PECVD. In some embodiments, a barrier layer and / or a tungsten nucleation layer is deposited prior to depositing the bulk tungsten. Fig. 7A An example of a substrate 100 is shown including a deposited tungsten wordline 140. However, due to degradation of the oxide at the oxide-oxide interface, as shown in the enlarged view at 170, tungsten fills in the gap at 141, thereby connecting the two wordlines, potentially causing a short circuit. Figure 7B A schematic diagram of a cross section of the substrate of 7A is shown in side view, with tungsten 140 deposited in the gaps where nitride was previously located.

[0040] return Figure 1 , in operation 194, the oxide is vertically etched to form a via. The oxide may be etched by using a dry etch exposed to one or more of the following gases: O2, Ar, C4F6, C4F8, SF6, CHF3, and CF4. Figure 8 An exemplary substrate 100 including an ONON stack in a staircase pattern is shown, whereby vias 137 are etched in oxide 122. However, due to the thinness of the tungsten wordline layer and the duration used to ensure that the vertical etch of the oxide is sufficient to etch the deepest via (e.g., 137b), the etching species flows into the via etched for the shallow portion of the oxide (e.g., 137a), thereby etching through the tungsten layer (136) and even etching through another oxide layer (138). This causes the contact to punch through or break through to the underlying layer.

[0041] exist Figure 1 In operation 196, tungsten is deposited in the vias to form interconnects with the tungsten word lines. Fig. 9 As shown, since the shallow vias break through to the underlying layers due to the duration used to etch the deep vias, tungsten fills the vias (see tungsten filled vias 142) and causes Fig. 9The vias may have a depth between about 1 micron and about 12 microns. A shallow via may be defined as having a depth less than 3.0 microns, such as a depth between about 1.5 microns and 3.0 microns. A deep via may have a depth greater than 3.0 microns. The critical dimension of the via formed in the oxide may be between about 50 nm and about 500 nm. The vias may be etched using a dry etch process that may involve a masking operation to pattern the oxide.

[0042] Conventional techniques for forming 3D NAND structures result in degradation at the oxide-oxide interface during the selective removal of nitride and punch-through tungsten word lines when etching vias of varying depths. Current techniques involve a large number of etching techniques performed by masking areas of the substrate using various chemistries and patterning processes to etch vias of varying depths using different chemistries and process conditions. These processes reduce yield and reduce the efficiency of the manufacturing process.

[0043] Provided herein are methods and apparatus for forming a 3D NAND structure without degrading the oxide-oxide interface and without punch-through tungsten word lines by depositing an encapsulation layer on a step pattern to serve as both a material for improving etch selectivity during nitride etching and an etch stop layer for forming vias on the tungsten word lines to a pad. The encapsulation layer is a conformal carbon-containing layer deposited using ALD and / or CVD techniques.

[0044] Fig.10 is a process flow diagram of operations of a method performed according to certain disclosed embodiments. Operations 1082 and 1084 may be respectively Figure 1 Operations 182 and 184 are the same or similar. In operation 1086, a staircase pattern is formed on the substrate. Operation 1086 may be the same as described above. Figure 1 The same or similar to operation 186. After depositing the ONON stack, a trench may be etched in the substrate.

[0045] In operation 1202, a carbon-containing encapsulation layer is deposited on the step before depositing oxide on the substrate in operation 1088. The carbon-containing encapsulation layer can be any one of silicon carbide (SiC), oxygen-doped silicon carbide (SiCO), nitrogen-doped silicon carbide (SiCN), boron and nitrogen-doped silicon carbide (SiBCN), and combinations thereof. The precursors and reactants used to form the carbon-containing encapsulation layer depend on the chemistry or material of the deposited carbon-containing encapsulation layer.

[0046] The carbon-containing encapsulation layer can be deposited at a suitable deposition temperature between about 100° C. and about 700° C., or between about 150° C. and about 400° C., such as about 400° C. In various embodiments, the chamber pressure of the chamber containing the substrate during the deposition of the carbon-containing encapsulation layer can be selected according to the deposition chemistry used and the substrate on which the encapsulation layer is deposited. For example, in some embodiments, the chamber pressure can be between about 1 Torr and about 10 Torr, or between about 1.5 Torr and about 7 Torr.

[0047] The carbon-containing encapsulation layer is a conformal film deposited using ALD or CVD. In various embodiments, a remote plasma CVD process can be used to deposit the carbon-containing encapsulation layer. In some embodiments, the deposited film is conformal. The conformality of the film can be measured by step coverage. The "step coverage" used here is calculated by dividing the average thickness of the deposited film on the feature sidewall by the average thickness of the deposited film at the top of the feature and multiplying it by 100 to obtain a percentage. The disclosed embodiments can deposit a film with a step coverage of at least about 50%, or at least about 95%, or about 100%, or 100%. Although conformal films can be used in various embodiments, in some embodiments, the carbon-containing encapsulation layer may not necessarily be conformal. Interestingly, in various embodiments, a film with poor step coverage can still be deposited while still having effective encapsulation layer properties. The material in the flat portion of the feature is used as an etch stop layer, so it is deposited to a sufficient thickness so as to substantially or completely cover the horizontal flat portion of the feature. In contrast, the material on the sidewall is not necessarily a dry etch stop layer. The material on the sidewalls serves as a wet etch stop (during SiN removal) and its thickness on the sidewalls may not be critical as long as there is sufficient etch selectivity during SiN removal. However, it is still desirable that the film quality on the sidewalls is as good as the top and bottom. While PECVD may not result in high quality films on both the sidewalls and bottom, deposition using remote plasma CVD may be more appropriate.

[0048] The thickness of the encapsulation layer depends on the thickness of the ONON stack.In various embodiments, the encapsulation layer is deposited to a thickness between about 1 nm and about 350 nm.

[0049] The encapsulation layer includes carbon to achieve high wet etch selectivity, so that the encapsulation layer is etched at a much slower rate than the rate of etching the nitride during the wet etch of the nitride. For example, for an oxygen-doped silicon carbide layer with a dielectric constant of 4.5, the wet etch rate in H3PO4 and 100:1 DHF (dilute hydrofluoric acid) is close to 0, while the wet etch rate of Si3N4 in H3PO4 is close to and in 100:1DHF is approximately

[0050] The material for the carbon-containing encapsulation layer is selected depending on the nitride and oxide films on the substrate so that the dry etch selectivity of the oxide to the carbon-containing encapsulation layer is between about 2: 1 and about 100: 1, or between about 20: 1 and about 50: 1. This allows the encapsulation layer to act as an etch stop layer in a subsequent etch for forming vias in the oxide.

[0051] An example of a process for depositing a carbon-containing encapsulation layer as described herein may include the following operations. Precursor molecules for depositing silicon carbide may include silicon-containing molecules having silicon-hydrogen (Si-H) bonds and / or silicon-silicon (Si-Si) bonds, and silicon-carbon (Si-C) bonds. In some embodiments, the precursor molecules for depositing a silicon carbide carbon-containing encapsulation layer may be silicon-containing and carbon-containing precursors. Precursor molecules for depositing carbon oxide include silicon-containing molecules having silicon-hydrogen (Si-H) bonds and / or silicon-silicon (Si-Si) bonds, and silicon-oxygen (Si-O) bonds, and / or silicon-carbon (Si-C) bonds. Precursor molecules for depositing silicon carbonitride include silicon-containing molecules having silicon-hydrogen (Si-H) bonds and / or silicon-silicon (Si-Si) bonds, and silicon-nitrogen (Si-N) bonds, and / or silicon-carbon (Si-C) bonds. Precursor molecules for depositing carbon oxynitride silicon include silicon-hydrogen (Si-H) bonds, and / or silicon-silicon (Si-Si) bonds, and silicon-nitrogen (Si-N) bonds, silicon-oxygen (Si-O) bonds, and / or silicon-carbon (Si-C) bonds containing silicon molecules. In some embodiments, the silicon-containing precursor may include reactants with Si-O bonds and reactants with Si-C bonds. It should be understood that any number of suitable reactants can be used within the scope of the present invention. The silicon-containing precursor includes one or more Si-H bonds and / or one or more Si-Si bonds. In the deposition process, the Si-H bonds and / or Si-Si bonds are broken and used as active sites to form bonds between silicon-containing precursors in the deposited silicon carbide film as a carbon-containing encapsulation layer. The broken bonds can also be used as sites for crosslinking in the heat treatment performed during or after deposition. Bonding and crosslinking at the active sites can jointly form a primary backbone or matrix in the resulting silicon carbide film as a carbon-containing encapsulation layer. Although silicon carbide films are described herein as exemplary carbon-containing encapsulation layers, it should be understood that other carbon-containing encapsulation layers may be deposited. For example, the carbon-containing encapsulation layer may include any of silicon carbide, oxygen-doped silicon carbide, nitrogen-doped silicon carbide, boron- and nitrogen-doped silicon carbide, and combinations thereof. Further, it should be understood that in some embodiments, the carbon-containing encapsulation layer may include one or more layers of a carbon-containing material having any one or more of the above materials, and in some cases may be referred to as a carbon-containing encapsulation film.

[0052] As discussed, the precursors used in forming the silicon carbide film may include silicon-containing precursors, wherein at least some of the silicon-containing precursors have at least one Si-H bond and / or at least one Si-Si bond. In certain embodiments, the silicon-containing precursor has at most one hydrogen atom on each silicon atom. Thus, for example, a precursor having one silicon atom has at most one hydrogen atom bonded to the silicon atom; a precursor having two silicon atoms has one hydrogen atom bonded to one silicon atom and optionally another hydrogen atom bonded to a second silicon atom; a precursor having three silicon atoms has at least one hydrogen atom bonded to one silicon atom and optionally one or more hydrogen atoms bonded to the remaining one or two silicon atoms, and so on. In addition, the silicon-containing precursor may include at least one Si-O bond, at least one Si-N bond, and / or at least one Si-C bond. While any number of suitable precursors may be used during the formation of the silicon carbide film, at least some of the precursors will include silicon-containing precursors having at least one Si-H bond or Si-Si bond and optionally at least one Si-O bond, Si-N bond, and / or Si-C bond. In various embodiments, one or more silicon-containing precursors do not contain OC bonds or NC bonds; for example, one or more precursors do not contain alkoxy groups (-OR), where R is an organic group, such as a hydrocarbon group or an amine (-NR1R2) group, where R1 and R2 are each independently hydrogen or an organic group.

[0053] In some embodiments, at least some of the carbon provided for the silicon carbide film is provided by one or more hydrocarbon moieties on the silicon-containing precursor. These moieties can be selected from alkyl, alkenyl, alkynyl, aryl, etc. In some embodiments, the hydrocarbon group has a single carbon atom to minimize the steric hindrance of the cleavage reaction of Si-H and / or Si-Si bonds during deposition. However, the precursor is not limited to a single carbon group; a larger number of carbon atoms, such as 2, 3, 4, 5 or 6 carbon atoms, can be used. In some embodiments, the hydrocarbon group is linear. In some embodiments, the hydrocarbon group is cyclic.

[0054] In some embodiments, the silicon-containing precursor falls into one chemical class. It should be understood that other chemical classes of silicon-containing precursors may also be employed, and the silicon-containing precursors are not limited to the chemical classes discussed below.

[0055] In some embodiments, the silicon-containing precursor can be a siloxane. In some embodiments, the siloxane can be cyclic. Cyclic siloxanes can include cyclotetrasiloxanes, such as 2,4,6,8-tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), and hexamethylcyclotetrasiloxane (HMCTS). Other cyclic siloxanes can also include, but are not limited to, cyclotrisiloxane and cyclopentasiloxane. An embodiment using cyclic siloxanes is that pores can be introduced into the annular structure of the oxygen-doped silicon carbide film, wherein the size of the pores corresponds to the radius of the ring. For example, a cyclotetrasiloxane ring can have a radius of about 10000. The radius of .

[0056] In some embodiments, siloxane can have three-dimensional or cage structure.Cage siloxane has silicon atoms bridged to each other via oxygen atoms to form a polyhedron or any 3-D structure.The example of cage siloxane precursor molecule is silsesquioxane (silsesquioxane).Cage siloxane structure is further described in detail in the U.S. Patent No. 6,576,345 co-owned by Cleemput et al., which is incorporated herein by reference for all purposes.Similar to cyclic siloxane, cage siloxane can introduce pores into oxygen-doped silicon carbide membranes.In some embodiments, the pore size is mesoporous.

[0057] In some embodiments, the siloxane may be linear. Examples of suitable linear siloxanes include, but are not limited to, disiloxanes such as pentamethyldisiloxane (PMDSO) and tetramethyldisiloxane (TMDSO); and trisiloxanes such as hexamethyltrisiloxane, heptamethyltrisiloxane.

[0058] In some embodiments, the silicon-containing precursor can be an alkylsilane or other hydrocarbyl-substituted silane. The alkylsilane includes a central silicon atom, one or more alkyl groups bonded to the central silicon atom, and one or more hydrogen atoms bonded to the central silicon atom. In certain embodiments, any one or more of the alkyl groups contain 1 to 5 carbon atoms. The hydrocarbyl group can be saturated or unsaturated (e.g., olefins (such as ethylene), alkynes, and aromatic groups). Examples include, but are not limited to, trimethylsilane (3MS), triethylsilane, pentamethyldisilane ((CH3)2Si-CH2-Si(CH3)3) and dimethylsilane (2MS).

[0059] In some embodiments, the silicon-containing precursor can be an alkoxysilane. The alkoxysilane includes a central silicon atom and one or more alkoxy groups bonded to the central silicon atom and one or more hydrogen atoms bonded to the central silicon atom. Examples include, but are not limited to, trimethoxysilane (TMOS), dimethoxysilane (DMOS), methoxysilane (MOS), methyldimethoxysilane (MDMOS), diethoxymethylsilane (DEMS), dimethylethoxysilane (DMES) and dimethylmethoxysilane (DMMOS).

[0060] In addition, disilane, trisilane or other higher silanes can be used instead of monosilane. An example of such disilane from alkylsilanes is hexamethyldisilane (HMDS). Another example of disilane from alkylsilanes can include pentamethyldisilane (PMDS). Other types of alkylsilanes can include alkylcarbosilanes, which can have a branched polymeric structure with carbon bonded to silicon atoms and alkyl groups bonded to silicon atoms. Examples include dimethyltrimethylsilylmethane (DTMSM) and bis-dimethylsilylethane (BDMSE). In some embodiments, one of the silicon atoms can have a carbon-containing group or a hydrocarbon-containing group connected to it, and one of the silicon atoms can have a hydrogen atom connected to it.

[0061] During the deposition of silicon carbide, a variety of silicon-containing precursors may be present in the process gas. For example, siloxane and alkylsilane may be used together, or siloxane and alkoxysilane may be used together. The relative proportions of the various precursors may be selected based on the chemical structure of the selected precursor and the application of the resulting silicon carbide film.

[0062] In some embodiments, the process conditions may substantially maintain the Si-C bonds in the as-deposited silicon carbide film layer, as well as the Si-O bonds and Si-N bonds if present. Thus, the reaction conditions adjacent to the substrate provide for selectively destroying Si-H bonds and / or Si-Si bonds, for example, extracting hydrogen from the destroyed Si-H bonds, but the reaction conditions do not provide for extracting oxygen from Si-O bonds, nitrogen from Si-N bonds, or carbon from Si-C bonds. However, as discussed below, the introduction of co-reactants such as oxygen can extract carbon from Si-C bonds. Typically, the described reaction conditions exist on the exposed surface of the substrate (the surface where the silicon carbide film 101 is deposited). They may also exist at a distance above the substrate, for example, at about 0.5 microns to about 150 millimeters above the substrate. In practice, the activation of the precursor may occur in the gas phase at a considerable distance above the substrate. Typically, the relevant reaction conditions will be uniform or substantially uniform across the entire exposed surface of the substrate, but some applications may allow for some variation.

[0063] In addition to the silicon-containing precursor, the environment near the workpiece (e.g., substrate 100) may include one or more free radical species, preferably free radical species in a substantially low energy state. Examples of these species include hydrogen atom free radicals. In some embodiments, all, or substantially all, or a considerable portion of the hydrogen atom free radicals may be in the ground state, for example, at least about 90% or 95% of the hydrogen atom free radicals near the workpiece are in the ground state. In certain embodiments, the gas source is provided in a carrier gas (e.g., helium). In various embodiments, hydrogen can be the source gas. As an example, hydrogen can be provided in a helium carrier at a concentration of about 1-10%. The pressure, the ratio of the carrier gas (e.g., helium), and other process conditions are selected so that the hydrogen atoms collide with the substrate 100 as free radicals in a low energy state without recombination.

[0064] Hydrogen may be supplied to a remote plasma source to generate hydrogen atom radicals or hydrogen radicals. Once generated, the hydrogen atom radicals may be in an excited energy state. For example, hydrogen in an excited energy state may have an energy of at least 10.2 eV (first excited state). Excited hydrogen atom radicals may lead to non-selective decomposition of silicon-containing precursors. For example, hydrogen atom radicals in an excited state may easily destroy Si-H bonds, Si-Si bonds, Si-N bonds, Si-O bonds, and Si-C bonds, which may change the composition or physical properties or electrical properties of the silicon carbide film 101. In some embodiments, when the excited hydrogen atom radicals lose their energy or relax, the excited hydrogen atom radicals may become hydrogen atom radicals in a substantially low energy state or in a ground state. Hydrogen atom radicals in a substantially low energy state or in a ground state are capable of selectively destroying Si-H bonds and Si-Si bonds, while typically retaining Si-O bonds, Si-N bonds, and Si-C bonds. In some implementations, process conditions may be provided such that the excited hydrogen atom radicals lose energy or release to form substantially low energy or ground state hydrogen atom radicals. For example, the remote plasma source or associated components may be designed such that the residence time of hydrogen atom radicals diffused from the remote plasma source to the substrate is greater than the energetic relaxation time of the excited hydrogen atom radicals. The energetic relaxation time of the excited hydrogen atom radicals may be approximately equal to or less than approximately 1×10 -3 Second.

[0065] The state in which a considerable portion of hydrogen atom radicals are in the ground state can be achieved by various techniques. As described below, some devices are designed to achieve this state. Device features and process control features can be tested and adjusted to produce a mild state, in which a considerable portion of hydrogen atom radicals are in the ground state. For example, the device can be operated and tested for charged particles downstream of the plasma source (i.e., near the substrate 100). The process and device can be adjusted until there is substantially no charged material near the substrate. In addition, the features of the device and process can be adjusted to a configuration in which these devices and processes begin to produce silicon carbide films from standard precursors (e.g., trimethylsilane). Relatively mild conditions that support the deposition of this film are selected.

[0066] In some embodiments, the process conditions employ free radical species in a substantially low energy state sufficient to break Si-H bonds and / or Si-Si bonds while substantially maintaining Si-O bonds, Si-N bonds, and Si-C bonds. Such process conditions may not have a significant amount of ions, electrons, or free radical species in a high energy state (e.g., a state above the ground state). In some embodiments, the ion concentration in the region adjacent to the membrane is no more than about 10 7 / cm 3 The presence of large numbers of ions or high-energy radicals can tend to break Si-O, Si-N, and Si-C bonds, which can produce films with non-ideal electrical properties (e.g., high dielectric constant and / or low breakdown voltage) and poor conformality.

[0067] In an environment adjacent to the substrate, the silicon-containing precursor is usually transported with other substances (particularly carrier gas). In some implementations, the silicon-containing precursor exists together with free radical substances and other substances (including other active substances and / or carrier gas). In some embodiments, the silicon-containing precursor can be introduced as a mixture. In the upstream of the deposition reaction surface, the silicon-containing precursor can be mixed with an inert carrier gas. Examples of inert carrier gases include but are not limited to nitrogen (N2), argon (Ar) and helium (He). In addition, the silicon-containing precursor can be introduced into a mixture with primary and secondary substances, and secondary substances containing some elements or structural features (e.g., annular structures, cage structures, unsaturated bonds, etc.) are present in the silicon carbide film at a relatively low concentration. A variety of precursors can exist in equimolar or relatively similar ratios to be suitable for forming a primary backbone or matrix in the resulting silicon carbide film. In other embodiments, the relative amounts of different precursors are significantly deviated from equimolar ratios (equimolarity).

[0068] In some embodiments, one or more silicon-containing precursors provide substantially all of the mass of the deposited silicon carbide film, with a small amount of hydrogen or other elements from the remote plasma providing less than about 5% atomic mass of the film or less than about 2% atomic mass of the film. In some embodiments, only free radical species and one or more silicon-containing precursors contribute to the composition of the deposited silicon carbide film. In other embodiments, the deposition reaction includes other co-reactants rather than one or more silicon-containing precursors and free radical species. Examples of such co-reactants include carbon dioxide (CO2), carbon monoxide (CO), water (H2O), methanol (CH3OH), oxygen (O2), ozone (O3), nitrogen (N2), nitrous oxide (N2O), ammonia (NH3), diazene (N2H2), methane (CH4), ethane (C2H6), acetylene (C2H2), ethylene (C2H4), diborane (B2H6), and combinations thereof. Such materials can be used as nitriding agents, oxidizing agents, reducing agents, and the like. In some cases, they can be used to adjust the amount of carbon in the deposited film by removing a portion of the carbon provided with the silicon-containing precursor. In some implementations using non-hydrogen co-reactants, the co-reactant is introduced into the reaction chamber via the same flow path as the silicon-containing precursor; for example, a path including a showerhead, which is generally not directly exposed to the plasma. In some embodiments, oxygen and / or carbon dioxide are introduced with the precursor to change the composition of the silicon carbide film by removing carbon from the film or precursor during deposition. In some implementations using non-hydrogen co-reactants, the co-reactant is introduced into the reaction chamber via the same flow path as hydrogen, so that the co-reactant is at least partially converted into free radicals and / or ions. In such an implementation, both hydrogen radicals and co-reactant radicals react with one or more silicon-containing precursors to produce a deposited silicon carbide film.

[0069] In certain embodiments where a co-reactant is used and the co-reactant is introduced into the chamber together with the substance to be converted into free radicals (e.g., hydrogen), the co-reactant may be provided to the reaction chamber in a relatively small amount compared to other gases in the reaction chamber, including the free radical source (e.g., hydrogen) and any one or more carrier gases (e.g., helium). For example, the co-reactant may be present in the process gas at a mass ratio of about 0.05% or less, or a mass ratio of about 0.01% or less, or a mass ratio of about 0.001% or less. For example, the reactant mixture (which enters the plasma source) may be about 10-20 liters / minute (L / m) of He, about 200-500 standard cubic centimeters / minute (sccm) of H2, and about 1-10 sccm of oxygen. When the co-reactant is introduced into the reaction chamber together with the silicon-containing precursor (e.g., through a showerhead), the co-reactant may be present in a higher concentration; for example, about 2% or less, or about 0.1% or less. When the co-reactant is a relatively weak reactant (eg, a weak oxidant such as carbon dioxide), it may be present at even higher concentrations, such as about 10% or less, or about 4% or less.

[0070] The carbon-containing encapsulation layer can be deposited by various techniques. U.S. Patent Application Publication No. 2013 / 0330935, filed on June 12, 2012, entitled “REMOTEPLASMA BASE DEPOSITION OF SiOC CLASS OF FILMS,” and U.S. Patent Application Publication No. 2015 / 0303056, filed on February 6, 2015, entitled “CONFORMAL DEPOSITION OF SILICON CARBIDE FILMS,” U.S. Patent No. 9,371,579, filed on October 24, 2013 and published on June 21, 2016, entitled “GROUND STATE HYDROGEN RADICAL SOURCES FOR CHEMICAL VAPOR DEPOSITION OF SILICON-CARBON-CONTAINING FILMS,” and U.S. Patent Application Publication No. 2015 / 0303056, filed on February 6, 2015, entitled “CONFORMAL DEPOSITION OF SILICON CARBIDE FILMS,” U.S. Patent No. 9,371,579, filed on October 24, 2013 and published on June 21, 2016, entitled “GROUND STATE HYDROGEN RADICAL SOURCES FOR CHEMICAL VAPOR DEPOSITION OF SILICON-CARBON-CONTAINING FILMS,” and U.S. Patent No. 9,371,579, filed on May 31, 2013, entitled “METHOD TO OBTAIN SIC CLASS OF FILMS OF DESIRED COMPOSITION AND FILM PROPERTIES”, all of which are incorporated herein by reference in their entirety.

[0071] An example of a process for depositing a carbon-containing encapsulation layer as described herein may include the following operations. The carbon-containing encapsulation layer may be deposited by ALD. ALD is a technique for depositing thin layers of material using sequential self-limiting reactions. Typically, an ALD cycle includes the following operations: delivering and adsorbing at least one reactant to a substrate surface, and then reacting the adsorbed reactant with one or more reactants to form a partial layer of a film. As an example, a silicon carbide deposition cycle may include the following operations: (i) delivering / adsorbing a silicon precursor, (ii) removing a silicon precursor from a chamber, (iii) delivering a carbon-containing reactant and optionally a plasma, and (iv) removing a carbon-containing gas and / or plasma from the chamber.

[0072] Unlike chemical vapor deposition (CVD) technology, the ALD process uses a surface-mediated deposition reaction to deposit films layer by layer. In one example of an ALD process, a substrate surface including a group of surface active sites is exposed to a first precursor (e.g., a silicon precursor) distributed in a gas phase and provided to a chamber containing the substrate in a dosed manner. The molecules of the first precursor are adsorbed onto the substrate surface, including chemically adsorbed substances and / or physically adsorbed molecules of the first precursor. It should be understood that when a compound is adsorbed onto the substrate surface as described herein, the adsorption layer may include the compound and a derivative of the compound. For example, the adsorption layer of a silicon precursor may include a silicon precursor and a derivative of a silicon precursor. After the first precursor is dosed, the chamber is then evacuated to remove most or all of the first precursor retained in the gas phase, so that most or only the adsorbed substances remain. In some implementations, the chamber may not be completely evacuated. For example, the chamber may be evacuated so that the partial pressure of the first precursor in the gas phase is low enough to mitigate the reaction. A second reactant such as a carbon-containing reactant is introduced into the chamber so that some of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after the activation source is applied in time. In some embodiments, the plasma is ignited during the dosing of the second reactant. The chamber can then be evacuated again to remove unbound second reactant molecules. As described above, in some embodiments, the chamber may not be completely evacuated. Additional ALD cycles can be used to build film thickness.

[0073] In certain embodiments, the ALD first precursor dose partially saturates the substrate surface. In some embodiments, the dosing phase of the ALD cycle ends before the precursor contacts the substrate to uniformly saturate the surface. Typically, the precursor flow is shut down or diverted at this point, and only the purge gas flows. By operating in this subsaturated state, the ALD process reduces the cycle time and increases the yield. However, since the precursor adsorption is not limited by saturation, the adsorbed precursor concentration may vary slightly across the substrate surface. An example of an ALD process operating in a subsaturated state is provided in U.S. Patent Application No. 14 / 061,587 (now U.S. Patent No. 9,355,839), filed on October 23, 2013, entitled "SUB-SATURATED ATOMIC LAYER DEPOSITION AND CONFORMAL FILMDEPOSITION," which is incorporated herein by reference in its entirety.

[0074] As described, in some embodiments, the ALD method includes plasma activation. As described herein, the ALD method and apparatus described herein can be a conformal film deposition (CFD) method, which is generally described in U.S. Patent Application No. 13 / 084,399, filed on April 11, 2011, entitled "PLASMA ACTIVATED CONFORMAL FILM DEPOSITION" (U.S. Patent No. 8,728,956) and U.S. Patent Application No. 13 / 084,305, filed on April 11, 2011, entitled "SILICON NITRIDE FILMS AND METHODS", the entire contents of which are incorporated herein by reference.

[0075] In some embodiments, a plasma may be used during deposition, such as during exposure of a carbon-containing reactant. Plasma energy may be provided to activate a second reactant (e.g., a carbon-containing gas) into ions and radicals and other activated species that react with the adsorbed layer of the first precursor. In various embodiments, the plasma is an in-situ plasma such that the plasma is formed just above the substrate surface in the chamber. The plasma may be provided at a power of between about 0.2122 W / cm 2 and about 2.122W / cm 2The power / substrate area between 200W and 250W is used to ignite the in-situ plasma. For example, for a chamber processing four 300mm wafers, the power can be in the range of from about 150W to about 6000W, or from about 600W to about 6000W, or from about 800W to about 4000W. For example, a plasma for an ALD process can be generated by applying a radio frequency (RF) field to the gas using two capacitive coupling plates. The gas between the RF field ionization plates is ignited with plasma, and free electrons are generated in the plasma discharge region. These electrons are accelerated by the RF field and may collide with gas phase reactant molecules. The collision of these electrons with reactant molecules may form free radical species that participate in the deposition process. It should be understood that the RF field can be coupled via any suitable electrode. In various embodiments, a high frequency plasma with a frequency of at least about 13.56MHz, or at least about 27MHz, or at least about 40MHz, or at least about 60MHz is used. In some embodiments, a microwave-based plasma can be used. Non-limiting examples of electrodes include process gas distribution showerheads and substrate support bases. It should be understood that the plasma used for the ALD process can be formed by one or more suitable methods other than capacitive coupling of an RF field with a gas. In some embodiments, the plasma is a remote plasma such that the second reactant is ignited in a remote plasma generator upstream of the chamber and then transported to the chamber containing the substrate.

[0076] To deposit the encapsulation layer by ALD, one or more cycles may be used to build up the deposition thickness.

[0077] Fig.11 An exemplary substrate 1100 having alternating layers of oxide (1111) and nitride (1112) etched in a staircase pattern is shown with a hard mask 1110 and an encapsulation layer 1180 conformally deposited over the staircase pattern.

[0078] return Fig.10 , in operation 1088, an oxide is deposited on the substrate. Fig.12 As shown, oxide 1122 is deposited on the substrate and therefore also on the encapsulation layer 1180. The deposition techniques and process conditions may be as described above with respect to Figure 1 Any of those described in operation 188.

[0079] In operation 1090, the nitride is selectively etched relative to the oxide. The etching process and process conditions may be as described above with respect to Figure 1 Any of those described for operation 110 . Fig.13Schematic diagram of an exemplary substrate 1100 with nitride removed to form gaps 1132 between oxide layers 1111. Note that in the enlarged view 1170 of the oxide-oxide interface, encapsulation layer 1180 prevents the oxide-oxide interface from degrading, thereby preserving oxide layer 1111 and oxide 1122 and leaving gaps 1132 between the oxide layers. Fig. 6A compared to, Fig.13 It is shown that no gap is formed between the oxide layer 1111 and the oxide 122 due to the encapsulation layer 1180 previously deposited on the stepped structure. The encapsulation layer has a low wet etch rate relative to the nitride, so that the nitride is removed without removing the encapsulation layer. The wet etch rate selectivity of the nitride to the carbon-containing encapsulation layer can be greater than about 10 to infinity; in some embodiments, the wet etch rate selectivity can be between about 10 and about 100. In various embodiments, a high-quality silicon carbide film having a zero or near-zero wet etch rate in dilute hydrofluoric acid can be used as the carbon-containing encapsulation layer, so that the wet etch rate selectivity of the nitride can reach infinity.

[0080] return Fig.10 In operation 1092, tungsten is deposited into the substrate to form a tungsten word line. This operation can be performed as described above with respect to Figure 1 Operation 192 may be performed using any of the techniques or process conditions described herein. Fig.14 A schematic diagram of an exemplary substrate 1100 is shown whereby tungsten 1140 is deposited into the gaps between oxide layers 1111. As shown in the enlarged view at 1170, no gaps are formed in the oxide layers 1111 due to the presence of the encapsulation layer 1180, so the tungsten 1140 is deposited in the gaps between the oxide layers 1111 without forming connections between the tungsten word lines.

[0081] return Fig.10 In operation 1204, the oxide is etched using the encapsulation layer as an etch stop layer to form a via. This operation may be performed as described above with respect to Figure 1 The etching process may be performed using any of the techniques, chemistries, and process conditions described in operation 194 of . For example, a dry etching process may be used that has an etch selectivity to etch the oxide at a faster rate than the carbon-containing encapsulation layer. The etch selectivity ratio of the oxide to the carbon-containing encapsulation layer may be between about 4 and about 8. Since the carbon-containing encapsulation layer etches at a much slower rate than the oxide, the carbon-containing encapsulation layer prevents punch-through of the tungsten word line at the pad when etching deeper vias. Fig.15An exemplary schematic diagram of substrate 1100 is shown, wherein when etching deeper via 1137b, since encapsulation layer 1180 serves as an etch stop layer, pad at 1172a may be subjected to exposure to a dry etching substance in via 1137a after via 1137a is formed in oxide 1122. Substrate 1100 may be exposed to the etching substance for a duration sufficient to form via 1137b until encapsulation layer 1180 is exposed at 1172b.

[0082] return Fig.10 , in operation 1206, the carbon-containing encapsulation layer is selectively etched to expose the tungsten word lines. Fig.16 An exemplary schematic diagram of a substrate 1100 is shown, wherein encapsulation layer 1181 is etched at 1139 to expose tungsten word lines 1140. The encapsulation layer may be etched using any suitable etch chemistry, such as a dry etch chemistry.

[0083] return Fig.10 In operation 1096, tungsten is deposited into the vias to form interconnects with the tungsten word lines. The techniques and process conditions may be as described above with respect to Figure 1 Any of those described for operation 196. Fig.17 An example is shown in FIG. 1 , where tungsten 1142 is deposited into a via to form an interconnect with a tungsten word line 1140, for example at 1173. Fig. 9 Unlike conventional 3D-type vias, since the encapsulation layer acts as an etch stop layer during the formation of the through-holes, no short circuit is formed. Device

[0084] Fig.18 A schematic diagram of an embodiment of an atomic layer deposition (ALD) and / or chemical vapor deposition (CVD) processing station 1800 having a processing chamber body 1802 for maintaining a low pressure environment is depicted. Multiple processing stations may be included in a common low pressure processing tool environment. For example, Fig.19 One embodiment of a multi-station processing tool 1900 is depicted. In some embodiments, one or more hardware parameters of the ALD processing station 1800 (including those discussed in detail below) can be programmatically adjusted by one or more computer controllers 1850.

[0085] The processing station 1800 is in fluid communication with a reactant delivery system 1801a for delivering process gases to a distribution showerhead 1806. The reactant delivery system 1801a includes a mixing vessel 1804 for mixing and / or conditioning process gases, such as silicon precursor gases, or second reactant gases (e.g., carbon-containing reactants), for delivery to the showerhead 1806. One or more mixing vessel inlet valves 1820 can control the introduction of process gases into the mixing vessel 1804. Plasma can also be delivered to the showerhead 1806 or can be generated in the processing station 1800. The reactant delivery system 1801a can be configured to deliver process gases for depositing a carbon-containing encapsulation layer on a substrate provided in the processing station 1800.

[0086] As an example, Fig.18 Embodiments include a vaporization point 1803 for vaporizing liquid reactants to be supplied to a mixing container 1804. In some embodiments, the vaporization point 1803 may be a heated vaporizer. The saturated reactant vapor produced by such a vaporizer may condense in a downstream delivery pipeline. Incompatible gases exposed to condensed reactants may produce small particles. These small particles may clog the pipeline, hinder valve operation, contaminate substrates, and the like. Some methods to solve these problems involve cleaning and / or evacuating the delivery pipeline to remove residual reactants. However, cleaning the delivery pipeline may increase the processing station cycle time and reduce the throughput of the processing station. Therefore, in some embodiments, the delivery pipeline downstream of the vaporization point 1803 may be heat traced. In some examples, the mixing container 1804 may also be heat traced. In a non-limiting example, the pipeline downstream of the vaporization point 1803 has an increased temperature distribution extending from about 100°C to about 150°C at the mixing container 1804.

[0087] In some embodiments, liquid precursors or liquid reactants can be vaporized at the liquid injector. For example, the liquid injector can inject a pulse of liquid reactants into the carrier gas flow upstream of the mixing container. In one embodiment, the liquid injector can vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another example, the liquid injector can atomize the liquid into dispersed droplets, which are then vaporized in a heated delivery pipe. Smaller droplets evaporate faster than larger droplets, thereby reducing the delay between liquid injection and complete vaporization. Faster evaporation can reduce the length of the pipeline downstream of the vaporization point 1803. In one case, the liquid injector can be directly mounted to the mixing container 1804. In another case, the liquid injector can be directly mounted to the spray head 1806.

[0088] In some embodiments, a liquid flow controller (LFC) upstream of the vaporization point 1803 can be provided to control the mass flow of the liquid for vaporization and delivery to the processing station 1800. For example, the LFC can include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to the feedback control signal provided by the proportional-integral-differential (PID) controller that communicates with the MFM. However, it may take one second or longer to stabilize the liquid flow using feedback control. This may extend the dosing time of the liquid reactant. Therefore, in some embodiments, the LFC can be dynamically switched between the feedback control mode and the direct control mode. In some embodiments, this can be performed by disabling the sensing tube and PID controller of the LFC.

[0089] The showerhead 1806 distributes the process gas to the substrate 1812. Fig.18 In the illustrated embodiment, substrate 1812 is positioned below showerhead 1806 and is shown resting on pedestal 1808. Showerhead 1806 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to substrate 1812.

[0090] In some embodiments, the pedestal 1808 may be raised or lowered to expose the substrate 1812 to the volume between the substrate 1812 and the showerhead 1806. It will be appreciated that in some embodiments, the pedestal height may be programmatically adjusted by a suitable computer controller 1850.

[0091] In another case, adjusting the height of the pedestal 1808 can allow, in embodiments where a plasma is ignited, the plasma density to be varied during a plasma activation cycle in a process. At the end of a process phase, the pedestal 1808 can be lowered during another substrate transfer phase to allow removal of the substrate 1812 from the pedestal 1808.

[0092] In some embodiments, the susceptor 1808 can be temperature controlled by a heater 1810. In some embodiments, the susceptor 1808 can be heated to a temperature of at least about 250°C, or in some embodiments, less than about 300°C, such as in the disclosed embodiments, during deposition of the silicon nitride film, heated to, for example, about 250°C. In some embodiments, the susceptor is set at a temperature between about 50°C and about 300°C, such as between about 200°C and about 275°C. In some embodiments, the susceptor is set at a temperature between about 50°C and about 300°C. In some embodiments, the susceptor is set at a temperature between about 200°C and about 275°C.

[0093] Additionally, in some embodiments, pressure control of the processing station 1800 may be provided by a butterfly valve 1818. Fig.18 In the embodiment shown in FIG. 1 , butterfly valve 1818 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the process station 1800 can also be adjusted by changing the flow rate of one or more gases introduced into the process station 1800.

[0094] In some embodiments, the position of the showerhead 1806 can be adjusted relative to the pedestal 1808 to change the volume between the substrate 1812 and the showerhead 1806. In addition, it should be understood that the vertical position of the pedestal 1808 and / or the showerhead 1806 can be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 1808 can include a rotation axis for rotating the orientation of the substrate 1812. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers 1850.

[0095] In some embodiments where plasma can be used as discussed above, the showerhead 1806 and the base 1808 are electrically connected to a radio frequency (RF) power supply 1814 and a matching network 1816 to power the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 1814 and the matching network 1816 can be operated at any suitable power to form a plasma of free radical species with a desired composition. Examples of suitable power are included above. Similarly, the RF power supply 1814 can provide RF power of any suitable frequency. In some embodiments, the RF power supply 1814 can be configured to control high-frequency and low-frequency RF power supplies independently of each other. Exemplary low-frequency RF frequencies can include, but are not limited to, frequencies between 0kHz and 500kHz. Exemplary high-frequency RF frequencies can include, but are not limited to, frequencies between 1.8MHz and 2.45GHz, or greater than about 13.56MHz, or greater than 27MHz, or greater than 180MHz, or greater than 60MHz. It will be appreciated that any suitable parameter may be modulated discretely or continuously to provide plasma energy for surface reactions.

[0096] In some embodiments, plasma can be monitored in situ by one or more plasma monitors. In one case, plasma power can be monitored by one or more voltage sensors, current sensors (e.g., VI probes). In another case, plasma density and / or process gas concentration can be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be programmed to adjust based on measurements from such in situ plasma monitors. For example, an OES sensor can be used in a feedback loop to provide programmed control of plasma power. It should be understood that in some embodiments, other monitors can be used to monitor plasma and other processing characteristics. Such monitors can include, but are not limited to, infrared (IR) monitors, sound monitors, and pressure sensors.

[0097] In some embodiments, instructions for controller 1850 may be provided via input / output control (IOC) sequencing instructions. In one example, instructions for setting the conditions of a process stage may be included in the corresponding recipe stage of a process recipe. In some cases, the process recipe stage may be arranged in sequence so that all instructions of the process stage are executed simultaneously with the process stage. In some embodiments, instructions for setting one or more reactor parameters may be included in the recipe stage. For example, the first recipe stage may include instructions for setting the flow rate of an inert gas and / or a reactant gas (e.g., a first precursor such as a silicon precursor), instructions for setting the flow rate of a carrier gas (such as argon), and time delay instructions for the first recipe stage. The subsequent second recipe stage may include instructions for modulating or stopping the flow rate of an inert gas and / or a reactant gas and instructions for modulating the flow rate of a carrier gas or a purge gas and time delay instructions for the second recipe stage. The third recipe stage may include instructions for modulating the flow rate of a second reactant gas such as a carbon-containing reactant, instructions for modulating the flow rate of a carrier gas or a purge gas, and time delay instructions for the third recipe stage. A subsequent fourth recipe phase may include instructions for modulating or stopping the flow rates of the inert gas and / or the reactant gas, as well as instructions for modulating the flow rates of the carrier gas or the purge gas, and time delay instructions for the fourth recipe phase. It should be understood that these recipe phases may be further subdivided and / or repeated in any suitable manner within the scope of the embodiments of the present disclosure.

[0098] As described above, one or more processing stations may be included in a multi-station processing tool. Fig.19A schematic diagram of an embodiment of a multi-station processing tool 1900 having an inbound load lock 1902 and an outbound load lock 1904 is shown, either or both of which may include a remote plasma source. A robot 1906 at atmospheric pressure is configured to move a wafer from a box loaded by a pod 1908 into the inbound load lock 1902 via an atmospheric port 1910. The robot 1906 places the wafer on a pedestal 1912 in the inbound load lock 1902, the atmospheric port 1910 is closed, and the inbound load lock 1902 is evacuated. In the case where the inbound load lock 1902 includes a remote plasma source, the wafer can be exposed to a remote plasma treatment in the load lock before being introduced into the processing chamber 1914. In addition, the wafer can also be heated in the inbound load lock 1902, such as to remove moisture and adsorbed gases. Next, the chamber transfer port 1916 leading to the process chamber 1914 is opened and another robot (not shown) places the wafer into the reactor on a susceptor at the first station shown in the reactor for processing. Fig.19 The embodiment depicted in FIG. 1 includes a load lock, but it should be understood that in some embodiments, the wafer may be allowed to enter the processing station directly.

[0099] The depicted processing chamber 1914 includes four processing stations, Fig.19 The stations are numbered 1 to 4 in the illustrated embodiment. Each station has a heated pedestal (shown as 1918 for station 1) and a gas line inlet. It should be understood that in some embodiments, each processing station can be used for different or multiple purposes. For example, in some embodiments, a processing station can be switched between ALD and plasma enhanced ALD processing modes. Additionally or alternatively, in some embodiments, the processing chamber 1914 can include one or more matched pairs of ALD and plasma enhanced ALD processing stations. Although the depicted processing chamber 1914 includes four stations, it should be understood that a processing chamber according to the present invention can have any suitable number of stations. For example, in some embodiments, a processing chamber can have five or more stations, while in other embodiments, a processing chamber can have three or fewer stations.

[0100] Fig.19 An embodiment of a wafer handling system 1990 for transferring wafers within a processing chamber 1914 is depicted. In some embodiments, the wafer handling system 1990 can transfer wafers between various processing stations and / or between a processing station and a load lock. It should be understood that any suitable wafer handling system can be employed. Non-limiting examples include wafer conveyors and wafer handling robots. Fig.19Also depicted is an embodiment of a system controller 1950 for controlling process conditions and hardware states of the processing tool 1900. The system controller 1950 may include one or more memory devices 1956, one or more mass storage devices 1954, and one or more processors 1952. The processor 1952 may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, and the like.

[0101] In some embodiments, the system controller 1950 controls all activities of the processing tool 1900. The system controller 1950 executes system control software 1958 stored in the mass storage device 1954, loaded into the memory device 1956, and executed on the processor 1952. Alternatively, the control logic can be hard-coded in the controller 1950. Application-specific integrated circuits, programmable logic devices (such as field programmable gate arrays or FPGAs), etc. can be used for these purposes. In the following discussion, wherever "software" or "coding" is used, functionally comparable hard-coded logic can be used therein. The system control software 1958 can include parameters for controlling timing, gas mixtures, gas flow rates, chamber and / or station pressures, chamber and / or station temperatures, wafer temperatures, target power levels, RF power levels, substrate pedestals, chucks and / or sensor positions, and other parameters for specific processes performed by the processing tool 1900. The system control software 1958 can be configured in any suitable manner. For example, various processing tool component subroutines or control objects can be written to control the operation of processing tool components used to perform various processing tool processes. System control software 1958 may be encoded in any suitable computer readable programming language.

[0102] In some embodiments, the system control software 1958 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. In some embodiments, other computer software and / or programs stored on the mass storage device 1954 and / or the memory device 1956 associated with the system controller 1950 may be employed. Examples of programs or program segments used for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.

[0103] The substrate positioning program may include program code for processing tool components to load a substrate onto the pedestal 1918 and control the spacing between the substrate and other parts of the processing tool 1900.

[0104] The process gas control program may include code for controlling gas composition (e.g., silicon precursor gas, carbon-containing gas, carrier gas, and sweep gas as described herein) and flow rate, and optionally for flowing gas into one or more process stations prior to deposition to stabilize the pressure in the process station. The pressure control program may include code for controlling the pressure in a process station by adjusting, for example, a throttle valve in an exhaust system of the process station, gas flow into the process station, etc.

[0105] The heater control program may include code for controlling the flow of current to a heating unit for heating the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas (eg, helium) to the substrate.

[0106] According to embodiments herein, a plasma control program may include code for setting RF power levels applied to process electrodes in one or more process stations.

[0107] According to embodiments herein, the pressure control program may include code for maintaining the pressure in the reaction chamber.

[0108] In some embodiments, there may be a user interface associated with the system controller 1950. The user interface may include a display screen, a graphical software display of device and / or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, etc.

[0109] In some embodiments, the parameters adjusted by the system controller 1950 may relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF bias power level), etc. These parameters may be provided to the user in the form of a recipe, which may be entered using the user interface.

[0110] Signals for monitoring the process may be provided from various process tool sensors by analog and / or digital input connections of the system controller 1950. Signals for controlling the process may be output by analog and / or digital output connections of the process tool 1900. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (e.g., manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with the data from these sensors to maintain process conditions.

[0111] System controller 1950 may provide program instructions for implementing the above-described deposition process. The program instructions may control various process parameters such as DC power level, RF bias power level, pressure, temperature, etc. According to various embodiments described herein, the instructions may control the parameters to operate the in-situ deposition of the film stack.

[0112] The system controller 1950 will typically include one or more memory devices and one or more processors configured to execute instructions so that the apparatus will perform methods according to the disclosed embodiments. A machine-readable medium containing instructions for controlling processing operations according to the disclosed embodiments may be coupled to the system controller 1950.

[0113] In some implementations, the system controller 1950 is part of a system, which may be part of the above examples. Such a system may include a semiconductor processing device, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic devices to control the operation of these systems before, during, or after the processing of semiconductor wafers or substrates. Electronic devices may be referred to as "controllers" that can control various components or sub-parts of one or more systems. Depending on the processing requirements and / or the type of system, the system controller 1950 can be programmed to control any of the processes disclosed in the present invention, including controlling the delivery of process gases, the setting of temperature (e.g., heating and / or cooling), the setting of pressure, the setting of vacuum, the setting of power, the setting of radio frequency (RF) generators, the setting of RF matching circuits, the setting of frequencies, the setting of flow rates, the setting of fluid delivery, the setting of positions and operations, the entry and exit of wafers and other transport tools and / or the transport of load locks connected to or interfaced with a specific system.

[0114] In a broad sense, the system controller 1950 can be defined as an electronic device with various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuit may include a chip storing program instructions in the form of firmware, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions that communicate with the system controller 1950 in the form of various individual settings (or program files) that define operating parameters for specific processing on or for semiconductor wafers or to the system. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer to complete one or more (kinds) of layers, materials, metals, oxides, silicon, silicon oxides, surfaces, circuits, and / or die of a wafer.

[0115] In some implementations, the system controller 1950 may be part of or coupled to a computer that is integrated with, coupled to, or connected to the system or a combination thereof via a network. For example, the system controller 1950 may be in the "cloud" or all or part of a wafer fab host system that may allow remote access to wafer processing. The computer may enable remote access to the system to monitor the current processing of a manufacturing operation, examine the history of past manufacturing operations, examine trends or performance criteria for multiple manufacturing operations, change parameters of the current processing, set processing steps to follow the current processing, or start a new process. In some examples, a remote computer (e.g., a server) may provide a process recipe to the system via a network, which may include a local network or the Internet. The remote computer may include a user interface that allows input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some examples, the system controller 1950 receives instructions in the form of data that specify parameters for each processing step to be performed during one or more operations. It should be understood that these parameters may be specific to the type of process to be performed and the type of tool that the system controller 1950 is configured to interface with or control. Thus, as described above, the system controller 1950 may be distributed, for example, by including one or more discrete controllers that are networked together and work toward a common goal (e.g., the process and control described herein). Examples of distributed controllers for these purposes may be one or more integrated circuits within a chamber that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer) that combine to control the process within the chamber.

[0116] Example systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the manufacture and / or preparation of semiconductor wafers.

[0117] As described above, depending on one or more process steps to be performed by the tool, the system controller 1950 can communicate with one or more other tool circuits or modules, other tool components, combination tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used in material handling to move containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing facility.

[0118] Suitable apparatus for performing the methods disclosed herein are further discussed and described in U.S. patent application Ser. No. 13 / 084,399, filed on Apr. 11, 2011 (now U.S. Pat. No. 8,728,956), entitled “PLASMA ACTIVATED CONFORMAL FILMDEPOSITION,” and U.S. patent application Ser. No. 13 / 084,305, filed on Apr. 11, 2011, entitled “SILICON NITRIDE FILMS AND METHODS,” each of which is incorporated herein in its entirety.

[0119] The apparatus / process described herein can be used in conjunction with a photolithographic patterning tool or process, for example, for the manufacture or preparation of semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, but not necessarily, such tools / processes will be used or performed together in a common manufacturing facility. Photolithographic patterning of films generally includes some or all of the following operations, each of which can be performed using multiple possible tools: (1) coating a workpiece (i.e., substrate) with a photoresist using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate or oven or a UV curing tool; (3) exposing the photoresist to visible light or UV or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist so that it can be patterned using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece by using a dry or plasma assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

[0120] The etching operations described herein (e.g., etching operations for etching nitrides or oxides) can be performed in any suitable processing chamber. In some embodiments, the substrate can be etched in an inductively coupled plasma (ICP) reactor, such as Fig. 20 shown.

[0121] An inductively coupled plasma (ICP) reactor that may be suitable for use in etching operations and atomic layer deposition (ALD) operations in certain embodiments is now described. Such an ICP reactor is also described in U.S. Patent Application Publication No. 2014 / 0170853, filed on December 10, 2013, entitled "IMAGEREVERSAL WITH AHM GAP FILL FOR MULTIPLE PATTERNING," which is incorporated herein by reference in its entirety for all purposes. Although an ICP reactor is described herein, in some embodiments, it should be understood that a capacitively coupled plasma reactor may also be used.

[0122] Fig. 20A cross-sectional view of an inductively coupled plasma integrated etch and deposition apparatus 2000 suitable for implementing certain embodiments herein is schematically shown, an example of which is the Kiyo TM Reactor. The inductively coupled plasma device 2000 includes an entire processing chamber structurally defined by a chamber wall 2001 and a window 2011. The chamber wall 2001 may be made of stainless steel or aluminum. The window 2011 may be made of quartz or other dielectric materials. An optional internal plasma grid 2050 divides the entire processing chamber into an upper sub-chamber 2002 and a lower sub-chamber 2003. In most embodiments, the plasma grid 2050 may be removed, thereby utilizing the chamber space formed by the sub-chambers 2002 and 2003. The chuck 2017 is located in the lower sub-chamber 2003 near the bottom inner surface. The chuck 2017 is configured to receive and hold a semiconductor wafer 2019 on which etching and deposition processes are performed. The chuck 2017 may be an electrostatic chuck for supporting the wafer 2019 (when present). In some embodiments, an edge ring (not shown) surrounds the chuck 2017 and has an upper surface that is substantially flat with the top surface of the wafer 2019 when the wafer 2019 is present above the chuck 2017. The chuck 2017 also includes electrostatic electrodes for clamping and unclamping the wafer. Filters and DC clamping power supplies (not shown) may be provided for this purpose. Other control systems for lifting the wafer 2019 from the chuck 2017 may also be provided. The chuck 2017 can be charged using an RF power supply 2023. The RF power supply 2023 is connected to the matching circuit 2021 via a connector 2027. The matching circuit 2021 is connected to the chuck 2017 via a connector 2025. In this way, the RF power supply 2023 is connected to the chuck 2017.

[0123] Elements for plasma generation include a coil 2033 positioned above the window 2011. In some embodiments, no coil is used in the disclosed embodiments. The coil 2033 is made of a conductive material and includes at least one complete turn. Fig. 20The example of the coil 2033 shown includes three turns. The cross-section of the coil 2033 is represented by symbols, with the coil having an "X" extending rotationally into the page, and the coil having a "●" extending rotationally out of the page. The element for plasma generation also includes an RF power supply 2041 configured to supply RF power to the coil 2033. Generally speaking, the RF power supply 2041 is connected to the matching circuit 2039 through a connection 2045. The matching circuit 2039 is connected to the coil 2033 through a connection 2043. In this way, the RF power supply 2041 is connected to the coil 2033. An optional Faraday shield 2049 is located between the coil 2033 and the window 2011. The Faraday shield 2049 is maintained spaced apart relative to the coil 2033. The Faraday shield 2049 is disposed directly above the window 2011. The coil 2033, the Faraday shield 2049, and the window 2011 are all configured to be substantially parallel to each other. Faraday shields prevent metal or other materials from depositing on the dielectric window of the plasma chamber.

[0124] The process gas may flow into the processing chamber through one or more main gas flow inlets 2060 and / or through one or more side gas flow inlets 2070 located in the upper chamber. Similarly, although not explicitly shown, similar gas flow inlets may be used to supply process gas to the capacitively coupled plasma processing chamber. A vacuum pump (e.g., a one-stage or two-stage mechanical dry pump and / or a turbomolecular pump 2040) may be used to extract the process gas from the processing chamber 2024 and maintain the pressure within the processing chamber 2000. For example, a pump may be used to evacuate the chamber 2001. A valve-controlled conduit may be used to connect the vacuum pump fluid to the processing chamber so as to selectively control the application of the vacuum environment provided by the vacuum pump. This may be accomplished using a closed-loop controlled flow restriction device (e.g., a throttle valve (not shown) or a swing valve (not shown)) during the operation of the plasma process. Similarly, a vacuum pump and a controlled valve connected to the capacitively coupled plasma processing chamber fluid may also be used.

[0125] During the operation of the device, one or more process gases can be supplied through gas flow inlet 2060 and / or 2070. In certain embodiments, process gas can be supplied only through main gas flow inlet 2060, or only through side gas flow inlet 2070. In some cases, the gas flow inlet shown in the figure can be replaced with a more complex gas flow inlet, such as one or more nozzles. Faraday shield 2049 and / or optional grid 2050 can include internal channels and holes that allow process gas to be delivered to the chamber. Any one or two of Faraday shield 2049 and optional grid 2050 can serve as a nozzle for delivering process gas. In some embodiments, liquid vaporization and delivery system can be located upstream of chamber 2001, so that once the liquid reactant is vaporized, the vaporized reactant is introduced into the chamber via gas flow inlet 2060 and / or 2070.

[0126] RF power is supplied to the coil 2033 from the RF power supply 2041 so that an RF current flows through the coil 2033. The RF current flowing through the coil 2033 generates an electromagnetic field around the coil 2033. The electromagnetic field generates an induced current in the upper sub-chamber 2002. The various generated ions and radicals physically and chemically interact with the wafer 2019 to selectively etch features of the wafer and deposit layers on the wafer.

[0127] If a plasma grid is used so that both an upper subchamber 2002 and a lower subchamber 2003 are present, the induced current acts on the gas present in the upper subchamber 2002 to produce an electron-ion plasma in the upper subchamber 2002. An optional internal plasma grid 2050 limits the amount of hot electrons in the lower subchamber 2003. In some embodiments, the apparatus is designed and operated so that the plasma present in the lower subchamber 2003 is an ion-ion plasma.

[0128] Both the upper electron-ion plasma and the lower ion-ion plasma can contain positive and negative ions, but the ion-ion plasma will have a greater ratio of negative to positive ions. Volatile etching and / or deposition byproducts can be removed from the lower subchamber 2003 through port 2022. The chuck 2017 disclosed herein can operate at elevated temperatures ranging between about 10° C. and about 850° C. The temperature depends on the process operation and the specific recipe.

[0129] When installed in a clean room or manufacturing facility, chamber 2001 can be coupled to facilities (not shown). The facilities include piping that provides process gases, vacuum, temperature control, and environmental particle control. When installed in the target manufacturing facility, these facilities are coupled to chamber 2001. In addition, chamber 2001 can be coupled to a transfer chamber that allows a robot to transfer semiconductor wafers into and out of chamber 2001 using typical automation.

[0130] In some embodiments, system controller 2030 (which may include one or more physical or logical controllers) controls some or all operations of the process chamber. System controller 2030 may include any one or more of the features described above with respect to system controller 1950.

[0131] Fig.21A semiconductor process cluster architecture with various modules that interface with a vacuum transfer module 2138 (VTM) is depicted. The arrangement of the transfer module "transferring" wafers between multiple storage facilities and processing modules can be referred to as a "cluster tool architecture" system. An airlock 2130, also known as a load lock or transfer module, is shown in the VTM 2138, which has four processing modules 2120a-2120d, and the four processing modules 2120a-2120d can be optimized separately to perform different manufacturing processes. As an example, the processing modules 2120a-2120d can be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering and / or other semiconductor processes. In some embodiments, ALD and selective etching are performed in the same module. In some embodiments, ALD and selective etching are performed in different modules of the same tool. According to the disclosed embodiments, one or more substrate etching processing modules (any one of 2120a-2120d) can be implemented as disclosed herein, that is, for depositing conformal films, selectively depositing films by ALD, etching patterns, and other suitable functions. The airlocks 2130 and processing modules 2120 may be referred to as "stations." Each station has an end face 2136 that interfaces the station to a VTM 2138. Within each end face, sensors 1-18 are used to detect the passage of wafers 2126 as they move between respective stations.

[0132] The robot 2122 transfers wafers 2126 between stations. In one embodiment, the robot 2122 has one arm, and in another embodiment, the robot 2122 has two arms, where each arm has an end effector 2124 to pick up wafers such as wafer 2126 for transport. The front end robot 2132 in the atmospheric transfer module (ATM) 2140 is used to transfer wafers 2126 from a cassette or front opening unified pod (FOUP) 2134 in a load port module (LPM) 2142 to the airlock 2130. The module center 2128 within the processing module 2120 is a location for placing the wafer 2126. The aligner 2144 in the ATM 2140 is used to align the wafers.

[0133] In an exemplary processing method, a wafer is placed in one of the FOUPs 2134 in the LPM 2142. The front-end robot 2132 transfers the wafer from the FOUP 2134 to the aligner 2144, which allows the wafer 2126 to be properly centered before etching or processing. After alignment, the wafer 2126 is moved into the airlock 2130 by the front-end robot 2132. Since the airlock module has the ability to match the environment between the ATM and the VTM, the wafer 2126 can move in two pressure environments without being damaged. From the airlock module 2130, the wafer 2126 is moved by the robot 2122 through the VTM 2138 to one of the processing modules 2120a-2120d. To achieve this wafer movement, the robot 2122 uses an end effector 2124 on each of its arms. Once the wafer 2126 has been processed, it is moved from the processing modules 2120a-2120d to the airlock module 2130 by the robot 2122. From here, the wafer 2126 may be moved by the front end robot 2132 to one of the FOUPs 2134 or to an aligner 2144 .

[0134] It should be noted that the computer controlling the wafer movement may be local to the cluster architecture, or may be located external to the cluster architecture in the manufacturing floor, or located at a remote location and connected to the cluster architecture via a network. Fig.19 The controller described can be used Fig.21 tools in .

[0135] One aspect of the present disclosure is a device configured to implement the method described herein. Suitable devices include hardware for implementing process operations and a system controller having instructions for controlling process operations according to the present invention. In some embodiments, the device for performing the aforementioned process operations may include a remote plasma source. Compared to direct plasma, the remote plasma source provides mild reaction conditions. Examples of suitable remote plasma devices are described in U.S. Patent Application No. 14 / 062,648 filed on October 24, 2013, which is incorporated herein by reference in its entirety and for all purposes.

[0136] Fig. 22A schematic diagram of a remote plasma device according to certain embodiments is shown. The device 2200 includes a reaction chamber 2210 having a showerhead assembly 2220. Inside the reaction chamber 2210, a substrate 2230 rests on a pedestal or base 2235. In some embodiments, the base 2235 may be equipped with a heating / cooling element. A controller 2240 may be connected to the components of the device 2200 to control the operation of the device 2200. For example, the controller 2240 may include instructions for controlling process conditions (such as temperature process conditions and / or pressure process conditions) for the operation of the device 2200. In some embodiments, the controller 2240 may include instructions for controlling the flow rates of precursor gases, co-reactant gases, source gases, and carrier gases. The controller 2240 may include instructions for changing the flow rate of co-reactant gases over time. Additionally or alternatively, the controller 2240 may include instructions for changing the flow rate of precursor gases over time.

[0137] In operation, a gas or gas mixture is introduced into the reaction chamber 2210 via one or more gas inlets coupled to the reaction chamber 2210. In some embodiments, two or more gas inlets are coupled to the reaction chamber 2210. A first gas inlet 2255 can be coupled to the reaction chamber 2210 and connected to the container 2250, and a second gas inlet 2265 can be coupled to the reaction chamber 2210 and connected to the remote plasma source 2260. In embodiments including a remote plasma configuration, the delivery lines for the precursor and the radical species generated in the remote plasma source are separated. Therefore, the precursor and the radical species do not substantially interact before reaching the substrate 2230.

[0138] One or more free radical species may be generated in the remote plasma source 2260 and configured to enter the reaction chamber 2210 via the gas inlet 2265. Any type of plasma source may be used in the remote plasma source 2260 to create the free radical species. This includes, but is not limited to, capacitively coupled plasma, inductively coupled plasma, microwave plasma, direct current plasma, and laser generated plasma. An example of a capacitively coupled plasma may be a radio frequency (RF) plasma. A high frequency plasma may be configured to operate at 13.56 MHz or higher. An example of such a remote plasma source 2260 may be a RF plasma manufactured by Lam Research, Inc. of Fremont, California. Another example of such a RF remote plasma source 2260 may be manufactured by MKS Instruments of Wilmington, Massachusetts. It can operate at 440 kHz and can be provided as a subunit bolted onto a larger device for processing one or more substrates in parallel. In some embodiments, microwave plasma can be used as a remote plasma source 2260, such as Also manufactured by MKS Instruments. The microwave plasma can be configured to operate at a frequency of 2.45 GHz. The gas provided to the remote plasma source can include hydrogen, nitrogen, oxygen, and other gases as mentioned elsewhere herein. In certain embodiments, hydrogen is provided in a carrier such as helium. As an example, hydrogen can be provided in a helium carrier at a concentration of about 1-10% hydrogen.

[0139] The precursor may be provided in a container 2250 and may be supplied to a showerhead 2220 via a first gas inlet 2255. The showerhead 2220 distributes the precursor to the reaction chamber 2210 toward a substrate 2230. The substrate 2230 may be located below the showerhead 2220. It should be understood that the showerhead 2220 may have any suitable shape and may have any number and arrangement of ports for distributing gas to the substrate 2230. The precursor may be supplied to the showerhead 2220 and ultimately to the substrate 2230 at a controlled flow rate.

[0140] The one or more free radical species formed in the remote plasma source 2260 can be transported in a gas phase toward the substrate 2230. The one or more free radical species can flow into the reaction chamber 2210 through the second gas inlet 2265. It should be understood that, as Fig. 22 As shown, the second gas inlet 2265 need not be transverse to the surface of the substrate 2230. In some embodiments, the second gas inlet 2265 may be directly above the substrate 2230 or at other locations. The distance between the remote plasma source 2260 and the reaction chamber 2210 can be configured to provide mild reaction conditions so that the ionized species produced in the remote plasma source 2260 are substantially neutral, but at least some radical species in a substantially low energy state remain in the environment adjacent to the substrate 2230. Such low energy radical species no longer recombine to form stable compounds. The distance between the remote plasma source 2260 and the reaction chamber 2210 can be a function of the aggressiveness of the plasma (e.g., determined in part by the source RF power level), the density of the gas in the plasma (e.g., if there is a high concentration of hydrogen atoms, a significant portion of them may recombine to form H2 before reaching the reaction chamber 2210), and other factors. In some embodiments, the distance between the remote plasma source 2260 and the reaction chamber 2210 can be between about 1 cm and 30 cm, such as about 5 cm or about 15 cm.

[0141] In some embodiments, a co-reactant that is not a primary silicon-containing precursor or hydrogen radical is introduced during the deposition reaction. In some implementations, the device is configured to introduce the co-reactant through the second gas inlet 2265, in which case the co-reactant is at least partially converted into plasma. In some implementations, the device is configured to introduce the co-reactant through the showerhead 2220 via the first gas inlet 2255. Examples of co-reactants include oxygen, nitrogen, ammonia, carbon dioxide, carbon monoxide, etc. The flow rate of the co-reactant can be varied over time to produce a composition gradient in the gradient film.

[0142] The controller 2240 may contain instructions for controlling process conditions for the operation of the apparatus 2200. The controller 2240 will typically include one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored on a memory device associated with the controller 2240, or they may be provided over a network.

[0143] In certain embodiments, the controller 2240 controls all or most of the actions of the semiconductor processing apparatus 2200 described herein. For example, the controller 2240 may control all or most of the actions of the semiconductor processing apparatus 2200 associated with depositing a silicon carbide film as a carbon-containing encapsulation layer described herein. The controller 2240 may execute system control software including grouped instructions for controlling timing, gas composition, gas flow rate, chamber pressure, chamber temperature, RF power level, substrate position, and / or other parameters. Other computer programs, scripts, or programs stored on a memory device associated with the controller 2240 may be used in some embodiments. In order to provide relatively mild reaction conditions in the environment adjacent to the substrate 2230, parameters such as RF power level, gas flow rate to the remote plasma region, and timing of plasma ignition may be adjusted and maintained by the controller 2240. In addition, adjusting the substrate position may further reduce the presence of high-energy radical species in the environment adjacent to the substrate 2230. In a multi-station reactor, the controller 2240 may include different or identical instructions for different device stations, so that the device stations can operate independently or synchronously.

[0144] In some embodiments, the controller 2240 may include instructions for performing operations such as flowing a silicon-containing precursor to the reaction chamber 2210 through the first gas inlet 2255, providing one or more radical species of a source gas in a substantially low energy state from the remote plasma source 2260, flowing a co-reactant gas through the second gas inlet 2265 into the reaction chamber 2210, and flowing the one or more radical species through the second gas inlet 2265 into the reaction chamber 2210 to react with the silicon-containing precursor to form a carbon-containing encapsulation layer on the substrate 2230. In some implementations, the controller 2240 may include instructions for varying the flow rate of the silicon-containing precursor over time. As described above with respect to Fig.19 The controller can be used Fig. 22 The device implementation in . in conclusion

[0145] Although the foregoing embodiments have been described in considerable detail for the purpose of clarity of understanding, it is apparent that certain changes and modifications may be implemented within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems and devices of these embodiments. Therefore, the embodiments herein are to be considered illustrative rather than restrictive, and the embodiments are not to be limited to the details given herein.

Claims

1. A method of processing a semiconductor substrate to fabricate a 3D NAND structure, the method comprising: providing a substrate having alternating first oxide and nitride layers in a staircase pattern; as well as Before depositing the second oxide on the step pattern, depositing a carbon-containing encapsulation layer to encapsulate the first oxide layer and the nitride layer in the following manner: Introducing silicon- and carbon-containing precursors, wherein the silicon-containing precursor comprises at least one Si-N bond; introducing a source gas in a plasma source remote from a chamber housing the substrate; generating one or more free radicals of the source gas from the source gas in the plasma source; as well as introducing the one or more free radicals of the source gas onto the substrate, wherein all or substantially all of the one or more free radicals of the source gas are in a substantially low energy state so as to react with the silicon-containing and carbon-containing precursors to form the carbon-containing encapsulation layer; and The carbon-containing encapsulation layer comprises a material selected from the group consisting of oxygen-doped silicon carbide, nitrogen-doped silicon carbide, boron- and nitrogen-doped silicon carbide, and combinations thereof. 2 . The method according to claim 1 , wherein a dry etching selectivity ratio of the second oxide to the carbon-containing encapsulation layer is between 2:1 and 100:

1. The method of claim 1 , wherein the carbon-containing encapsulation layer is deposited to a thickness between 1 nm and 250 nm. The method of claim 1 , wherein the carbon-containing encapsulation layer is deposited by atomic layer deposition. The method of claim 1 , wherein the carbon-containing encapsulation layer is deposited by chemical vapor deposition. 6 . The method of claim 1 , wherein the carbon-containing encapsulation layer prevents degradation at an interface between the first oxide and the second oxide. 7 . The method of claim 1 , wherein a thickness of each of the first oxide layer and the nitride layer is between 10 nm and 100 nm.

8. The method of claim 1, wherein the stair pattern comprises steps, each step comprising an oxide layer and a nitride layer, wherein each step comprises a pad extending outwardly from an edge of an adjacent overlying step, the pad having a width of 150 nm to 1000 nm.

9. The method according to claim 1, further comprising: After depositing the carbon-containing encapsulation layer, depositing the second oxide on the step pattern; etching vertical gaps in the staircase pattern; etching the nitride layer selectively relative to the first oxide, the second oxide, and the carbon-containing encapsulation layer to form a gap between the first oxide layers; depositing tungsten in the gaps between the first oxide layers to form tungsten word lines; etching the second oxide to form a vertical via in the second oxide to the tungsten wordline, wherein the second oxide is etched selectively with respect to the carbon-containing encapsulation layer; selectively etching the carbon-containing encapsulation layer relative to the first oxide, the second oxide, and the tungsten wordline to expose the tungsten wordline at the bottom of the via; as well as Tungsten is deposited in the via to form a tungsten interconnect with the tungsten wordline.

10. The method of claim 9, wherein the vertical through-holes include through-holes having different depths. The method of claim 9 , wherein the vertical via has a critical dimension between 50 nm and 500 nm. 12 . The method of claim 9 , wherein a depth of the vertical through hole ranges from 1 micron to 12 microns.

13. The method of claim 1, wherein the first oxide layer is deposited at a deposition temperature different from a deposition temperature used to deposit the second oxide.

14. An apparatus for depositing a carbon-containing encapsulation layer on a substrate to fabricate a 3D NAND structure, the apparatus comprising: a reaction chamber containing the substrate; a plasma source coupled to the reaction chamber and configured to generate plasma outside the reaction chamber; one or more first gas inlets coupled to the reaction chamber; a second gas inlet coupled to the reaction chamber; and A controller including instructions for: causing the introduction of silicon-containing and carbon-containing precursors, wherein the silicon-containing precursor comprises at least one Si-N bond; causing a source gas to be introduced into the plasma source remote from the reaction chamber housing the substrate; causing one or more radicals of the source gas to be generated from the source gas in the plasma source; and causing the one or more free radicals of the source gas to be introduced onto the substrate, wherein all or substantially all of the one or more free radicals of the source gas are in a substantially low energy state so as to react with the silicon-containing and carbon-containing precursors to form a carbon-containing encapsulation layer, and The carbon-containing encapsulation layer comprises a material selected from the group consisting of oxygen-doped silicon carbide, nitrogen-doped silicon carbide, boron- and nitrogen-doped silicon carbide, and combinations thereof.

15. The device according to claim 14, wherein: The controller also includes instructions for: causing deposition of an oxide after causing deposition of the carbon-containing encapsulation layer; causing etching of vertical gaps; causing the nitride layer to be etched selectively relative to the oxide and the carbon-containing encapsulation layer to form a gap; causing tungsten to be deposited in the gap; causing etching of the oxide to form a vertical via in the oxide to a tungsten wordline, wherein the oxide is selectively etched relative to the carbon-containing encapsulation layer; causing the carbon-containing encapsulation layer to be selectively etched relative to the oxide and the tungsten wordline to expose the tungsten wordline at the bottom of the via; as well as Tungsten is caused to be deposited in the via to form a tungsten interconnect with the tungsten word line.

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