Micro-LED device driven by MOS structure based on channel and contact dual-purpose indium tin oxide and preparation method thereof

Abstract

The invention discloses a micro-LED driven by an MOS (Metal Oxide Semiconductor) structure based on channel and contact dual-purpose indium tin oxide and a preparation method of the micro-LED, and the preparation method disclosed by the invention comprises the following steps: on one hand, defining interconnection and source and drain electrode regions through photoetching, then depositing degenerate thick-layer indium tin oxide, and interconnecting the source electrode of the MOS structure with a P electrode of a high table top of a micro-LED unit to realize series connection; finally, on-off of the light-emitting unit is controlled through the grid electrode, in-situ driving is achieved, the traditional bonding process is omitted due to the compatibility of the technology, the preparation process is greatly simplified, and the production cost is reduced; a thin-layer non-degenerate indium tin oxide semiconductor channel and a thick-layer degenerate indium tin oxide contact electrode are prepared by adopting a thickness control method, and a high-current MOS driving unit with low contact resistance is realized.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor process technology, and in particular relates to a micro-LED device driven by a MOS structure based on a channel and a contact dual-purpose indium tin oxide and a preparation method thereof. Background Art

[0002] As a transparent conductive material, indium tin oxide (ITO) has been widely used in coatings, solar cells, and the most common display industry. Indium tin oxide (ITO) is a high-conductivity, tin-doped semiconductor with a bandgap of about 3.5 eV and a mobility of about 30 cm 2 / V·s. However, due to the high carrier concentration, its current switching ratio is lower than that of traditional oxide semiconductors, so there is very little research on ITO transistors. In addition, ITO has a lower relative dielectric constant than indium gallium zinc oxide (IGZO) or zinc oxide (ZnO), and has greater potential in realizing low-power ultra-short channel transistors.

[0003] Micro light emitting diode (micro-LED) array devices refer to two-dimensional arrays of micro-sized, ultra-high-density LED pixels integrated on the same substrate. They have a wide range of applications, such as micro-display devices, life cell detection, visible light communications, etc.

[0004] Currently, the light-emitting unit and driving unit of micro-LED belong to two independent process parts. To realize the display of micro-LED array, these two parts need to be integrated. The related processes involved are complicated and have the disadvantage of high production cost. Summary of the invention

[0005] In view of the shortcomings of the prior art, a first object of the present invention is to provide a micro-LED device driven by a MOS structure based on indium tin oxide for both channel and contact.

[0006] The second object of the present invention is to provide a method for preparing a micro-LED device driven by a MOS structure based on indium tin oxide for both channel and contact. The preparation method of the present invention deposits a degenerate thick layer of indium tin oxide after defining the interconnection and source-drain electrode regions by photolithography, and interconnects the source level of the MOS structure with the P electrode of the high table of the micro-LED unit to achieve series connection. Finally, the switch of the light-emitting unit is controlled by the gate to achieve in-situ driving. Due to the process compatibility, the traditional bonding process is omitted, which greatly simplifies the preparation process and reduces production costs.

[0007] In order to achieve the above object, the present invention adopts the following technical solution:

[0008] The present invention discloses a micro-LED device driven by a MOS structure based on a channel and contact dual-purpose indium tin oxide, wherein the micro-LED device comprises an arrayed micro-LED unit located on the same substrate, and a MOS structure unit connected in series with the micro-LED unit; the channel layer in the MOS structure unit is a thin layer of non-degenerate indium tin oxide thin film layer, the micro-LED unit and the MOS structure unit are interconnected by a thick interlayer parallel indium tin oxide thin film layer, and the indium tin oxide thin film layer covers the drain region above the channel layer in the MOS structure unit, the source region, the P-electrode region above the P-type semiconductor of the micro-LED unit, and the region between the micro-LED unit and the MOS structure unit.

[0009] The micro-LED provided by the present invention integrates a MOS structure unit and a micro-LED unit into one. The micro-LED provided by the present invention has a thin layer of non-degenerate indium tin oxide channel in the MOS structure unit part; a thick layer of degenerate indium tin oxide is provided as an insertion layer of the channel and the metal electrode, and the MOS structure source level and the P electrode of the micro-LED unit are interconnected in series through the thick layer of degenerate indium tin oxide, wherein the thin layer of non-degenerate indium tin oxide channel can provide a high concentration of free electrons, and this high carrier concentration helps to achieve high electron mobility, thereby improving the switching speed and driving capability of the MOS transistor; in addition, the thin layer of non-degenerate indium tin oxide channel has high optical transparency and can be applied to transparent display scenarios, and the thick layer of degenerate indium tin oxide is used as an insertion layer of the channel and the metal electrode, which can effectively reduce the contact barrier and greatly increase the output current.

[0010] In a preferred embodiment, the thickness of the thin non-degenerate indium tin oxide film layer is ≤15 nm, preferably 10 nm;

[0011] The thickness of the thick interlayer parallel indium tin oxide thin film layer is ≥110 nm, preferably 110 nm.

[0012] The thick layer of indium tin oxide shows a degenerate state and serves as a source-drain contact electrode of a MOS structure. The thick layer of indium tin oxide electrode has a better ohmic contact.

[0013] In a preferred solution, a back-gate dielectric layer and a back-gate electrode are sequentially arranged below the channel layer in the MOS structural unit. The present invention controls the switch of the micro-LED unit (light-emitting unit) through the back-gate electrode in the MOS structural unit to achieve in-situ driving.

[0014] In a preferred embodiment, the micro-LED device is composed of a substrate, an LED epitaxial layer, and an arrayed micro-LED unit and a MOS structural unit arranged above the LED epitaxial layer; the LED epitaxial layer is composed of a high table of the LED epitaxial layer and a low table of the LED epitaxial layer, and the high table of the LED epitaxial layer and the low table of the LED epitaxial layer both include a buffer layer and an N-type semiconductor located on the substrate from bottom to top; the high table of the LED epitaxial layer also includes a quantum well layer and a P-type semiconductor from bottom to top; a P electrode of the micro-LED unit is arranged above the P-type semiconductor, and a thick interlayer parallel indium tin oxide thin film layer is also arranged between the P electrode and the P-type semiconductor; the N electrode of the micro-LED unit and the MOS structural unit are both arranged above the low table of the LED epitaxial layer, and the N electrode of the micro-LED unit is directly in contact with the N-type semiconductor in the low table of the LED epitaxial layer; a passivation insulating layer is arranged between the back gate electrode in the MOS structural unit and the N-type semiconductor in the low table of the LED epitaxial layer.

[0015] In a preferred solution, a passivation insulating layer is directly disposed above the high mesa of the LED epitaxial layer except for the P electrode, and above the low mesa of the LED epitaxial layer except for the N electrode.

[0016] The passivation insulating layer can repair the sidewall defects of the micro-LED unit.

[0017] Further preferably, the substrate is selected from one of sapphire, silicon, silicon carbide and gallium nitride.

[0018] Further preferably, the material of the buffer layer is selected from compounds of Group III and V materials and their multi-component alloys, such as GaN, InGaN, AlGaN and the like.

[0019] Further preferably, the P-type semiconductor is p-GaN, and the N-type semiconductor is n-GaN.

[0020] Further preferably, the material of the passivation insulating layer is selected from one of HfOx, AlOx, and SiOx.

[0021] Further preferably, the material of the back gate dielectric layer is selected from one of HfOx and AlOx.

[0022] The present invention discloses a method for preparing a micro-LED device driven by a MOS structure based on a channel and contact dual-purpose indium tin oxide. An LED epitaxial wafer is taken, wherein the LED epitaxial wafer is composed of a substrate and an LED epitaxial layer, wherein the LED epitaxial layer is composed of a buffer layer, an N-type semiconductor, a quantum well layer, and a P-type semiconductor. A P-type semiconductor pixel region and an N-type semiconductor region of a micro-LED unit are first defined on the LED epitaxial layer by photolithography, and a portion outside the P-type semiconductor pixel region is etched to the N-type semiconductor by an etching process, thereby forming a high table of the LED epitaxial layer and a low table of the LED epitaxial layer, and a passivation insulating layer is prepared on the surfaces of the high table of the LED epitaxial layer and the low table of the LED epitaxial layer, and then an N-type semiconductor pixel region is defined on the low table of the LED epitaxial layer by photolithography. The gate region and the MOS structure unit region are formed, and the passivation insulating layer of the N electrode region is etched to expose the N-type semiconductor. Then, a metal electrode is deposited in the N electrode region to form the N electrode of the micro-LED unit. At the same time, a back gate electrode and a back gate dielectric layer are sequentially prepared in the MOS structure unit region, and then a thin layer of non-degenerate indium tin oxide film is prepared on the back gate dielectric layer. The P electrode region is defined on the high table of the LED epitaxial layer by photolithography, and then the passivation insulating layer of the P electrode region is etched to expose the P-type semiconductor. At the same time, the source region and the drain region are defined in the MOS structure unit by photolithography, and then a thick interlayer parallel indium tin oxide film layer is prepared in the source region and the drain region, the P electrode region, and the region between the micro-LED unit and the MOS structure unit.

[0023] Principles and advantages

[0024] The present invention provides a method for preparing a micro-LED device driven by a MOS structure based on dual-purpose indium tin oxide for channel and contact. A non-degenerate indium tin oxide channel material is prepared by regulating the thickness of indium tin oxide, and a degenerate indium tin oxide contact material is prepared at the same time, forming a high-current MOS structure.

[0025] In addition, the relative dielectric constant of indium tin oxide is lower than that of indium gallium zinc oxide (IGZO) or zinc oxide (ZnO), and it has greater potential in realizing low-power ultra-short channel transistors. The preparation method of the present invention deposits a degenerate thick layer of indium tin oxide after defining the interconnection and source-drain electrode regions by photolithography, and interconnects the source level of the MOS structure with the P electrode of the high table of the micro-LED unit to achieve series connection. Finally, the switch of the light-emitting unit is controlled by the gate to realize in-situ driving, which greatly simplifies the process flow and reduces the production cost compared to the traditional process route of preparing the micro-LED light-emitting unit and the driving circuit separately and then integrating them. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1A preparation flow chart of a micro-LED device driven by a MOS structure based on indium tin oxide for both channel and contact in the present invention;

[0027] Figure 2 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on a channel and a contact dual-purpose indium tin oxide in the present invention, wherein 110, a passivation insulating layer, 120, a P-type semiconductor, 130, a quantum well, 140, an N-type semiconductor, 150, a buffer layer, and 160 a substrate.

[0028] Figure 3 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on dual-purpose indium tin oxide for channel and contact in the present invention.

[0029] Figure 4 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on a channel and a contact dual-purpose indium tin oxide in the present invention, wherein 210 is an N electrode, and 220 is a back gate electrode.

[0030] Figure 5 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on channel and contact dual-purpose indium tin oxide in the present invention, in which 230, a back gate dielectric layer, 240, a thin layer of non-degenerate indium tin oxide film layer.

[0031] Figure 6 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on dual-purpose indium tin oxide for channel and contact in the present invention.

[0032] Figure 7 , a schematic diagram of the preparation process of a micro-LED device driven by a MOS structure based on channel and contact dual-purpose indium tin oxide in the present invention, in which a 250-nm thick layer of degenerate indium tin oxide film is provided. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] The device size of high-performance transistors is shrinking year by year according to the trend of "Moore's Law", and power consumption has become a huge challenge on the road of device development. The wide bandgap characteristics of oxide semiconductors can greatly suppress off-state leakage current, making them ideal materials for preparing low-power devices. From 130nm to 45nm, the technology node of Moore's Law, the device structure remains a planar bulk silicon structure, the gate dielectric of the transistor is mainly silicon oxynitride (SiON), the gate electrode is polycrystalline silicon (poly-Si), and the channel material has gradually evolved from ordinary single crystal silicon to germanium-doped strained silicon. After 45nm, low-power devices still use the previous generation of gate dielectric and gate electrode technology, while high-performance devices introduce hafnium-containing high-K oxide in the gate dielectric and replace the gate electrode with a metal gate. In order to improve device performance, researchers have increased the doping ratio of germanium, thereby increasing the mobility of strained silicon. After entering the 32nm node, the gate dielectric and gate electrode of low-power devices are replaced by the second-generation high-K oxide and metal electrode, respectively. In order to deal with the leakage problem caused by the short channel effect, researchers added a buried oxide layer under the channel and reduced the channel thickness to form a silicon-on-insulator structure. After the 22nm node, device structure improvement became a powerful measure to promote Moore's Law. The device gradually transitioned from a planar transistor to a fin transistor, and then to a ring gate transistor or a multi-bridge channel transistor model, all of which reflected the improvement strategy of increasing the gate-to-channel control area, reducing the characteristic length λ, thereby improving the electrostatic control capability, meeting the current demand while effectively reducing the short channel effect. After the 10nm node, as the development trend of Moore's Law slowed down, a large number of new semiconductor materials emerged at this time, such as carbon nanotubes (CNTs), two-dimensional materials, oxide semiconductors, etc. Wide bandgap oxide semiconductors represented by IGZO can effectively suppress off-state leakage current. At present, oxide semiconductors as thin-film transistors have been widely used in three-dimensional stacked memories, complementary field-effect transistor image sensors, and back-end integration processes of silicon processes. With the in-depth research on oxide semiconductors and the improvement of thin-film transistor structures, the gap between thin-film transistors and high-performance transistors is slowly narrowing. Indium tin oxide (ITO) is a tin-doped wide bandgap semiconductor with a bandgap width of about 3.5-4.3eV. Normally, ITO film is in a degenerate semiconductor state, has very high conductivity, high light transmittance in the visible band, and high light reflectivity in the infrared band. In addition, the high carrier concentration of indium tin oxide allows its film thickness to be greatly reduced without affecting the carrier transport performance. Therefore, by adjusting the thickness of the indium tin oxide film, a MOS structure with both channel and contact can be prepared, achieving better ohmic contact and bringing greater output current.

[0035] Micro-LED arrays can be divided into two categories according to the driving method. The first category is passive driving that scans row by row and column by column. It has a simple structure and low manufacturing cost, but it is difficult to achieve high-resolution display. In order to achieve more efficient micro-LED applications, the second type of driving method is active driving with independent circuit addressing. The dynamic display of micro-LED pixel units is controlled by CMOS or TFT driving units, which has better development prospects. Experiments have proved that the LED array under active matrix has excellent display characteristics and can independently drive pixel units, which is difficult to achieve with passive matrix.

[0036] The micro-LED array has relevant development bottlenecks in the driving bonding process and electrode materials. This seriously affects the application of micro-LED arrays in display devices. Although the passive driving method has a simple structure, its wiring is complex and crosstalk is prone to occur between pixels. Especially in large-size display application scenarios, it is difficult to ensure the yield of a large number of row and column connection electrodes. In traditional active driving technology, the CMOS or TFT driving part is incompatible with the micro-LED unit process. Therefore, it is difficult to directly complete the driving integration of the driving unit and the light-emitting unit on the same epitaxial wafer. Instead, it is necessary to adopt a positive, flip-chip or vertical chip structure and then bond it with the driving unit to form an array display system. In the integration technology of the driving unit and the micro-LED light-emitting unit, the traditional bonding process methods include gold flip-chip bonding, indium flip-chip bonding, and microtube metal flip-chip bonding. There are problems related to accuracy, thermal management and cost in the bonding process.

[0037] Based on this, the present application provides a channel and contact dual-purpose indium tin oxide (ITO) material design and micro-LED driver integration method, specifically adopting a thickness control method to prepare a thin layer of non-degenerate indium tin oxide semiconductor channel and a thick layer of degenerate indium tin oxide contact electrode, to achieve a high-current MOS driver unit with low contact resistance. And through the control process, a metal oxide semiconductor field effect transistor (metal oxide semiconductor field effect, MOSFET) structure unit is connected in series at the positive or negative electrode of the micro-LED, and a thin layer of indium tin oxide is prepared on the back gate electrode and the high-k dielectric layer, and the interconnection is defined by photolithography and together with the source and drain composed of the thick layer of degenerate indium tin oxide semiconductor, a micro-LED driver unit is formed.

[0038] The switch of the micro-LED unit is controlled by the back gate electrode to simplify the subsequent bonding process, and the channel and contact of the MOS driving unit are both composed of indium tin oxide. Compared with the commonly used thick layer of indium tin oxide contact for metal contact, it has a lower contact resistance and can therefore bring a higher driving current. Based on the above description, the present invention achieves performance regulation from a non-degenerate state to a degenerate state by controlling the thickness of the indium tin oxide film in material design, and further constructs a high-performance MOS unit with low contact resistance. At the same time, the low preparation temperature of indium tin oxide is utilized to make it compatible with the micro-LED unit preparation process. Compared with the traditional process route of preparing the micro-LED light-emitting unit and the driving circuit separately and then integrating them, the micro-LED driven by the MOS structure based on indium tin oxide for both the channel and the contact effectively simplifies the process flow and reduces costs.

[0039] In one embodiment, Figure 1 As shown, a method for integrating a channel and contact dual-purpose indium tin oxide MOS structure with a micro-LED driver is provided, including:

[0040] Step S100: obtaining a micro-LED array located on a substrate material; the micro-LED array includes more than two micro-LED mesa units.

[0041] Specifically, a micro-LED table array processed on a substrate is obtained, so as to facilitate the subsequent fabrication of a dual-purpose MOS structure based on indium tin oxide for channel and contact on the micro-LED low table area, and complete electrical interconnection with the micro-LED unit. Among them, a thin layer of indium tin oxide is used for the channel of the MOS structure, and a thick layer of indium tin oxide is used for the contact electrode of the MOS structure; the micro-LED array is composed of a plurality of micro-LED unit arrays. In one embodiment, Figure 2As shown, the micro-LED unit includes a passivation insulating layer 110, a P-type semiconductor 120, a quantum well 130, an N-type semiconductor 140 and a buffer layer 150, which are arranged in sequence. The buffer layer 150 is arranged on a substrate 160. In this embodiment, the P-type semiconductor 120 is a p-GaN layer, the quantum well 130 is an MQW (Metallic Quantum Well) layer, and the N-type semiconductor 140 is an n-GaN layer. The buffer layer 150 can be made of semiconductor materials, which are mainly compounds of III-V materials such as GaN, InGaN, AlGaN and their multi-element alloys. The substrate 160 can be a substrate made of sapphire, silicon, silicon carbide, gallium nitride and the like. After the buffer layer 150 and the N-type semiconductor 140 are formed in sequence on the substrate 160, the quantum well 130 and the P-type semiconductor 120 are formed in a partial area of ​​the N-type semiconductor 140, and finally the dielectric layer 110 is formed as a whole. The dielectric layer 110 includes a high mesa portion corresponding to the position of the P-type semiconductor 120 , and a low mesa portion corresponding to the position of the N-type semiconductor 140 .

[0042] Step S200: Specifically, Figure 3 As shown, the dielectric layer is etched to open a window in the N-type semiconductor portion of the low terrace, and the N-type semiconductor is exposed by etching away the dielectric layer window on the N-type semiconductor. Figure 4 As shown, an N-electrode 210 and a back gate electrode 220 are prepared on the N-type semiconductor window region and the dielectric layer 110 without window opening by thermal evaporation and electron beam deposition.

[0043] After preparing the N electrode 210 and the back gate electrode 220 of the MOS structure on the low table area of ​​the micro-LED unit, a dielectric layer is deposited on the micro-LED unit. The manufacturing process of the back gate dielectric layer constituting the MOS structure can be atomic layer deposition, magnetron sputtering, etc. The material of the back gate dielectric layer can be the same as or different from the material of the dielectric layer 110 of the micro-LED unit. Specifically, the material of the back gate dielectric layer can be HfOx, AlOx, etc. In one embodiment, in step S200, a gate dielectric layer of the MOS structure is deposited on the micro-LED unit. Compatible integration of the MOS structure into the micro-LED unit is more conducive to simplifying the integration process and further realizing high-density and miniaturized micro-LED application integration. It can be understood that in other embodiments, in step S200, the N electrode 210 and the back gate electrode 220 can be deposited simultaneously on the low table portion of the micro-LED unit, and a high-k dielectric is further deposited on the back gate electrode 220 to obtain the back gate dielectric layer 230 of the MOS structure unit.

[0044] Step S300: depositing a thin layer of non-degenerate indium tin oxide film on the back gate dielectric of the MOS structure and etching it, and opening a window in the dielectric layer of the high terrace P-type semiconductor.

[0045] Specifically, Figure 5 As shown, after the deposition of the gate dielectric layer is completed, a thin layer of non-degenerate indium tin oxide film 240 is prepared on the micro-LED unit as the channel material of the MOS structure. The manufacturing process can be chemical vapor deposition, magnetron sputtering or pulsed laser deposition. After the indium tin oxide film becomes thinner, the grain size will be significantly reduced. The smaller grain size will enhance the grain boundary scattering, limit the migration of carriers, thereby reducing its conductivity and showing semiconductor properties. Furthermore, the channel area of ​​the MOS structure can be defined by photolithography, and then the non-degenerate indium tin oxide film in other areas of the micro-LED unit can be removed by etching.

[0046] Before realizing the electrical interconnection between the MOS structure and the micro-LED unit, it is necessary to perform window etching on the dielectric layer on the high-table P-type semiconductor, such as Figure 6 As shown, the portion of the high terrace area that needs to be opened is defined by photolithography, and the dielectric layer 110 on the high terrace P-type semiconductor is opened by an etching process.

[0047] Step S400: depositing a thick layer of degenerate indium tin oxide film on the interconnection and source-drain electrode regions obtained by window opening to realize the interconnection between the MOS structure and the micro-LED unit.

[0048] Specifically, Figure 7 As shown, the positions of the interconnection and source-drain electrode regions are first defined by photolithography, and a thick layer of degenerate indium tin oxide film 250 is deposited in the interconnection and source-drain electrode regions as the source-drain electrode of the MOS structure in contact with the non-degenerate indium tin oxide channel 240 and interconnected with the micro-LED unit high-table P-type semiconductor. The contact formed between the non-degenerate indium tin oxide film as the channel and the conventional metal electrode is a metal-semiconductor contact, which will produce energy band bending and potential barriers at the interface. By depositing a thick layer of degenerate indium tin oxide as an insertion layer, the dangling bonds and defect states on the surface of the non-degenerate indium tin oxide channel can be effectively reduced, the interface state density can be reduced, and the recombination loss of carriers at the interface can be reduced, and the barrier height can be reduced. In addition, the degenerate indium tin oxide film layer has a relatively higher work function due to the increase in the bulk phase ratio, the decrease in the surface state density, and the introduction of a thick layer of degenerate indium tin oxide as an intermediate insertion layer can adjust the overall energy level structure, so that the work function gap between the non-degenerate indium tin oxide channel and the metal is reduced, thereby reducing the contact barrier.

[0049] The above-mentioned indium tin oxide MOS structure design for both channel and contact and micro-LED driver integration process method prepares a high-current MOS driver structure based on the indium tin oxide material design, and realizes in-situ integration of micro-LED devices in combination with a process-compatible indium tin oxide material preparation method.

[0050] In order to better understand the above-mentioned micro-LED in-situ driving unit manufacturing method, it is explained in detail below in conjunction with a specific embodiment.

[0051] By introducing a thick indium tin oxide contact layer into the MOS structure, the contact barrier between the thin indium tin oxide channel and the metal electrode can be effectively reduced, thereby reducing the contact resistance. At the same time, the insertion layer can regulate the interface state of the thin indium tin oxide channel, effectively reducing the dangling bonds and defect states on the channel surface, thereby reducing the recombination loss of carriers at the interface and reducing the barrier height. Therefore, the indium tin oxide MOS structure that serves both the channel and the contact can provide a higher output current than the traditional semiconductor-metal contact. The MOS structure based on indium tin oxide material is compatible with the preparation process of the micro-LED unit. Compared with the traditional process route of preparing the micro-LED light-emitting unit and the driving circuit separately and then integrating them, it greatly simplifies the process flow and reduces the production cost.

[0052] This application designs a dual-purpose indium tin oxide MOS structure for both channel and contact and integrates it with a micro-LED unit for driving. A thin layer of indium tin oxide film is used as the channel of the MOS structure, and a thick layer of indium tin oxide film is used as an insertion layer between the channel and the metal electrode, which can effectively reduce the contact barrier and greatly increase the output current. In addition, the MOS structure is compatible with the micro-LED unit and integrated, the source electrode of the MOS structure is interconnected with the micro-LED high-table P-type semiconductor through a metal electrode, and the switch of the micro-LED unit is controlled by the back gate electrode of the MOS structure. Specifically, this application adopts the following technical solutions and steps:

[0053] Example 1

[0054] Step 1: Processing to obtain a micro-LED array located on a substrate material.

[0055] This embodiment uses a sapphire substrate epitaxial wafer as the raw material, and its LED epitaxial layer includes a substrate buffer layer, an N-type semiconductor, a quantum well, and a P-type semiconductor from bottom to top. The micro-LED pixel unit is defined on the LED epitaxial layer by photolithography, and then the epitaxial structure is etched to the N-type semiconductor layer by an etching process, thereby forming a high-table P-type semiconductor pixel area and a low-table N-type semiconductor area.

[0056] Step 2: Prepare a passivation insulating layer on the micro-LED unit with high and low terraces after etching, and prepare Al by atomic layer deposition 2 O 3 , Al source and H were alternately introduced at a chamber temperature of 250°C 2 The O source was cycled 480 times to form a 50nm thick Al 2 O 3 Passivation insulating layer.

[0057] Step 3: Define the N-electrode region on the N-type semiconductor in the low terrace region by photolithography, and perform window processing on the passivation insulating layer prepared in the second step by etching.

[0058] Step 4: Define the N-electrode area of ​​the low terrace part and the back gate electrode of the MOS structure through photolithography, and deposit Ti / Al / Ni / Au metal electrodes to form the N-electrode of the micro-LED unit and the back gate electrode of the MOS structure.

[0059] Step 5: Prepare a back gate dielectric layer on the back gate electrode of the MOS structure and prepare HfO by atomic layer deposition 2 At a chamber temperature of 250°C, Hf source and H 2 The O source was cycled 140 times to form a 15nm thick HfO 2 Back gate dielectric layer.

[0060] Step 6: Prepare a thin layer of indium tin oxide channel on the back gate dielectric layer. Based on the RF magnetron sputtering process, set the substrate temperature to 200°C, introduce 30sccm of Ar gas flow rate under 1Pa pressure environment and 60W sputtering power, and maintain a deposition rate of 0.2A / s to prepare a 10nm thick thin layer of indium tin oxide channel.

[0061] Step 7: Define the P-electrode region of the high-table P-type semiconductor by photolithography, and open a window in the region by etching.

[0062] Step 8: Define the source, drain and P electrode areas of the MOS structure through photolithography. Based on the RF magnetron sputtering process, set the substrate temperature to 200°C. In a 1Pa pressure environment and a 90W sputtering power, introduce 30sccm of Ar gas flow and maintain a deposition rate of 0.5A / s to prepare a 110nm uniform thick layer of indium tin oxide to achieve low-barrier contact of the channel of the MOS structure and electrical interconnection of the micro-LED unit.

[0063] 15nm of Ni metal and 35nm of Au metal are deposited to form the source and drain electrodes of the MOS structure, and the drain of the MOS unit is connected to the P electrode of the micro-LED. Then, the brightness of the micro-LED can be controlled by switching the MOS.

[0064] The low-barrier contact based on thick-layer degenerate indium tin oxide can effectively reduce the overall power consumption of the device. The on-state current of the MOS structure reaches 90uA / um, and the threshold voltage approaches 0V. When the MOS structure drives the micro-LED device to light up, the voltage drop of the MOS structure part is 0.56V, accounting for only 14.5% of the total power consumption. This allows the micro-LED to work at a lower voltage, reducing the overall device power consumption, and also making the temperature of the micro-LED lower when working for a long time.

[0065] The MOS structure is based on a thin non-degenerate indium tin oxide channel and a thick degenerate indium tin oxide insertion layer contact. The thin non-degenerate indium tin oxide channel can provide a high concentration of free electrons. This high carrier concentration helps to achieve high electron mobility, thereby improving the switching speed and driving capability of the MOS transistor. In addition, the thin non-degenerate indium tin oxide channel has high optical transparency and can be used in transparent display scenarios. The thick degenerate indium tin oxide contact can effectively reduce the contact resistance and further increase the output current of the MOS transistor. Furthermore, the MOS structure is connected in series with the micro-LED unit through a compatible semiconductor process, and the micro-LED light-emitting unit is finally switched on and off by controlling the gate voltage.

[0066] Specifically, by photolithography to define the interconnection and source-drain electrode area, a degenerate thick layer of indium tin oxide is deposited to connect the source level of the MOS structure with the P electrode of the high table of the micro-LED unit in series. Finally, the gate is used to control the switch of the light-emitting unit to achieve in-situ driving. Due to the process compatibility, the traditional bonding process is omitted, which greatly simplifies the preparation process and reduces production costs.

[0067] As a transparent conductive material, indium tin oxide (ITO) has been widely used in coatings, solar cells, and the most common display industry. Indium tin oxide (ITO) is a high-conductivity, tin-doped semiconductor with a bandgap of about 3.5 eV and a mobility of about 30 cm 2 / V·s. However, due to the high carrier concentration, its current switching ratio is lower than that of traditional oxide semiconductors, so there is very little research on indium tin oxide transistors. In addition, the relative dielectric constant of indium tin oxide is lower than that of indium gallium zinc oxide (IGZO) or zinc oxide (ZnO), and it has greater potential in realizing low-power ultra-short channel transistors. Therefore, the present invention is based on the indium tin oxide material and can prepare a thin layer of non-degenerate indium tin oxide channel with high carrier mobility by controlling its thickness, and is different from the traditional metal-semiconductor contact. By preparing a thick layer of degenerate indium tin oxide contact insertion layer, the contact barrier between the thin layer of non-degenerate indium tin oxide channel and the metal electrode is reduced, thereby achieving a higher output current.

[0068] The driving forms of traditional micro-LED array devices are divided into passive driving and active driving. For passive driving, although the circuit and process of driving the micro-LED array to form a display backplane are relatively simple, the array image refresh rate and brightness are low. For active driving, it is mainly divided into two integration methods: CMOS / micro-LED and TFT / micro-LED. Although the integration of chips at the micron level can be achieved through bonding technology, its process is complex and the preparation cost is high. Efficient integration of indium tin oxide-based MOS structure with micro-LED units is a feasible solution. Taking IGZO as an example, the traditional oxide MOS transistor has a lower output current than ITO, and its optical band gap is smaller than the thin layer of non-degenerate indium tin oxide channel. Therefore, when applying the driving backplane, a layer of black mask is often required to maintain its driving stability. In the prior art, thin-film transistors are improved to adapt to the higher driving current of micro-LEDs, and wafer-level two-dimensional materials such as MoS 2 Thin-film transistors drive micro-LEDs in situ. Although they use the atomic-level size and high carrier mobility of two-dimensional materials to achieve efficient light emission, the large-scale MoS 2 Thin film preparation is difficult, and currently only 2-inch micro-LED in-situ drive array devices can be realized. However, this application uses a MOS structure connected in series to the P and N poles of the micro-LED unit to realize the in-situ drive of the light-emitting unit, which is similar to the two-dimensional MoS 2 Unlike thin-film transistors, the MOS structure of this application is based on oxide semiconductor materials, and its preparation can be achieved in large sizes through chemical vapor deposition, magnetron sputtering, pulsed laser deposition and other methods, which effectively improves the preparation efficiency and reduces the preparation cost. Compared with the prior art, this application prepares high-current MOS transistors based on the regulation of the thickness of indium tin oxide and achieves compatible integration with micro-LED units, optimizing the function and energy efficiency of the display array.

[0069] Comparative Example 1

[0070] When the thickness of the thin non-degenerate indium tin oxide film is 20 nm, the carrier concentration will be too high, making the MOS structure unable to be effectively turned off, and the back gate electrode loses its switching function.

[0071] Comparative Example 2

[0072] When the thickness of the thick degenerate indium tin oxide film is 80 nm, it cannot effectively reduce the contact barrier between the MOS structure channel and the metal electrode.

Claims

1. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact, characterized in that: The micro-LED device includes an arrayed micro-LED unit located on the same substrate, and a MOS structure unit connected in series with the micro-LED unit; the channel layer in the MOS structure unit is a thin layer of non-degenerate indium tin oxide thin film layer, and the micro-LED unit and the MOS structure unit are interconnected by a thick layer of inter-parallel indium tin oxide thin film layer, and the indium tin oxide thin film layer covers the drain region above the channel layer in the MOS structure unit, the source region, the P electrode region above the P-type semiconductor of the micro-LED unit, and the region between the micro-LED unit and the MOS structure unit.

2. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 1, characterized in that: The thickness of the thin layer of non-degenerate indium tin oxide thin film layer is ≤15nm, and the thickness of the thick layer of degenerate indium tin oxide thin film layer is ≥110nm.

3. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 1 or 2, characterized in that: A back-gate dielectric layer and a back-gate electrode are sequentially arranged below the channel layer in the MOS structural unit.

4. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 1 or 2, characterized in that: The micro-LED device is composed of a substrate, an LED epitaxial layer, and an arrayed micro-LED unit and a MOS structural unit arranged above the LED epitaxial layer; the LED epitaxial layer is composed of a high table of the LED epitaxial layer and a low table of the LED epitaxial layer, and the high table of the LED epitaxial layer and the low table of the LED epitaxial layer both include a buffer layer and an N-type semiconductor located on the substrate from bottom to top; the high table of the LED epitaxial layer also includes a quantum well layer and a P-type semiconductor from bottom to top; a P electrode of the micro-LED unit is arranged above the P-type semiconductor, and a thick interlayer parallel indium tin oxide thin film layer is also arranged between the P electrode and the P-type semiconductor; the N electrode of the micro-LED unit and the MOS structural unit are both arranged above the low table of the LED epitaxial layer, and the N electrode of the micro-LED unit is directly in contact with the N-type semiconductor in the low table of the LED epitaxial layer; a passivation insulating layer is arranged between the back gate electrode in the MOS structural unit and the N-type semiconductor in the low table of the LED epitaxial layer.

5. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 4, characterized in that: A passivation insulating layer is directly arranged above the high table of the LED epitaxial layer except the P electrode, and above the low table of the LED epitaxial layer except the N electrode.

6. A micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 4, characterized in that: The substrate is selected from sapphire, silicon, silicon carbide and gallium nitride.

7. The micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 4, characterized in that: The material of the buffer layer is selected from compounds of Group III and V materials and multi-component alloys thereof.

8. The micro-LED device driven by a MOS structure based on a dual-purpose indium tin oxide for both channel and contact according to claim 4, characterized in that: The P-type semiconductor is p-GaN, and the N-type semiconductor is n-GaN.

9. The micro-LED device driven by a MOS structure based on channel and contact dual-purpose indium tin oxide according to claim 4, characterized in that: The material of the passivation insulating layer is selected from one of HfOx, AlOx, and SiOx; The material of the back gate dielectric layer is selected from one of HfOx and AlOx.

10. A method for preparing a micro-LED device driven by a MOS structure based on a channel and contact dual-purpose indium tin oxide according to any one of claims 1 to 9, characterized in that: An LED epitaxial wafer is taken, wherein the LED epitaxial wafer is composed of a substrate and an LED epitaxial layer, wherein the LED epitaxial layer is composed of a buffer layer, an N-type semiconductor, a quantum well layer, and a P-type semiconductor. A P-type semiconductor pixel region and an N-type semiconductor region of a micro-LED unit are first defined on the LED epitaxial layer by photolithography, and a portion outside the P-type semiconductor pixel region is etched to the N-type semiconductor by an etching process, thereby forming a high table of the LED epitaxial layer and a low table of the LED epitaxial layer. A passivation insulating layer is prepared on the surfaces of the high table of the LED epitaxial layer and the low table of the LED epitaxial layer, and then an N-electrode region and a MOS structure unit region are defined on the low table of the LED epitaxial layer by photolithography, and the N-electrode region is formed. The passivation insulating layer is etched to expose the N-type semiconductor, and then a metal electrode is deposited in the N-electrode region to form the N-electrode of the micro-LED unit. At the same time, a back gate electrode and a back gate dielectric layer are sequentially prepared in the MOS structure unit region, and then a thin non-degenerate indium tin oxide film layer is prepared on the back gate dielectric layer. The P-electrode region is defined on the high table of the LED epitaxial layer by photolithography, and then the passivation insulating layer in the P-electrode region is etched to expose the P-type semiconductor. At the same time, the source region and the drain region are defined in the MOS structure unit by photolithography, and then a thick interlayer parallel indium tin oxide film layer is prepared in the source region and the drain region, the P-electrode region, and the region between the micro-LED unit and the MOS structure unit.

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