System and method for cancelling dark current

Abstract

In accordance with an embodiment disclosed, a system includes a photodetector (PD), where the PD generates a first type of charge and a second type of charge; an integrating capacitor connected to the PD; and a controller configured to switch between a first collection state of the integration capacitor in which the integration capacitor is charged by a first type of charge derived from the photocurrent and a first type of charge derived from the dark current, and a second collection state of the integration capacitor in which the integration capacitor is charged by a second type of charge derived from the dark current. In a second collection state, the integrating capacitor is discharged by a second type of charge originating from the dark current, where the first type of charge is opposite the second type of charge, such that the charge originating from the dark current is thereby substantially eliminated.

Description

Technical Field

[0001] The present disclosure relates to photonic systems and, more particularly, to a system and method for eliminating or substantially reducing the effects of dark current in such systems. Background Art

[0002] A photodetection device, such as a photodetector array, may include a plurality of photosensitive cells, each photosensitive cell including one or more photodetectors for detecting incident light, and a capacitor for storing charge provided by the photodetectors. The capacitor may be implemented as a dedicated capacitor and / or using parasitic capacitance of a photodiode, a transistor, and / or other components of the photosensitive cell.

[0003] In use, a photodiode (photodetector) having p-type and n-type doped regions can be reverse biased by connection of applied voltages (positive voltage to the cathode (n-region) and negative voltage to the anode (p-region)) to increase the depletion region at the pn junction. Photons from incident light that illuminate the photodiode and are absorbed in the depletion region (or near the depletion region) will generate electron-hole pairs that will move to opposite ends of the photodiode due to the electric field from the applied voltage. The electrons will move toward the positive potential on the cathode and the holes will move toward the negative potential on the anode. These moving charge carriers (electrons and holes) form a photocurrent in the photodiode that is proportional to the illumination. The charge associated with this photocurrent can be collected in a capacitor during an "integration time" or "integration period", which is the period of time during which the current flowing into the capacitor causes the charge to accumulate, after which the level of stored charge can be determined. The length of the integration time can be selected based on factors such as the sensitivity of the photodetector and / or the brightness of the incident light.

[0004] Dark current is a well-known phenomenon in the field of charge coupled devices (CCDs) and photosensitive integrated circuits. Dark current is generated by thermal energy within the lattice of materials that comprise the CCD. Charges (e.g., electrons) are generated over time and are independent of the light that falls on the detector. When referring to a photodetector or photodiode, dark current refers to the current flowing through the photodetector, including the current when no photons enter the device, such as the current when the photodetector is not illuminated. The dark current in a photodetector may be the result of the random generation of electrons and holes in the depletion region of the photodetector. When the photodetector is connected to an integrating capacitor (e.g., a capacitor in a camera), the dark current may be "counted" as a signal and may fill the capacitor with redundant charge, such as an empty signal, which may prevent the longer integration time required under certain conditions, such as low light conditions. It should be understood by those skilled in the art that this increase in signal also brings statistical fluctuations, the so-called "dark current noise."

[0005] Current methods of reducing this dark current include using a "dummy" photodetector that is shielded from illumination and subtracting the signal detected by the "dummy" photodetector from the signal of another photodetector (exposed to light). Disadvantages of this approach may include larger area requirements and a higher level of complex electronic circuitry, such as in a read-out integrated circuit (ROIC).

[0006] Therefore, in photodetectors characterized by dark current accumulation, it would be necessary and advantageous to have a simple and cost-effective solution implemented at the photodetector level to physically eliminate the dark current. Summary of the invention

[0007] According to the disclosed embodiments, a system includes: a photodetector (PD), wherein the PD generates a first type of charge and a second type of charge; an integrating capacitor connected to the PD; and a controller configured to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor, wherein, within the first collection state, the integrating capacitor is charged with a first type of charge derived from a photocurrent and a first type of charge derived from a dark current, and wherein, within the second collection state, the integrating capacitor is discharged with a second type of charge derived from the dark current, wherein the first type of charge is opposite to the second type of charge such that the charge derived from the dark current is substantially eliminated.

[0008] In some embodiments, the first collecting state is synchronized with illumination arriving at the PD, and wherein the second collecting state is synchronized with illumination not arriving at the PD. In some embodiments, the first collecting state is synchronized with generation of a first type of charge, and wherein the second collecting state is synchronized with generation of a second type of charge.

[0009] In some embodiments, the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa. In some embodiments, the controller is configured to alternately route the first type of charge to the integrating capacitor in the first collection state and the second type of charge to the integrating capacitor in the second collection state. In some embodiments, the system further includes an optical shutter configured to allow or block illumination from reaching the PD. In some embodiments, the optical shutter is controlled by the controller and configured to allow or block illumination from reaching the PD in synchronization with switching between the first collection state and the second collection state. In some embodiments, the optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter, or an active grating resonant coupler.

[0010] In some embodiments, the system further includes a switching system connecting the PD and the integration capacitor, wherein the switching system is configured to switch between a first collection state and a second collection state. In some embodiments, the switching system includes a first switch, a second switch, and a third switch, wherein the first switch is between the PD and the integration capacitor, the second switch is between the PD and the third switch, and the third switch is between the power supply, the PD, and the integration capacitor.

[0011] According to the disclosed embodiments, a method includes: providing a photodetector (PD) connected to an integrating capacitor and a controller, wherein the PD generates a first type of charge and a second type of charge opposite to the second type of charge; switching by the controller to a first collection state of the integrating capacitor; within the first collection state, charging the integrating capacitor with the first type of charge derived from the photocurrent and the first type of charge derived from the dark current; switching by the controller to a second collection state of the integrating capacitor; and within the second collection state, discharging the integrating capacitor with the second type of charge derived from the dark current, thereby substantially eliminating the charge derived from the dark current.

[0012] In some embodiments, the first collecting state is synchronized with illumination arriving at the PD, and wherein the second collecting state is synchronized with illumination not arriving at the PD. In some embodiments, the first collecting state is synchronized with generation of a first type of charge, and wherein the second collecting state is synchronized with generation of a second type of charge.

[0013] In some embodiments, the first type of charge and the second type of charge are holes and electrons, respectively, or vice versa. In some embodiments, the controller is configured to route the first type of charge and the second type of charge to the integrating capacitor in the first collection state and the second collection state, respectively.

[0014] In some embodiments, the method further includes providing an optical shutter configured to allow or block illumination of the PD. In some embodiments, the optical shutter is controlled by a controller, and in some embodiments, the optical shutter is controlled by a controller, and wherein allowing or blocking illumination is controlled by the controller and is substantially synchronized with switching between the first collection state and the second collection state. In some embodiments, the optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter, or an active grating resonant coupler.

[0015] In some embodiments, the method further includes providing a switching system connecting the PD and the integration capacitor, wherein the switching system is configured to switch between a first collection state and a second collection state. In some embodiments, the switching system includes a first switch, a second switch, and a third switch, the first switch is between the PD and the integration capacitor, the second switch is between the PD and the third switch, and the third switch is between the power supply, the PD, and the integration capacitor.

[0016] According to the disclosed embodiments, a system includes: a photodetector (PD), wherein the PD generates a first type of charge derived from a combined photocurrent and dark current and a second type of charge derived from the dark current; an integrating capacitor connected to the PD; a switching system and a controller, the controller being configured to use the switching system to switch between a first collection state of the integrating capacitor and a second collection state of the integrating capacitor, wherein, in the first collection state, the integrating capacitor is charged with the first type of charge, and wherein, in the second collection state, the integrating capacitor is discharged with the second type of charge, wherein the first type of charge is reversed relative to the second type of charge by the switching system, such that when the net amount of charge derived from the dark current and collected by the integrating capacitor is substantially zero, the reversal results in substantially canceling or eliminating the charge derived from the dark current. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate several embodiments and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0018] Figure 1 is a schematic block diagram illustrating a system for dark current cancellation according to some embodiments of the presently disclosed subject matter;

[0019] Figure 2A and Figure 2B is an illustrative circuit diagram of a system for dark current cancellation according to some embodiments of the presently disclosed subject matter;

[0020] Figure 3 is a flow chart of an example process for dark current cancellation in an imaging system according to some implementations of the presently disclosed subject matter;

[0021] Figure 4A and Figure 4B is an exemplary graph illustrating the accumulated voltage across an integrating capacitor over a plurality of consecutive collection states according to some implementations of the presently disclosed subject matter;

[0022] Figure 5 is a flow chart of an example process for dark current cancellation in an imaging system according to some implementations of the presently disclosed subject matter; and

[0023] Figure 6 is an exemplary graph illustrating the accumulated voltage across an integrating capacitor over a plurality of consecutive collection states according to some implementations of the presently disclosed subject matter. DETAILED DESCRIPTION

[0024] In the following detailed description, many specific details are set forth to provide a thorough understanding of the present disclosure. However, those skilled in the art will appreciate that the present disclosure can be practiced without these specific details. In other cases, well-known methods, procedures, and components are not described in detail to avoid blurring the present disclosure. In the accompanying drawings and descriptions set forth, the same reference numerals represent those components common to different embodiments or configurations. It should be understood that, for simplicity and clarity of illustration, the elements shown in the drawings are not necessarily drawn to scale. For example, for clarity, the size of some elements may be exaggerated relative to other elements.

[0025] The present disclosure describes systems and methods that can substantially reduce or eliminate dark current generated by a photodetector. Eliminating the dark current generated by the photodetector can allow for longer integration times for an integration capacitor connected to the photodetector because the charge accumulated by the capacitor can be reduced due to the dark current elimination. The elimination or cancellation of dark current can be performed by subtracting the signal generated by the photodetector when illuminated from the signal generated by the same photodetector when not illuminated. In order to eliminate or cancel the dark current, the net amount of collected charge originating from the dark current becomes substantially zero. In some embodiments, the accumulated signal may also carry statistical fluctuations known as "dark current noise", which may not be eliminated with the elimination or cancellation of the dark current generated by the photodetector.

[0026] In some embodiments, the disclosed system can be configured to alternately allow or prevent illumination of the photodetector to generate a signal of the same photodetector under illumination and no illumination conditions. In some embodiments, an optical shutter can be used to alternately allow or block illumination of the photodetector. The illumination and no illumination states of the photodetector can be synchronized, for example, by one or more electrical switches configured to switch between collecting a first type of charge and a second type of charge. For example, between the collection of holes and electrons generated by the photodetector, such that when the photodetector is illuminated, the first type of charge originating from the combined photocurrent and dark current is collected by the integrating capacitor, and when the photodetector is not illuminated, the second type of charge originating from the dark current is collected by the integrating capacitor. Since the collected charges are of opposite signs, the signal (charge) associated with the dark current, for example, the signal (charge) collected when the photodetector is not illuminated, may cancel the dark current collected when the photodetector is illuminated, leaving only the charge associated with the desired light signal, for example, the signal generated by the photocurrent, collected when the photodetector is illuminated. In some embodiments, the first type of charge is reversed relative to the second type of charge by the switching system, so that the reversal substantially causes the collected charge originating from the dark current to be cancelled or eliminated. By eliminating, counteracting or substantially reducing the charge generated by the dark current, a longer integration period can be achieved, collecting primarily or only the desired light signal related charge.

[0027] Advantageously, the disclosed systems and methods of use rely on physical cancellation of collected charge and thus may not require complex analog circuitry or additional "dummy" photodetectors, thereby further saving space in photodetector applications. Further advantageously, the disclosed systems and methods of use may substantially reduce or eliminate dark current from a photodetector without degrading detector responsiveness. Use of the disclosed systems and methods may be particularly advantageous when the materials used in the photodetector may be characterized by relatively high dark current, such as when using germanium-based photodiodes.

[0028] Hereinafter, in this specification, for simplicity, the term "photodetector array" may be replaced by the acronym "PDA", and the term "photodetector" or "photodiode" may be replaced by the acronym "PD". In some embodiments, the PDA may include a plurality of photosensitive units, each photosensitive unit including one or more photodetectors, and the PDA and / or the photosensitive units may include some circuits or additional components in addition to the photodetectors. For convenience, a device configured to alternately allow or prevent illumination of a photodetector may be referred to herein as an "optical shutter" or "shutter", but it should be understood that such a device is not limited to an optical shutter. The terms "optical signal" or "optical current" or "optical charge" or "photocurrent" may be used interchangeably herein to refer to a signal generated by a PD that represents the desired detected illumination. The terms "inverted", "opposite" and "opposite" (referring to the charge generated by the PD) may be used interchangeably herein.

[0029] Figure 1 is a schematic block diagram illustrating a system configured for dark current cancellation according to some implementations of the presently disclosed subject matter. System 100 may include a photodetector 110 , a switching system 112 , an integrator 114 , an optical shutter 116 , and a controller 118 .

[0030] PD 110 may detect incident radiation or illumination, such as reflections from illumination source 120, ambient illumination, or direct illumination, to generate an electrical signal representative of the amount of incident illumination within the detectable spectral range of PD 110. In some embodiments, illumination source 120 may be external to system 100, while in some embodiments, illumination source 120 may be integrated or may be part of system 100. In addition to incident illumination, the electrical signal generated by PD 110 may also include dark current, which may accumulate over an integration time and may be eliminated according to embodiments of the present disclosure.

[0031] In some embodiments, PD 110 may include an anode and a cathode, which may be electrically connected to a voltage source (eg, Figure 2A-2BA voltage source 122 is provided for applying a voltage across the PD 110 to bias the PD 110 (such as a reverse bias for operation as a photodetector). The PD 110 can generate free charge carriers, such as a first type of charge and a second type of charge. In some embodiments, the first type of charge is opposite to the second type of charge, such as electrons and holes. For example, the PD 110 may include a PN junction that generates electrons and holes in a semiconductor. It will be appreciated by those skilled in the art that any type of junction or interface between two or more semiconductor materials that can generate electrons and holes may be used.

[0032] The switching system 112 may be used, activated or controlled, for example, by the controller 118, to allow desired operation and synchronization of the components of the system 100. According to some embodiments, the switching system 112 may be connected to the PD 110, the controller 118, the integrator 114, and the shutter 116. Any connection may be made so as to allow the desired operation of the components, for example, the switching system 112 may be connected to the PD 110 at the anode and cathode of the PD 110.

[0033] In some embodiments, the switching system 112 may include one or more electrical switches, such as a voltage controlled switch, a current controlled switch, or any type of electrical switch. The switching system 112 may be connected to and controlled by the controller 118. The switching system 112 may be configured to control switching between at least two states, also referred to herein as "collection states," enabling the collection of signals generated by the PD 110 by the integration capacitor 114. The collection state may be a period or duration during which the integration capacitor 114 is charged or discharged. The collection state may be defined by a predetermined time during which the integration capacitor 114 is charged or discharged when the elements of the system 100 are connected in a predetermined configuration.

[0034] The switching system 112 can control the configuration of the system 100 as described in embodiments of the present invention. For example, the first collection state can be synchronized with illumination reaching the PD 110, and the second collection state can be synchronized with illumination not reaching the PD 110 (or vice versa). In some embodiments, the first (illuminated) collection state can include collecting charge from the PD 110, including charge derived from the optical current and charge derived from the dark current, and the second (non-illuminated) collection state can include collecting charge from the PD 110, including charge derived from the reverse dark current.

[0035] The integrator or "integrating capacitor" 114 can be any capacitive device known in the art to be capable of storing electrical energy and generating a charge during an integration period, the charge including the accumulated charge collected during the integration period. The integrator 114 can be connected to the PD 110 via the switching system 112 so that in each of a plurality of collection states, the integrator 114 can be charged and / or discharged with the charge generated by the PD 110. For example, opposite charges (alternatively referred to herein as "opposite charge carriers," "reversed charge carriers," or "electrons and holes") can be collected alternately in a first collection state and a second collection state. In accordance with the operation of the disclosed system 100, alternating dark current-related opposite charges can be collected by the integrator 114, wherein the collected opposite dark current-related charges can cancel each other (or alternatively can be referred to as "charging and discharging" the integrator 114), thereby reducing, subtracting, or eliminating the charge originating from the dark current during the integration period. In some embodiments, the integration period can be controlled by a controller 118. In some embodiments, after the integration period is completed, the accumulated signal collected in integrator 114 can be read by or provided to an external device (not shown) for use in determining the signal generated by PD 110 so that the signal can be used, for example, as part of an imaging system.

[0036] The optical shutter 116 may be configured to prevent or allow exposure of the PD 110 to illumination. In the present disclosure, when the optical shutter 116 is referred to as "open" or "activated", the optical shutter 116 may block illumination of the PD 110, and when the optical shutter 116 is referred to as "closed" or "inactive", the optical shutter 116 may allow illumination of the PD 110. In some embodiments, the optical shutter 116 may include, but is not limited to, a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter, and / or an active grating resonant coupler. In some embodiments, a single optical shutter 116 covering each PD 110 in the PDA may be provided for blocking / allowing illumination of each PD 110, or alternatively, a single optical shutter 116 covering multiple PDs 110 may be provided for simultaneously blocking or allowing illumination of the covered multiple PDs 110.

[0037] The controller 118 may control the operation and synchronization of the components of the system 100. The controller 118 may be a computing device as described herein, and may include a non-transitory computer-readable medium containing instructions that, when executed by at least one processor, are configured to perform the functions and / or operations necessary to provide the functionality described herein. Here, the system 100 may provide specific functions or perform specific operations, and it should be understood that these functions or operations may be performed by the controller 118, which may control other components of the system 100. For example, the controller 118 may activate the optical shutter 116, thereby preventing the PD 110 from receiving any illumination, while controlling the switching system 112 to change the collection state of the integrator 114 from a first collection state to a second collection state, such as from holes to electrons, or vice versa.

[0038] In some embodiments, the functionality of controller 118 is provided by other components. In a non-limiting example, optical shutter 116 may include embedded switching logic that connects to switching system 112 and activates switching system 112 (or vice versa).

[0039] To keep it simple, Figure 1 System 100 is shown having a single PD 110, switching system 112, integrator 114, and optical shutter 116, but it should be understood that in practice, system 100 may include any suitable number of PDs 110 formed as a PDA, with a corresponding number of switching systems 112, integrators 114, and optical shutters 116.

[0040] In use, the system 100 may function as follows: the PD 110, connected to the integrator 114, may generate a first type of charge when exposed to illumination, and a second type of charge when illumination of the PD 110 is blocked, and the second type of charge may be inverted relative to the first type. For example, the first type of charge may include electrons and the second type of charge may include holes, or vice versa.

[0041] The controller 118 may use, control or operate the switching system 112 to switch between a first collection state of the integrator 114 and a second collection state of the integrator 114. The first collection state may be synchronized with illumination reaching the PD 110, and the second collection state may be synchronized with illumination not reaching the PD 110 (or vice versa). The first collection state may be synchronized with the generation of a first type of charge (generated by the PD 110), and the second collection state may be synchronized with the generation of a second type of charge (generated by the PD 110). In the first collection state, the integrator 114 may be charged by the first type of charge, and in the second collection state, the integrator 114 may be discharged by a second type of charge opposite to the first type of charge. The amount of charge from the first type may be generated by both photocurrent and dark current, and the amount of charge from the second type may be generated only by dark current (or vice versa). Due to the opposite or reversed charges of the first and second types of charges (e.g., holes and electrons), the charge generated by or derived from the dark current can be cancelled, and the integrating capacitor 114 can be left with only the charge generated by the light impinging on the PD 110 (without the charge generated by the unwanted dark current). The amount of charge generated by or derived from the dark current in the first collection state is a reversed charge that is substantially the same as the amount of charge generated by or derived from the dark current in the second collection state, and thus after each two consecutive collection states (e.g., the first and second collection states), the charge generated by or derived from the dark current is cancelled, subtracted, or cancelled.

[0042] According to some embodiments, within a first collection state, shutter 116 is "closed", and thus illumination can reach PD 110. PD 110 can generate a first type of charge, such as electrons, derived from or generated from both photocurrent (due to incident light energy) and dark current (due to thermal energy within the PD structure). Therefore, within the first collection state, the integration capacitor 114 can be charged by the first type of charge derived from the photocurrent and the first type of charge derived from the dark current. Within the second collection state, shutter 116 is "open", and thus no illumination can reach PD 110, i.e., the PD can be in dark conditions. Although no illumination reaches PD 110, PD 110 can generate charges derived only from or generated by dark current. PD110 can generate a second type of charge, such as holes, derived from or generated by dark current (due to thermal energy within the PD structure). Therefore, within the second collection state, the integration capacitor can be discharged by the second type of charge derived from the dark current, thereby substantially eliminating the charge derived from the dark current.

[0043] Figure 2A and Figure 2B is an illustrative circuit diagram of a system for dark current cancellation according to some implementations of the presently disclosed subject matter. Figure 2A-2BThe circuit diagram shows Figure 1 illustrative and exemplary circuit implementations of the system 100. In addition, Figure 2A-2B The circuit diagrams are simplified and may exclude other circuit components that are not considered necessary for understanding the concepts disclosed herein. It should be understood by those skilled in the art that Figure 2A-2B The circuit diagram is just Figure 1 The exemplary embodiment of the system 100 is shown in FIG. 1 , and any other circuits or embodiments including the same or different components and elements may be used to perform or implement embodiments of the disclosed subject matter.

[0044] Circuit 200 may include integrating capacitor 114, voltage source 122, PD 110, switching system 112, and shutter 116. Circuit 200 may be configured to enable switching between a first collection state of integrating capacitor 114 and a second collection state of integrating capacitor 114, wherein the first collection state is synchronized with illumination arriving at PD 110 and the second collection state is synchronized with illumination not arriving at PD 110. In some embodiments, some or all components of circuit 200 may be controlled by a controller, such as controller 118 described above. In some embodiments, such as Figure 2A-2B As shown in the illustrative circuit diagram of , the switching system may include a first switch, a second switch and a third switch, the first switch being between the PD and the integration capacitor, the second switch being between the PD and the third switch, and the third switch being between the power supply, the PD and the integration capacitor.

[0045] In some embodiments, such as Figure 2A-2B As shown in the illustrative circuit diagram of , the integrating capacitor 114 may include a capacitor 114-1 and an operational amplifier (OP AMP) 114-2 in a reverse feedback configuration. The PD 110 may include two terminals, an anode represented as "A" and a cathode represented as "B", which output charges with opposite signs. The voltage source 122 may include a cathode voltage (Vc) and an anode voltage (Va), wherein Vc may be applied to the cathode (C) of the PD 110 and Va may be applied to the anode (A) of the PD 110. Vc is the voltage applied to the cathode and Va is the voltage applied to the anode. The voltages Va and Vc may be applied to the PD 110, such as to allow the PD 110 to operate. For reverse biasing of the PD 110 for use as a PD, Vc may be positive and Va may be negative.

[0046] In some embodiments, switching system 112 can be configured to direct electrical connections within components of circuit 200, such as to allow switching between a first collection state and a second collection state. Switching system 112 can connect PD 110 and integrating capacitor 114 to allow alternating collection of the first and second charge types. Figure 2A-2B As shown, the switching system 112 (eg, Figure 1 The switching system 112 of the PD 110 may include switches 112-1, 112-2, and 112-3. It should be understood by those skilled in the art that the use of three switches represents an exemplary design, and any number of switches may be used to switch between two or more configurations of the terminals of the PD 110, the terminals of the integrating capacitor 114, and the terminals of the voltage source 122 as described in the embodiments of the present disclosure.

[0047] In some embodiments, circuit 200 can be configured by switching system 112 to collect the first type of charge or the second type of charge. Figure 2B As shown, when the cathode (C) is connected to the positive terminal of the capacitor 114-2 and the cathode voltage Vc is connected to the negative terminal of the capacitor 114-2, the first type of charge can be collected by the integrating capacitor 114. The anode (A) is connected to the anode voltage Va.

[0048] like Figure 2A As shown, when the anode (A) is connected to the positive terminal of the capacitor 114-2 and the anode voltage Va is connected to the negative terminal of the capacitor 114-2, the second type of charge can be collected by the integrating capacitor 114. The cathode (C) is connected to Vc.

[0049] Switches 112-1, 112-2, and 112-3 may be configured to operate such that Vc is applied to C and Va is applied to A in both the first and second collection states to ensure that PD 110 is reverse biased and enable photocurrent and dark current to flow from C to A.

[0050] like Figure 2A As shown, switches 112-1, 112-2, and 112-3 can be configured to be substantially synchronized with optical shutter 116 so that in a first collection state, e.g., when PD 110 is not illuminated because optical shutter 116 is “open” (light 130 does not reach PD 110), a first type of charge including dark current-related charge from PD 110 can be collected by integrating capacitor 114. Figure 2BAs shown, switches 112-1, 112-2 and 112-3 can be configured to be substantially synchronized with the optical shutter 116 so that in a second collection state, for example, when PD 110 is illuminated because the optical shutter 116 is "closed" (light 130 is reaching PD 110), a second type of charge including photocurrent and dark current related charges from PD 110 is collected by the integrating capacitor 114.

[0051] like Figure 2A and Figure 2B As shown, the rearrangement of the circuit 200 by switching the switches 112-1, 112-2, and 112-3 results in the first type of charge collected in the first collection state being opposite to the second type of charge collected in the second collection state, so that the integration capacitor 114 is charged by the first type of charge derived from the dark current and discharged by the opposite second type of charge derived from the dark current, thereby substantially canceling or offsetting the charge derived from the dark current. As described in the embodiments of the present disclosure, with reference to Figure 1 , controller 118 may direct switches 112-1, 112-2, and 112-3 to switch substantially synchronously with optical shutter 116. It should be understood that while in some embodiments, the first collection state of switching system 112 may be substantially synchronized with illumination of PD 110 (optical shutter 116 “closed”) and the second collection state may be substantially synchronized with no illumination of PD 110 (optical shutter 116 “open”), in other embodiments, the first collection state of switching system 112 may be substantially synchronized with no illumination of PD 110 (optical shutter 116 “open”) and the second collection state may be substantially synchronized with illumination of PD 110 (optical shutter 116 “closed”).

[0052] Because dark current-related or dark current-derived charge may be present in both the first and second types of collected charge, the dark current-related opposing first and second types of charge cancel each other, thereby substantially reducing, eliminating, or canceling the dark current charge collected in integration capacitor 114. In contrast, photocurrent-related charge (e.g., charge resulting from light impinging on PD 110 that is collected only in the second collection state) accumulates in integration capacitor 114 for the duration of the integration period.

[0053] Figure 3 is a flow chart of an example process for dark current cancellation in an imaging system according to some implementations of the presently disclosed subject matter.

[0054] Flowchart 300 shows that, for example, Figure 1 The system 100 and / or Figure 2A-2BAccording to some embodiments of the disclosed subject matter, a non-transitory computer-readable medium associated with system 100 may contain instructions that, when executed by at least one processor, perform the operations described at each step as part of flowchart 300. The at least one processor may correspond to, for example Figure 1 Controller 118.

[0055] In step 302 , an integration cycle of an integrating capacitor (eg, integrating capacitor 114 ) may begin, such as when the integrating capacitor has been discharged.

[0056] In step 304, illumination may reach the PD, for example, the optical shutter 116 may be deactivated to allow or enable illumination of the PD 110. The PD 110 may generate a first type of charge including dark current related charges and photocurrent related charges. Substantially simultaneously, the controller 118 and / or the switching system 112 may switch the integrating capacitor 114 to a first collection state, in which the integrating capacitor 114 may collect or be charged by the first type of charge (electrons or holes) generated by the PD 110. In some embodiments of the present disclosure, the optical shutter is controlled by a controller, and the controller controls to allow or block illumination, and the switching between the first collection state and the second collection state is substantially synchronized.

[0057] In step 306, illumination may be prevented from reaching the PD, e.g., optical shutter 116 may be activated to prevent illumination of PD 110. PD 110 may generate a second type of charge including dark current related charge (and no photocurrent related charge because illumination is blocked). Substantially simultaneously, controller 118 and / or switching system 112 may switch integrating capacitor 114 to a second collection state in which integrating capacitor 114 may collect or be charged by a second type of charge that is inverted relative to the first type (electrons or holes) generated by PD 110. PD 110 is not illuminated in step 306, and therefore PD 110 does not generate photocurrent related charge.

[0058] It should be appreciated that the opposing charges associated with the dark current collected during both steps 304 and 306 may substantially cancel each other, thereby eliminating the effects of the dark current generated by PD 110. Due to the opposing charges from the dark current at each collection state, dark current cancellation may be achieved by charging and discharging the integrating capacitor with the same amount of charge.

[0059] When the first collection state is synchronized with illumination reaching the PD and the generation of the first type of charge, the second collection state is synchronized with the absence of illumination reaching the PD and the generation of the second type of charge. Therefore, during the cycle of both the first collection state and the second collection state, the charge originating from the dark current collected by the integration capacitor is canceled, and only the charge originating from the photocurrent is collected in the integration capacitor.

[0060] It should be understood that the process represented by flowchart 300 can alternately provide a non-illumination step (such as step 306) followed by an illumination step (such as step 304), so that a first type of charges including only dark current related charges can be collected in a first collection state, and a second type of charges including dark current related charges and photocurrent related charges can be collected in a second collection state.

[0061] Steps 304 and 306 may be repeated as indicated by arrow 310 until the integration period ends at step 308, at which time the charge collected in integration capacitor 114 may be read and integration capacitor 114 may be discharged to begin a continuous integration period. For example, the discharge of integration capacitor 114 may be performed by a readout integrated circuit (ROIC), which may use the collected charge indicative of photocurrent for imaging purposes.

[0062] It will be appreciated that the process represented by flow chart 300 may be repeated for each successive integration period.It will be appreciated that the process represented by flow chart 300 may be repeated for each PD 110 forming part of the PDA.

[0063] Figure 4A and Figure 4B is an exemplary graph illustrating the accumulated voltage across an integrating capacitor during multiple iterations of the process in flowcharts 300 and / or 500 according to some implementations of the presently disclosed subject matter.

[0064] Figure 4A-4B An illumination period (denoted as "a") and a non-illumination period (denoted as "b") of the PD 110 are shown, such as may be generated by on / off switching of the optical shutter 116. According to an embodiment of the present disclosure, the illumination period "a" and the non-illumination period "b" may be synchronized with predefined collection states of the integrating capacitor, so that the illumination period "a" may be associated with a first collection state, while the non-illumination period "b" may be associated with a second collection state, and vice versa.

[0065] Line 410 shows the dark current-related voltage accumulated across the integrating capacitor 114. As shown, when alternating opposite dark current-related charges are collected by the integrating capacitor 114, the dark current-related charges can cancel each other to substantially reduce or eliminate the effect of the dark current on the collected charge. The integrating capacitor is charged with a first type of charge derived from the dark current during each illumination period "a", and discharged with an equal amount of the opposite second type of charge derived from the dark current during each non-illumination period "b", as shown by line 410. Exemplary line 412 shows an input photocurrent-related voltage signal representing illumination detected by the PD 110. As shown, during periods when the PD 110 is not illuminated ("b" periods), no photocurrent-related charge is collected because the PD 110 does not generate photocurrent.

[0066] In the absence of the system disclosed herein, as shown by exemplary line 414, dark current related charge may be undesirably added to the accumulated photocurrent related charge, thereby undesirably increasing the charge collected in integrating capacitor 114, such that integrating capacitor 114 may reach its capacity before the end of the desired integration time, or such that the voltage read across integrating capacitor 114 may be unduly affected by the collection of dark current related charge.

[0067] Exemplary line 416 shows the accumulated combined photocurrent-related voltage and dark current-related voltage across the integrating capacitor 114 using the system 100 as disclosed herein. As shown, for example, at point 418 (where lines 416 and 412 intersect), after the combined first and second collection states (one state with the PD 110 illuminated and one state with the PD 110 not illuminated) are over, the voltage across the integrating capacitor 114 is only the result of the photocurrent-related charge, because the dark current-related charge has been cancelled, as shown by line 410.

[0068] It will be appreciated that by reducing the effects of dark current to substantially zero, offsetting or eliminating charge collection may be reduced or eliminated and thus the integration time may be increased relative to the integration time over which dark current has an effect.

[0069] exist Figure 4A In the system 100, the positive charge of the photocurrent is collected and Figure 4B is configured to collect negative charges of photocurrent. Figure 2A and 2B As shown, the controller 118 may select which collection state ( Figure 2A or 2B) to activate an alternative collection configuration. Figure 2A shows the no-lighting state, Figure 2BIllumination states are shown, but it will be appreciated that these may be interchanged, either collecting positive charge for the photocurrent or collecting negative charge for the photocurrent.

[0070] Figure 5 is a flow chart of an example process for dark current cancellation in an imaging system according to some implementations of the presently disclosed subject matter.

[0071] Flowchart 500 shows that, for example, Figure 1 The system 100 and / or Figure 2A-2B Thus, the steps or process described by flowchart 500 may first include providing a photodetector (PD) connected to an integrating capacitor and a controller, such as Figure 1 The PD can generate a first type of charge and a second type of charge that is reversed relative to the second type of charge. For example, positive charge and negative charge, such as holes and electrons.

[0072] As indicated at step 510, the integration period may be achieved by, for example, switching the controller to an integration capacitor (eg, Figure 1 It should be understood that the integration cycle of the integration capacitor may start, for example, when the integration capacitor has been discharged.

[0073] Step 520 may indicate a first collection state, which may include enabling illumination to reach the PD as indicated by step 522, and generating a first type of charge by the PD as indicated by step 524. In some embodiments of the present disclosure, the first collection state may be synchronized with illumination reaching the PD and the generation of the first type of charge, while the second collection state (indicated by step 540) may be synchronized with illumination not reaching the PD and the generation of a second type of charge that is inverted relative to the first type. In some embodiments of the present disclosure, the first collection state may be synchronized with illumination not reaching the PD, while the second collection state (indicated by step 540) may be synchronized with illumination reaching the PD. For example, the optical shutter 116 may be deactivated to allow or enable illumination of the PD 110. Within the first collection state, when illumination reaches the PD, the PD may generate photocurrent-related charges from a first type (e.g., holes or electrons) and dark current-related charges from the first type (e.g., holes or electrons). According to an embodiment of the present disclosure, if the first type of charge is a hole, the second type of charge may be an electron, and vice versa.

[0074] Step 520 may further include charging the integrating capacitor with the first type of charge derived from the photocurrent and the first type of charge derived from the dark current within the first collection state, as indicated by step 526. For example, if the first type of charge is holes, holes generated by the photocurrent and holes generated by the dark current may be collected by the integrating capacitor, and the integrating capacitor may be charged with positive charges associated with the photocurrent and the dark current.

[0075] In step 530, switching to an integrating capacitor (eg, Figure 1 The controller may be configured to route the first type of charge and the second type of charge to the integrating capacitor 114 in the first collection state and the second collection state, respectively.

[0076] Step 540 may also include discharging the integrating capacitor with the second type of charge originating from the dark current within the second collection state, thereby substantially eliminating the charge originating from the dark current, as indicated by step 546 .

[0077] For example, if the first type of charge is holes, then within a first collection state, holes generated by the photocurrent and holes generated by the dark current can be collected by an integrating capacitor, which can be charged with positive charges associated with the photocurrent and the dark current. Within a second collection state, a second charge type opposite to the first type (e.g., electrons generated by the dark current) can be collected by an integrating capacitor, which can be charged with negative charges associated with the dark current, thereby discharging the integrating capacitor with the same amount of positive charges originating from the dark current collected in the first collection state. The opposite charges of the dark current-related charges in the first and second collection states can cancel each other, and thus only the charge originating from the photocurrent can be collected in the integrating capacitor, while the dark current-related charges can be eliminated.

[0078] Steps 520 and 540 may be repeated until the integration period ends or until a predetermined time period is reached, as indicated by arrow 550. Charge originating from the dark current may be eliminated after each cycle of steps 520 and 540. When the collected charge in the integration capacitor 114 is read, for example, by the ROIC, the ROIC may use the collected charge, which is indicative of only the photocurrent, for imaging purposes.

[0079] It will be appreciated that the process represented by flow chart 500 may be repeated for each successive integration period.It will be appreciated that the process represented by flow chart 500 may be repeated for each PD 110 forming part of the PDA.

[0080] According to some embodiments of the disclosed subject matter, a non-transitory computer-readable medium may contain instructions that, when executed by at least one processor, perform the operations described at each step as part of flowchart 500. The at least one processor may correspond to, for example Figure 1 Controller 118.

[0081] Figure 6 is an exemplary graph illustrating the accumulated voltage across an integrating capacitor during multiple iterations of the process in flowcharts 300 and / or 500 according to some implementations of the presently disclosed subject matter. Figure 6 1 shows an illumination period (denoted as “shutter closed”) and a non-illumination period (denoted as “shutter open”) of the PD 110, such as may be generated by an open / closed switching of the optical shutter 116, and / or generated by the controller 118. According to an embodiment of the present disclosure, the illumination period and the non-illumination period may be synchronized with predefined collection states of the integrating capacitor, so that the illumination period may be associated with a first collection state and the non-illumination period may be associated with a second collection state, and vice versa. The synchronization between the illumination period and the non-illumination period and the collection state may be controlled by the controller 118 via Figure 1 The switching system 112 is controlled.

[0082] Line 611 shows the reset value of the integration capacitor, which represents the reference value when the integration capacitor is discharged. Line 610 shows the accumulated dark current-related charge across the integration capacitor 114. As shown, when the alternating opposite dark current-related charges are collected by the integration capacitor 114, the dark current-related charges can cancel each other to substantially reduce or eliminate the effect of the dark current on the collected charge. Although the integration capacitor is charged by the first type of charge (e.g., electrons) derived from the dark current during each illumination period ("shutter closed"), the integration capacitor is discharged by the same amount of the opposite second type of charge (e.g., holes) derived from the dark current during each non-illumination period ("shutter open"), as shown by line 610. It should be understood by those skilled in the art that the line 610 of accumulated dark current-related charge can also be generated under completely dark conditions, that is, when the shutter is in the "always open" position so that light is blocked from reaching the PD 100. Line 610 can be affected only by the charge generated by the dark current, which can be generated when no photons enter the PD 110. In such an embodiment, alternative collection configurations (e.g., Figure 2A and 2B 14) may be activated by controller 118 without synchronization with the state of shutter 116, for example, shutter 116 may always be open.

[0083] Exemplary line 612 illustrates the input accumulated photocurrent-related voltage charge representing illumination detected by PD 110. As shown, during periods when PD 110 is not illuminated ("shutter-open" periods), no photocurrent-related charge is collected because PD 110 is not generating photocurrent.

[0084] In the absence of the system disclosed herein, as shown by exemplary line 614, dark current related charge may be undesirably added to the accumulated photocurrent related charge, thereby undesirably increasing the charge collected in integrating capacitor 114, such that integrating capacitor 114 may reach its capacity before the end of the desired integration time, or such that the voltage read across integrating capacitor 114 may be unduly affected by the collection of dark current related charge.

[0085] It should be understood that by reducing the effects of dark current to essentially zero, offsetting or eliminating as disclosed in the embodiments of the present disclosure, charge collection caused by dark current can be eliminated, and thus the integration time can be increased relative to the integration time during which the dark current has an effect on the integration capacitor 114.

[0086] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.The materials, methods, and examples provided herein are illustrative only and are not intended to be limiting.

[0087] Unless otherwise specifically stated, as will be apparent from the following discussion, it should be understood that throughout the specification discussion, the use of terms such as "process," "calculate," "calculate," "determine," "generate," "set," "configure," "select," "define," etc. includes operations on a computer and / or operations and / or processes that transform data into other data, the data being represented as physical quantities, such as electronic quantities, and / or the data representing physical objects.

[0088] The terms "computer," "processor," and "controller" should be broadly interpreted to cover any type of electronic device with data processing capabilities, including, by way of non-limiting example, personal computers, servers, computing systems, communications equipment, processors (e.g., digital signal processors (DSPs), microcontrollers, field programmable gate arrays (FPGAs), application specific integrated circuits, etc.), any other electronic computing device, and / or any combination thereof.

[0089] Operations or some operations according to the teachings herein may be performed by a computer specially constructed for the desired purpose or by a general-purpose computer specially configured for the desired purpose through a computer program stored in a computer-readable storage medium.

[0090] As used herein, the phrases "for example," "such as," "examples," and variations thereof describe non-limiting embodiments of the presently disclosed subject matter. References in the specification to "one instance," "some instances," "other instances," or variations thereof mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the presently disclosed subject matter. Therefore, the appearance of the phrases "one instance," "some instances," "other instances," or variations thereof do not necessarily refer to the same embodiment.

[0091] It should be understood that, for the sake of clarity, certain features of the disclosed subject matter described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, for the sake of brevity, the various features of the disclosed subject matter described in the context of a single embodiment may also be provided individually or in any suitable sub-combination.

[0092] In embodiments of the presently disclosed subject matter, one or more of the phases or steps shown in the accompanying drawings may be performed in a different order and / or one or more groups of phases may be performed simultaneously, or vice versa. The accompanying drawings show a general schematic diagram of a system architecture according to an embodiment of the presently disclosed subject matter. Each module in the accompanying drawings may be composed of any combination of software, hardware, and / or firmware that performs the functions as defined and explained herein. The modules in the accompanying drawings may be concentrated in one location or dispersed in more than one location.

[0093] Any reference to a method in the specification should be applied mutatis mutandis to a system capable of performing the method and should be applied mutatis mutandis to a non-transitory computer-readable medium storing instructions that, once executed by a computer, result in the performance of the method.

[0094] Any reference in the specification to a system shall apply mutatis mutandis to a method executable by the system and shall apply mutatis mutandis to a non-transitory computer-readable medium storing instructions executable by the system.

[0095] Any reference in the specification to non-transitory computer-readable media or similar terms shall apply mutatis mutandis to systems capable of executing instructions stored in non-transitory computer-readable media and shall apply mutatis mutandis to methods that may be performed by computers reading instructions stored in non-transitory computer-readable media.

[0096] The implementation of the method and system of the present disclosure involves performing or completing certain selected tasks or steps manually, automatically, or in combination thereof. In addition, according to the actual instruments and equipment of the preferred embodiments of the method and system of the present disclosure, several selected steps can be implemented by hardware or by software on any operating system of any firmware, or a combination thereof. For example, as hardware, the selected steps of the present disclosure can be implemented as a chip or circuit. As software, the selected steps of the present disclosure can be implemented as multiple software instructions executed by a computer using any suitable operating system. In any case, the selected steps of the method and system of the present disclosure can be described as being executed by a data processor, such as a computing platform for executing multiple instructions.

[0097] As discussed herein, connection can be suitable for, for example, transmitting signals from or to corresponding nodes, units or devices via intermediate devices, any type of connection. Therefore, unless otherwise implied or stated, connection can be, for example, directly connected or indirectly connected. Connection can be shown or described with reference to a single connection, multiple connections, unidirectional connections or bidirectional connections. However, different embodiments can change the implementation of connection. For example, a separate unidirectional connection can be used instead of a bidirectional connection, and vice versa. In addition, multiple connections can be replaced by a single connection that transmits multiple signals serially or in a time multiplexing mode. Similarly, a single connection carrying multiple signals can be separated into various different connections that carry a subset of these signals. Therefore, there are many options for transmitting signals.

[0098] Alternatively, the illustrated examples may be implemented as circuits located on a single integrated circuit or within the same device. Alternatively, the examples may be implemented as any number of separate integrated circuits or separate devices interconnected to each other in a suitable manner. Alternatively, appropriate portions of the methods may be implemented as soft or code representations of physical circuits or logical representations convertible into physical circuits, such as in any suitable type of hardware description language.

[0099] Other modifications, variations and alternatives are also possible. Therefore, the description and the drawings are to be considered illustrative rather than restrictive. Although certain features of the present disclosure have been illustrated and described herein, many modifications, substitutions, changes and equivalents will now occur to those of ordinary skill in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and changes that fall within the true spirit of the present disclosure. It should be understood that the above-described embodiments are cited by way of example, and various features and combinations of these features may be changed and modified. Although various embodiments have been shown and described, it should be understood that it is not intended to limit the present disclosure by such disclosure, but is intended to cover all modifications and alternative constructions that fall within the scope of the present disclosure as defined in the appended claims.

[0100] In the claims or description of the present application, unless otherwise specified, adjectives such as "substantially" and "approximately" that modify the conditions or relationship characteristics of one or more features of the embodiment should be understood to mean that the conditions or characteristics are defined within the operating tolerance range of the embodiment, and the tolerance range is acceptable for the application of the embodiment. It should be understood that when the claims or description refer to "one" or "an" element, such reference should not be understood as only one element.

Claims

1. A system comprising: a photodetector (PD), wherein the PD generates a first type of charge and a second type of charge; an integrating capacitor connected to the PD; and a controller configured to switch between a first collecting state of the integrating capacitor and a second collecting state of the integrating capacitor, wherein, in the first collection state, the integrating capacitor is charged by the first type of charges originating from the photocurrent and the first type of charges originating from the dark current, and Wherein, in the second collection state, the integration capacitor is discharged by the second type of charges originating from the dark current, wherein the first type of charges is opposite to the second type of charges, so that the charges originating from the dark current are substantially eliminated.

2. The system according to claim 1, wherein: The first collection state is synchronized with illumination arriving at the PD, and wherein the second collection state is synchronized with illumination not arriving at the PD.

3. The system according to claim 2, wherein: The first collecting state is synchronized with generation of the first type of charge, and wherein the second collecting state is synchronized with generation of the second type of charge.

4. The system according to claim 1, wherein: The first type of charges and the second type of charges are holes and electrons, respectively, or the first type of charges and the second type of charges are electrons and holes, respectively.

5. The system according to claim 1, wherein: The controller is configured to alternately route the first type of charge to the integrating capacitor in the first collecting state and the second type of charge to the integrating capacitor in the second collecting state. 6 . The system of claim 1 , further comprising an optical shutter configured to allow or block illumination from reaching the PD.

7. The system according to claim 6, wherein: The optical shutter is controlled by the controller and is configured to allow or block illumination from reaching the PD in synchronization with switching of the first collection state and the second collection state.

8. The system according to claim 6, wherein: The optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter or an active grating resonant coupler.

9. The system of claim 1, further comprising a switching system connecting the PD and the integrating capacitor, wherein the switching system is configured to switch between the first collection state and the second collection state.

10. The system according to claim 9, wherein: The switching system includes a first switch, a second switch, and a third switch, wherein the first switch is between the PD and the integration capacitor, the second switch is between the PD and the third switch, and the third switch is between a power source, the PD, and the integration capacitor.

11. A method comprising: providing a photodetector (PD) connected to an integrating capacitor and a controller, wherein the PD generates a first type of charge and a second type of charge opposite to the second type of charge; Switching by the controller to a first collecting state of the integrating capacitor; In the first collection state, the integrating capacitor is charged by a first type of charge derived from the photocurrent and a first type of charge derived from the dark current; Switching by the controller to a second collecting state of the integrating capacitor; as well as In the second collecting state, the integrating capacitor is discharged by the second type of charges originating from the dark current, thereby substantially eliminating the charges originating from the dark current.

12. The method according to claim 11, wherein: The first collection state is synchronized with illumination arriving at the PD, and wherein the second collection state is synchronized with illumination not arriving at the PD.

13. The method according to claim 11, wherein: The first collecting state is synchronized with generation of the first type of charge, and wherein the second collecting state is synchronized with generation of the second type of charge.

14. The method according to claim 11, wherein: The first type of charges and the second type of charges are holes and electrons, respectively, or the first type of charges and the second type of charges are electrons and holes, respectively.

15. The method according to claim 11, wherein: The controller is configured to route the first type of charge and the second type of charge to the integrating capacitor in the first collecting state and in the second collecting state, respectively.

16. The method of claim 11, further comprising providing an optical shutter configured to allow or block illumination of the PD.

17. The method according to claim 16, wherein: The optical shutter is controlled by the controller, and wherein allowing or blocking illumination is performed by the controller substantially synchronously with switching between the first collecting state and the second collecting state.

18. The method according to claim 16, wherein: The optical shutter is one of a mechanical optical shutter, a liquid crystal optical shutter, a MEMS optical shutter or an active grating resonant coupler.

19. The method of claim 11, further comprising providing a switching system connecting the PD and the integrating capacitor, wherein the switching system is configured to switch between the first collection state and the second collection state.

20. The method according to claim 19, wherein: The switching system includes a first switch, a second switch, and a third switch, wherein the first switch is between the PD and the integration capacitor, the second switch is between the PD and the third switch, and the third switch is between a power source, the PD, and the integration capacitor.

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