Synchronous acquisition circuit based on photoetching machine, exposure system and photoetching machine

Abstract

The invention provides a synchronous acquisition circuit based on a photoetching machine, an exposure system and the photoetching machine, and relates to the technical field of photoetching machines. The synchronous acquisition circuit comprises a plurality of current type sensors, a plurality of detection circuits, a plurality of acquisition circuits and a main control circuit, the plurality of current type sensors are used for being arranged in a preset exposure area of the photoetching machine; the plurality of current type sensors are respectively connected with the plurality of detection circuits, and the plurality of detection circuits are respectively used for converting multipath current signals sensed by the plurality of current type sensors into multipath voltage signals; the plurality of detection circuits are respectively connected with the plurality of acquisition circuits, and the plurality of acquisition circuits are respectively used for performing analog-to-digital conversion on the plurality of paths of voltage signals to obtain a plurality of paths of digital acquisition signals; the plurality of acquisition circuits are connected with the main control circuit, so that the main control circuit calculates the exposure dose of the preset exposure area according to the plurality of paths of digital acquisition signals. The exposure dose can be accurately calculated, so that the exposure success rate of the chip is improved.

Description

Technical Field

[0001] The present application relates to the technical field of lithography machines, and in particular to a synchronous acquisition circuit, an exposure system and a lithography machine based on a lithography machine. Background Art

[0002] In the exposure system of the lithography machine, precise control of the exposure dose plays a decisive role in the chip yield. The exposure dose is usually calculated based on the values ​​collected by the light intensity, illuminance meter and reflectivity sensor.

[0003] Traditionally, when collecting data from these three sensors, a multi-channel analog-to-digital converter (ADC) chip is generally used, and its working mode is to switch different channels to obtain the values ​​of each sensor. However, this channel switching operation has a significant delay problem, which causes the sensor values ​​collected to be not at the same time. This defect directly leads to a significant reduction in the accuracy of the exposure dose values ​​calculated based on these data, which in turn seriously affects the exposure success rate of the chip and ultimately has a negative impact on the chip's yield rate. Summary of the invention

[0004] In view of the deficiencies in the above-mentioned prior art, the present application provides a synchronous acquisition circuit, an exposure system and a lithography machine based on a lithography machine, so as to solve the problems existing in the prior art.

[0005] The technical solution adopted in the embodiment of the present application is as follows: In a first aspect, an embodiment of the present application provides a synchronous acquisition circuit based on a lithography machine, the synchronous acquisition circuit comprising: a plurality of current sensors, a plurality of detection circuits, a plurality of acquisition circuits and a main control circuit; the plurality of current sensors are used to be arranged in a preset exposure area of ​​the lithography machine; The multiple current sensors are respectively connected to the multiple detection circuits, and the multiple detection circuits are respectively used to convert the multiple current signals sensed by the multiple current sensors into multiple voltage signals; the multiple detection circuits are respectively connected to the multiple acquisition circuits, and the multiple acquisition circuits are respectively used to perform analog-to-digital conversion on the multiple voltage signals to obtain multiple digital acquisition signals; The multiple acquisition circuits are connected to the main control circuit, so that the main control circuit calculates the exposure dose of the preset exposure area according to the multiple digital acquisition signals.

[0006] In one embodiment, each detection circuit comprises: a transconductance circuit and a low-pass filter; The transconductance circuit is connected to a corresponding current type sensor, the transconductance circuit is also connected to the low-pass filter, and the low-pass filter is also connected to a corresponding acquisition circuit.

[0007] In one embodiment, each detection circuit further includes: a follower circuit; and the transconductance circuit is connected to the low-pass filter via the follower circuit.

[0008] In one embodiment, the transconductance circuit includes: a signal receiving port, a first amplification unit, a transconductance resistor, and a filter capacitor; The first pin of the signal receiving port is connected to the inverting input terminal of the first amplifying unit, and the second pin of the signal receiving port is the input terminal of the transconductance circuit, which is used to receive a current signal sensed by a current type sensor; The in-phase input terminal of the first amplifying unit is grounded, the output terminal of the first amplifying unit is the output terminal of the transconductance circuit, the two ends of the transconductance resistor are respectively connected to the inverting input terminal and the output terminal of the first amplifying unit, and the filter capacitor and the transconductance resistor are connected in parallel.

[0009] In one embodiment, the follower circuit includes: a second amplifying unit; The in-phase input terminal of the second amplifying unit is the input terminal of the follower circuit, the inverting input terminal of the second amplifying unit is connected to the output terminal of the second amplifying unit, and the output terminal of the second amplifying unit is the output terminal of the follower circuit.

[0010] In one embodiment, the low-pass filter includes: a third amplifying unit, a fourth amplifying unit, a first filtering link, a second filtering link, a third filtering link, a fourth filtering link, a first voltage dividing unit, and a second voltage dividing unit; One end of the first filtering link is connected to the output end of the follower circuit, and the other end of the first filtering link is connected to the output end of the third amplifying unit; one end of the second filtering link is connected to the output end of the follower circuit, and the other end of the second filtering link is connected to the first voltage dividing unit; The inverting input end of the third amplifying unit is connected to the output end of the third amplifying unit through the first voltage dividing unit, the output end of the third amplifying unit is connected to the output end of the fourth amplifying unit through the third filtering link, one end of the fourth filtering link is connected to the third filtering link, and the other end of the fourth filtering link is connected to the second voltage dividing unit; The inverting input terminal of the fourth amplifying unit is connected to the output terminal of the fourth amplifying unit through the second voltage dividing unit.

[0011] In one embodiment, the transconductance circuit further includes: a first decoupling unit and a second decoupling unit; The first decoupling unit includes: a first capacitor, a second capacitor, and a first resistor; the first power supply end of the first amplifying unit is grounded through the first capacitor, the second capacitor and the first capacitor are connected in parallel, and the first power supply end of the first amplifying unit is connected to a first preset power supply through the first resistor; The second decoupling unit includes: a third capacitor and a fourth capacitor; the second power supply end of the first amplifying unit is grounded through the third capacitor, the fourth capacitor and the third capacitor are connected in parallel, and the second power supply end of the first amplifying unit is connected to a second preset power supply.

[0012] In one embodiment, each acquisition circuit comprises: an analog-to-digital conversion chip; The data receiving pin of the analog-to-digital conversion chip is the input end of the acquisition circuit, and the data output pin of the analog-to-digital conversion chip is the output end of the acquisition circuit.

[0013] In a second aspect, an embodiment of the present application further provides an exposure system, comprising at least: a synchronous acquisition circuit based on a lithography machine, an exposure controller, and a light source as described in any of the above embodiments; The exposure controller is connected to the synchronous acquisition circuit, and the exposure controller is also connected to the light source.

[0014] In a third aspect, an embodiment of the present application further provides a lithography machine, comprising at least: the exposure system described in the above embodiment.

[0015] The beneficial effect of the present application is as follows: the present application provides a synchronous acquisition circuit based on a lithography machine, wherein the current signals sensed by multiple current sensors are connected to the main control circuit through their respective corresponding detection circuits and acquisition circuits, so that the data collected by the multiple current sensors received by the main control circuit are at the same time, and the main control circuit can accurately analyze and adjust the current of each component to ensure that each part of the lithography machine can operate stably under precise current control, thereby playing a role of precise control, ensuring the accuracy and consistency of exposure, and thereby improving the yield rate of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 A schematic diagram of the structure of a synchronous acquisition circuit based on a lithography machine provided in an embodiment of the present application; Figure 2A schematic diagram of the structure of a detection circuit provided in an embodiment of the present application; Figure 3 A schematic diagram of the principle of a transconductance circuit provided in an embodiment of the present application; Figure 4 A schematic diagram of the principle of a follower circuit provided in an embodiment of the present application; Figure 5 A schematic diagram of the principle of a low-pass filter provided in an embodiment of the present application; Figure 6 A schematic diagram of a collection circuit provided in an embodiment of the present application; Figure 7 A timing diagram of the acquisition of multiple current sensors provided in an embodiment of the present application; Figure 8 This is a circuit block diagram of the synchronous acquisition circuit based on the lithography machine provided in this application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments.

[0019] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0020] In the description of the present application, it should be noted that if the terms "upper", "lower", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the product of the application is usually placed when used. It is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0021] In addition, the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0022] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection, it can be a direct connection, it can be an indirect connection through an intermediate medium, and it can be the internal communication of two elements. For those skilled in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0023] It should be noted that, in the absence of conflict, the features in the embodiments of the present application may be combined with each other.

[0024] The exposure of a photolithography machine is a key step in the photolithography process. The process is to transfer the integrated circuit pattern on the mask to the surface of the wafer coated with photoresist through light of a specific wavelength. In the exposure operation of the photolithography machine, the calculation of the exposure dose has many meanings, including but not limited to: (1) ensuring the accuracy of the photolithography pattern: accurate exposure dose can cause the photoresist to undergo an accurate chemical reaction, thereby forming a pattern that highly matches the design requirements; (2) improving the stability and repeatability of the photolithography process: accurate calculation of the exposure dose can enable each exposure process to be carried out under the same conditions, reducing process fluctuations, so that the same exposure dose can be achieved in different batches of wafers. (1) Optimize the performance of photoresist: Different types of photoresists have different response characteristics to exposure dose. Through exposure dose calculation, appropriate exposure conditions can be selected according to the characteristics of photoresist to give full play to the performance advantages of photoresist such as resolution and sensitivity. (2) Reduce costs: Accurate exposure dose calculation helps avoid wafer scrapping and repeated processing due to improper exposure, thereby reducing production costs. In addition, reasonable exposure dose can also extend the service life of key components such as the light source of the lithography machine, reducing equipment maintenance and replacement costs.

[0025] The exposure dose calculation of the lithography machine is a relatively complex process, which requires the integration of information from multiple aspects such as light intensity, illumination, and reflectivity sensors to achieve precise control of the exposure dose, thereby ensuring the quality and accuracy of the lithography process. However, the traditional method generally uses a multi-channel analog-to-digital converter chip (ADC) when collecting data from these three sensors. Its working mode is to switch different channels to obtain the values ​​of each sensor. This channel switching operation has a significant delay problem, resulting in the collected sensor values ​​not being at the same time. This defect directly leads to a significant reduction in the accuracy of the exposure dose values ​​calculated based on these data, which in turn seriously affects the exposure rate of the chip and ultimately has a negative impact on the chip's yield rate.

[0026] In addition, the light intensity, illumination and reflectivity in the lithography machine are all current-type sensors. Current-type sensors need to use voltage-divider resistors to convert current signals into voltage signals before they can perform collection operations. However, the accuracy of the voltage-divider resistors themselves has certain limitations, which inevitably affects the accuracy of the sensor output signal, further interfering with the accuracy of the exposure dose calculation.

[0027] Therefore, the present application provides a synchronous acquisition circuit based on a lithography machine. The following is a specific example description of the synchronous acquisition circuit based on a lithography machine provided by the present application through multiple examples in combination with the accompanying drawings.

[0028] Figure 1 A schematic diagram of the structure of a synchronous acquisition circuit based on a lithography machine provided in an embodiment of the present application, such as Figure 1 As shown, the circuit includes multiple current sensors, multiple detection circuits, multiple acquisition circuits and a main control circuit.

[0029] Among them, multiple current-type sensors are arranged in a preset exposure area of ​​the lithography machine to sense relevant parameters of exposure. The multiple current-type sensors may, for example, include a light intensity sensor, an illuminance sensor, and a reflectance sensor, which are respectively used to sense the light intensity, illuminance, and reflectance during the exposure process.

[0030] Multiple current sensors are respectively connected to multiple detection circuits, and the multiple detection circuits are respectively used to convert multiple current signals sensed by the multiple current sensors into multiple voltage signals; the multiple detection circuits are respectively connected to the input ends of multiple acquisition circuits, and the multiple acquisition circuits are respectively used to perform analog-to-digital conversion on the multiple voltage signals to obtain multiple digital acquisition signals; the output ends of the multiple acquisition circuits are connected to the main control circuit, so that the main control circuit calculates the exposure dose of the preset exposure area according to the multiple digital acquisition signals.

[0031] In this embodiment, the current signals sensed by multiple current sensors are connected to the main control circuit through their corresponding detection circuits and acquisition circuits, so that the data collected by the multiple current sensors received by the main control circuit are at the same time. The main control circuit can accurately analyze and adjust the current of each component to ensure that all parts of the lithography machine can operate stably under precise current control, play a role of precise control, ensure the accuracy and consistency of exposure, and thus improve the yield rate of the chip.

[0032] It should be noted that Figure 1 The example of three current sensors, three detection circuits, three acquisition circuits and one main control circuit does not limit the number of current sensors, detection circuits, acquisition circuits and main control circuits. In actual operation, the number of current sensors, detection circuits, acquisition circuits and main control circuits can be adjusted according to actual needs. Other types of current sensors can also be added or replaced, such as focal length sensors, position sensors, etc.

[0033] like Figure 2 As shown, in one embodiment, each detection circuit may include a transconductance circuit and a low-pass filter, the transconductance circuit is connected to a corresponding current type sensor, the transconductance circuit is also connected to the low-pass filter, the low-pass filter is also connected to a corresponding acquisition circuit, and each detection circuit also includes a follower circuit, and the transconductance circuit is connected to the low-pass filter through the follower circuit.

[0034] Among them, the transconductance circuit is used to convert the current signal sensed by the current sensor into a voltage signal, and amplify it at the same time to obtain a suitable voltage value; the follower circuit is used to avoid mutual interference between the previous and next stages; and the low-pass filter is used to filter out noise in the analog signal.

[0035] Figure 3 The schematic diagram of the principle of the transconductance circuit provided in the embodiment of the present application is as follows: Figure 3 As shown, the transconductance circuit includes a signal receiving port J1, a first amplifying unit U1A, a transconductance resistor R1, and a filter capacitor C1. The first amplifying unit U1A may be, for example, an operational amplifier.

[0036] The first pin of the signal receiving port (pin 1 of J1) is connected to the inverting input terminal of the first amplifier unit, and the second pin of the signal receiving port (pin 2 of J1) is the input terminal of the transconductance circuit, which is used to receive a current signal sensed by a current type sensor; the non-inverting input terminal of the first amplifier unit U1A is grounded, the output terminal of the first amplifier unit U1A is the output terminal of the transconductance circuit, the two ends of the transconductance resistor R1 are respectively connected to the inverting input terminal and the output terminal of the first amplifier unit U1A, and the filter capacitor C1 and the transconductance resistor R1 are connected in parallel.

[0037] The transconductance circuit can realize the conversion between voltage and current, and can linearly convert the input voltage signal into the output current signal, and the output current is proportional to the input voltage. For example, in the synchronous acquisition circuit based on the lithography machine, the current sensor outputs a current signal, and the subsequent circuit requires a voltage signal for processing or driving. At this time, the transconductance circuit can convert the current signal into a suitable voltage signal to achieve signal form matching. In the transconductance circuit, the resistance of the transconductance resistor R1 is 1.5KΩ, and the capacitance of the filter capacitor C1 is 100pF. C1 is a capacitor of the picofarad level, which can filter out high-level noise. R1 converts and amplifies the current signal, and its amplification formula is: Vout = -ln R3 (1) Wherein Vout is the voltage at the output end of U1A. According to Formula 1, the voltage at the output end of U1A is opposite in polarity to the potential at the inverting input end of U1A. Therefore, when the current type sensor is connected to J1, the positive pole of the current type sensor is connected to pin 2 of J1, and the negative pole is connected to pin 1 of J1. The sensor does not need to be connected to an external power supply to realize the conversion of optical signals into electrical signals. The difference between this and the traditional solution is that the present application uses a transconductance circuit to realize the conversion between current and voltage, which will not affect the accuracy of the obtained sensor output signal, thereby not interfering with the accuracy of the exposure dose calculation. At the same time, the follower circuit can avoid the influence of the subsequent circuit on the transconductance circuit, further ensuring the accuracy of the obtained sensor output signal.

[0038] The transconductance circuit also includes a first decoupling unit and a second decoupling unit, which are used to eliminate noise and interference in the transconductance circuit to ensure the stable operation of the transconductance circuit, wherein the first decoupling unit includes a first capacitor C2 with a capacitance of 4.7uF, a second capacitor C3 with a capacitance of 100nF and a first resistor R2 with a resistance of 10Ω, and the second decoupling unit includes a third capacitor C4 with a capacitance of 4.7uF and a fourth capacitor C5 with a capacitance of 100nF.

[0039] The first power supply terminal of the first amplifier unit (pin 8 of U1A) is grounded through the first capacitor C2, the second capacitor C3 is connected in parallel with the first capacitor C2, and the first power supply terminal of the first amplifier unit is connected to the first preset power supply (+5V power supply) through the first resistor R2. The second power supply terminal of the first amplifier unit (pin 4 of U1A) is grounded through the third capacitor C4, the fourth capacitor C5 is connected in parallel with the third capacitor C4, and the second power supply terminal of the first amplifier unit is connected to the second preset power supply (-5V power supply).

[0040] Figure 4 The schematic diagram of the principle of the follower circuit provided in the embodiment of the present application is as follows: Figure 4As shown, the follower circuit includes a second amplifying unit U2A, which can be, for example, an operational amplifier. The in-phase input terminal of the second amplifying unit U2A is the input terminal of the follower circuit, the inverting input terminal of the second amplifying unit U2A is connected to the output terminal of the second amplifying unit U2A, and the output terminal of the second amplifying unit U2A is the output terminal of the follower circuit.

[0041] The characteristic of the second amplification unit U2A is that it has a very high open-loop gain. When the input signal is added to the non-inverting input terminal, since the inverting input terminal is connected to the output terminal, according to the virtual short and virtual open characteristics of the operational amplifier, the potential of the inverting input terminal will change with the potential change of the non-inverting input terminal, so that the voltage of the output terminal is almost equal to the voltage of the non-inverting input terminal, that is, the output voltage follows the input voltage change, thereby realizing the voltage following function.

[0042] The follower circuit has the following characteristics: the voltage gain is approximately 1, the output voltage is equal to the input voltage in magnitude and phase, it has no amplification effect on the input signal, but can achieve signal buffering and isolation; the input impedance is high, and the non-inverting input of the operational amplifier has a very high input impedance, which means that the current it draws from the signal source is very small, the impact on the signal source is small, and it can receive weak signals well; the output impedance is low, it can provide a larger output current, has a strong load capacity, and can drive subsequent load circuits without causing a large attenuation of the output voltage.

[0043] The follower circuit may further include a third decoupling unit, which is used to eliminate noise and interference in the follower circuit to ensure stable operation of the follower circuit. The third decoupling unit includes a capacitor C6 with a capacitance of 4.7uF, a capacitor C7 with a capacitance of 100nF, and a resistor R3 with a resistance of 10Ω.

[0044] Figure 5 The schematic diagram of the principle of the low-pass filter provided in the embodiment of the present application is as follows: Figure 5 As shown, the low-pass filter includes: a third amplifying unit U3A, a fourth amplifying unit U3B, a first filtering link, a second filtering link, a third filtering link, a fourth filtering link, a first voltage dividing unit, and a second voltage dividing unit.

[0045] The first filtering link includes resistor R4 and capacitor C13, the second filtering link includes resistor R4, resistor R5 and capacitor C8, the third filtering link includes resistor R9 and capacitor C15, the fourth filtering link includes R10 and C14, the first voltage dividing unit includes resistor R6 and resistor R7, and the second voltage dividing unit includes resistor R11 and resistor R12.

[0046] One end of the first filter link is connected to the output end of the follower circuit, and the other end of the first filter link is connected to the output end of the third amplifying unit, that is, one end of R4 is one end of the first filter link, which is used to connect to the output end of the follower circuit, and the other end of R4 is connected to one end of C13, and the other end of C13 is the other end of the first filter link, which is used to connect to the output end of the third amplifying unit U3A; one end of the second filter link is connected to the output end of the follower circuit, and the other end of the second filter link is connected to the first signal amplifying unit, that is, one end of R4 is one end of the second filter link, which is used to connect to the output end of the follower circuit, and the other end of R4 is connected to one end of C8 through R5, and the other end of C8 is the other end of the second filter link, which is used to connect to the first voltage divider unit.

[0047] The inverting input of the third amplifying unit is connected to the output of the third amplifying unit through the first voltage divider unit, that is, the inverting input of U3A is connected to its output through R6 and R7; the output of the third amplifying unit is connected to the output of the fourth amplifying unit through the third filtering link, that is, the output of U3A is connected to the output of U3B through R9 and C15; one end of the fourth filtering link is connected to the third filtering link, and the other end of the fourth filtering link is connected to the second signal amplifying unit, that is, one end of R10 is one end of the fourth filtering link, which is used to connect to R9, and the other end of R10 is connected to one end of C14, and the other end of C14 is the other end of the fourth filtering link, which is used to connect to the connection point of R11 and R12.

[0048] The inverting input of the fourth amplifier unit U3B is connected to its output through the second voltage divider unit, that is, the inverting input of U3B is connected to its output through R11 and R12. The output of U3B is the output of the low-pass filter and the output of the detection circuit, which is used to connect the acquisition circuit.

[0049] The low-pass filter may further include a fourth decoupling unit and a fifth decoupling unit, which are used to eliminate noise and interference in the low-pass filter to ensure stable operation of the low-pass filter. The fourth decoupling unit includes a capacitor C9 with a capacitance of 4.7uF, a capacitor C10 with a capacitance of 100nF, and a resistor R8 with a resistance of 10Ω, and the fifth decoupling unit includes a capacitor C11 with a capacitance of 4.7uF and a capacitor C12 with a capacitance of 100nF.

[0050] The function of a low-pass filter is to allow low-frequency signals to pass through while attenuating or blocking high-frequency signals from passing through, thereby avoiding circuit instability or oscillation caused by high-frequency signals and improving circuit stability and reliability.

[0051] Figure 6 A schematic diagram of a collection circuit provided in an embodiment of the present application, such as Figure 6As shown, the acquisition circuit includes an analog-to-digital conversion chip, and the data receiving pin (pin 49) of the analog-to-digital conversion chip is the input end of the acquisition circuit, which is used to receive the ING signal output by the detection circuit, and the data output pin of the analog-to-digital conversion chip is the output end of the acquisition circuit, which is used to output a feedback signal (firstdata signal) to the main control circuit.

[0052] Pins 1, 37, 38, and 48 of the analog-to-digital conversion chip are analog power pins AVcc, which provide power for the analog circuit part of the chip. In the figure, a +3.3V power supply is connected; pins 2, 26, 35, 40, 41, 47, and 50-64 of the analog-to-digital conversion chip are analog ground pins AGND, which provide a stable zero-potential reference point for the analog circuit of the chip; pins 36 and 39 REGCAP of the analog-to-digital conversion chip are used to connect capacitors to play a role in power supply stabilization and decoupling. In the figure, a 0.1uF capacitor is connected; AOS1 (pin 3) is pin 1 of the oscillator, AOS2 (pin 4) is pin 2 of the oscillator, and AOS3 (pin 5) is pin 3 of the oscillator; mode selection pin PAR# / SER / BYTE_SEL (pin 6) is a parallel / serial / byte selection pin used to select the data transmission mode of the chip; R# / SCLK (pin 12) is a read / serial clock pin, which serves as a clock input in serial mode and works during read operations.

[0053] The range selection pin ARANGE (pin 8) is used to select the input signal range for ADC conversion; the conversion control pin ACONVST_A (pin 9) is the conversion start pin of channel A, which is used to trigger the analog-to-digital conversion operation of channel A; ACONVST_B (pin 10) is the conversion start pin of channel B, which is used to trigger the analog-to-digital conversion operation of channel B; the reset pin ARESET (pin 11) is used to reset the internal circuit of the chip to the initial state; the chip select pin ACS (pin 13), which is valid at low level, is used to select the analog-to-digital conversion chip for operation; the status-related pin ABUSY (pin 14) is the busy signal pin, indicating whether the chip is performing an analog-to-digital conversion operation, and a high level indicates busy; AFRSTDATA (pin 15) is the first data indication pin, which is used to indicate the output of the first valid data after conversion; the data pins ADB0-ADB15 (pins 16, 17-32) are 16-bit data output pins, which are used to output digital signals after analog-to-digital conversion; the reference ground pin REFGND (pins 42, 46) is used as the ground potential of the reference voltage.

[0054] REFIN / REFOUT (pin 41) is the reference voltage input / output pin, which is used to input external reference voltage or output chip internal reference voltage; REF_SELECT (pin 34) is the reference voltage selection pin, which is used to select the source or mode of the reference voltage, and is connected to AREF in the figure.

[0055] REFCAP (pin 38) is connected to a capacitor to stabilize the reference voltage. In the figure, a 0.1uF capacitor is connected. REFCP_APA (pin 45) and REFCP_ACA (pin 44) are pins related to the reference voltage and are used for reference voltage buffering and adjustment. In the figure, REFCP_APA is connected to a 0.1uF capacitor.

[0056] The standby pin STBY# (pin 7) is valid at low level and is used to put the chip into low-power standby mode; DB15 / BYTE_SEL (pin 33) is related to the 15th bit of the data bus and the byte selection function; V1-V8 (pins 40, 35, 30, 25, 20, 15, 10, 5) are analog input channel pins, some of which are connected to AGND.

[0057] In this application, in each detection circuit, in order to make the data collected by multiple current sensors received by the main control circuit at the same time, the order of each low-pass filter remains consistent. However, in actual operation, due to problems such as transmission distance and the number of devices passed, the acquisition circuit module may not be able to obtain the data of the three sensors at the same time. Therefore, it is necessary to calibrate the synchronous acquisition circuit. Taking multiple current sensors including light intensity, illumination and reflectivity sensors as an example, the acquisition timing of multiple current sensors is as follows: Figure 7 As shown, the calibration process includes: using three identical analog-to-digital conversion chips, keeping the clock signal clock consistent, each chip has a feedback signal firstdata, if the analog-to-digital conversion chip does not collect data, firstdata is a low level; if the analog-to-digital conversion chip collects data, firstdata is a high level.

[0058] According to the level change of the feedback signal, the time difference t1, t2, and t3 between the clock signal clock and the feedback signal firstdata are obtained. Taking the longest delay time t2 as the benchmark, the light sensor ( Figure 7 The signal path of the light intensity sensor ( Figure 7 The signal path of the light intensity sensor is the difference tt1 corresponding to the light intensity. The signal path of the light intensity sensor and the reflectivity sensor ( Figure 7 The difference tt2 in the signal path of the reflectivity shown in the figure is used to adjust the order of the low-pass filter, the capacitance size, etc. in the illumination and light intensity detection circuit modules respectively to extend their response time so that their response time remains consistent, thereby achieving the purpose of simultaneously collecting signals from the three sensors.

[0059] Specifically, the order of the low-pass filter, the size of the capacitor, etc. in the illumination and light intensity detection circuit module are adjusted. For example, based on the clock signal clock, the delay time of the light intensity signal is t1, the time delay of the illumination is t2, and the delay signal of the reflectivity is t3, wherein the delay time t2 of the illumination is the longest, and the delay times t1 and t3 of the light intensity and the reflectivity are both less than t2. For this reason, it is necessary to compensate the delay time t1 of the light intensity and the delay time t3 of the reflectivity to be the same as the delay time of the illumination t2, and compensate tt1 by extending the delay time t1 of the light intensity (the purpose is to reduce tt1 to 0), and compensate tt2 by extending the time of the reflectivity t3 (reducing tt2 to 0), thereby making the delay times of the light intensity, illumination and reflectivity equal, so that the signals of the three sensors can be collected simultaneously.

[0060] There are two ways to extend t1 or t3: 1. Increase the value of the resistance or capacitance of the low-pass filter to extend the delay time; 2. Increase the order of the low-pass filter to extend the delay time.

[0061] Figure 8 The circuit block diagram of the synchronous acquisition circuit based on the lithography machine provided in this application is as follows: Figure 8 As shown, the working process of the synchronous acquisition circuit is as follows: the light intensity sensor, the illumination sensor, and the reflectivity sensor are installed in the preset exposure area of ​​the lithography machine. The output signal is current. After passing through the transconductance circuit and the follower circuit, the current is converted into a voltage signal and the influence of the previous and next stages is avoided. Then, the three signals pass through the low-pass filter of the same order and are input into the acquisition circuit to be converted into digital signals. Finally, they are input into the FPGA main control chip of the main control circuit. By observing the time difference between the clock signal clock and the feedback signal of the three acquisition chips, the number of sections of the low-pass filter is calibrated to ensure that the final acquisition circuit can simultaneously acquire the signals of the three sensors.

[0062] On the basis of the synchronous acquisition circuit based on the lithography machine provided in the above embodiments, the present application also provides an exposure system, which at least includes the synchronous acquisition circuit based on the lithography machine provided in any of the above embodiments, an exposure controller and a light source.

[0063] The exposure controller is connected to the synchronous acquisition circuit and is also connected to the light source. The exposure controller can obtain the exposure dose of the preset exposure area calculated by the synchronous acquisition circuit and control the light source to expose the wafer in the preset exposure area.

[0064] The present application also provides a lithography machine, which at least includes the exposure system provided in the above embodiment.

[0065] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A synchronous acquisition circuit based on a photolithography machine, characterized in that: The synchronous acquisition circuit comprises: a plurality of current sensors, a plurality of detection circuits, a plurality of acquisition circuits and a main control circuit; the plurality of current sensors are used to be arranged in a preset exposure area of ​​the lithography machine; The multiple current sensors are respectively connected to the multiple detection circuits, and the multiple detection circuits are respectively used to convert the multiple current signals sensed by the multiple current sensors into multiple voltage signals; the multiple detection circuits are respectively connected to the input ends of the multiple acquisition circuits, and the multiple acquisition circuits are respectively used to perform analog-to-digital conversion on the multiple voltage signals to obtain multiple digital acquisition signals; The output ends of the multiple acquisition circuits are connected to the main control circuit, so that the main control circuit calculates the exposure dose of the preset exposure area according to the multiple digital acquisition signals.

2. The circuit according to claim 1, characterized in that Each detection circuit comprises: a transconductance circuit and a low-pass filter; The transconductance circuit is connected to a corresponding current type sensor, the transconductance circuit is also connected to the low-pass filter, and the low-pass filter is also connected to a corresponding acquisition circuit.

3. The circuit according to claim 2, characterized in that Each detection circuit further includes: a follower circuit; the transconductance circuit is connected to the low-pass filter via the follower circuit.

4. The circuit according to claim 2, characterized in that The transconductance circuit comprises: a signal receiving port, a first amplification unit, a transconductance resistor, and a filter capacitor; The first pin of the signal receiving port is connected to the inverting input terminal of the first amplifying unit, and the second pin of the signal receiving port is the input terminal of the transconductance circuit, which is used to receive a current signal sensed by a current type sensor; The in-phase input terminal of the first amplifying unit is grounded, the output terminal of the first amplifying unit is the output terminal of the transconductance circuit, the two ends of the transconductance resistor are respectively connected to the inverting input terminal and the output terminal of the first amplifying unit, and the filter capacitor and the transconductance resistor are connected in parallel.

5. The circuit according to claim 3, characterized in that The follower circuit comprises: a second amplifying unit; The in-phase input terminal of the second amplifying unit is the input terminal of the follower circuit, the inverting input terminal of the second amplifying unit is connected to the output terminal of the second amplifying unit, and the output terminal of the second amplifying unit is the output terminal of the follower circuit.

6. The circuit according to claim 3, characterized in that The low-pass filter comprises: a third amplifying unit, a fourth amplifying unit, a first filtering link, a second filtering link, a third filtering link, a fourth filtering link, a first voltage dividing unit, and a second voltage dividing unit; One end of the first filtering link is connected to the output end of the follower circuit, and the other end of the first filtering link is connected to the output end of the third amplifying unit; one end of the second filtering link is connected to the output end of the follower circuit, and the other end of the second filtering link is connected to the first voltage dividing unit; The inverting input end of the third amplifying unit is connected to the output end of the third amplifying unit through the first voltage dividing unit, the output end of the third amplifying unit is connected to the output end of the fourth amplifying unit through the third filtering link, one end of the fourth filtering link is connected to the third filtering link, and the other end of the fourth filtering link is connected to the second voltage dividing unit; The inverting input terminal of the fourth amplifying unit is connected to the output terminal of the fourth amplifying unit through the second voltage dividing unit.

7. The circuit according to claim 4, characterized in that The transconductance circuit further includes: a first decoupling unit and a second decoupling unit; The first decoupling unit includes: a first capacitor, a second capacitor, and a first resistor; the first power supply end of the first amplifying unit is grounded through the first capacitor, the second capacitor and the first capacitor are connected in parallel, and the first power supply end of the first amplifying unit is connected to a first preset power supply through the first resistor; The second decoupling unit includes: a third capacitor and a fourth capacitor; the second power supply end of the first amplifying unit is grounded through the third capacitor, the fourth capacitor and the third capacitor are connected in parallel, and the second power supply end of the first amplifying unit is connected to a second preset power supply.

8. The circuit according to claim 1, characterized in that Each acquisition circuit comprises: an analog-to-digital conversion chip; The data receiving pin of the analog-to-digital conversion chip is the input end of the acquisition circuit, and the data output pin of the analog-to-digital conversion chip is the output end of the acquisition circuit.

9. An exposure system, characterized in that: At least comprising: the synchronous acquisition circuit based on the lithography machine, the exposure controller and the light source as described in any one of claims 1 to 8 above; The exposure controller is connected to the synchronous acquisition circuit, and the exposure controller is also connected to the light source.

10. A photolithography machine, characterized in that: At least: The exposure system as claimed in claim 9.

Images