Sampling hold circuit and electronic chip

Abstract

The invention provides a sampling hold circuit and an electronic chip, and relates to the technical field of integrated circuits. The sampling hold circuit comprises a grid voltage bootstrap main switch module, a grid voltage bootstrap sub-switch module, a sampling switch tube, a signal tracking switch tube and a pull-up switch tube, and the grid voltage bootstrap main switch module is respectively connected with the grid voltage bootstrap sub-switch module, the signal tracking switch tube and the pull-up switch tube. The grid voltage bootstrap main switch module is connected with the grid electrode of the sampling switch tube through a first node, the drain electrode of the pull-up switch tube is connected with a power supply, and the source electrode is connected with the grid electrode of the signal tracking switch tube and the grid voltage bootstrap main switch module through a second node. The sampling hold circuit and the electronic chip provided by the invention have the advantages of higher conduction speed and better circuit linearity.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a sample-and-hold circuit and an electronic chip. Background Art

[0002] The sampling and holding circuit in the signal chain circuit is generally composed of switching capacitors, among which the sampling switches are mainly divided into single MOS (Metal-Oxide-Semiconductor) switches, CMOS (Complementary Metal Oxide Semiconductor) switches and gate voltage bootstrap switches. The traditional single MOS sampling switch introduces a large nonlinearity to the sampling system because its on-resistance changes with the input signal. The CMOS switch compensates for part of the nonlinearity, but its linearity is still insufficient for circuits with higher signal requirements. Therefore, a gate voltage bootstrap switch is introduced in the sampling system with certain requirements for linearity to reduce the correlation between the on-resistance of the sampling switch and the sampling signal.

[0003] Due to the emergence of cloud computing, optical computing, machine learning and artificial intelligence, the demand for data center networks is growing exponentially. These emerging technologies have placed extremely high data throughput requirements on data centers. In order to support these growing bandwidth requirements, the development of corresponding high-speed signal processing circuits is imminent. Many traditional circuit technologies or structures are difficult to directly apply in ultra-high-speed circuits, so traditional circuits need to be optimized and improved.

[0004] The traditional gate voltage bootstrap switch can improve the linearity of the sampling switch very well. However, since the gate voltage bootstrap technology introduces a feedback loop into the circuit itself, the speed of the gate voltage bootstrap switch is limited. In addition, with the increase of signal speed and sampling speed, in ultra-high-speed signal acquisition systems, the size of the sampling capacitor is restricted by speed and power consumption. In many applications, the sampling capacitor is only f F level. Therefore, the f F level nonlinear parasitic capacitance of the sampling switch at the sampling node cannot be ignored. The gate voltage bootstrap switch circuit in the prior art is connected to multiple switches at the sampling node, so the parasitic capacitance of the sampling node is relatively large, which not only affects the conduction speed of the gate voltage bootstrap switch, but also affects the linearity of the gate voltage bootstrap switch.

[0005] In summary, the gate voltage bootstrap switch circuit in the prior art has the problem that the conduction speed and linearity cannot meet the requirements of the ultra-high-speed signal acquisition system. Summary of the invention

[0006] The purpose of the present application is to provide a sample-and-hold circuit and an electronic chip to solve the problem in the prior art that the pass speed and linearity of the gate voltage bootstrap switch circuit cannot meet the requirements of the ultra-high-speed signal acquisition system.

[0007] In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows: On the one hand, an embodiment of the present application provides a sampling and holding circuit, the sampling and holding circuit comprising a gate voltage bootstrap main switch module, a gate voltage bootstrap sub-switch module, a sampling switch tube, a signal tracking switch tube and a pull-up switch tube, the gate voltage bootstrap main switch module is respectively connected to the gate voltage bootstrap sub-switch module, the signal tracking switch tube and the pull-up switch tube, the gate voltage bootstrap main switch module is connected to the gate of the sampling switch tube through a first node, the drain of the pull-up switch tube is connected to a power supply, and the source is connected to the gate of the signal tracking switch tube and the gate voltage bootstrap main switch module through a second node; When in the holding stage, the charging circuits inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module are turned on, and the bootstrap capacitors inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module are charged; and the sampling switch tube, the signal tracking switch tube and the pull-up switch tube are all turned off; When in the sampling stage, the pull-up switch tube is turned on, and drives the sampling switch tube and the signal tracking switch tube to be turned on, and then the bootstrap loop inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the gate potential of the sampling switch tube is bootstrapped to the set potential.

[0008] Optionally, the gate voltage bootstrap main switch module includes a first bootstrap capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube and a pull-down component, one end of the first bootstrap capacitor is connected to the drain of the first switch tube and the drain of the signal tracking switch tube through a third node, the source of the first switch tube is grounded, the source of the signal tracking switch tube and the source of the sampling switch tube are both used to receive input signals, the other end of the first bootstrap capacitor is respectively connected to the source of the second switch tube and the source of the third switch tube, the drain of the second switch tube is connected to the power supply, and the gate is connected to the second node, the drain of the third switch tube is connected to connected to the gate of the sampling switch tube and the gate voltage bootstrap sub-switch module, the source of the fourth switch tube is connected to the power supply, the drain of the fourth switch tube is connected to the gate of the third switch tube, the source of the fifth switch tube is connected to the third node, the drain of the fifth switch tube is connected to the gate of the third switch tube, and the gates of the fourth switch tube, the fifth switch tube and the pull-up switch tube are all used to receive a first control signal, the gate of the first switch tube is used to receive a second control signal, and the first control signal and the second control signal are opposite signals, one end of the pull-down component is connected to the second node, and the other end of the pull-down component is grounded; wherein, When in the holding stage, the first switch tube, the pull-down component, the second switch tube and the fourth switch tube are turned on, and the third switch tube and the fifth switch tube are turned off; and the first switch tube, the first bootstrap capacitor and the second switch tube form a charging loop; When in the sampling phase, the first switch tube, the pull-down component, the second switch tube and the fourth switch tube are turned off, and the third switch tube and the fifth switch tube are turned on.

[0009] Optionally, the second switch tube, the third switch tube and the fourth switch tube are all P-type tubes, and the first switch tube and the fifth switch tube are all N-type tubes.

[0010] Optionally, the pull-down component includes a sixth switch tube and a seventh switch tube, the source of the sixth switch tube is connected to the second node, the drain of the sixth switch tube is connected to the source of the seventh switch tube, the gate of the sixth switch tube is connected to a power supply, the drain of the seventh switch tube is grounded, and the gate of the seventh switch tube is used to receive a second control signal; When in the holding stage, the sixth switch tube and the seventh switch tube are both turned on; when in the sampling stage, the sixth switch tube is turned on, the seventh switch tube is turned off, and the potential of the second node is bootstrapped to a set potential.

[0011] Optionally, the gate voltage bootstrap sub-switch module includes a second bootstrap capacitor, an eighth switch tube and a ninth switch tube, one end of the second bootstrap capacitor is connected to the third node, the other end is connected to the source of the eighth switch tube and the ninth switch tube, the drain of the eighth switch tube is connected to the power supply, the gate of the eighth switch tube is connected to the second node, the drain of the ninth switch tube is connected to the second node, and the gate of the ninth switch tube is connected to the gate of the third switch tube; When in the holding stage, the eighth switch tube is turned on and the ninth switch tube is turned off; when in the sampling stage, the eighth switch tube is turned off and the ninth switch tube is turned on.

[0012] Optionally, both the eighth switch tube and the ninth switch tube are P-type tubes.

[0013] Optionally, the gate voltage bootstrap sub-switch module also includes a tenth switch tube, the drain of the tenth switch tube is connected to the second node, the source of the tenth switch tube is connected to the first node, the gate of the tenth switch tube is connected to the power supply, and the tenth switch tube is in the on state in both the holding stage and the sampling stage.

[0014] Optionally, the sample-and-hold circuit further includes an eleventh switch tube, and a source and a drain of the eleventh switch tube are short-circuited and connected to a drain of the sampling switch tube.

[0015] Optionally, the bootstrap capacitor inside the gate voltage bootstrap main switch module and the bootstrap capacitor inside the gate voltage bootstrap sub-switch module have the same capacitance.

[0016] On the other hand, an embodiment of the present application further provides an electronic chip, which includes the above-mentioned sample-and-hold circuit.

[0017] Compared with the prior art, this application has the following beneficial effects: The present application provides a sampling and holding circuit and an electronic chip, wherein the sampling and holding circuit comprises a gate voltage bootstrap main switch module, a gate voltage bootstrap sub-switch module, a sampling switch tube, a signal tracking switch tube and a pull-up switch tube, wherein the gate voltage bootstrap main switch module is respectively connected to the gate voltage bootstrap sub-switch module, the signal tracking switch tube and the pull-up switch tube, the gate voltage bootstrap main switch module is connected to the gate of the sampling switch tube through a first node, the drain of the pull-up switch tube is connected to a power supply, and the source is connected to the gate of the signal tracking switch tube and the gate voltage bootstrap main switch module through a second node; When in the holding stage, the charging circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the bootstrap capacitor inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is charged; and the sampling switch tube, the signal tracking switch tube and the pull-up switch tube are all turned off; when in the sampling stage, the pull-up switch tube is turned on, and drives the sampling switch tube and the signal tracking switch tube to be turned on, and then the bootstrap circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the gate potential of the sampling switch tube is bootstrapped to the set potential.

[0018] On the one hand, since the sampling and holding circuit provided by the present application is additionally provided with a gate voltage bootstrap sub-switch module, more switch tubes are connected to the second node, and fewer switch tubes are connected to the first node, that is, fewer parasitic capacitors are connected to the first node, thereby improving the bootstrap potential establishment speed of the sampling switch tube, and also improving the linearity of the sampling and holding circuit. On the other hand, since a pull-up switch tube is additionally provided in the sampling and holding circuit, and during the sampling stage, the pull-up switch tube is turned on to directly drive the sampling switch tube and the signal tracking switch tube to be turned on, it is possible to achieve that the sampling switch tube is turned on first and then the bootstrap potential is established, and the turn-on speed of the sampling switch tube can be faster. At the same time, the signal tracking switch tube does not need to wait for the bootstrap potential to be established before turning on, thereby improving the turn-on speed of the signal tracking switch tube.

[0019] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 Schematic diagram of an ideal gate voltage bootstrap switching circuit.

[0022] Figure 2The schematic diagram is a circuit diagram of a gate voltage bootstrap switch circuit actually used in the prior art.

[0023] Figure 3 A circuit diagram of a sample-and-hold circuit provided in an embodiment of the present application.

[0024] In the figure: 110-gate voltage bootstrap sub-switch module; Ms-sampling switch tube; Mg-signal tracking switch tube; Mx-pull-up switch tube; C1-first bootstrap capacitor; C2-second bootstrap capacitor; Q1-first switch tube; Q2-second switch tube; Q3-third switch tube; Q4-fourth switch tube; Q5-fifth switch tube; Q6-sixth switch tube; Q7-seventh switch tube; Q8-eighth switch tube; Q9-ninth switch tube; Q10-tenth switch tube; Q11-eleventh switch tube; VG-first node; VP-second node; VS-third node. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0026] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0027] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0028] It should be noted that, in this document, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0029] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0030] As described in the background technology, the sampling and holding circuit in the prior art is generally implemented by a gate voltage bootstrap switch circuit. The ideal gate voltage bootstrap switch circuit is as follows: Figure 1 As shown, the circuit mainly includes a sampling switch tube Ms, a bootstrap capacitor Cb, a sampling capacitor Cs and switch tubes M1-M5; wherein the sampling capacitor Cs is used to store the sampling signal.

[0031] The gate voltage bootstrap switch circuit includes two phases in its operation, namely a holding phase and a sampling phase.

[0032] When in the holding stage, the switch tubes M3 and M4 are turned off, the switch tubes M1, M2 and M5 are turned on, and the power supply charges the bootstrap capacitor Cb, which stores a charge of VDD*C1 (C1 is the capacitance of the bootstrap capacitor Cb), and the voltage rises to VDD. It can be understood that the voltage of the bootstrap capacitor Cb rises to VDD in this stage, which means that the voltage difference between the upper plate and the lower plate of the bootstrap capacitor Cb is VDD, that is, the potential of the upper plate is VDD, and the potential of the lower plate is ground (0V). And the switch tube M5 is turned on, and the gate potential of the sampling switch tube Ms is set to the ground potential. At this time, the sampling switch Ms is turned off, and the output Vo keeps the sampled voltage unchanged.

[0033] When in the sampling stage, the switch tubes M1, M2, and M5 are turned off, and the switch tubes M3 and M4 are turned on, transmitting the input signal VIN to the lower plate of the bootstrap capacitor Cb. At this time, due to the conservation of charge, the voltage difference between the upper plate and the lower plate of the bootstrap capacitor Cb remains unchanged. Since the potential of the lower plate of the bootstrap capacitor Cb is now VIN, the potential of the upper plate of the bootstrap capacitor Cb is bootstrapped to VDD+VIN. The switch tube M3 is turned on to transfer the potential to the gate of the sampling switch tube Ms. The source potential of the sampling switch tube Ms is VIN, so that the gate-source voltage V GS V G -V S = (VDD + VIN) - VIN = VDD, that is, the gate-source voltage of the sampling switch Ms is constant at VDD. This ensures that the on-resistance of the sampling switch does not change with the input signal, thereby improving the sampling linearity of the sampling system.

[0034] Figure 2 Shown in Figure 1 Based on the gate voltage bootstrap switch circuit actually used in the prior art. In the figure, CLKH and CLKS are a pair of opposite control signals, and the switch tubes M2, M5, and M6 are all P-type switch tubes, and the remaining switch tubes are all N-type switch tubes. Figure 1 Working principle, Figure 2 The working principle of the middle circuit is: When in the holding stage, CLKH is a high-level signal and CLKS is a low-level signal. At this time, the switch tubes M2, M3 and M8 are turned on. The switch tube M7 is a protection tube and is always turned on. At this time, since the switch tube M8 is turned on, the VG node is pulled down to the ground, so the switch tubes M9, M4 and Ms connected to the VG node are all turned off, and M6 is turned on. And since the switch tube M2 is turned on, the switch tube M5 is turned off. Therefore, in the entire circuit, the bootstrap capacitor Cb is charged through the loop of "VDD→switch tube M6→bootstrap capacitor Cb→switch tube M3→ground".

[0035] When in the sampling stage, CLKH is a low-level signal and CLKS is a high-level signal. At this time, the switch tube M1 is turned on, and the switch tubes M2, M3 and M8 are turned off. Since the switch tube M1 is turned on, the gate-source voltage of the switch tube M5 is actually the opposite value of the voltage of the bootstrap capacitor Cb, that is, -VDD. At this time, the switch tube M5 is turned on, and the potential of the VG node is gradually pulled up to VDD. The switch tube M6 is turned off, and the switch tubes M4 and M5 are gradually turned on. The input signal VIN is transmitted to the lower plate of the bootstrap capacitor Cb, so that the gate-source voltage of the sampling switch tube Ms is constant at VDD.

[0036] In practical applications, it is found that Figure 2 Although the gate voltage bootstrap switch circuit shown can well improve the linearity of the sampling switch, the gate voltage bootstrap switch circuit introduces a feedback loop (i.e., a loop that requires the switch tube M5 to be turned on to increase the voltage of the VG node), which limits the speed of the gate voltage bootstrap switch. In addition, with the increase in signal speed and sampling speed, in ultra-high-speed signal acquisition systems, the size of the sampling capacitor is restricted by speed and power consumption. In many applications, the sampling capacitor is only at the f F level. Therefore, the nonlinearity introduced by the f F level nonlinear parasitic capacitance of the sampling switch at the sampling node cannot be ignored.

[0037] In addition, before the switch tube Ms of the traditional gate voltage bootstrap switch is turned on, the parasitic capacitance of M4 and Ms gate needs to be charged to make M4 turn on first. After the input signal is transmitted to the lower plate of Cb, the gate potential of Ms will change with the change of input voltage. Therefore, the gate-source voltage of Ms will be turned on for too long, which limits the higher frequency sampling of the switch. At the same time, the larger the parasitic capacitance of M4, M6, M9 and Ms gate, the slower the voltage rise speed of the VG node, and due to the capacitor voltage division, the lower the gate-source voltage of Ms bootstrap. In view of this, in order to solve the above problems, the present application provides a gate voltage bootstrap switch circuit, which achieves the effect of improving the conduction speed and linearity of the sample and hold circuit by setting a gate voltage bootstrap sub-switch module and a pull-up switch tube.

[0038] The following is an exemplary description of the sample-and-hold circuit provided by the application: As an alternative implementation, see Figure 3 The sampling and holding circuit includes a gate voltage bootstrap main switch module (not shown in the figure), a gate voltage bootstrap sub-switch module 110, a sampling switch tube Ms, a signal tracking switch tube Mg and a pull-up switch tube Mx. The gate voltage bootstrap main switch module is connected to the gate voltage bootstrap sub-switch module 110, the signal tracking switch tube Mg and the pull-up switch tube Mx respectively. The gate voltage bootstrap main switch module is connected to the gate of the sampling switch tube Ms through a first node VG, the drain of the pull-up switch tube Mx is connected to the power supply, and the source is connected to the gate of the signal tracking switch tube Mg and the gate voltage bootstrap main switch module through a second node VP; when in the holding state In the stage, the charging circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module 110 is turned on, and the bootstrap capacitor inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module 110 is charged; and the sampling switch tube Ms, the signal tracking switch tube Mg and the pull-up switch tube Mx are all turned off; when in the sampling stage, the pull-up switch tube Mx is turned on, and drives the sampling switch tube Ms and the signal tracking switch tube Mg to be turned on, and then the bootstrap circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module 110 is turned on, and the gate potential of the sampling switch tube Ms is bootstrapped to the set potential.

[0039] On the one hand, since the sampling and holding circuit provided by the present application is additionally provided with a gate voltage bootstrap sub-switch module 110, more switch tubes are connected to the second node VP, and fewer switch tubes are connected to the first node VG, that is, fewer parasitic capacitors are connected to the first node VG, thereby improving the bootstrap potential establishment speed of the sampling switch tube Ms, and also improving the linearity of the sampling and holding circuit. On the other hand, since a pull-up switch tube Mx is additionally provided in the sampling and holding circuit, and during the sampling stage, the pull-up switch tube Mx is turned on to directly drive the sampling switch tube Ms and the signal tracking switch tube Mg to turn on, it is possible to achieve that the sampling switch tube is turned on first and then the bootstrap potential is established, and the turn-on speed of the sampling switch tube Ms can be faster. At the same time, the signal tracking switch tube Mg does not need to wait for the bootstrap potential to be established before turning on, thereby improving the turn-on speed of the signal tracking switch tube Mg.

[0040] As an optional implementation, the gate voltage bootstrap main switch module includes a first bootstrap capacitor C1, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, a fifth switch tube Q5 and a pull-down component. One end of the first bootstrap capacitor C1 is connected to the drain of the first switch tube Q1 and the drain of the signal tracking switch tube Mg through the third node VS. The source of the first switch tube Q1 is grounded. The source of the signal tracking switch tube Mg and the source of the sampling switch tube Ms are both used to receive input signals. The other end of the first bootstrap capacitor C1 is connected to the source of the second switch tube Q2 and the source of the third switch tube Q3 respectively. The drain of the second switch tube Q2 is connected to the power supply, and the gate is connected to the second node VP. The drain of the third switch tube Q3 is connected to the gate of the sampling switch tube Ms and the gate voltage bootstrap sub-switch module 110. The source of the fourth switch tube Q4 is connected to the power supply, and the drain of the fourth switch tube Q4 is connected to the third switch tube Q4. The gate of the fifth switch tube Q3 is connected to the gate of the third switch tube Q3, the source of the fifth switch tube Q5 is connected to the third node VS, the drain of the fifth switch tube Q5 is connected to the gate of the third switch tube Q3, and the gates of the fourth switch tube Q4, the fifth switch tube Q5 and the pull-up switch tube Mx are all used to receive the first control signal, the gate of the first switch tube Q1 is used to receive the second control signal, and the first control signal and the second control signal are opposite signals, one end of the pull-down component is connected to the second node VP, and the other end of the pull-down component is grounded; when in the holding stage, the first switch tube Q1, the pull-down component, the second switch tube Q2 and the fourth switch tube Q4 are turned on, and the third switch tube Q3 and the fifth switch tube Q5 are turned off; and the first switch tube Q1, the first bootstrap capacitor C1 and the second switch tube Q2 form a charging loop; when in the sampling stage, the first switch tube Q1, the pull-down component, the second switch tube Q2 and the fourth switch tube Q4 are turned off, and the third switch tube Q3 and the fifth switch tube Q5 are turned on.

[0041] The second switch tube Q2 , the third switch tube Q3 , and the fourth switch tube Q4 are all P-type tubes, and the first switch tube Q1 and the fifth switch tube Q5 are all N-type tubes.

[0042] The pull-down component includes a sixth switch tube Q6 and a seventh switch tube Q7, the source of the sixth switch tube Q6 is connected to the second node VP, the drain of the sixth switch tube Q6 is connected to the source of the seventh switch tube Q7, the gate of the sixth switch tube Q6 is connected to the power supply, the drain of the seventh switch tube Q7 is grounded, and the gate of the seventh switch tube Q7 is used to receive the second control signal; when in the holding stage, the sixth switch tube Q6 and the seventh switch tube Q7 are both turned on, and after being turned on, the voltage of the second node VP is pulled down to the ground; when in the sampling stage, the sixth switch tube Q6 is turned on and the seventh switch tube Q7 is turned off.

[0043] It can be understood that in the sampling and holding circuit provided by the present application, since only the gate of the sampling switch tube Ms is connected to the first node VG, the present application greatly reduces the parasitic capacitance of the first node VG relative to the existing topological structure. According to the capacitor charging formula T=RC, T represents the charging time, R represents the equivalent resistance, and C represents the equivalent capacitance. When the equivalent capacitance of the first node VG is reduced, the time for charging the capacitor is shortened during the bootstrap process, thereby increasing the charging speed of the first bootstrap capacitor C1 to the first node VG and reducing the voltage drop caused by the capacitor voltage division.

[0044] Furthermore, since the pull-up switch tube Mx provided in the present application can directly act on the first node VG, in the sampling stage, after the pull-up switch tube Mx is turned on, it directly pulls up the voltage of the first node VG to the power supply VDD, so that the sampling switch tube Ms is turned on first, and then the bootstrap process is established, thereby improving the initial establishment speed of the gate voltage of the sampling switch tube Ms. That is, the sampling switch tube Ms is turned on first, the signal starts to be established first, and then the first node VG node enters the bootstrap state to ensure the linearity of the signal establishment, which improves the conduction speed of the sampling and holding circuit as a whole.

[0045] In addition, since the gate of the second switch tube Q2 is directly connected to the second node VP, the second switch tube Q2 does not need to wait for the establishment of the first node VG before turning off, which improves the speed at which the first node VG tracks the input signal. Thereafter, the bootstrap voltage of the gate voltage bootstrap sub-switch module 110 is used to ensure that there is no backflow risk in the gate voltage bootstrap sub-switch module 110.

[0046] As an implementation method, the gate voltage bootstrap sub-switch module 110 includes a second bootstrap capacitor C2, an eighth switch tube Q8 and a ninth switch tube Q9, one end of the second bootstrap capacitor C2 is connected to the third node VS, the other end is connected to the source of the eighth switch tube Q8 and the ninth switch tube Q9, the drain of the eighth switch tube Q8 is connected to the power supply, the gate of the eighth switch tube Q8 is connected to the second node VP, the drain of the ninth switch tube Q9 is connected to the second node VP, and the gate of the ninth switch tube Q9 is connected to the gate of the third switch tube Q3; when in the holding stage, the eighth switch tube Q8 is turned on and the ninth switch tube Q9 is turned off; when in the sampling stage, the eighth switch tube Q8 is turned off and the ninth switch tube Q9 is turned on. Among them, the eighth switch tube Q8 and the ninth switch tube Q9 are both P-type tubes. In the present application, the first bootstrap capacitor C1 has the same capacitance as the second bootstrap capacitor C2.

[0047] The gate voltage bootstrap sub-switch module 110 also includes a tenth switch tube Q10, the drain of the tenth switch tube Q10 is connected to the second node VP, the source of the tenth switch tube Q10 is connected to the first node VG, the gate of the tenth switch tube Q10 is connected to the power supply, and the tenth switch tube Q10 is in the on state in both the holding stage and the sampling stage.

[0048] By providing the gate voltage bootstrap sub-switch module 110, a second node VP can be introduced, so that more switch tubes can be connected to the second node VP, the number of switch tubes connected to the first node VG is reduced, and the gate voltage bootstrap speed of the first node VG is improved.

[0049] At the same time, during the bootstrap process, the potential of the second node VP will also be bootstrapped to VDD+VIN, and the gate of the signal tracking switch tube Mg is connected to the second node VP. Therefore, the signal tracking switch tube Mg does not need to wait for the second node VP voltage to be established before turning on, but is directly turned on after the pull-up switch tube Mx is turned on, thereby improving the speed at which the gate voltage of the sampling switch tube Ms tracks the input signal. Afterwards, the potential of the second node VP is bootstrapped to VDD+VIN in the second bootstrap capacitor C2, thereby ensuring the linearity of the signal tracking switch tube Mg.

[0050] Moreover, after the second node VP is bootstrapped to VDD+VIN, since the gates of the second switch tube Q2 and the eighth switch tube Q8 are connected to the second node VP, it is ensured that the second switch tube Q2 and the eighth switch tube Q8 will not be turned on even after bootstrapping, thereby avoiding the risk of backflow from the source of the second switch tube Q2 and the eighth switch tube Q8 to the power supply.

[0051] Moreover, in order to further improve the linearity of the sampling switch tube Ms, the sampling and holding circuit provided in the present application further includes an eleventh switch tube Q11, and the source and drain of the eleventh switch tube Q11 are short-circuited and connected to the drain of the sampling switch tube Ms. By providing the eleventh switch tube Q11, a parasitic capacitance that changes oppositely to the sampling switch tube Ms can be introduced at the signal sampling node, thereby realizing compensation for the nonlinear parasitic capacitance of the sampling switch tube Ms.

[0052] The working principle is described in detail below in conjunction with the circuit provided in this application: When in the holding stage, the first control signal CLKS is at a low level, and the second control signal CLKH is at a high level. At this time, the first switch tube Q1, the fourth switch tube Q4, and the seventh switch tube Q7 are turned on, the fifth switch tube Q5 and the pull-up switch tube Mx are turned off, and the sixth switch tube Q6, as a protection tube, is always in a conducting state. Therefore, after the seventh switch tube Q7 is turned on, the voltage of the second node VP is directly pulled down to the ground. The tenth switch tube Q10, as a protection tube, is always turned on, and then after the voltage of the second node VP is pulled down to the ground, the second switch tube Q2 and the eighth switch tube Q8 are turned on, and the sampling switch tube Ms and the signal tracking switch tube Mg are turned off. At the same time, after the fourth switch tube Q4 is turned on, the gates of the third switch tube Q3 and the ninth switch tube Q9 are pulled up to the power supply VDD, and the third switch tube Q3 and the ninth switch tube Q9 are turned off. It can be seen that in this stage, the first bootstrap capacitor C1 is charged through the second switch tube Q2, the first bootstrap capacitor C1, and the charging circuit of the first switch tube Q1; at the same time, the second bootstrap capacitor C2 is charged through the eighth switch tube Q8, the second bootstrap capacitor C2, and the charging circuit of the first switch tube Q1.

[0053] When in the sampling stage, the first control signal CLKS is at a high level, and the second control signal CLKH is at a low level. At this time, the first switch tube Q1, the fourth switch tube Q4, and the seventh switch tube Q7 are turned off, and the fifth switch tube Q5 and the pull-up switch tube Mx are turned on. It should be noted that in this stage, it actually includes the second node VP voltage establishment stage and the bootstrap stage. Since the pull-up switch tube Mx is turned on, the second node VP is directly pulled up to VDD. Since there is no feedback loop in this stage, the establishment process is relatively fast. When the second node VP is pulled up to VDD, the sampling switch tube Ms and the signal tracking switch tube Mg are turned on, and the second switch tube Q2 and the eighth switch tube Q8 are turned off. Since this process is established quickly, the sampling switch tube Ms in the circuit can work at a faster speed, which greatly improves the sampling frequency of the sampling switch tube Ms. After the sampling switch tube Ms and the signal tracking switch tube Mg are turned on, the bootstrap stage is entered. Since the signal tracking switch tube Mg in the prior art needs to wait until the voltage of the first node VG is established before it can be turned on, while in the present application it is turned on during the second node voltage establishment stage, thus improving the establishment speed of the bootstrap stage.

[0054] During the bootstrap stage, under the action of the fifth switch tube Q5 being turned on, the third switch tube Q3 and the ninth switch tube Q9 are turned on, so that the first bootstrap capacitor C1 boots the voltage of the first node VG to VDD+VIN, and the second bootstrap capacitor C2 boots the voltage of the second node VP to VDD+VIN, thereby ensuring the linearity of the sampling switch tube Ms and the signal tracking switch tube Mg.

[0055] It can be seen that a new topological structure is adopted in the sampling and holding circuit provided by the present application. The parasitic capacitance of the first node VG is greatly reduced without introducing a large device expenditure, and the voltage establishment speed of the first node VG is greatly accelerated; the conduction speed of the signal tracking switch tube Mg and the turn-off speed of the second switch tube Q2 and the eighth switch tube Q8 are accelerated, and the speed at which the gate voltage of the sampling switch tube Ms tracks the input signal is increased, and the initial rise speed of the voltage establishment of the first node VG is accelerated by pulling up the switch tube Mx. The on-off speed of the sampling switch tube Ms is greatly improved. In addition, the parasitic nonlinear capacitance of the sampling switch tube Ms is compensated by introducing the eleventh switch tube Q11, which changes in the parasitic capacitance opposite to that of the sampling switch tube Ms.

[0056] Based on the above implementation, an embodiment of the present application further provides an electronic chip, which includes the above sample-and-hold circuit.

[0057] In summary, the present application provides a sampling and holding circuit and an electronic chip, wherein the sampling and holding circuit comprises a gate voltage bootstrap main switch module, a gate voltage bootstrap sub-switch module, a sampling switch tube, a signal tracking switch tube and a pull-up switch tube, wherein the gate voltage bootstrap main switch module is respectively connected to the gate voltage bootstrap sub-switch module, the signal tracking switch tube and the pull-up switch tube, the gate voltage bootstrap main switch module is connected to the gate of the sampling switch tube through a first node, the drain of the pull-up switch tube is connected to a power supply, and the source is connected to the gate of the signal tracking switch tube and the gate voltage bootstrap main switch module through a second node. connected; when in the holding stage, the charging circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the bootstrap capacitor inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is charged; and the sampling switch tube, the signal tracking switch tube and the pull-up switch tube are all turned off; when in the sampling stage, the pull-up switch tube is turned on, and drives the sampling switch tube and the signal tracking switch tube to be turned on, and then the bootstrap circuit inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the gate potential of the sampling switch tube is bootstrapped to the set potential.

[0058] On the one hand, since the sampling and holding circuit provided by the present application is additionally provided with a gate voltage bootstrap sub-switch module, more switches are connected to the second node, and fewer switch tubes are connected to the first node, that is, fewer parasitic capacitors are connected to the first node, thereby improving the bootstrap potential establishment speed of the sampling switch tube, and also improving the linearity of the sampling and holding circuit. On the other hand, since a pull-up switch tube is additionally provided in the sampling and holding circuit, and during the sampling stage, the pull-up switch tube is turned on to directly drive the sampling switch tube and the signal tracking switch tube to be turned on, it is possible to achieve that the sampling switch tube is turned on first and then the bootstrap potential is established, and the turn-on speed of the sampling switch tube can be faster. At the same time, the signal tracking switch tube does not need to wait for the bootstrap potential to be established before turning on, thereby improving the turn-on speed of the signal tracking switch tube.

[0059] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0060] It will be apparent to those skilled in the art that the present application is not limited to the details of the exemplary embodiments described above, and that the present application can be implemented in other specific forms without departing from the spirit or essential features of the present application. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present application. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A sample-and-hold circuit, characterized in that: The sampling and holding circuit comprises a gate voltage bootstrap main switch module, a gate voltage bootstrap sub-switch module, a sampling switch tube, a signal tracking switch tube and a pull-up switch tube, wherein the gate voltage bootstrap main switch module is respectively connected to the gate voltage bootstrap sub-switch module, the signal tracking switch tube and the pull-up switch tube, the gate voltage bootstrap main switch module is connected to the gate of the sampling switch tube through a first node, the drain of the pull-up switch tube is connected to a power supply, and the source is connected to the gate of the signal tracking switch tube and the gate voltage bootstrap main switch module through a second node; When in the holding stage, the charging circuits inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module are turned on, and the bootstrap capacitors inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module are charged; and the sampling switch tube, the signal tracking switch tube and the pull-up switch tube are all turned off; When in the sampling stage, the pull-up switch tube is turned on, and drives the sampling switch tube and the signal tracking switch tube to be turned on, and then the bootstrap loop inside the gate voltage bootstrap main switch module and the gate voltage bootstrap sub-switch module is turned on, and the gate potential of the sampling switch tube is bootstrapped to the set potential.

2. The sample-and-hold circuit according to claim 1, wherein: The gate voltage bootstrap main switch module includes a first bootstrap capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube and a pull-down component, one end of the first bootstrap capacitor is connected to the drain of the first switch tube and the drain of the signal tracking switch tube through a third node, the source of the first switch tube is grounded, the source of the signal tracking switch tube and the source of the sampling switch tube are both used to receive input signals, the other end of the first bootstrap capacitor is respectively connected to the source of the second switch tube and the source of the third switch tube, the drain of the second switch tube is connected to the power supply, and the gate is connected to the second node, the drain of the third switch tube is connected to The gate of the sampling switch tube and the gate voltage bootstrap sub-switch module, the source of the fourth switch tube is connected to the power supply, the drain of the fourth switch tube is connected to the gate of the third switch tube, the source of the fifth switch tube is connected to the third node, the drain of the fifth switch tube is connected to the gate of the third switch tube, and the gates of the fourth switch tube, the fifth switch tube and the pull-up switch tube are all used to receive a first control signal, the gate of the first switch tube is used to receive a second control signal, the first control signal and the second control signal are opposite signals, one end of the pull-down component is connected to the second node, and the other end of the pull-down component is grounded; wherein, When in the holding stage, the first switch tube, the pull-down component, the second switch tube and the fourth switch tube are turned on, and the third switch tube and the fifth switch tube are turned off; and the first switch tube, the first bootstrap capacitor and the second switch tube form a charging loop; When in the sampling phase, the first switch tube, the pull-down component, the second switch tube and the fourth switch tube are turned off, and the third switch tube and the fifth switch tube are turned on.

3. The sample-and-hold circuit according to claim 2, wherein: The second switch tube, the third switch tube and the fourth switch tube are all P-type tubes, and the first switch tube and the fifth switch tube are both N-type tubes.

4. The sample-and-hold circuit according to claim 2, wherein: The pull-down component includes a sixth switch tube and a seventh switch tube, the source of the sixth switch tube is connected to the second node, the drain of the sixth switch tube is connected to the source of the seventh switch tube, the gate of the sixth switch tube is connected to a power supply, the drain of the seventh switch tube is grounded, and the gate of the seventh switch tube is used to receive a second control signal; When in the holding stage, the sixth switch tube and the seventh switch tube are both turned on; when in the sampling stage, the sixth switch tube is turned on and the seventh switch tube is turned off.

5. The sample-and-hold circuit according to claim 2, wherein: The gate voltage bootstrap sub-switch module comprises a second bootstrap capacitor, an eighth switch tube and a ninth switch tube, one end of the second bootstrap capacitor is connected to the third node, the other end is connected to the source of the eighth switch tube and the ninth switch tube, the drain of the eighth switch tube is connected to the power supply, the gate of the eighth switch tube is connected to the second node, the drain of the ninth switch tube is connected to the second node, and the gate of the ninth switch tube is connected to the gate of the third switch tube; When in the holding phase, the eighth switch tube is turned on and the ninth switch tube is turned off; when in the sampling phase, the eighth switch tube is turned off and the ninth switch tube is turned on, and the potential of the second node is bootstrapped to a set potential.

6. The sample-and-hold circuit according to claim 5, wherein: The eighth switch tube and the ninth switch tube are both P-type tubes.

7. The sample-and-hold circuit according to claim 5, wherein: The gate voltage bootstrap sub-switch module also includes a tenth switch tube, the drain of the tenth switch tube is connected to the second node, the source of the tenth switch tube is connected to the first node, the gate of the tenth switch tube is connected to the power supply, and the tenth switch tube is in an on state in both the holding stage and the sampling stage.

8. The sample-and-hold circuit according to claim 1, wherein: The sampling and holding circuit further includes an eleventh switch tube, and the source and drain of the eleventh switch tube are short-circuited and connected to the drain of the sampling switch tube.

9. The sample-and-hold circuit according to claim 1, wherein: The bootstrap capacitor inside the gate voltage bootstrap main switch module has the same capacitance as the bootstrap capacitor inside the gate voltage bootstrap sub-switch module.

10. An electronic chip, characterized in that: The electronic chip comprises the sample-and-hold circuit according to any one of claims 1 to 9.

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