GaN HEMT (High Electron Mobility Transistor) adopting under-grid ScAlN cap layer and preparation method thereof

Abstract

The invention relates to a GaN HEMT (High Electron Mobility Transistor) adopting an under-grid ScAlN cap layer and a preparation method of the GaN HEMT. The GaN HEMT comprises a nucleating layer, an AlGaN buffer layer, a GaN channel layer and a gradually-changed AlGaN barrier layer, wherein the nucleating layer, the AlGaN buffer layer and the GaN channel layer are positioned on a substrate; the first passivation layer is located on the gradient AlGaN barrier layer, a groove is formed in the first passivation layer, the gradient component ScAlN cap layer with the Sc component ranging from 10% to 30% is arranged in the groove, and the p-type GaN cap layer is arranged on the gradient component ScAlN cap layer; the grid electrode is arranged on the p-type GaN cap layer; the source electrode and the drain electrode are respectively arranged on two sides of the grid electrode; the double-cap-layer structure has a remarkable influence on the threshold voltage of the device, the sensitivity and the response speed of the device are optimized, and the arrangement is particularly suitable for the device with a gradually-changed AlGaN barrier layer structure.

Description

Technical Field

[0001] The present invention relates to the technical field of microelectronic devices, and in particular to a GaN HEMT using an under-gate ScAlN cap layer and a preparation method thereof. Background Art

[0002] With the rapid development of wireless communication technology, the performance requirements for RF devices are increasing. GaN HEMT has become a core device in the fields of RF power amplifiers, radars, and satellite communications due to its excellent properties such as high electron mobility, high breakdown voltage, and high power density. However, GaN HEMT still faces some challenges in practical applications, especially in the regulation of threshold voltage. Accurate control of threshold voltage is crucial to the power consumption, sensitivity, and response speed of the device.

[0003] Traditional GaN HEMT devices usually adjust the threshold voltage by adjusting the thickness or Al composition of the AlGaN barrier layer. However, this method has certain limitations, especially in devices with a gradient AlGaN barrier layer structure. Since the Al composition of the barrier layer gradually changes from bottom to top, the threshold voltage is mainly determined by the Al component concentration above. Therefore, it is difficult to achieve precise control of the threshold voltage with traditional regulation methods, especially in application scenarios that require a larger threshold voltage adjustment range.

[0004] As a highly polarizable material, ScAlN has strong spontaneous polarization and piezoelectric polarization, which can significantly affect the concentration of two-dimensional electron gas (2DEG), thereby effectively regulating the threshold voltage. The wide bandgap characteristics of ScAlN help to improve the breakdown voltage and thermal stability of the device and enhance the overall performance. The lattice matching degree of ScAlN and GaN is high, which reduces interface defects and improves device reliability. By adjusting the composition and thickness of ScAlN, the 2DEG concentration can be precisely controlled to achieve flexible regulation of the threshold voltage.

[0005] Therefore, the present invention proposes a GaN HEMT device using a ScAlN cap layer under the gate and a preparation method thereof, and by introducing a gradient composition ScAlN cap layer under the gate, the threshold voltage of the device is precisely controlled, thereby improving the performance and application flexibility of the device. Summary of the invention

[0006] The present invention provides a GaN HEMT device using a ScAlN cap layer under the gate and a preparation method thereof, aiming to precisely control the threshold voltage of the device and improve the performance and application flexibility of the device by introducing a gradient composition ScAlN cap layer under the gate. The present invention arranges a gradient composition ScAlN cap layer with an Sc component of 10% to 30% under the p-type GaN cap layer, and the gradient composition ScAlN cap layer is arranged on an Al component gradient AlGaN barrier layer to form a double cap layer structure. The Sc component increases in equal intervals in the direction from the substrate to the buffer layer, which has a significant effect on the threshold voltage of the device. The arrangement is particularly suitable for devices with a gradient AlGaN barrier layer structure.

[0007] In one aspect, the present invention provides a GaN HEMT using a ScAlN cap layer under the gate, comprising:

[0008] A nucleation layer located on the substrate, an AlGaN buffer layer located on the nucleation layer, a GaN channel layer located on the AlGaN buffer layer, and a graded AlGaN barrier layer located on the GaN channel layer with an Al component of 40% to 10%, wherein the Al component gradually increases in a direction from the substrate to the buffer layer;

[0009] A first passivation layer is located on the graded AlGaN barrier layer, wherein a groove is provided in the first passivation layer, wherein the groove exposes a portion of the surface of the graded AlGaN barrier layer, a gradient component ScAlN cap layer having an Sc component of 10% to 30% is provided in the groove, and a p-type GaN cap layer is provided on the gradient component ScAlN cap layer;

[0010] The gate is arranged on the p-type GaN cap layer;

[0011] The source groove and the drain groove are respectively arranged on both sides of the gate, extending along the surface of the first passivation layer to the surface of the GaN channel layer, the source electrode is arranged in the source groove, and the drain electrode is arranged in the drain groove;

[0012] The second passivation layer covers the source electrode, the drain electrode, the gate electrode and the first passivation layer;

[0013] The Sc component increases in equal intervals in a direction from the substrate to the buffer layer.

[0014] Furthermore, the thickness of the gradient composition ScAlN cap layer is 2-6 nm.

[0015] Furthermore, the Sc components are 16%, 18%, 20% and 22% respectively in the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

[0016] Furthermore, the Al component of the graded AlGaN barrier layer is 30% to 20%, and the thickness of the graded AlGaN barrier layer is 15 nm.

[0017] Furthermore, the p-type GaN cap layer has a thickness of 20-100 nm and a doping concentration of 1e17-1e18.

[0018] Furthermore, the thickness of the AlGaN buffer layer is 1-2 μm, and the molar ratio of Al is 3%-7%.

[0019] Furthermore, the thickness of the GaN channel layer is 10-30 nm, and the thickness of the graded AlGaN barrier layer is 10-20 nm.

[0020] Further, the first passivation layer is silicon oxide, and the second passivation layer is silicon nitride;

[0021] The nucleation layer is an AlN nucleation layer.

[0022] Furthermore, the thickness of the AlGaN buffer layer is 1.6 μm, and the molar ratio of Al is 5%; the thickness of the GaN channel layer is 20 nm; the thickness of the P-type GaN cap layer is 60 nm, and the doping concentration is 3e17.

[0023] Furthermore, the distance L between the source and the drain SD 2~10μm; gate length L G The distance between the gate and the source is 0.2 to 1 μm. GS The distance between the gate and the drain is 0.9 to 2 μm. GD 0.9~7μm.

[0024] Furthermore, the distance L between the source and the drain is SD 2.25μm; gate length L G The distance between the gate and the source is 0.25 μm. GS The distance between the gate and the drain is 0.9 μm. GD is 1.5μm.

[0025] In one aspect, the present invention provides a method for preparing a GaN HEMT using a ScAlN cap layer under the gate, comprising the following steps:

[0026] Epitaxially growing a nucleation layer, an AlGaN buffer layer, a GaN channel layer, a graded AlGaN barrier layer with an Al component of 40% to 10%, a gradient component ScAlN cap layer with an Sc component of 10% to 30%, and a p-type GaN cap layer on a substrate in sequence, wherein the Sc component increases in equal intervals in a direction from the substrate to the buffer layer, and the Al component increases gradually in a direction from the substrate to the buffer layer;

[0027] Etching the p-type GaN cap layer and the gradient composition ScAlN cap layer to form a cap layer region under the gate;

[0028] Depositing a first passivation layer to cover the surface of the gradient AlGaN barrier layer on both sides of the cap layer region under the gate;

[0029] Etching the first passivation layer on both sides of the cap layer region under the gate to the surface of the GaN channel layer to form a source groove and a drain groove;

[0030] Depositing metal in the source electrode groove and the drain electrode groove to form a source electrode and a drain electrode;

[0031] Depositing metal on the p-type GaN cap layer to form a gate;

[0032] A second passivation layer is deposited to cover the source electrode, the drain electrode, the gate electrode and the first passivation layer.

[0033] The present invention introduces a gradient component ScAlN cap layer with an Sc component of 10% to 30% under the p-type GaN cap layer, and the Sc component increases in equal intervals in the direction from the substrate to the buffer layer, thereby accurately controlling the threshold voltage of the device and uniformly distributing the electric field near the gate. The device is particularly suitable for the device with a gradient AlGaN barrier layer structure of the present invention, and significantly improves the threshold voltage compared with the device with a fixed Al component. On the other hand, the introduction of the gradient component ScAlN cap layer under the gate optimizes the sensitivity and response speed of the device, and flattens the electric field near the channel under the gate foot, reduces gate leakage, and enhances its reliability and life.

[0034] In terms of process preparation, the preparation method of the present invention is relatively simple and easy to industrialize, which can effectively reduce production costs and enhance the market competitiveness of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 FIG. 4 is a schematic cross-sectional structural diagram of a GaN HEMT device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings of the present invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, other embodiments obtained by ordinary technicians in this field without creative work are all within the scope of protection of the present invention. The experimental methods described in the following embodiments are all conventional methods unless otherwise specified; the reagents and materials, unless otherwise specified, can be obtained from public commercial channels.

[0037] Spatially relative terms such as "below," "beneath," "below," "above," "upper," etc. are used in this specification to explain the positioning of one element relative to a second element. These terms are intended to encompass different orientations of the device in addition to different orientations than those depicted in the figures.

[0038] In addition, the use of terms such as "first", "second", etc. to describe various elements, layers, regions, sections, etc. is not intended to be limiting. The use of "having", "containing", "including", "comprising", etc. is open-ended, indicating the presence of the stated elements or features, but does not exclude additional elements or features. Unless the context clearly states otherwise.

[0039] An embodiment of the present invention provides a GaN HEMT using a ScAlN cap layer under the gate. Figure 1 It is shown that it includes a substrate 1 as a supporting layer of the device, and a silicon substrate, sapphire or gallium nitride substrate is selected. In a preferred embodiment, the substrate is a silicon substrate. A nucleation layer 2, an AlGaN buffer layer 3, a GaN channel layer 4, and a gradient AlGaN barrier layer 5 are arranged on the substrate 1; in a preferred embodiment, the nucleation layer is an AlN nucleation layer. The thickness of the AlGaN buffer layer 3 is 1 to 2 μm, the molar ratio of Al is 3% to 7%, and the AlGaN buffer layer is not doped; in a preferred embodiment, the thickness of the AlGaN buffer layer is 1.6 μm, and the molar ratio of Al is 5%. The GaN channel layer 4 is arranged on the AlGaN buffer layer 3, and the thickness is 10 to 30 nm.

[0040] The graded AlGaN barrier layer 5 is disposed on the GaN channel layer 4, has a thickness of 10-20 nm, an Al molar ratio of 40%-10%, and the Al component gradually increases along the direction from the substrate to the buffer layer; in a preferred embodiment, the Al component is 30%-20%.

[0041] The first passivation layer 11 is arranged on the gradient AlGaN barrier layer 5, and the first passivation layer is preferably silicon dioxide. A groove is arranged in the first passivation layer 11, and the groove exposes part of the surface of the gradient AlGaN barrier layer 5. The gradient component ScAlN cap layer 6 is arranged in the groove and contacts the barrier layer 5, and the thickness is 2-6nm. The Sc component in the gradient component ScAlN cap layer 6 is 10%-30%, and the Sc component increases in equal intervals in the direction from the substrate to the buffer layer; in a preferred embodiment, the Sc component is 16%, 18%, 20%, and 22% respectively in the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1nm.

[0042] A p-type GaN cap layer 7 is also provided in the groove. The p-type GaN cap layer 7 is provided on the gradient component ScAlN cap layer 6 in the groove. The thickness is 20 to 100 nm and the doping concentration is 1e17 to 1e18. The gradient component ScAlN cap layer 6 and the p-type GaN cap layer 7 stacked thereon constitute the gate cap layer region. In a preferred embodiment, the thickness of the p-type GaN cap layer is 60 nm and the doping concentration is 3e17. The gate 9 is provided on the p-type GaN cap layer 7. The gate length L G 0.2~1μm.

[0043] It also includes a source groove and a gate groove, which are respectively located on both sides of the cap layer region under the gate, the source 8 is arranged in the source groove, and the drain 10 is arranged in the drain groove. The source groove and the drain groove extend along the surface of the first passivation layer to the surface of the GaN channel layer 4, exposing part of the surface of the GaN channel layer, and the source and the drain are respectively connected to the channel layer. The distance L between the source and the drain SD 2~10μm; the distance between the gate and the source is L GS The distance between the gate and the drain is 0.9 to 2 μm. GD 0.9~7μm.

[0044] In a preferred embodiment, the distance L between the source and the drain SD 2.25μm; gate length L G The distance between the gate and the source is 0.25 μm. GS The distance between the gate and the drain is 0.9 μm. GD is 1.5μm.

[0045] The second passivation layer 12 covers the surface of the first passivation layer 11, the source electrode 8, the drain electrode 10 and the gate electrode 9. The second passivation layer is preferably silicon nitride.

[0046] An embodiment of the present invention further provides a method for preparing the above-mentioned GaN HEMT using the ScAlN cap layer under the gate, comprising the following steps:

[0047] First, a Si substrate is selected and cleaned to remove organic impurities and oxides on the surface. Acetone and isopropanol are used for cleaning in sequence, and then a high temperature annealing is performed at 1000° C. for 1 hour to remove oxides on the surface of the Si substrate.

[0048] Then, the epitaxial layers are grown in sequence on the cleaned silicon substrate using the MOCVD process. The AlN nucleation layer is grown first, the growth temperature is set at 860°C, and the growth thickness is 150-200nm; during the growth process, TMA is continuously introduced, and NH3 is introduced in a pulsed manner, that is, NH3 is introduced in the T1 time. 3 , during T2 time NH 3 No access to the reaction chamber.

[0049] The AlGaN buffer layer was grown on the AlN nucleation layer using the MOCVD process. The growth temperature was set at 900°C and N 2 NH 3 And TMA and TMGa, the growth thickness is 1μm~2μm.

[0050] Then, a GaN channel layer was grown on the AlGaN buffer layer. The growth temperature was set to 920°C and N 2 NH 3 With TMGa, the growth thickness is 10nm~30nm.

[0051] Then, a graded AlGaN barrier layer is grown on the GaN channel layer using the MOCVD process, and N 2 NH 3 , TMGa and TMA, the growth thickness of the gradient AlGaN layer is 10nm~20nm, and the flow rate of TMA is gradually reduced, that is, the AlGaN layer with the molar content of the Al element gradiently changing from 40% to 10% from bottom to top is obtained.

[0052] The MOCVD process is used to grow a gradient composition ScAlN cap layer on the gradient AlGaN barrier layer. The growth temperature is set to 1100°C, the growth thickness is 2-6nm, and in this preferred embodiment, the growth thickness is 4nm; N 2 As carrier gas, a continuous supply of Cp 3 ScAlN deposition was performed by changing Cp 3 The flow rate of Sc is used to obtain a gradient composition ScAlN insertion layer. The molar ratio of Sc is 16%, 18%, 20%, and 22% from the substrate upward, and the thickness of each layer is 1 nm.

[0053] The P-type GaN cap layer was grown on the gradient composition ScAlN cap layer using MOCVD process, and the growth temperature was set to 1050°C. 2 NH 3 With TMGa, TMg, the gas flow rate is adjusted appropriately to control the doping concentration, and the growth thickness is 20nm~100nm. After the growth is completed, the annealing process is used to activate the magnesium doping and eliminate the defects introduced during the doping process. The annealing temperature is 850℃ for N 2 Atmosphere annealing, time is 40 minutes.

[0054] Then, etching is performed along the surface of the P-type GaN cap layer to the surface of the gradient AlGaN barrier layer to form a gate-under-cap layer region located between the source and drain regions. In this step, the gradient composition ScAlN cap layer outside the gate region is completely etched away to form a gate-under-gradient composition ScAlN cap layer structure.

[0055] A first passivation layer is deposited, and then both sides of the gate cap layer region are etched along the surface of the first passivation layer to the surface of the GaN channel layer to form a source groove and a drain groove, exposing a portion of the surface of the GaN channel layer.

[0056] Metal is deposited in the source groove and the drain groove to form a source and a drain connected to the GaN channel.

[0057] The first passivation layer on the cap layer region under the gate is etched to form a gate groove, the surface of the gate groove exposes the surface of the p-type GaN layer, and metal is deposited in the gate groove to form a gate, which is connected to the P-type GaN cap layer.

[0058] Specifically, the Ti / Al / Ni / Au composite metal layer is deposited by electron beam evaporation to form the source electrode, the drain electrode and the gate electrode.

[0059] Finally, the second passivation layer SiN is deposited x Cover the source, drain and gate.

[0060] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A GaN HEMT using a ScAlN cap layer under the gate, characterized in that: include: A nucleation layer located on the substrate, an AlGaN buffer layer located on the nucleation layer, a GaN channel layer located on the AlGaN buffer layer, and a graded AlGaN barrier layer located on the GaN channel layer with an Al component of 40% to 10%, wherein the Al component gradually increases in a direction from the substrate to the buffer layer; A first passivation layer is located on the graded AlGaN barrier layer, wherein a groove is provided in the first passivation layer, wherein the groove exposes a portion of the surface of the graded AlGaN barrier layer, a gradient component ScAlN cap layer having an Sc component of 10% to 30% is provided in the groove, and a p-type GaN cap layer is provided on the gradient component ScAlN cap layer; The gate is arranged on the p-type GaN cap layer; The source groove and the drain groove are respectively arranged on both sides of the gate, extending along the surface of the first passivation layer to the surface of the GaN channel layer, the source electrode is arranged in the source groove, and the drain electrode is arranged in the drain groove; The second passivation layer covers the source electrode, the drain electrode, the gate electrode and the first passivation layer; The Sc component increases in equal intervals in a direction from the substrate to the buffer layer.

2. The GaN HEMT according to claim 1, characterized in that: The thickness of the gradient composition ScAlN cap layer is 2-6 nm.

3. The GaN HEMT according to claim 1, characterized in that: The Sc components are 16%, 18%, 20% and 22% respectively in the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

4. The GaN HEMT according to any one of claims 1 to 3, characterized in that: The Al component of the graded AlGaN barrier layer is 30% to 20%.

5. The GaN HEMT according to claim 4, characterized in that: The thickness of the p-type GaN cap layer is 20-100 nm, and the doping concentration is 1e17-1e18.

6. The GaN HEMT according to claim 5, characterized in that: The thickness of the AlGaN buffer layer is 1-2 μm, and the molar ratio of Al is 3%-7%.

7. The GaN HEMT according to any one of claims 1 to 3, characterized in that: The thickness of the GaN channel layer is 10-30 nm, and the thickness of the graded AlGaN barrier layer is 10-20 nm.

8. The GaN HEMT according to claim 7, characterized in that: The first passivation layer is silicon oxide, and the second passivation layer is silicon nitride; The nucleation layer is an AlN nucleation layer.

9. A method for preparing a GaN HEMT using a ScAlN cap layer under the gate, characterized in that: The following steps are involved: Epitaxially growing a nucleation layer, an AlGaN buffer layer, a GaN channel layer, a graded AlGaN barrier layer with an Al component of 40% to 10%, a gradient component ScAlN cap layer with an Sc component of 10% to 30%, and a p-type GaN cap layer on a substrate in sequence, wherein the Sc component increases in equal intervals in a direction from the substrate to the buffer layer, and the Al component increases gradually in a direction from the substrate to the buffer layer; Etching the p-type GaN cap layer and the gradient composition ScAlN cap layer to form a cap layer region under the gate; Depositing a first passivation layer to cover the surface of the gradient AlGaN barrier layer on both sides of the cap layer region under the gate; Etching the first passivation layer on both sides of the cap layer region under the gate to the surface of the GaN channel layer to form a source groove and a drain groove; Depositing metal in the source electrode groove and the drain electrode groove to form a source electrode and a drain electrode; Depositing metal on the p-type GaN cap layer to form a gate; A second passivation layer is deposited to cover the source electrode, the drain electrode, the gate electrode and the first passivation layer.

10. The preparation method according to claim 9, characterized in that: The Sc components are 16%, 18%, 20% and 22% respectively in the direction from the substrate to the buffer layer, and the thickness of a single Sc component is 1 nm.

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