Multi-task Hardware-in-the-loop Testing Method and System for Power Electronic Converters Based on Electrothermal Real-time Simulation

Abstract

The present invention proposes a multi-task hardware-in-the-loop test method and system for power electronic converters based on electro-thermal real-time simulation, which includes establishing a circuit model of the power electronic converter; constructing a thermal network model of the power semiconductor; establishing an electro-thermal real-time simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module; solving the electro-thermal real-time simulation model of the power electronic converter; and establishing a multi-task hardware-in-the-loop test platform based on the electro-thermal real-time simulation model to conduct multi-task hardware-in-the-loop tests. Different from traditional hardware-in-the-loop tests, the method of the present invention can conduct multi-task hardware-in-the-loop tests on various strategies such as closed-loop control, thermal management, device protection, fault prediction, health management, and fault-tolerant control of the power electronic converter based on the electro-thermal real-time simulation model of the power electronic converter. The present invention can conduct comprehensive, efficient, safe, and low-cost tests on the converter, shortening the R & D cycle of the power electronic converter.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics simulation, and particularly relates to a multi-task hardware-in-the-loop test method and system for power electronic converters based on electrothermal real-time simulation. Background Technique

[0002] Compared with the traditional test bench built based on physical hardware, the hardware-in-the-loop test environment provides a controllable and reliable test environment by combining software simulation with physical hardware, enabling comprehensive, efficient, safe, and low-cost testing of converters and shortening the R & D cycle of power electronic converters. The application scenarios of hardware-in-the-loop testing depend on the accuracy of real-time simulation, and different test tasks can be carried out according to the refinement degree of the model.

[0003] However, limited by the accuracy of the real-time simulation model, currently, the hardware-in-the-loop test of power electronic converters can only test the closed-loop control performance, and cannot use real-time simulation to analyze thermal stress and verify the safe operating area, resulting in the inability to conduct hardware-in-the-loop tests such as optimization control strategies based on temperature and efficiency, device overvoltage and overcurrent protection, electrothermal comprehensive management, fault pre-diagnosis and health management, and fault-tolerant control, which greatly limits the application space of hardware-in-the-loop testing. Therefore, the method of the present invention constructs a multi-task hardware-in-the-loop test based on the electrothermal coupling real-time simulation of power electronic converters, effectively expanding the single-dimensional hardware-in-the-loop test to a multi-functional hardware-in-the-loop test. Summary of the Invention

[0004] The problem to be solved by the present invention is to provide a multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation in view of the deficiencies of the above-mentioned prior art. The specific steps are as follows:

[0005] A1. Establish a circuit model of the power electronic converter;

[0006] A2. Construct a thermal network model of the power semiconductor;

[0007] A3. Establish an electrothermal real-time simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module;

[0008] A4. Solve the electrothermal real-time simulation model of the power electronic converter;

[0009] A5. Establish a multi-task hardware-in-the-loop test platform based on the electrothermal real-time simulation model and conduct multi-task hardware-in-the-loop testing.

[0010] Further, the construction of the circuit model of the power electronic converter in step A1 includes two parts: component modeling based on component characteristic analysis and network modeling based on topology analysis.

[0011] The component modeling of a power electronic converter is the process of representing the characteristics of the components in the converter using mathematical relationships. The main components of a power electronic converter include power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, etc.

[0012] The models of power semiconductors can be divided into transient models and steady-state models according to different application levels, and the modeling methods of steady-state models.

[0013] For a constant resistance component, when the voltage and current take the associated reference directions, the voltage across its two ends and the current at any moment obey Ohm's law. For a constant capacitance component, the current is proportional to the rate of change of voltage, and the voltage is proportional to the charge of the capacitor. The capacitance value of a time-varying capacitor has a functional relationship with the voltage across its two ends. For a constant inductance component, the voltage is proportional to the rate of change of current, and the current is proportional to the magnetic flux linkage. The inductance value of a time-varying inductor is related to the current flowing through the inductor.

[0014] The transformer model uses and resistors that simulate the copper losses in the primary and secondary windings, and inductors that simulate the leakage magnetic flux, a resistor that simulates the core losses, an inductor that simulates the magnetization effect, and an ideal transformer that simulates the voltage conversion relationship between the primary and secondary windings. Assuming the transformer turns ratio is k, the transformer model satisfies the following formula.

[0015] ;

[0016] In the formula, is the current flowing into the inductor that simulates the magnetization effect, is the total current flowing into the core loss resistor and the inductor that simulates the magnetization effect, is the primary voltage, is the secondary voltage, is the primary current, is the secondary current.

[0017] Power supplies include independent sources and controlled sources. Among them, the voltage of an independent voltage source is a constant or a function of time, the current of an independent current source is a constant or a function of time, the voltage of a voltage-controlled voltage source and a current-controlled voltage source depends on the voltages and currents of other circuit elements, and the current of a voltage-controlled current source and a current-controlled current source depends on the voltages and currents of other circuit elements.

[0018] Network modeling is the process of writing Kirchhoff's equations based on the topological structure and component models of power electronic converters to complete the analysis of electrical networks. The state-space method can be used to construct equations through state variables to complete network modeling. The basic steps of the state-space analysis method are as follows: First, determine the state variables; then write Kirchhoff's equations for the state variables, use Kirchhoff's current equation to represent the relationship between the derivative of the inductor current and the voltage, and use Kirchhoff's voltage equation to represent the relationship between the derivative of the capacitor voltage and the current. The matrix form of the circuit equations obtained by the state-space method is:

[0019] ;

[0020] In the formula, is the state variable vector, is the system matrix, is the input matrix. If the output variable is not a state variable, an output equation needs to be written. In the formula, is the output variable vector, is the output matrix, is the direct transfer matrix.

[0021] Furthermore, in the power electronic converter in step A2, the components affected by temperature mainly include resistors, capacitors, inductors, power semiconductors, etc. For resistor components, the resistance of metal materials increases with the temperature rise, while some alloy materials are less affected by temperature. The influence can be reduced by selecting resistors from the same manufacturer / batch and fully considering the thermal temperature coefficient of the resistor at the beginning of the design. For capacitor components, the capacitance of aluminum electrolytic capacitors increases and the lifespan shortens when the temperature rises. The temperature characteristics of ceramic capacitors vary depending on the material. The capacitance of tantalum capacitors changes relatively little with temperature, and the capacitance of thin film capacitors changes relatively little with temperature, and high temperature affects insulation and lifespan; inductors are actually not sensitive to temperature; among power semiconductors, diodes are very sensitive to temperature. The higher the temperature, the greater their forward conduction and reverse saturation currents. MOSFETs are also greatly affected by temperature, and there are situations such as thermal failure, stress damage, and changes in output characteristics. Generally speaking, among the components of a specially designed power electronic converter, the device most affected by temperature and with difficult thermal effect evaluation is the power semiconductor device. Therefore, the thermal effect of power semiconductor devices is mainly analyzed. The basic principle of constructing the thermal network model of power semiconductors is the electro-thermal analogy theory. The heat conduction system is analogized to the resistor network in the circuit, and a network model composed of thermal resistors and heat capacities is established to analyze the heat transfer process and calculate the temperature distribution. In the thermal network model, thermal resistors are used to represent the resistance encountered by heat flow when transferring in different media, similar to the resistors in the circuit; heat capacities are used to represent the ability of an object to store heat, similar to the capacitors in the circuit. Current sources are used to replace heat sources, and voltage is analogized to temperature. The thermal network model includes the Cauer model and the Foster model.

[0022] The steps to establish a Cauer thermal network model for a power semiconductor module and its heat dissipation structure are as follows:

[0023] (1)Determine the nodes. According to the heat transfer process of the power semiconductor, several key nodes such as the junction temperature, case temperature, and ambient temperature are defined for it. The junction temperature is the temperature of the active region inside the power semiconductor and is a key parameter for measuring the thermal state of the device. The case temperature is the temperature of the surface of the power semiconductor package. The heat sink is the temperature of the surface of the module heat sink and provides a reference for heat sink design. is the temperature of the environment where the device is located and has a direct impact on the junction temperature.

[0024] (2)Determine the branches and thermal resistances. Analyze the heat transfer paths between the nodes, determine the branches connecting each node, and calculate the thermal resistances of the branches. The thermal resistance describes the degree of obstruction to heat transfer, with the unit of . The lower the thermal resistance, the better the heat dissipation effect. The heat capacity is the ability of the material to increase its temperature after absorbing heat and affects the thermal response speed. The values of the thermal resistance and heat capacity are determined by the materials of the package and the heat sink.

[0025] (3)Establish node equations, form a system of equations, and solve it. According to the law of conservation of energy, write the heat balance equation for each node. Assemble the equations of all nodes into a system of equations, and solving this system of equations can obtain the temperatures of each node. The heat balance equation in the thermal network model is the Kirchhoff's law of the circuit, so the above circuit modeling and solving methods can be used for calculation. Use the method of impedance equivalence to transform the Cauer thermal network into a Foster thermal network.

[0026] Furthermore, in step A3, by analyzing the coupling relationship between the circuit model and the thermal network model, a converter electro-thermal coupling model is constructed. A real-time electro-thermal simulation model of the power electronic converter is established through the loss calculation module and the electrical parameter correction module.

[0027] The loss calculation module includes the calculation of conduction loss, switching loss, and static power consumption. Among them, the conduction loss calculation formula is:

[0028] ;

[0029] Among them, is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the conduction state.

[0030] The general calculation formula for the average switching loss is:

[0031] ;

[0032] wherein is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0033] The static power consumption is mainly caused by the leakage current, and its magnitude is related to the device manufacturing process and temperature. With the improvement of the manufacturing process level, the static power consumption of the power semiconductor used in the high-frequency power electronic converter can be almost ignored.

[0034] The function of the electrical parameter correction module is to correct the thermally sensitive electrical parameters. The thermally sensitive electrical parameters considered in the present invention are the on-state resistance of the power semiconductor and the threshold voltage of the switching transient model.

[0035] , in the typical power semiconductor data sheet, the on-state resistance and the threshold voltage vary with temperature. By performing curve fitting according to the data sheet, the relationship between the on-state resistance and the junction temperature can be obtained:

[0036] ;

[0037] wherein, is the segmentation point temperature, is the junction temperature of the active region inside the power semiconductor, , , and are the curve fitting coefficients. It can be seen from the curve that , .

[0038] Similarly, the relationship between the threshold voltage and the junction temperature is:

[0039] ;

[0040] wherein, , , and are the curve fitting coefficients.

[0041] Furthermore, in step A4, to solve the electrothermal model of the power electronic converter, first, the thermally sensitive parameters of the power electronic converter are corrected according to the junction temperature result in the previous time step, then the circuit model is solved using the corrected parameters, then the power losses of each power semiconductor are calculated through the look-up table, then the solution of the thermal network model is completed by inputting the losses into the thermal network model to obtain the junction temperature, and finally, the network is updated with the obtained electrical parameter and thermal parameter results to complete the calculation of one time step.

[0042] Furthermore, the multi-task hardware-in-the-loop test platform established based on the electro-thermal coupling model in step A5 consists of a real-time simulator running a real-time model, a controller running a control strategy, a host computer, an analog output adapter module, and an oscilloscope. The real-time simulator uses an FPGA and realizes interaction with the controller through a digital interface. The host computer is connected to the real-time simulator through Ethernet, and the host computer can control and monitor the simulation. The waveform generated after the output signal is scaled by the analog output adapter module can be observed through the oscilloscope to observe the changes in the electrical parameters and junction temperature of the converter in real time. The method of the present invention uses a modular electro-thermal real-time model, takes electrical signals and junction temperature information as the output of real-time simulation together, and simulates the characteristics of the converter from multiple dimensions to improve the test efficiency. Therefore, different from traditional hardware-in-the-loop tests, multi-task hardware-in-the-loop tests can be carried out on various strategies such as closed-loop control, thermal management, device protection, fault prediction, health management, and fault-tolerant control of power electronic converters based on electro-thermal real-time simulation.

[0043] The present invention provides a multi-task hardware-in-the-loop test system for power electronic converters based on electro-thermal real-time simulation, including:

[0044] 1) A real-time simulator for running the circuit model and thermal network model of the power electronic converter, and updating the thermally sensitive electrical parameters and junction temperature in each simulation step;

[0045] 2) A data processing module connected to the real-time simulator, including a loss calculation unit and an electrical parameter correction unit, where the loss calculation unit calculates the conduction loss, switching loss, and static power consumption of the power semiconductor, and the electrical parameter correction unit corrects the on-state resistance and threshold voltage of the power semiconductor according to the temperature change;

[0046] 3) A multi-task hardware-in-the-loop interface, including a digital interface and an analog output adapter, for data interaction with the controller and the host computer, and outputting electrical signals and junction temperature information to the oscilloscope for observation.

[0047] Furthermore, the real-time simulator includes FPGA hardware for interacting with the controller for circuit state variables and control quantities through a digital interface, and connecting to the host computer through Ethernet to receive test configuration instructions and send simulation monitoring data.

[0048] Furthermore, the data processing module obtains the equivalent resistance value and threshold voltage of the power semiconductor at different junction temperatures through a look-up table or piecewise fitting method, and after the conduction loss and switching loss calculations are completed by the loss calculation unit, transfers the obtained thermal load information to the thermal network model for real-time update.

[0049] The present invention has the following advantages compared with the prior art:

[0050] The multi-task hardware-in-the-loop testing method for power electronic converters based on electrothermal real-time simulation of the present invention has the advantages of reliability, safety, comprehensiveness, generality, high efficiency and economy.

[0051] The method of the present invention can accurately simulate the electrothermal characteristics of power electronic converters. Through real-time simulation, the temperature changes of the converter under different operating conditions and their influence on electrical performance can be accurately reflected, which can be used to study the performance of the converter under conditions such as high temperature or thermal cycling. The multi-task hardware-in-the-loop testing can conduct a comprehensive test on the power electronic converter. Compared with the hardware-in-the-loop testing method that only considers electrical characteristics, this method can accurately describe the electrical and thermal characteristics of the converter, thus more comprehensively reflecting the actual working state of the converter and effectively improving the accuracy and reliability of the test results.

[0052] The method of the present invention can avoid the risk of hardware damage. In traditional hardware testing, due to the complexity and uncertainty of actual operating conditions, situations such as overvoltage and overcurrent may occur, resulting in hardware damage to the power electronic converter. The hardware-in-the-loop testing method replaces part of the actual hardware with a real-time simulation model and conducts most of the tests in a virtual environment, greatly reducing the risk of hardware damage, protecting expensive experimental equipment, and at the same time reducing test interruptions and cost increases caused by hardware failures.

[0053] The method of the present invention can conveniently simulate various fault scenarios, such as open circuit and short circuit faults of power devices, as well as control circuit faults, etc. By injecting different types and degrees of faults into the simulation model, the response and fault tolerance capabilities of the power electronic converter under fault conditions can be comprehensively evaluated, providing strong support for the design of fault diagnosis and protection strategies, and helping to improve the reliability and stability of the converter.

[0054] During the testing process of the method of the present invention, if it is necessary to expand or upgrade the power electronic converter system, only the real-time simulation model and the hardware interface part need to be modified and updated accordingly, without the need to rebuild the entire test system on a large scale. The test system can conveniently adapt to the test requirements of power electronic converter systems of different scales and complexities, and has strong generality and scalability.

[0055] The method of the present invention can shorten the test time. Compared with the traditional full-physical testing method, the hardware-in-the-loop testing method based on electrothermal real-time simulation can quickly complete a large number of test tasks through parallel computing and real-time simulation technologies. Different test conditions and parameters can be quickly switched in the virtual environment, without the need to build a physical platform for cumbersome equipment adjustment and preparation work, which can improve the test efficiency and shorten the test cycle.

[0056] The method of the present invention can reduce the test cost. This method reduces the dependence on actual hardware, thereby reducing the procurement, maintenance, and replacement costs of hardware devices. At the same time, by conducting most of the tests in a virtual environment, the costs in aspects such as experimental sites and energy consumption are reduced. Moreover, this method can detect and solve problems in the design of power electronic converters in advance, avoiding large-scale rework and cost increases caused by design defects in the actual production stage, and having significant economic benefits. Description of the Drawings

[0057] Figure 1 Steps of the multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation of the present invention;

[0058] Figure 2 Power semiconductor modeling method of the present invention;

[0059] Figure 3 Resistor, capacitor, and inductor element modeling method of the present invention;

[0060] Figure 4 Transformer equivalent model of the present invention;

[0061] Figure 5 Power supply element modeling method of the present invention;

[0062] Figure 6 Electrothermal coupling modeling method of the present invention;

[0063] Figure 7 Curves of on-state resistance and threshold voltage varying with temperature in the data sheet of typical power semiconductor devices of the present invention;

[0064] Figure 8 Schematic diagram of the multi-task hardware-in-the-loop test platform of the present invention;

[0065] Figure 9 Electrothermal coupling model solving steps of the present invention;

[0066] Figure 10 Circuit topology diagram of the interleaved parallel bidirectional converter of the present invention;

[0067] Figure 11 Thermal network model diagram of power semiconductors of the present invention;

[0068] Figure 12 Comparison diagram of inductor current results of the interleaved parallel bidirectional converter of the present invention;

[0069] Figure 13 Comparison diagram of capacitor voltage results of the interleaved parallel bidirectional converter of the present invention;

[0070] Figure 14 Circuit topology diagram of the junction temperature test of the present invention;

[0071] Figure 15 This is a comparison chart of the junction temperature test results when the load current of the present invention changes;

[0072] Figure 16 This is a comparison chart of the junction temperature test results when the switching frequency of the present invention changes;

[0073] Figure 17 This is the output waveform chart of the closed-loop test of the present invention, where a is the chart of the reference voltage change, and b is the chart of the sudden change of the load current;

[0074] Figure 18 This is the output waveform chart of the fault injection test of the present invention;

[0075] Figure 19 This is the output waveform chart of the active thermal control test of the present invention, where a is the chart of reducing the frequency to 20 kHz when the load current rises, and b is the chart of reducing the frequency to 4 kHz when the load current rises. Specific embodiments

[0076] The present invention proposes a method for real-time electro-thermal simulation of a power electronic converter, which improves the simulation accuracy of the converter through precise circuit modeling and thermal network calculation. In the circuit modeling stage (A1), a circuit model including components such as power semiconductors, resistors, capacitors, inductors, power supplies, and transformers is established, and Kirchhoff's equations are written according to the topological structure or the state space method is used for modeling to ensure that the network model can accurately describe the dynamic characteristics of the converter.

[0077] In the thermal network modeling stage (A2), based on the electro-thermal analogy theory, thermal nodes such as junction temperature, case temperature, radiator temperature, and ambient temperature inside the converter are divided, and a network composed of thermal resistance and heat capacity is used to represent the heat transfer process to simulate the heat transfer path of the device during operation. Then, in the real-time electro-thermal simulation stage (A3), the dynamic power loss calculation of semiconductor devices is realized through a loss calculation module and an electrical parameter correction module, where the loss calculation includes conduction loss, switching loss, and static power consumption, and thermal-sensitive parameters such as on-state resistance and threshold voltage are corrected according to the change of the device's junction temperature to improve the simulation accuracy.

[0078] In the simulation solution stage (A4), the system uses an iterative calculation method. In each simulation time step, the thermal-sensitive electrical parameters are corrected using the junction temperature calculation result of the previous time step, the power loss is calculated, and the thermal network model is solved to obtain the updated junction temperature value. This method can accurately model power semiconductors under different temperature conditions and ensure that the simulation can dynamically reflect the thermal change characteristics of the device, improving the timeliness and stability of the simulation.

[0079] In the hardware-in-the-loop test phase (A5), based on the electrothermal real-time simulation model, a multi-task hardware-in-the-loop (HIL) test platform was constructed. This platform consists of a real-time simulator, a controller, a host computer, an analog output adapter module, and an oscilloscope. The system realizes interaction through digital interfaces, and outputs electrical signals and junction temperature information in real time, providing an efficient and low-cost solution for the development and testing of converters. The method of the present invention can improve the design efficiency of power electronic converters, reduce test risks, and provide high-precision electrothermal simulation results under different working conditions, providing reliable technical support for the optimized design and engineering application of converters.

[0080] The following examples give two specific embodiments of the "multi-task hardware-in-the-loop test system for power electronic converters based on electrothermal real-time simulation", respectively illustrating how to apply the technical features of the system in different scenarios. The types of components, network topologies, test items, etc. can be adjusted accordingly according to actual needs.

[0081] Embodiment 1: Electrothermal real-time simulation and temperature protection strategy test of a three-phase full-bridge inverter

[0082] 1. System setup

[0083] Circuit model: Select a three-phase full-bridge inverter as a typical circuit of the power electronic converter.

[0084] Thermal network model: For the MOSFET devices in the inverter, three key nodes of junction temperature, case temperature, and heatsink temperature are divided, and the Cauer thermal network is used to represent the device heat conduction path.

[0085] Hardware environment: Solve the state space equation and thermal network equation of the three-phase full-bridge circuit in the FPGA real-time simulator; build the controller hardware to implement the three-phase SVPWM or other modulation algorithms; realize the signal interaction between the real-time simulator and the controller through digital interfaces.

[0086] 2. Test procedure

[0087] Initialization of electrical parameters and thermal sensitive parameters: Set parameters such as the initial on-state resistance, threshold voltage, thermal resistance, and heat capacity of the MOSFET in the real-time simulator.

[0088] Real-time simulation iteration: In each time step, first calculate the switching loss and conduction loss of the MOSFET, and correct the on-state resistance and threshold voltage of the MOSFET according to the change of the junction temperature.

[0089] Temperature protection strategy test: Implement temperature threshold judgment logic at the controller end. When the junction temperature exceeds the set value, trigger a frequency reduction or turn-off action. The "junction temperature signal" output by the real-time simulator is transmitted to the controller through the digital interface, and the temperature protection behavior of the controller affects the electrical state of the inverter, forming a complete closed loop.

[0090] Multi-task Hardware-in-the-Loop: Observe the current and voltage waveforms of the inverter and the change of MOSFET junction temperature at the host computer end simultaneously, record the actions of the controller at high temperature, and verify the effectiveness of the temperature protection strategy.

[0091] Embodiment 2: Electrothermal Coupling and Fault Prediction Test of Bidirectional DC-DC Converter

[0092] 1. System Setup

[0093] Circuit Model: Select a bidirectional DC-DC converter (such as Buck-Boost topology) for the energy storage system.

[0094] Thermal Network Model: Focus on the heat transfer process of the main switch tube (IGBT or MOSFET) and the freewheeling diode, set the junction temperature and case temperature nodes for them respectively, and establish a Cauer thermal network.

[0095] Hardware Environment: Implement the solution of the switching function and the thermal network of the Buck-Boost topology on the FPGA. The controller implements the bidirectional power flow management strategy and conducts digital interaction with the real-time simulator.

[0096] 2. Test Procedure

[0097] Initialization of Loss and Thermal Parameters: For different working conditions (such as high-power discharge, low-power charging, etc.), set the switching frequency, current reference value, and initial thermal resistance and heat capacity parameters.

[0098] Real-Time Simulation Coupling: Calculate the turn-on and turn-off energies of IGBT / MOSFET in each time step, and obtain the correction of the on-state resistance and threshold voltage with respect to temperature by combining look-up tables or curve fitting methods.

[0099] Fault Prediction Test: Integrate a simple fault prediction algorithm at the controller or host computer end, and evaluate whether the device enters a possible thermal failure region based on the junction temperature trend, device loss information, and electrical waveform changes output by the real-time simulation.

[0100] Multi-task Hardware-in-the-Loop: In addition to the conventional closed-loop control test, it can also verify whether the controller switches to the safe mode or operates at a reduced rating when a thermal failure risk is predicted. The analog output adapter module transmits the key waveforms and junction temperature information to the oscilloscope and the host computer, facilitating the observation and recording of the response of the entire system during the fault prediction stage.

[0101] Through the above two embodiments, it can be seen that the "multi-task hardware-in-the-loop test system for power electronic converters based on electrothermal real-time simulation" of the present invention is applicable to different types of power electronic converters (such as inverters, bidirectional DC-DC converters, etc.), and can simultaneously consider the electrical and thermal coupling characteristics during the real-time simulation process, thus playing a key role in various test tasks such as temperature protection, fault prediction, and device reliability assessment.

[0102] As Figure 1 shown, the multi-task hardware-in-the-loop test method for power electronic converters with electrothermal real-time simulation of the present invention includes the following steps:

[0103] A1. Establish a circuit model of the power electronic converter;

[0104] A2. Construct a thermal network model of the power semiconductor;

[0105] A3. Establish an electrothermal real-time simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module;

[0106] A4. Solve the electrothermal real-time simulation model of the power electronic converter;

[0107] A5. Based on the electrothermal real-time simulation model, establish a multi-task hardware-in-the-loop test platform and conduct multi-task hardware-in-the-loop tests.

[0108] In this embodiment, the construction of the circuit model of the power electronic converter in step A1 includes two parts: component modeling based on component characteristic analysis and network modeling based on topology analysis.

[0109] The component modeling of the power electronic converter is the process of representing the characteristics of the components in the converter using mathematical relationships. The main components of the power electronic converter include power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, etc.

[0110] The models of power semiconductors can be divided into transient models and steady-state models according to different application levels. The steady-state model modeling method is as Figure 2 shown.

[0111] For a constant resistance element, when the voltage and current take the associated reference directions, the voltage across its two ends and the current at any moment obey Ohm's law. The current of a constant capacitance element is proportional to the rate of change of voltage, and the voltage is proportional to the capacitance charge amount. The capacitance value of a time-varying capacitor has a functional relationship with the voltage across its two ends. The voltage of a constant inductance element is proportional to the rate of change of current, and the current is proportional to the magnetic flux linkage. The inductance value of a time-varying inductor is related to the current flowing through the inductor. The modeling of resistor, capacitor, and inductor elements is as Figure 3 shown.

[0112] The transformer model is as Figure 4 shown, using and Resistors for simulating the primary and secondary copper losses, and inductors for simulating the leakage magnetic flux, resistors for simulating the core losses, inductors for simulating the magnetization effect, and an ideal transformer for simulating the voltage conversion relationship between the primary and secondary sides. Assuming the transformer turns ratio is k, the transformer model satisfies the following equation.

[0113] ;

[0114] wherein, is the current flowing into the inductor for simulating the magnetization effect ; is the total current flowing into the resistor for core losses and the inductor for magnetization effect ; is the primary voltage, is the secondary voltage, is the primary current, is the secondary current.

[0115] The power supply includes independent sources and controlled sources, and its model is as Figure 5 shown. Among them, the voltage of the independent voltage source is a constant or a function of time, the current of the independent current source is a constant or a function of time, the voltages of the voltage-controlled voltage source and the current-controlled voltage source depend on the voltages and currents of other circuit elements, and the currents of the voltage-controlled current source and the current-controlled current source depend on the voltages and currents of other circuit elements.

[0116] Network modeling is the process of writing Kirchhoff's equations based on the topological structure and component models of a power electronic converter to complete the analysis of the electrical network. The state-space method can be used to construct equations through state variables to complete network modeling. The basic steps of the state-space analysis method are as follows: First, determine the state variables; then write Kirchhoff's equations for the state variables, use Kirchhoff's current equation to represent the relationship between the derivative of the inductor current and the voltage, and use Kirchhoff's voltage equation to represent the relationship between the derivative of the capacitor voltage and the current. The matrix form of the circuit equations obtained by the state-space method is:

[0117] ;

[0118] wherein, is the state variable vector, is the system matrix, is the input matrix. If the output variable is not a state variable, an output equation needs to be written, where is the output variable vector, is the output matrix, is the direct transmission matrix.

[0119] In this embodiment, in step A2, in the power electronic converter, the components affected by temperature mainly include resistors, capacitors, inductors, power semiconductors, etc. For resistor components, the resistance of metal materials increases with the temperature rise, while the resistance of some alloy materials is less affected by temperature. The impact can be reduced by selecting resistors from the same manufacturer / batch and fully considering the thermal temperature coefficient of the resistors at the beginning of the design. For capacitor components, the capacitance of aluminum electrolytic capacitors increases and the lifespan shortens when the temperature rises. The temperature characteristics of ceramic capacitors vary depending on the material. The capacitance of tantalum capacitors changes less with temperature. The capacitance of thin-film capacitors changes relatively little with temperature, and high temperature affects insulation and lifespan. Inductors are actually not sensitive to temperature. Among power semiconductors, diodes are very sensitive to temperature. The higher the temperature, the greater their forward conduction and reverse saturation currents. MOSFETs are also greatly affected by temperature, and there are situations such as thermal failure, pressure damage, and changes in output characteristics. Generally speaking, among the components of a specially designed power electronic converter, the device that is most affected by temperature and whose thermal effect is difficult to evaluate is the power semiconductor device. Therefore, the thermal effect of power semiconductor devices is mainly analyzed. The basic principle of constructing the thermal network model of power semiconductors is the electro-thermal analogy theory. The heat conduction system is analogized to the resistance network in the circuit, and a network model composed of thermal resistance and heat capacity is established to analyze the heat transfer process and calculate the temperature distribution. In the thermal network model, thermal resistance is used to represent the resistance encountered by heat flow when transferring in different media, similar to the resistance in the circuit; heat capacity represents the ability of an object to store heat, similar to the capacitance in the circuit. A current source is used to replace the heat source, and voltage is analogized to temperature. The thermal network model includes the Cauer model and the Foster model.

[0120] The steps to establish a Cauer thermal network model for the power semiconductor module and its heat dissipation structure are as follows:

[0121] (1) Determine the nodes. According to the heat transfer process of the power semiconductor, several key nodes such as the junction temperature, case temperature, and ambient temperature are defined for it. The junction temperature is the temperature of the active area inside the power semiconductor and is a key parameter to measure the thermal state of the device. The case temperature is the temperature of the surface of the power semiconductor package. The heat sink is the temperature of the surface of the module heat sink, providing a reference for the heat sink design. is the temperature of the environment where the device is located and has a direct impact on the junction temperature.

[0122] (2) Determine the branches and thermal resistances. Analyze the heat transfer paths between the nodes, determine the branches connecting each node, and calculate the thermal resistances of the branches. Thermal resistance describes the degree of obstruction to heat transfer, with the unit of . The lower the thermal resistance, the better the heat dissipation effect. The heat capacity is the ability of the material to increase its temperature after absorbing heat and affects the heat response speed. The values of thermal resistance and heat capacity are determined by the materials of the package and the heat sink.

[0123] (3) Establish node equations, form a system of equations and solve it. According to the law of conservation of energy, write the heat balance equation for each node. Assemble the equations of all nodes into a system of equations, and solving this system of equations can obtain the temperatures of each node. The heat balance equation in the thermal network model is the Kirchhoff's law of circuits, so the above circuit modeling and solving method can be used for calculation. The Cauer thermal network is transformed into a Foster thermal network by using the impedance equivalence method. After transformation, the thermal network model of the power semiconductor module is as Figure 6 shown.

[0124] In step A3, by analyzing the coupling relationship between the circuit model and the thermal network model, a electro-thermal coupling model of the converter is constructed, as Figure 7 shown. A real-time electro-thermal simulation model of the power electronic converter is established through the loss calculation module and the electrical parameter correction module.

[0125] The loss calculation module includes the calculation of conduction loss, switching loss and static power consumption. The formula for calculating the conduction loss is:

[0126] ;

[0127] where, is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the conduction state.

[0128] The general formula for the average switching loss is:

[0129] ;

[0130] where is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0131] The static power consumption is mainly caused by the leakage current, and its magnitude is related to the manufacturing process and temperature of the device. With the improvement of the manufacturing process level, the static power consumption of the power semiconductor used in high-frequency power electronic converters can be almost ignored.

[0132] The function of the electrical parameter correction module is to correct the thermally sensitive electrical parameters. The thermally sensitive electrical parameters considered in the present invention are the on-state resistance of the power semiconductor and the threshold voltage of the switching transient model.

[0133] The curves of the on-state resistance and the threshold voltage varying with temperature in the data sheet of typical power semiconductors are as Figure 7 shown. According to the data sheet, curve fitting can be used to obtain the relationship between the on-state resistance and the junction temperature:

[0134] ;

[0135] Among them, is the segmentation point temperature, is the junction temperature of the active region inside the power semiconductor, , , and are curve fitting coefficients. It can be seen from the curve that , .

[0136] Similarly, the relational expression for the threshold voltage varying with the junction temperature is:

[0137] ;

[0138] Among them, , , and are curve fitting coefficients.

[0139] In this embodiment, the general solution steps for solving the electrothermal model of the power electronic converter in step A4 are as Figure 8 shown. First, correct the thermally sensitive parameters of the power electronic converter according to the junction temperature result in the previous time step, then use the corrected parameters to complete the solution of the circuit model, then calculate the power losses of each power semiconductor through a look-up table, then complete the solution of the thermal network model through the loss input thermal network model to obtain the junction temperature, and finally update the network with the obtained electrical parameter and thermal parameter results to complete the calculation of one time step.

[0140] In this embodiment, the multi-task hardware-in-the-loop test platform established based on the electrothermal coupling model in step A5 is as Figure 9 shown, and it consists of a real-time simulator running the real-time model, a controller running the control strategy, a host computer, an analog output adapter module, and an oscilloscope. The real-time simulator uses an FPGA and realizes the interaction with the controller through a digital interface. The host computer is connected to the real-time simulator through Ethernet, and the host computer can control and monitor the simulation. The waveform generated after the output signal is scaled by the analog output adapter module can be observed through the oscilloscope to observe the changes of the electrical parameters and junction temperature of the converter in real time. The method of the present invention uses a modular electrothermal real-time model to jointly use electrical signals and junction temperature information as the output of real-time simulation, and simulates the characteristics of the converter from multiple dimensions to improve the test efficiency. Therefore, different from traditional hardware-in-the-loop tests, multi-task hardware-in-the-loop tests can be performed on various strategies such as closed-loop control, thermal management, device protection, fault prediction, health management, and fault-tolerant control of the power electronic converter based on electrothermal real-time simulation.

[0141] Taking the Interleaved Bidirectional Converter (IBC) as an example, an electro-thermal coupling model is established. Its circuit topology is as Figure 10 shown. The circuit model of the IBC is constructed using the state-space method, and is selected as the state variable. The MOSFET and diode use the binary resistance model. When the converter operates in the boost state, and remain in the off state. At this time, the voltage across the switch and the switch satisfies the equation:

[0142] ;

[0143] where is the gate control voltage, is the inductor current, is the equivalent conduction voltage of the diode, is the equivalent conduction resistance of the diode, is the equivalent conduction voltage of the MOSFET, is the equivalent conduction resistance of the MOSFET, is the input voltage of the converter, is the output voltage of the converter.

[0144] The current flowing into the diode and the diode satisfies the equation:

[0145] ;

[0146] Writing the Kirchhoff voltage equation for the loop where the inductor is located, we can obtain:

[0147] ;

[0148] where is the voltage across the switch ; is the parasitic resistance of the inductor . Similarly, for the loop where the inductor is located, we have:

[0149] ,

[0150] where is the voltage across the switch , is the parasitic resistance of the inductor ;

[0151] Kirchhoff's current law can be written for the output node as follows:

[0152] ;

[0153] where and are the currents flowing through diodes and respectively, and is the load current.

[0154] By rearrangement, the matrix form of the state - space equation is obtained as:

[0155] ;

[0156] The power semiconductor thermal network model is shown in Figure 11 and consists of multiple parallel RC units. The state - space method is used to model the thermal network. The voltages across all heat capacitances are selected as state variables.

[0157] Kirchhoff's current law can be written for each parallel RC unit as follows:

[0158] ;

[0159] where is the MOSFET power loss, is the diode power loss, then the current of the parallel RC unit in the radiator part of the thermal network. The temperature relationship satisfies the formula:

[0160] ;

[0161] where is the radiator temperature, is the ambient temperature, is the voltage across the radiator heat capacitance. The current of the parallel RC unit in the MOSFET part, and the junction temperature satisfies the formula:

[0162] ;

[0163] where is the voltage across the heat capacitance of the th switch. Similarly, the current of the parallel RC unit in the diode part, and the junction temperature satisfies the formula:

[0164] ;

[0165] where is the voltage across the heat capacitance of the th diode.

[0166] The power semiconductor loss calculation module includes conduction loss and switching loss. The formula for calculating conduction loss is:

[0167] ;

[0168] where is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the conduction state.

[0169] The general formula for average switching loss is:

[0170] ;

[0171] where is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0172] The electrical parameter correction module includes the update calculation of the on-state resistance and threshold voltage. The formula for calculating the on-state resistance is:

[0173] ;

[0174] The formula for calculating the threshold voltage is:

[0175] ;

[0176] By calculating the power losses of diodes and MOSFETs through the loss calculation module as the input of the thermal network model and correcting the circuit model parameters by the electrical parameter correction module, electrothermal coupling modeling is achieved.

[0177] The comparison of the electrothermal coupling real-time simulation model of the interleaved parallel bidirectional converter with the inductor current and capacitor voltage of the off-line simulation software is as Figure 12 and Figure 13 shown, and its average relative error is shown in Table 1.

[0178] Table 1 Test simulation parameters of the interleaved parallel bidirectional converter

[0179] Parameter Name Symbol Average Relative Error <![CDATA L 1 Inductor current]]> <![CDATA I L1 > 0.09% <![CDATA L 2 Inductor current]]> <![CDATA I L2 > 0.21% Capacitor Voltage <![CDATA V C > 0.78%

[0180] The topology for testing the power semiconductor junction temperature is as Figure 14 shown. Assuming that the heat dissipation conditions around the test environment are good and the temperature of the radiator is fixed at 25 °C, the load current and switching frequency are changed, and the change of the junction temperature is observed. The comparison of the junction temperature test results is as Figure 15 and Figure 16 shown.

[0181] The electrothermal coupling model of the power electronic converter established by the present invention is used for multi-task hardware-in-the-loop testing, that is, the real-time model established in this paper is used to replace the physical object of the interleaved parallel bidirectional converter for testing. Taking closed-loop testing, fault injection testing, and active thermal control testing as examples. First, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for closed-loop testing including junction temperature feedback, and can more comprehensively verify the performance of the control algorithm. During the closed-loop testing of the interleaved parallel bidirectional converter, when changing the reference voltage and load current, the output voltage, input current of the converter, and the junction temperature change oscilloscope curves of the power semiconductor are as shown in Figure 17 . In the figure, the time scale is 200 or 500 milliseconds per division (div), the converter output voltage is 10 volts per division, the converter input current is 5 amperes per division, and the power semiconductor junction temperature is 5 degrees Celsius per division. During the operation of the converter, when changing the reference voltage, the output voltage follows the change, and the junction temperature changes accordingly. Then, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for fault injection testing, which can simulate the fault state of the converter and is used to test the fault diagnosis and fault tolerance control capabilities of the controller. When a fault is injected into the power semiconductor , the changes in the output voltage, input current of the converter, and the junction temperature of the power semiconductor are as shown in Figure 18 . In the figure, the time scale is 500 milliseconds per division, the converter output voltage is 10 volts per division, the converter input current is 5 amperes per division, and the power semiconductor junction temperature is 5 degrees Celsius per division. When a fault occurs, the faulty phase of the converter is regarded as an open circuit, and the normal phase bears all the current and continues to work. At this time, the output voltage and input current fluctuate under closed-loop control and then maintain the reference value, and the junction temperature of the power semiconductor in the normal phase rises significantly. Finally, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for testing the performance of active thermal control algorithms, comparing the regulation effects of different active thermal control algorithms on the converter junction temperature, evaluating the effects of active thermal control algorithms. When using the adjustment of the switching frequency for active thermal control, the junction temperature change of the power semiconductor is as shown in Figure 19 . In this experiment, the reference voltage of the converter is set to 270V. In the figure, the time scale is 500 milliseconds per division, the converter output voltage is 100 volts per division, and the power semiconductor junction temperature is 10 degrees Celsius per division. Under the same other conditions, the results in the figure show that a low switching frequency can reduce the junction temperature and achieve active thermal control.

[0182] The above is only a preferred embodiment of the present invention, and does not impose any limitations on the present invention. Any simple modifications, changes, and equivalent structural changes made to the above embodiments according to the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims

1. A multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation, characterized in that, Including the following steps: A1: Establish a circuit model of the power electronic converter. Network modeling is completed by modeling power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, and writing Kirchhoff's equations according to the topological structure; A2: Construct a thermal network model of the power semiconductor. Based on the electro-thermal analogy theory, nodes of junction temperature, case temperature, heatsink temperature, and ambient temperature are divided, and the heat transfer process is represented by a network composed of thermal resistance and heat capacity; A3: Establish a real-time electro-thermal simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module. The loss calculation module includes the calculation of conduction loss, switching loss, and static power consumption. The electrical parameter correction module corrects the on-state resistance and threshold voltage of the power semiconductor; A4: Solve the real-time electro-thermal simulation model of the power electronic converter. In each simulation step, the junction temperature result of the previous step is used to correct the thermally sensitive electrical parameters. After calculating the power loss, the thermal network model is solved to obtain the updated junction temperature and iteratively update the network; A5: Establish a multi-task hardware-in-the-loop test platform based on the real-time electro-thermal simulation model, which consists of a real-time simulator, a controller, a host computer, an analog output adapter module, and an oscilloscope. Interaction is achieved through a digital interface, and electrical signals and junction temperature information are output for multi-task hardware-in-the-loop testing; In step A1, the binary resistance method is used to model the power semiconductor. The on-state is regarded as a small resistance, and the off-state is regarded as a large resistance. The equivalent resistance during the switching process of the MOSFET is represented in segments based on the mathematical relationship between the gate-source voltage and the threshold voltage; In step A2, the thermal network model regards the heat flow as a current source, the temperature as a voltage, the thermal resistance and heat capacity corresponding to the resistance and capacitance respectively. Among them, the junction temperature node, case temperature node, heatsink node, and ambient temperature node form a Cauer thermal network through the combination of several thermal resistances and heat capacities, and are transformed into a Foster thermal network by impedance equivalence method; 2. The multi-task hardware-in-the-loop test method for a power electronic converter based on electrothermal real-time simulation according to claim 1, characterized in that In step A3, the loss calculation module calculates the conduction loss, switching loss, and static power consumption respectively. The conduction loss is related to the current flowing through the power semiconductor and the on-state equivalent resistance. The switching loss is determined according to the turn-on energy, turn-off energy, and switching frequency. The static power consumption is caused by the leakage current; 3. The multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation according to claim 1, characterized in that The electrical parameter correction module in step A3 corrects the on-state resistance and threshold voltage of the power semiconductor in segments according to the curve-fitted relationship between the on-state resistance and the junction temperature and the relationship between the threshold voltage and the junction temperature, so that the circuit model reflects the influence of temperature change on the switching characteristics in real-time simulation; 4. The multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation according to claim 1, wherein In step A4, in each simulation step, the thermally sensitive electrical parameters are corrected according to the junction temperature result of the previous step first, and then the corrected circuit model is used to calculate the power loss. The obtained loss is input into the thermal network model to solve the new junction temperature, and finally the electrical and thermal parameters are updated and enter the next step calculation; 5. The multi-task hardware-in-the-loop test method for a power electronic converter based on electrothermal real-time simulation according to claim 1, characterized in that In the step A5, the multi-task hardware-in-the-loop test platform consists of a real-time emulator composed of an FPGA and a controller connected through a digital interface. The host computer and the real-time emulator perform data interaction through Ethernet. The analog output adapter module is used to scale and convert the electrical signals and junction temperature information output by the emulator, and is observed in real time by an oscilloscope.

6. A multi-task hardware-in-the-loop test system for a power electronic converter based on electrothermal real-time simulation, which implements the multi-task hardware-in-the-loop test method for a power electronic converter based on electrothermal real-time simulation according to any one of claims 1 to 4, is characterized in that It includes: 1) A real-time emulator, which is used to run the circuit model and thermal network model of the power electronic converter, and update the thermally sensitive electrical parameters and junction temperature in each simulation step; 2) A data processing module, connected to the real-time emulator, including a loss calculation unit and an electrical parameter correction unit. The loss calculation unit calculates the conduction loss, switching loss and static power consumption of the power semiconductor, and the electrical parameter correction unit corrects the on-state resistance and threshold voltage of the power semiconductor according to the temperature change; 3) A multi-task hardware-in-the-loop interface, including a digital interface and an analog output adapter, which is used to perform data interaction with the controller and the host computer, and output the electrical signal and junction temperature information to the oscilloscope for observation.

7. The hardware-in-the-loop test system for multi-task of the power electronic converter based on electrothermal real-time simulation according to claim 6, characterized in that, The real-time emulator includes FPGA hardware, which interacts with the controller through a digital interface for circuit state variables and control quantities, and is connected to the host computer through Ethernet to receive test configuration instructions and send simulation monitoring data.

8. The multi-task hardware-in-the-loop test system for power electronic converters based on electrothermal real-time simulation according to claim 6, characterized in that, The data processing module obtains the equivalent resistance value and threshold voltage of the power semiconductor at different junction temperatures through a look-up table or piecewise fitting method, and after the conduction loss and switching loss calculations are completed in the loss calculation unit, the obtained thermal load information is transmitted to the thermal network model for real-time update.

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