Alternating current input end state detection circuit, alternating current charging equipment and alternating current charging system
By designing an AC input state detection circuit including signal acquisition, differential processing and identification module, the difficulty and safety risk problems of detecting the wiring status of AC charging equipment in the prior art are solved, and wiring status detection with high accuracy and anti-interference ability is achieved.
Patent Information
- Application Number
- CN202510238721.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2025-05-27
AI Technical Summary
In the prior art, when detecting the wiring status of the AC input terminal of an AC charging device, there are problems such as difficult measurement, unreliability detection risks and safety risks.
A state detection circuit at the AC input terminal is designed, including a signal acquisition module, a signal differential module and a signal identification module. The signal acquisition module transmits the sampled signal based on the voltage changes between the N line and the PE line. The signal differential module performs differential processing on the sampled signal. The signal recognition module determines the wiring status of the L line, N line and PE line by identifying the signal to be identified.
The wiring status detection of PE lines, L lines and N lines is realized, avoiding the problems related to safety insulation voltage resistance, and improving the anti-interference ability and detection accuracy.
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Figure CN120044438A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power connection detection, and particularly to a state detection circuit for an AC input end, an AC charging device, and a system. Background Art
[0002] When an AC charging pile or other new energy devices are connected to an external AC power supply, it is necessary to ensure that the wiring between its AC input end and the external AC power supply is correct. Currently, ground detection can be achieved by judging the ground resistance. In the charging pile standards GB / T_18487.1-2023 and NB / T_33008.2-2018, it is stipulated that the ground resistance of the AC pile shall not be greater than 0.1 Ω, which makes the measurement of this detection scheme difficult. At the same time, a balanced bridge circuit needs to be formed between the ground end and the main control end. It is also possible to use the method of potential difference identification detection. This scheme has the risk of unreliable detection. For example, when the ground connections at both ends of the charging pile and the external AC power supply are good, but there is a slight potential difference due to the long distance between the N line and the PE line of the external AC power supply, it is easy to misjudge that the ground wire PE line at both ends is not in good contact. In addition, in related technologies, a comparator plus positive feedback is also used, combined with the method of capacitive voltage reduction to collect signals, so as to detect the grounding state of the PE line. When using a comparator plus positive feedback, the input signal is easily interfered; when using capacitive voltage reduction, there is a problem of safety risk if it is not a safety-approved device. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a state detection circuit for an AC input end, an AC charging device, and a system.
[0004] The technical solution adopted by the present invention to solve its technical problems is: providing a state detection circuit for an AC input end, the AC input end includes an L line, an N line, and a PE line, and the state detection circuit includes: a signal acquisition module, a signal differential module, and a signal identification module; the first end of the signal acquisition module is connected to the N line, the second end of the signal acquisition module is connected to the PE line, and the third end of the signal acquisition module is connected to the L line; the input end of the signal differential module is connected to the signal acquisition module, and the output end of the signal differential module is connected to the signal identification module; the signal acquisition module transmits corresponding sampling signals to the signal differential module based on the voltage change between the N line and the PE line; the signal differential module performs differential processing on the sampling signals and then conveys the signals to be identified to the signal identification module; the signal identification module judges the wiring states of the L line, the N line, and the PE line by identifying the signals to be identified.
[0005] In one embodiment, the signal differential module includes a differential amplification unit and a DC bias supply unit; a first input end of the differential amplification unit is connected to a first output end of the signal acquisition module and the DC bias supply unit, a second input end of the differential amplification unit is connected to a second output end of the signal acquisition module, and an output end of the differential amplification unit is connected to the signal recognition module; the DC bias supply unit provides a DC bias voltage for the differential amplification unit, and the differential amplification unit differentially amplifies the sampling signal.
[0006] In one embodiment, the differential amplification unit includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, and an operational amplifier; a first end of the resistor R3 is connected to the second output end of the signal acquisition module, a second end of the resistor R3 is grounded through the capacitor C4 and is connected to an inverting input end of the operational amplifier; a first end of the resistor R4 is connected to the first output end of the signal acquisition module, a second end of the resistor R4 is grounded through the capacitor C3 and is connected to a non-inverting input end of the operational amplifier; a first end of the resistor R5 is connected to the non-inverting input end of the operational amplifier, a second end of the resistor R5 is connected to an output end of the DC bias supply unit; the resistor R6 is connected between the inverting input end and the output end of the operational amplifier, a power supply end of the operational amplifier is connected to a power supply voltage and is grounded through the capacitor C6, a ground end of the operational amplifier is grounded, an output end of the operational amplifier is connected to a first end of the resistor R7, and a second end of the resistor R7 is connected to the signal recognition module and is grounded through the capacitor C5.
[0007] In one embodiment, the resistance values of the resistor R3 and the resistor R4 are equal, and the resistance values of the resistor R5 and the resistor R6 are equal; the signal recognition module determines the wiring states of the L line, the N line, and the PE line by identifying the voltage value of the signal to be recognized; wherein, when V PC1_ADC = 0 + V ref_GC , it is determined that the PE line is normally connected and the L line and the N line are correctly wired; when , it is determined that the PE line is normally wired and the L line and the N line are reversed; when , it is determined that the PE line is abnormally wired; in the formula, V PC1_ADC is the voltage value of the signal to be recognized, V ref_GC is the DC bias voltage value, U m is the maximum value of the input alternating current voltage at the AC input end, ω is the angular frequency of the input alternating current, t is the time, τu is the initial phase of the input alternating current, and k is the voltage division coefficient between the first output end and the second output end of the signal acquisition module.
[0008] In one embodiment, the DC bias supply unit includes a resistor R1, a resistor R2, a resistor R8, a capacitor C1, a capacitor C2, and a voltage follower; a first end of the resistor R1 is connected to a power supply voltage, a second end of the resistor R1 is grounded through the resistor R2 and the capacitor C1 respectively, the second end of the resistor R1 is connected to a non-inverting input terminal of the voltage follower, an output terminal of the voltage follower is connected to a first end of the resistor R8, and a second end of the resistor R8 is connected to the differential amplification unit and grounded through the capacitor C2.
[0009] In one embodiment, the signal acquisition module includes a first capacitor unit and a second capacitor unit; the first capacitor unit is connected across the N line and the PE line, and the second capacitor unit is connected across the L line and the PE line; the signal differential module is connected to the first capacitor unit.
[0010] In one embodiment, the first capacitor unit and the second capacitor unit each include at least one Y capacitor.
[0011] In one embodiment, when a first Y capacitor module and a second Y capacitor module for suppressing common-mode interference are provided at the AC input terminal, the first Y capacitor module is connected across the N line and the PE line, and the second Y capacitor module is connected across the L line and the PE line; the first capacitor unit uses the first Y capacitor module, and the second capacitor unit uses the second Y capacitor module.
[0012] There is also provided an AC charging device, including an AC input terminal and a state detection circuit of the AC input terminal described in any one of the above.
[0013] There is also provided an AC charging system, including the AC charging device described above and an AC power supply; the AC power supply is connected to the AC input terminal to supply power to the AC charging device.
[0014] Implementing the present invention has the following beneficial effects: The signal acquisition module transmits corresponding sampling signals based on the voltage change between the N line and the PE line, can detect the wiring states of the PE line, L line, and N line, and can also avoid related problems of safety regulations for insulation withstanding voltage. Using the signal differential module to perform differential processing on the sampling signals can improve the anti-interference ability and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The present invention will be further described below in conjunction with the drawings and embodiments. In the drawings:
[0016] Figure 1 is a structural block diagram of an embodiment of the state detection circuit of the AC input terminal of the present invention;
[0017] Figure 2It is the circuit schematic diagram of the signal acquisition module according to an embodiment of the present invention;
[0018] Figure 3 It is the structural block diagram of another embodiment of the state detection circuit of the AC input end of the present invention;
[0019] Figure 4 It is the circuit schematic diagram of the differential amplification unit according to an embodiment of the present invention;
[0020] Figure 5 It is the circuit schematic diagram of the DC bias supply unit according to an embodiment of the present invention;
[0021] Figure 6 It is the structural block diagram of an embodiment of the AC charging system of the present invention. Detailed implementation manners
[0022] In order to have a clearer understanding of the technical features, objectives, and effects of the present invention, the detailed implementation manners of the present invention will now be described in detail with reference to the accompanying drawings. In the following description, it should be understood that the terms "first", "second", "third", etc. are only for the convenience of describing the present technical solution, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first", "second", "third", etc. may explicitly or implicitly include one or more of such features. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0023] In the following description, for the purpose of illustration rather than limitation, specific details such as specific system structures and technologies are proposed to thoroughly understand the embodiments of the present invention. However, those skilled in the art should clearly understand that the present invention can also be implemented in other embodiments without these specific details. In other cases, the detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the present invention.
[0024] The state detection circuit of the AC input end of the present invention is used to detect whether the wiring between the AC input end and the external AC power supply is correct. The AC input end includes an L line, an N line, and a PE line, which is the AC input end of an AC charging pile and is arranged on the control board of the AC charging pile. In other embodiments, it can also be the AC input end of other AC electrical equipment. When the AC power supply supplies power to the AC input end, the L line Lin of the AC input end needs to be connected to the output L line of the AC power supply, the N line Nin of the AC input end needs to be connected to the output N line of the AC power supply, and the PE line of the AC input end needs to be connected to the output PE line of the AC power supply. If the wiring is abnormal, problems such as electric shock risk and leakage protection failure may occur.
[0025] Such as Figure 1As shown, in an embodiment of the state detection circuit at the AC input end of the present invention, it includes: a signal acquisition module 10, a signal differential module 20, and a signal recognition module 30. The first end of the signal acquisition module 10 is connected to the N wire, the second end of the signal acquisition module 10 is connected to the PE wire, and the third end of the signal acquisition module 10 is connected to the L wire. The input end of the signal differential module 20 is connected to the signal acquisition module 10, and the output end of the signal differential module 20 is connected to the signal recognition module 30. The signal acquisition module 10 transmits corresponding sampling signals to the signal differential module 20 based on the voltage change between the N wire and the PE wire. The signal differential module 20 performs differential processing on the sampling signals and then conveys the signals to be recognized to the signal recognition module 30. The signal recognition module 30 determines the wiring states of the L wire, N wire, and PE wire by recognizing the signals to be recognized.
[0026] It can be understood that the sampling signals are generated based on the voltage between the N wire and the PE wire, and the voltage between the N wire and the PE wire changes with the wiring state at the AC input end. Therefore, the sampling signals corresponding to different wiring states have different fluctuation ranges. For example, when the connection of the PE wire is abnormal, the signal acquisition module 10 transmits the first sampling signal; when the connection of the PE wire is normal and the L wire and the N wire are reversed, the second sampling signal is transmitted; when the connection of the PE wire is normal and the L wire and the N wire are correctly connected, the third sampling signal is transmitted. The first sampling signal, the second sampling signal, and the third sampling signal correspond to different fluctuation ranges. The signals to be recognized are the sampling signals after differential processing. The signals to be recognized corresponding to different sampling signals also have different fluctuation ranges. After the signal recognition module 30 recognizes the fluctuation range to which the signal to be recognized belongs, it can determine the wiring state of the AC input end. Among them, the signal recognition module 30 uses an MCU to read the value of the signal to be recognized through ADC sampling.
[0027] In this embodiment, the signal acquisition module 10 transmits corresponding sampling signals based on the voltage change between the N wire and the PE wire, and can detect the wiring states of the PE wire, L wire, and N wire. Detection is achieved through the N wire and the PE wire, without the need to obtain signals from the L wire, and it can better avoid problems related to safety regulations, insulation withstand voltage, and insulation resistance. The signal differential module 20 is used to perform differential processing on the sampling signals, improving the anti-interference ability and accuracy.
[0028] Furthermore, the signal acquisition module 10 includes a first capacitor unit and a second capacitor unit. The first capacitor unit is connected across the N wire and the PE wire, and the second capacitor unit is connected across the L wire and the PE wire.
[0029] The first capacitor unit and the second capacitor unit each include at least one Y capacitor. In one embodiment, such as Figure 2As shown, the first capacitor unit includes a Y capacitor CY1, and the first capacitor unit includes a Y capacitor CY2. The safety capacitor value specified in the standard of the AC charging pile should not be greater than 1 uF. Here, both the capacitor CY1 and the capacitor CY2 are 0.001 uF, within the specified value range. The AC voltage received by the AC input terminal is divided by the Y capacitor CY1 and used as a sampling signal. One end of the Y capacitor CY1 connected to the N line (i.e., the first end of the signal acquisition module 10) is used as the first output end of the signal acquisition module 10, and one end of the Y capacitor CY1 connected to the PE line (i.e., the second end of the signal acquisition module 10) is used as the second output end of the signal acquisition module 10.
[0030] In other embodiments, the number of Y capacitors in the first capacitor unit and the second capacitor unit can be two, three, or more. For example, the first capacitor unit and the second capacitor unit each include two Y capacitors connected in series. The sampling signal is obtained by dividing the AC voltage received by the AC input terminal by the entire first capacitor unit. One end of the first capacitor unit connected to the N line (i.e., the first end of the signal acquisition module 10) is used as the first output end of the signal acquisition module 10, and one end of the first capacitor unit connected to the PE line (i.e., the second end of the signal acquisition module 10) is used as the second output end of the signal acquisition module 10. Optionally, the sampling signal can also be obtained by dividing the AC voltage by a part of the Y capacitors in the first capacitor unit. Both ends of this part of the Y capacitors are used as the first output end and the second output end of the signal acquisition module 10 respectively, where the end closer to the N line is the first output end, and the end closer to the PE line is the second output end.
[0031] In another alternative embodiment, when the AC input terminal is provided with a first Y capacitor module and a second Y capacitor module for suppressing common-mode interference, the first Y capacitor module is connected across the N line and the PE line, and the second Y capacitor module is connected across the L line and the PE line; the first capacitor unit uses the first Y capacitor module, and the second capacitor unit uses the second Y capacitor module. Some devices' AC input terminals are provided with Y capacitors to solve the common-mode harassment interference in EMC. Combining the characteristic that a potential difference between the PE line and the N line is coupled on the Y capacitor, they are respectively used as the first capacitor unit and the second capacitor unit, without the need to additionally increase the circuit of the signal acquisition module 10, saving costs.
[0032] Further, referring to Figure 3, the signal differential module 20 includes a differential amplification unit 21 and a DC bias supply unit 22. The first input terminal of the differential amplification unit 21 is connected to the first output terminal of the signal acquisition module 10 and the DC bias supply unit 22, the second input terminal of the differential amplification unit 21 is connected to the second output terminal of the signal acquisition module 10, and the output terminal of the differential amplification unit 21 is connected to the signal recognition module 30. The differential amplification unit 21 obtains the sampling signal through the first output terminal and the second output terminal of the signal acquisition module 10, the DC bias supply unit 22 provides a DC bias voltage for the differential amplification unit 21, and the differential amplification unit 21 differentially amplifies the sampling signal. Providing a DC bias voltage for the differential amplification unit 21 can ensure that the differential amplification unit 21 operates in the linear region.
[0033] As Figure 4 shown, in this embodiment, the differential amplification unit 21 includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, and an operational amplifier U1A. The first end of the resistor R3 is connected to the second output terminal of the signal acquisition module 10, the second end of the resistor R3 is grounded to GND through the capacitor C4 and is connected to the inverting input terminal of the operational amplifier U1A; the first end of the resistor R4 is connected to the first output terminal of the signal acquisition module 10, the second end of the resistor R4 is grounded to GND through the capacitor C3 and is connected to the non-inverting input terminal of the operational amplifier U1A; the first end of the resistor R5 is connected to the non-inverting input terminal of the operational amplifier U1A, and the second end of the resistor R5 is connected to the output terminal of the DC bias supply unit 22. The resistor R6 is connected between the inverting input terminal and the output terminal of the operational amplifier U1A, the power supply terminal of the operational amplifier U1A is connected to the power supply voltage and is grounded to GND through the capacitor C6, the ground terminal of the operational amplifier U1A is grounded to GND, the output terminal of the operational amplifier U1A is connected to the first end of the resistor R7, and the second end of the resistor R7 is connected to the signal recognition module 30 and is grounded to GND through the capacitor C5.
[0034] As Figure 5 shown, in this embodiment, the DC bias supply unit 22 includes a resistor R1, a resistor R2, a resistor R8, a capacitor C1, a capacitor C2, and a voltage follower U1B. The first end of the resistor R1 is connected to the power supply voltage, the second end of the resistor R1 is grounded to GND through the resistor R2 and the capacitor C1 respectively, the second end of the resistor R1 is connected to the non-inverting input terminal of the voltage follower U1B, the output terminal of the voltage follower U1B is connected to the first end of the resistor R8, and the second end of the resistor R8 is connected to the differential amplification unit 21 and is grounded to GND through the capacitor C2.
[0035] Among them, capacitors C1 - C6 are mainly used for filtering. The operational amplifier U1A forms negative feedback through resistor R6. Resistors R1 and R2 are used for voltage division to provide a suitable DC bias voltage for the differential amplification unit 21. By adjusting the resistance ratio of resistor R6 to resistor R3, the signal to be recognized output is within the ADC recognition range of the signal recognition module 30. The above signal differential module 20 has a simple circuit, strong anti-interference ability, and high accuracy.
[0036] Preferably, the resistance values of resistor R3 and resistor R4 are equal, and the resistance values of resistor R5 and resistor R6 are equal. The signal recognition module 30 determines the wiring status of the L line, N line, and PE line by recognizing the voltage value of the signal to be recognized; among them,
[0037] At V PC1_ADC = 0 + V ref_GC , it is determined that the PE line is normally connected, and the L line and N line are correctly wired;
[0038] At , it is determined that the PE line is normally wired, and the L line and N line are reversed;
[0039] At , it is determined that the PE line is abnormally wired.
[0040] In the formula, V PC1_ADC is the voltage value of the signal to be recognized, V ref_GC is the DC bias voltage value, U m is the maximum voltage value of the input alternating current at the AC input end, ω is the angular frequency of the input alternating current, t is time, τu is the initial phase of the input alternating current, k is the voltage division coefficient between the first output end and the second output end of the signal acquisition module 10, is the resistance ratio of resistor R6 to resistor R3.
[0041] Taking the commercial power as an example for illustration, U m is the maximum voltage value of the commercial power, When using the signal acquisition module 10 shown in Figure 6 , and the capacitance values of the Y capacitors CY1 and CY2 are equal, k = 0.5. The PE line is equivalent to the midpoint of the electric potential between the L line and the N line in the entire loop through the Y capacitor.
[0042] When the PE line is normally connected, the L line and N line are correctly wired, the effective voltage value between the L line and the PE line is 220V, the effective voltage value between the N line and the PE line is 0V, V PC1_ADC = 0 + V ref_GC .
[0043] If the PE line is connected properly and the L line and N line are reversed, the N line at the AC input will be converted to the L line. Then the voltage between the original N line and the PE line will become the voltage between the original PE line and the L line, and its effective value will be converted to 220V.
[0044] If the PE line is abnormally connected (not connected or with poor contact), the effective voltage value between the PE line and the L line or N line is 110V.
[0045] In this embodiment, the voltage value is read through ADC sampling for analysis. The detection speed is fast, it is easy to implement, and it can quickly judge the wiring state of the AC input end, improving safety.
[0046] The present invention also provides an embodiment of an AC charging device, which includes an AC input end and the state detection circuit of the AC input end in any of the above embodiments. This AC charging device can be an AC charging pile or other AC chargers.
[0047] The present invention also provides an embodiment of an AC charging system, as Figure 6 shown. This AC charging system includes the AC charging device in the above embodiment and an AC power supply 50. The AC power supply is connected to the AC input end 40 to supply power to the AC charging device, and the AC charging device converts the input alternating current and charges the electrical equipment.
[0048] It can be understood that the above embodiments only represent the preferred embodiments of the present invention. The description is relatively specific and detailed, but it cannot be construed as a limitation on the scope of the patent of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, the above technical features can be freely combined, and several deformations and improvements can also be made, which all belong to the protection scope of the present invention. Therefore, all equivalent transformations and modifications made to the scope of the claims of the present invention shall fall within the scope covered by the claims of the present invention.
Claims
1. A state detection circuit of an AC input terminal, the AC input terminal comprising an L line, an N line and a PE line, characterized in that: The state detection circuit includes: a signal acquisition module, a signal difference module and a signal identification module; The first end of the signal acquisition module is connected to the N line, the second end of the signal acquisition module is connected to the PE line, and the third end of the signal acquisition module is connected to the L line; the input end of the signal differential module is connected to the signal acquisition module, and the output end of the signal differential module is connected to the signal identification module; The signal acquisition module transmits a corresponding sampling signal to the signal difference module based on the voltage change between the N line and the PE line; The signal difference module performs differential processing on the sampled signal and transmits the signal to be identified to the signal identification module; The signal recognition module determines the connection status of the L line, the N line and the PE line by recognizing the signal to be recognized.
2. The state detection circuit of the AC input terminal according to claim 1, characterized in that: The signal differential module includes a differential amplification unit and a DC bias supply unit; The first input end of the differential amplifier unit is connected to the first output end of the signal acquisition module and the DC bias supply unit, the second input end of the differential amplifier unit is connected to the second output end of the signal acquisition module, and the output end of the differential amplifier unit is connected to the signal identification module; The DC bias supply unit provides a DC bias voltage for the differential amplifier unit, and the differential amplifier unit performs differential amplification on the sampling signal.
3. The state detection circuit of the AC input terminal according to claim 2, characterized in that: The differential amplification unit includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6 and an operational amplifier; The first end of the resistor R3 is connected to the second output end of the signal acquisition module, and the second end of the resistor R3 is grounded through the capacitor C4 and connected to the inverting input end of the operational amplifier; the first end of the resistor R4 is connected to the first output end of the signal acquisition module, and the second end of the resistor R4 is grounded through the capacitor C3 and connected to the non-inverting input end of the operational amplifier; the first end of the resistor R5 is connected to the non-inverting input end of the operational amplifier, and the second end of the resistor R5 is connected to the output end of the DC bias supply unit; The resistor R6 is connected between the inverting input terminal and the output terminal of the operational amplifier, the power supply terminal of the operational amplifier is connected to the power supply voltage and is grounded through the capacitor C6, the ground terminal of the operational amplifier is grounded, the output terminal of the operational amplifier is connected to the first end of the resistor R7, and the second end of the resistor R7 is connected to the signal identification module and is grounded through the capacitor C5.
4. The state detection circuit of the AC input terminal according to claim 3, characterized in that: The resistance values of the resistor R3 and the resistor R4 are equal, and the resistance values of the resistor R5 and the resistor R6 are equal; The signal recognition module determines the connection status of the L line, the N line and the PE line by identifying the voltage value of the signal to be identified; wherein, In V PC1_ADC =0+V ref_GC When the PE line is connected normally, the L line and the N line are correctly connected; exist When the PE line is connected normally, the L line and the N line are connected in reverse; exist When the PE line is connected abnormally; Where V PC1_ADC is the voltage value of the signal to be identified, V ref_GC is the DC bias voltage value, U m is the maximum voltage of the input alternating current at the AC input end, ω is the angular frequency of the input alternating current, t is time, τu is the initial phase of the input alternating current, and k is the voltage division coefficient between the first output end and the second output end of the signal acquisition module.
5. The state detection circuit of the AC input terminal according to claim 2, characterized in that: The DC bias supply unit includes a resistor R1, a resistor R2, a resistor R8, a capacitor C1, a capacitor C2 and a voltage follower; The first end of the resistor R1 is connected to the power supply voltage, the second end of the resistor R1 is grounded through the resistor R2 and the capacitor C1 respectively, the second end of the resistor R1 is connected to the in-phase input end of the voltage follower, the output end of the voltage follower is connected to the first end of the resistor R8, and the second end of the resistor R8 is connected to the differential amplifier unit and grounded through the capacitor C2.
6. The state detection circuit of the AC input terminal according to claim 1, characterized in that: The signal acquisition module includes a first capacitor unit and a second capacitor unit; The first capacitor unit is connected between the N line and the PE line, and the second capacitor unit is connected between the L line and the PE line; the signal differential module is connected to the first capacitor unit.
7. The state detection circuit of the AC input terminal according to claim 6, characterized in that: The first capacitor unit and the second capacitor unit each include at least one Y capacitor.
8. The state detection circuit of the AC input terminal according to claim 6, characterized in that: When the AC input end is provided with a first Y capacitor module and a second Y capacitor module for suppressing common mode interference, the first Y capacitor module is connected between the N line and the PE line, and the second Y capacitor module is connected between the L line and the PE line; The first capacitor unit adopts the first Y capacitor module, and the second capacitor unit adopts the second Y capacitor module.
9. An AC charging device, characterized in that: The invention comprises an AC input terminal and a state detection circuit of the AC input terminal as claimed in any one of claims 1 to 8.
10. An AC charging system, characterized in that: It comprises the AC charging device as claimed in claim 9 and an AC power supply; the AC power supply is connected to the AC input terminal to supply power to the AC charging device.
Citation Information
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