Data processing method and system, storage medium and electronic equipment

Abstract

The invention discloses a data processing method and system, a storage medium and electronic device.The method relates to the computer technology and comprises the steps that in response to a received data operation request sent by a virtual machine, whether a target computing node deployed with the virtual machine adopts a hardware acceleration processing flow or not is determined, the data operation request is used for requesting to perform data storage or data reading on a target disk in a target computing node, and the target computing node is on any computing node in a target cluster; in response to a hardware acceleration processing flow adopted by the target computing node, determining a target hardware acceleration device corresponding to the data operation request from a plurality of hardware acceleration devices in the target computing node; and performing operation corresponding to the data operation request on target data corresponding to the data operation request through the target hardware acceleration device. According to the method and the device, the technical problem of relatively low performance of the virtual machine caused by relatively low data processing efficiency of the virtual machine in related technologies is solved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of data security, and in particular, to a data processing method, system, storage medium, and electronic device. Background Art

[0002] Virtualization technology has advantages such as cost savings and flexible deployment in aspects such as deploying virtual data centers, but there are also security risks. Since virtual disks are stored in the cloud virtual data center, there is a risk of being stolen by illegal administrators, resulting in data leakage. To protect the data security of the virtual data center, virtual disk encryption technology is usually used to encrypt the disks, and illegal administrators cannot obtain the decryption key, thereby protecting data security.

[0003] Although the above method effectively avoids the risk of data leakage, it also poses challenges to common virtualization technologies. When a virtual machine is running, the reading and writing of encrypted disks require additional decryption reading or encrypted storage, resulting in poor performance of the virtual machine. In summary, the efficiency of data processing by the virtual machine in related technologies is low, resulting in low performance of the virtual machine.

[0004] In response to the above problems, no effective solution has been proposed yet. Summary of the Invention

[0005] The embodiments of the present application provide a data processing method, system, storage medium, and electronic device to at least solve the technical problem that the efficiency of data processing by a virtual machine in related technologies is low, resulting in low performance of the virtual machine.

[0006] According to one aspect of the embodiments of the present invention, a data processing method is provided, including: in response to receiving a data operation request sent by a virtual machine, determining whether a target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow, where the data operation request is used to request data storage or data reading for a target disk in the target computing node, and the target computing node is any one of the computing nodes in the target cluster; in response to the target computing node adopting the hardware acceleration processing flow, determining a target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices in the target computing node; and performing an operation corresponding to the data operation request on the target data corresponding to the data operation request through the target hardware acceleration device.

[0007] According to another aspect of the embodiments of the present invention, there is also provided a data processing system, including: an acceleration device management module, deployed on a management node in a target cluster, configured to determine whether any computing node in the target cluster adopts a hardware acceleration processing flow, and in response to determining that a computing node adopts a hardware acceleration processing flow, determine the hardware acceleration device corresponding to the computing node; an acceleration processing module, deployed on the computing node and connected to the acceleration device management module, configured to, in response to receiving a data operation request sent by a virtual machine, based on a notification message sent by the acceleration device management module, determine whether the target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow, and in response to the target computing node adopting a hardware acceleration processing flow, determine, from multiple hardware acceleration devices in the target computing node, the target hardware acceleration device corresponding to the data operation request, where the data operation request is used to request data storage or data reading for a target disk, and the virtual machine and the target disk are deployed on the computing node; a target hardware acceleration device, connected to the acceleration processing module, configured to perform an operation corresponding to the data operation request on the target data corresponding to the data operation request.

[0008] According to another aspect of the embodiments of the present invention, there is also provided a data processing device, including: a first determination module, configured to, in response to receiving a data operation request sent by a virtual machine, determine whether the target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow, where the data operation request is used to request data storage or data reading for a target disk in the target computing node, and the target computing node is any computing node in a target cluster; a second determination module, configured to, in response to the target computing node adopting a hardware acceleration processing flow, determine, from multiple hardware acceleration devices in the target computing node, the target hardware acceleration device corresponding to the data operation request; an operation module, configured to perform an operation corresponding to the data operation request on the target data corresponding to the data operation request through the target hardware acceleration device.

[0009] According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium, where the computer-readable storage medium includes a stored executable program, and when the executable program runs, it controls the device where the computer-readable storage medium is located to execute the methods in various embodiments of the present invention.

[0010] According to another aspect of the embodiments of the present invention, there is also provided an electronic device, including: a memory, storing an executable program; a processor, configured to run the program, and when the program runs, it executes the methods in various embodiments of the present invention.

[0011] According to another aspect of the embodiments of the present invention, there is also provided a computer program product, including a computer program, where the computer program, when executed by a processor, implements the methods in various embodiments of the present invention.

[0012] According to another aspect of the embodiments of the present invention, there is also provided a computer program product, including a non-volatile computer-readable storage medium storing a computer program, where the computer program, when executed by a processor, implements the methods in the various embodiments of the present invention.

[0013] According to another aspect of the embodiments of the present invention, there is also provided a computer program, where the computer program, when executed by a processor, implements the methods in the various embodiments of the present invention.

[0014] In the embodiments of the present application, when a virtual machine sends a data operation request, the system can determine whether the target computing node enables the hardware acceleration processing flow. The data operation request represents a request for data storage or reading of a target disk in the target computing node, and the target computing node represents any one of the computing nodes in the target cluster. If the target computing node enables the hardware acceleration processing flow, the system can determine the target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices of the node. Then, the system will perform corresponding operations on the target data corresponding to the data operation request through the target hardware acceleration device. It is easy to notice that in response to the target computing node where the virtual machine is deployed adopting the hardware acceleration processing flow, different hardware acceleration devices are matched for different architecture hardwares from multiple hardware acceleration devices in the target computing node. The hardware acceleration device can execute the data operation request using the processing logic at the hardware instruction level, thereby leveraging the advantage of fast speed of hardware acceleration. By allocating the data operation request to the hardware acceleration device in the target computing node for processing, the efficiency and speed of data operation can be improved while ensuring security, the performance of the virtual machine can be effectively enhanced, the efficiency and speed of data processing can be improved, and better services can be provided for data operations in the virtualization environment. Furthermore, the technical problem in the related art that the efficiency of data processing by the virtual machine is low, resulting in low performance of the virtual machine, is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings here are incorporated into the specification and form a part of the specification, showing the embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0016] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 It is a schematic diagram of the hardware environment of a data processing method according to an embodiment of the present application;

[0018] Figure 2 It is a flowchart of a data processing method according to an embodiment of the present invention;

[0019] Figure 3 It is a schematic diagram of a system for optionally executing a data processing method according to an embodiment of the present invention;

[0020] Figure 4 It is a schematic diagram of module interaction in a system for optionally executing a data processing method according to an embodiment of the present invention;

[0021] Figure 5 It is a schematic diagram of a data processing system according to an embodiment of the present invention;

[0022] Figure 6 It is a schematic diagram of a data processing device according to an embodiment of the present invention. Detailed implementation manners

[0023] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0025] The method embodiments provided in the embodiments of the present application can be executed on a computer terminal, a device terminal, or a similar computing device. Taking running on a computer terminal as an example, Figure 1 It is a schematic diagram of the hardware environment of a data processing method according to an embodiment of the present application. As Figure 1 shown, the computer terminal may include one or more ( Figure 1Only one processor 102 is shown (the processor 102 may include, but is not limited to, a processing device such as a microcontroller unit (MCU) or a field-programmable gate array (FPGA)), and a memory 104 for storing data. In one exemplary embodiment, the computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those of ordinary skill in the art can understand that Figure 1 The structure shown is only illustrative and does not limit the structure of the computer terminal. For example, the computer terminal may further include more or fewer components than those Figure 1 shown, or have an equivalent function to those Figure 1 shown or different configurations with more functions than those Figure 1 shown.

[0026] The memory 104 can be used to store computer programs. For example, software programs and modules of application software, such as the computer program corresponding to the data processing method in the embodiments of the present invention. The processor 102 executes various functional applications and data processing by running the computer programs stored in the memory 104, that is, implements the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memories. In some instances, the memory 104 may further include a memory remotely disposed relative to the processor 102, and these remote memories can be connected to the computer terminal through a network. Examples of the above network include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.

[0027] The transmission device 106 is used to receive or send data via a network. Specific examples of the above network may include a wireless network provided by a communication provider of the computer terminal. In one instance, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0028] According to one aspect of the embodiments of the present invention, a data processing method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. And although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0029] Figure 2 is a flowchart of a data processing method according to an embodiment of the present invention. As Figure 2 shown, the method includes the following steps:

[0030] Step S202, in response to receiving a data operation request sent by a virtual machine, determine whether the target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow.

[0031] Among them, the data operation request is used to request data storage or data reading of a target disk in the target computing node, and the target computing node is any one computing node in the target cluster.

[0032] The above-mentioned virtual machine may refer to a computer program or system that simulates a physical computer hardware operating environment through software, enabling multiple operating systems to run on the same physical machine. The virtual machine can run and manage independently, providing users with higher flexibility and resource utilization. The data operation requests generated by the virtual machine can be responded to based on one or more computing nodes. Different data operation requests can correspond to different one or more computing nodes, and the one or more computing nodes corresponding to the current data operation request can be used as the target computing node. The target computing node can call one or more processors to access the target disk involved in the data operation request, such as input / output operations such as reading and writing, to implement the response to the data operation request. The processors called can be processors of different architectures or different models under the same architecture, which can be determined according to the actual data operation request and are not limited here.

[0033] The above-mentioned data operation request may refer to a request instruction sent by the virtual machine to the target computing node, which can be generated by a user's operation on the virtual machine or automatically generated by the virtual machine to perform data storage or data reading operations on the target disk. The data operation request may include the content of the request, such as information on data reading and writing operations, the location of the target disk, etc. Different data operation requests can adopt different one or more computing nodes, and different computing nodes can call different one or more processors for execution.

[0034] The above-mentioned hardware acceleration processing flow may refer to accelerating the read and write operations of data through a target hardware acceleration device, which may be a hardware engine, etc. The hardware engine can improve the processing speed and efficiency of data, and speed up the data transmission and processing process. When the target computing node determines to adopt the hardware acceleration processing flow, the system can forward the data operation request to the hardware engine for processing to accelerate the read and write operations of data. Hardware acceleration improves the performance of the virtual machine through the hardware engine. The hardware engine can accelerate the read and write operations of data, improve the processing speed and efficiency of data. After receiving the data operation request sent by the virtual machine, it can be determined whether to adopt the hardware acceleration processing flow according to the content of the request and the situation of the target computing node. If the target computing node supports the hardware acceleration processing flow, the system can forward the data operation request to the hardware engine for processing to accelerate the read and write operations of data.

[0035] In an alternative embodiment, when the virtual machine sends a data operation request, the target computing node can receive and parse this request. During the process of parsing the request, the system can determine whether to adopt the hardware acceleration processing flow, that is, whether to hand over the data storage or reading operation to the hardware engine for processing. If it is determined to adopt the hardware acceleration processing flow, the system can pass the data operation request to the hardware engine. The hardware engine can use the processing logic at the hardware instruction level to perform data storage or reading operations, thereby improving the processing speed and efficiency. Compared with the pure software encryption processing algorithm, the hardware acceleration processing has the advantage of high speed and can complete the data operation request faster. It can achieve software and hardware collaboration. The software is responsible for sending the data operation request and communicating with the hardware engine, and the hardware engine is responsible for the specific data storage or reading operation. Through the way of software and hardware collaboration, the speed advantage of hardware acceleration can be fully utilized to improve the read and write performance of the encrypted virtual machine. In the above process, the hardware acceleration processing can complete the data operation request faster and improve the performance of the virtual machine. By handing over the data storage or reading operation to the hardware engine for processing, the load on the processor can be reduced and the overall performance of the system can be improved. The processing logic at the hardware instruction level of the hardware engine can complete the data operation request faster and speed up the read and write speed of data. For scenarios that require a large number of data operations, it can significantly reduce the time of data operations.

[0036] Step S204, in response to the target computing node adopting the hardware acceleration processing flow, determine the target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices in the target computing node.

[0037] In an alternative embodiment, a hardware engine can be used to accelerate data reading and writing. In a target computing node, multiple hardware acceleration devices are usually configured to facilitate adaptive acceleration processing of various processors involved in different data operation requests. These hardware acceleration devices can provide different computing capabilities and acceleration effects. To improve the efficiency of data operations, the target hardware acceleration device corresponding to the data operation request can be determined according to the characteristics of the data operation request. Specifically, first, the data operation request can be analyzed to extract its characteristic information, including data type, operation type, data scale, etc.; then, according to the characteristic information of the data operation request, it can be matched with multiple hardware acceleration devices in the target computing node. By comparing the characteristic information of the data operation request with the performance characteristics of the hardware acceleration device, the hardware acceleration device suitable for processing this request can be determined. Then, the determined target hardware acceleration device can be bound to the data operation request, and the data operation request can be assigned to the corresponding hardware acceleration device for processing. The hardware acceleration device executes the data operation request and uses its efficient computing ability and acceleration effect to achieve fast processing and high-performance computing of the data. In this step, the matching of the data operation request and the target hardware acceleration device can be realized through software control and intelligent algorithms. For example, machine learning algorithms can be used to establish a matching model between the data operation request and the hardware acceleration device through training and learning of the data operation request and the performance of the hardware acceleration device, so as to achieve intelligent matching and allocation. In the above process, by matching the data operation request with the suitable hardware acceleration device, the efficient computing ability of the hardware acceleration device can be fully utilized, the processing speed and efficiency of data operations can be improved, the system resources can be reasonably allocated and utilized according to the characteristic information of the data operation request and the performance characteristics of the hardware acceleration device, and the utilization rate and performance of the system resources can be improved; according to different data operation requests and application scenario requirements, suitable hardware acceleration devices can be selected to achieve personalized customization and optimized acceleration effects. By matching different hardware acceleration devices, different computing needs and application scenarios can be satisfied, and the flexibility and adaptability of the system can be improved.

[0038] Step S206: Perform the operation corresponding to the data operation request on the target data corresponding to the data operation request through the target hardware acceleration device.

[0039] In an alternative embodiment, a hardware engine can be used to accelerate data reading and writing to improve the performance of virtual machines. In a target computing node, multiple hardware acceleration devices are usually integrated. When determining the target hardware acceleration device corresponding to a data operation request, an appropriate hardware acceleration device can be selected according to the specific data operation type. When the target hardware acceleration device is determined, the data operation request can be routed to this hardware acceleration device for processing, which can be completed by virtual machine management software by specifying the corresponding hardware acceleration device to process the corresponding data operation request. When the data operation request is routed to the target hardware acceleration device, this hardware acceleration device can perform corresponding operations on the target data, such as encryption, decryption, compression, decompression, etc. These operations can be achieved through hardware instruction-level processing, thereby improving the speed and efficiency of data operations. The hardware acceleration device can help transform data operation that originally needed to be processed by software encryption into hardware instruction-level processing logic, improving the processing speed. For virtual machines that need to perform operations such as encryption and decryption, using a hardware engine to accelerate data reading and writing can significantly improve the reading and writing performance. The hardware acceleration device can perform data operations at a higher speed and efficiency, thereby reducing the reading and writing latency and improving the overall performance. Different hardware acceleration devices are suitable for different data operation types. By precisely selecting the target hardware acceleration device, a suitable hardware match can be achieved, improving the overall performance and efficiency. By making full use of the advantages of the hardware acceleration device, software-hardware cooperation can be achieved, improving the reading and writing performance of encrypted virtual machines, and achieving a better hardware match, thereby bringing higher virtual machine performance and efficiency improvement.

[0040] In an embodiment of the present application, when a virtual machine sends a data operation request, the system can determine whether the target computing node enables the hardware acceleration processing flow. The data operation request represents a request for data storage or reading of a target disk in the target computing node, and the target computing node represents any computing node in the target cluster. If the target computing node enables the hardware acceleration processing flow, the system can determine the target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices of the node. Then, the system will perform corresponding operations on the target data corresponding to the data operation request through the target hardware acceleration device. It is easy to notice that in response to the target computing node where the virtual machine is deployed adopting the hardware acceleration processing flow, different hardware acceleration devices are matched for different architecture hardwares from multiple hardware acceleration devices in the target computing node. The hardware acceleration device can execute the data operation request using the processing logic at the hardware instruction level, thereby leveraging the advantage of fast speed of hardware acceleration. By allocating the data operation request to the hardware acceleration device in the target computing node for processing, the efficiency and speed of data operation can be improved while ensuring security, the performance of the virtual machine can be effectively enhanced, the efficiency and speed of data processing can be improved, and better services can be provided for data operations in the virtualization environment. Furthermore, the technical problem in the related art that the efficiency of data processing by the virtual machine is low, resulting in low performance of the virtual machine, is solved.

[0041] In an embodiment of the present invention, in response to receiving a data operation request sent by a virtual machine, determining whether the target computing node where the virtual machine is deployed adopts the hardware acceleration processing flow includes: in response to the data operation request, parsing the data operation request to obtain the node identification information of the target computing node carried in the data operation request; based on the node identification information, obtaining the first configuration information of the target computing node and the hardware acceleration policy pre-configured for the target computing node, where the first configuration information at least includes: the device information of the hardware acceleration device carried by the target computing node and the device information of the processor carried by the target computing node; monitoring the target computing node and the virtual machine to obtain the resource usage status of the target computing node and the running status of the virtual machine; determining the usage scenario of the target computing node based on the resource usage status and the running status; making a decision on the target computing node based on the hardware acceleration policy, the first configuration information, and the usage scenario to determine whether the target computing node adopts the hardware acceleration processing flow.

[0042] The above-mentioned hardware acceleration strategy can refer to a specific hardware acceleration scheme configured for a target computing node to improve the performance and efficiency of the computing node. The hardware acceleration strategy can include using a hardware acceleration engine to accelerate specific computing tasks, such as graphics processing, encryption and decryption, compression and decompression, etc. The hardware acceleration strategy can optimize the computing speed of the computing node by utilizing the dedicated acceleration function of the hardware, thereby improving the overall performance of the virtual machine. For example, for an image processing application running in a virtual machine, a processor hardware acceleration engine can be configured for the target computing node to accelerate the image processing task and improve the speed and quality of image processing. Another example is that in an encryption and decryption application, a hardware acceleration engine can be used to accelerate the encryption and decryption operations to improve data security and processing speed. By selecting an appropriate hardware acceleration strategy, the performance and efficiency of the virtual machine can be effectively optimized, and the computing power and response speed of the computing node can be enhanced.

[0043] In an alternative embodiment, when the system receives a data operation request, it can first parse the request to obtain the node identification information of the target computing node carried in the request. According to the node identification information, the system can obtain the first configuration information of the target computing node, including the device information of the hardware acceleration device and the device information of the processor, which can help the system understand the hardware configuration of the target computing node and provide a basis for subsequent decisions. The system can pre-configure hardware acceleration strategies for the target computing node, and these strategies can be formulated according to different usage scenarios and requirements to improve the performance and efficiency of the computing node. Then the system can monitor the resource usage status of the target computing node and the running status of the virtual machine in real time to adjust the hardware acceleration strategy and processing flow in a timely manner. According to the resource usage status and running status, the system can determine the usage scenario of the target computing node, including the type of computing task, load situation, etc. Finally, the system can make a decision on the target computing node according to the hardware acceleration strategy, the first configuration information, and the usage scenario to determine whether to adopt the hardware acceleration processing flow. The decision-making process can be dynamically adjusted according to the real-time monitored data to improve the system performance and efficiency. The system can also optimize the formulation and adjustment process of the hardware acceleration strategy through intelligent algorithms and machine learning technologies to adapt to different computing tasks and environmental changes. Through continuous learning and optimization, the system can improve the utilization rate and effect of hardware acceleration and further enhance the system performance.

[0044] In the above process, hardware acceleration can accelerate data reading, writing, and calculation processes, improving the system's running speed and response performance. Based on the real-time monitored data and usage scenarios, the system can dynamically adjust the hardware acceleration strategy to achieve more efficient resource utilization and calculation effects. The system can intelligently select the appropriate hardware acceleration method according to user requirements and application scenarios. By parsing data operation requests, dynamically adjusting the hardware acceleration strategy and processing flow, the system can achieve more efficient data processing and calculation, improving system performance and efficiency, thereby providing a better service experience for users.

[0045] In an embodiment of the present invention, in response to receiving a data operation request sent by a virtual machine, determining whether a target computing node on which the virtual machine is deployed adopts a hardware acceleration processing flow includes: in response to the data operation request, parsing the data operation request to obtain the node identification information of the target computing node and the disk identification information of the target disk; based on the node identification information, obtaining the second configuration information of the target computing node, where the second configuration information is used to characterize the data storage state of the disk carried by the target computing node; based on the disk identification information, reading out the data storage state of the target disk from the second configuration information; and in response to the data storage state of the target disk being an encrypted storage state, determining whether the target computing node adopts a hardware acceleration processing flow.

[0046] In an optional embodiment, first, the data operation request can be parsed to obtain the node identification information of the target computing node and the disk identification information of the target disk. Then, based on the node identification information, the second configuration information of the target computing node is obtained, and this information is used to characterize the data storage state of the disk carried by the target computing node. Next, according to the disk identification information, the data storage state of the target disk is read out from the second configuration information. Finally, it is determined whether the data storage state of the target disk is an encrypted storage state to determine whether the target computing node adopts a hardware acceleration processing flow. Specifically, when the virtual machine receives a data operation request, first, the request can be parsed, including the node identification information of the target computing node and the disk identification information of the target disk. According to the node identification information, the virtual machine can obtain the second configuration information of the target computing node, which includes the data storage state of the disk carried by the target computing node. According to the disk identification information, the virtual machine reads out the data storage state of the target disk from the second configuration information, and these states include whether it is an encrypted storage state. Finally, in the case where the data storage state of the target disk is an encrypted storage state, it can be determined whether the target computing node adopts a hardware acceleration processing flow.

[0047] In the above process, by determining whether the data storage state of the target disk is an encrypted storage state, the security of the data can be guaranteed, preventing the data from being accessed and tampered with without authorization. In order to ensure that only when accessing the data in the encrypted disk, the judgment process of the hardware acceleration process is carried out. When the data storage state of accessing the target disk is a non-encrypted storage state, it is not necessary to judge whether the target computing node adopts the hardware acceleration processing process. The present application uses a hardware engine to accelerate data reading and writing and judges whether to adopt the hardware acceleration processing process according to the data storage state, which can effectively improve the performance of the virtual machine and improve the user experience.

[0048] In an embodiment of the present invention, determining a target hardware acceleration device corresponding to a data operation request from multiple hardware acceleration devices in a target computing node includes: determining a target processor corresponding to a virtual machine from multiple processors carried by the target computing node; detecting the target processor to obtain device information of the target processor; reading device information of multiple hardware acceleration devices from first configuration information of the target computing node; matching the device information of the target processor with the device information of the multiple hardware acceleration devices to obtain multiple matching results, where different matching results are used to represent whether the device information matches the different device information successfully; in response to any one of the multiple matching results indicating that the device information matches the corresponding device information successfully, using the hardware acceleration device corresponding to any one of the matching results as the target hardware acceleration device; in response to two or more of the multiple matching results all indicating that the device information matches the corresponding device information successfully, screening out one hardware acceleration device from the hardware acceleration devices corresponding to the two or more matching results according to a preset strategy as the target hardware acceleration device.

[0049] In an alternative embodiment, the target processor corresponding to the virtual machine can be determined from among the multiple processors installed on the target computing node. The system can obtain information on multiple processors on the target computing node, including the model, architecture, etc. Then, based on the requirements and performance requirements of the virtual machine, the target processor suitable for the virtual machine can be determined. Next, the target processor can be detected to obtain the device information of the target processor. By detecting the target processor, its specific device information can be obtained, including memory capacity, frequency, cache size, etc. Next, the device information of multiple hardware acceleration devices can be read from the first configuration information of the target computing node. The system can read the information on multiple hardware acceleration devices on the target computing node, including the type, model, performance metrics, etc. Next, the device information of the target processor can be matched with the device information of the multiple hardware acceleration devices to obtain multiple matching results. The system can match the device information of the target processor with the device information of each hardware acceleration device to obtain multiple matching results. The matching results can include information such as whether the match is successful and the degree of matching. Matching the device information of the target processor with the device information of the hardware acceleration device can be achieved by comparing the characteristics and functions of the target processor and the multiple hardware acceleration devices. The device information of the target processor can include information such as the processor model, frequency, number of cores, instruction set, etc., and the device information of the hardware acceleration device includes information such as the accelerator type, computing power, interface, etc. When performing the matching, first, potential matching results can be found based on the device information of the target processor and the device information of the hardware acceleration device. Then, by comparing the characteristics and functions of the target processor and the multiple hardware acceleration devices, it can be confirmed whether the match is successful. Cases where the match is successful include, but are not limited to: the processor and the hardware acceleration device support the same instruction set and interface. For example, if the target processor supports the AVX instruction set and the hardware acceleration device also supports the AVX instruction set, then the target processor and the hardware acceleration device can be successfully matched; it can also be that the processor and the hardware acceleration device have similar computing power and performance. For example, if the target processor is a multi-core processor and the hardware acceleration device is also a multi-core accelerator, and the computing power of the target processor and the hardware acceleration device is comparable, then the target processor and the hardware acceleration device can be successfully matched. For example, assume that the target processor is a 4-core 8-thread processor that supports the AVX instruction set, and the hardware acceleration device is a GPU accelerator that supports the AVX instruction set and has a computing power equivalent to twice that of the target processor. During the matching process, it can be found that both the target processor and the hardware acceleration device support the AVX instruction set and have comparable computing power, so it can be determined that the match is successful. The matching process can comprehensively consider multiple factors and can be determined according to the actual situation, which is not limited here. By matching the device information of the target processor and the device information of the hardware acceleration device, more efficient hardware acceleration support can be provided for the virtual machine, thereby improving the performance and operating efficiency of the virtual machine.Finally, the target hardware acceleration device can be selected according to the matching results. If any one of the matching results indicates that the device information matches the corresponding device information successfully, the system will use this hardware acceleration device as the target hardware acceleration device. If more than two matching results indicate successful matching, the system will screen out one hardware acceleration device as the target hardware acceleration device according to the preset policy. Through the above steps, the system can select a suitable hardware acceleration device based on the device information of the target processor and the device information of the hardware acceleration device, thereby improving the performance and operating efficiency of the virtual machine.

[0050] In the above process, by selecting the matching hardware acceleration device, the performance of the virtual machine can be improved to a greater extent, the data reading and writing speed can be accelerated, the latency can be reduced, and the computing efficiency can be improved. By matching and selecting according to the device information of the target processor and the device information of the hardware acceleration device, the hardware resources can be better utilized, resource waste can be avoided, and the overall performance of the system can be improved. Selecting a suitable hardware acceleration device can improve the stability and reliability of the system, reduce hardware compatibility problems, reduce the system failure rate, and improve the stability of the system operation.

[0051] In the embodiment of the present invention, the device information of the target processor is matched with the device information of multiple hardware acceleration devices to obtain multiple matching results, including: obtaining a preset mapping relationship, where the preset mapping relationship is used to represent the association relationship between different device information and different device information; based on the preset mapping relationship, the device information is respectively matched with the multiple device information to obtain multiple matching results.

[0052] In an alternative embodiment, during the matching process, a preset mapping relationship can be obtained to represent the association between different device information and different device information. In this way, a mapping table can be established to facilitate subsequent data processing operations. The device information can be matched with multiple device information according to the preset mapping relationship to obtain multiple matching results. This step can more accurately determine the hardware engine for data processing to achieve acceleration of data reading and writing. Specifically, the preset mapping relationship can be established based on the characteristics of the hardware acceleration device and the target processor. The preset mapping relationship can include information such as the compatibility and performance matching degree between the hardware acceleration device and the processor. Then, the device information of the target processor can be matched with the device information of multiple hardware acceleration devices to obtain multiple matching results. During the matching process, first, the type of hardware acceleration device suitable for the target processor can be determined according to the preset mapping relationship; then, the device information of the target processor can be matched with multiple device information to obtain multiple matching results. Then, a hardware acceleration device that is more matched with the target processor can be selected according to the multiple matching results. Selecting a more matched hardware acceleration device can significantly improve the performance of the virtual machine. Through the above process, the function of accelerating through the hardware acceleration engine in the virtual machine can be realized, improving the performance and efficiency of the virtual machine. In practical applications, intelligent algorithms can be used for matching. For example, machine learning algorithms can be used to automatically learn the association between different device information and device information to improve the accuracy and efficiency of matching. At the same time, big data analysis technology can be combined to process a large amount of device information and device information to obtain more accurate matching results. In addition, a dynamic matching mechanism can be introduced to dynamically adjust the matching strategy according to the data processing requirements and the real-time situation of hardware resources to achieve more flexible data processing. At the same time, a load balancing algorithm can be considered to evenly distribute data processing tasks to different hardware engines to achieve more efficient data processing.

[0053] In the above process, by matching the device information of the target processor with the device information of multiple hardware acceleration devices, more accurate data processing can be achieved, and the speed and efficiency of data reading and writing can be improved. At the same time, according to the characteristics of different processor architectures and hardware engines, a suitable hardware engine can be selected for data processing to improve performance and save resources. Through the preset mapping relationship and dynamic matching mechanism, a more flexible data processing strategy can be achieved to adapt to different application scenarios and hardware resource conditions.

[0054] In an embodiment of the present invention, the method further includes: in response to the target cluster being in an initialization state, detecting the processors installed on multiple computing nodes in the target cluster to obtain device information of the multiple processors, obtaining device information of the hardware acceleration devices installed on the multiple computing nodes to obtain device information of the multiple hardware acceleration devices, and constructing a preset mapping relationship based on the device information of the multiple processors and the device information of the multiple hardware acceleration devices; or in response to detecting that the processor installed on any one of the computing nodes has changed, detecting the changed processor installed on the computing node to obtain device information of the changed processor, and updating the preset mapping relationship based on the device information of the changed processor.

[0055] In an alternative embodiment, when the target cluster is in an initialization state, first, the processors installed on multiple computing nodes in the target cluster can be detected to obtain device information of the multiple processors. At the same time, the device information of the hardware acceleration devices installed on the multiple computing nodes can also be obtained to obtain device information of the multiple hardware acceleration devices. Based on the device information of the multiple processors and the device information of the multiple hardware acceleration devices, a preset mapping relationship can be constructed so that subsequent data reading and writing operations can be optimized according to the characteristics of different hardware.

[0056] In another alternative embodiment, when the target cluster is in an initialization state or after the initialization process is completed, when it is detected that the processor installed on any one of the computing nodes has changed, the changed processor installed on the computing node can be detected again to obtain device information of the changed processor. Based on the device information of the changed processor, the preset mapping relationship can be updated. This can ensure the consistency between the preset mapping relationship and the actual hardware configuration, thereby ensuring the efficiency and stability of data reading and writing operations. Specifically, the model, number of cores, frequency, etc. of the processors installed on each computing node in the target cluster can be obtained through system calls or hardware detection tools; the model, performance parameters, etc. of the hardware acceleration devices installed on each computing node in the target cluster can be obtained through system calls or hardware detection tools; a preset mapping relationship table can be constructed according to the processor information and the hardware acceleration device information to record the hardware acceleration devices corresponding to each processor; and the processors installed on the computing nodes can be monitored regularly or in real time to determine whether there are any changes. If there are changes, an update operation is triggered. When a processor change is detected, the information of the changed processor is re-obtained, and then the corresponding record in the preset mapping relationship table is updated.

[0057] In practical applications, different hardware engines can be matched for acceleration processing according to different architecture hardware. Through a preset mapping relationship, based on the characteristics of different processors and hardware acceleration devices, a suitable hardware engine can be selected for data reading and writing operations, which can give full play to the performance advantages of the hardware, improve the efficiency and speed of data processing. By monitoring the changes of the processor in real time and updating the preset mapping relationship, the changes in the hardware configuration can be adapted in a timely manner, ensuring that the system can still operate normally and exert greater performance after hardware upgrade or replacement. This dynamically updated mechanism can improve the flexibility and maintainability of the system and reduce the adaptation cost for hardware changes.

[0058] In an embodiment of the present invention, the method further includes: in response to detecting a new hardware acceleration device added to a target computing node, obtaining new device information of the new hardware acceleration device; registering the new hardware acceleration device based on the new device information; and updating the preset mapping relationship based on the new device information.

[0059] In an alternative embodiment, when detecting a new hardware acceleration device added to a target computing node, a series of operations can be performed to achieve the registration of the new device and the update of the mapping relationship. First, when detecting a new hardware acceleration device added to a target computing node, the system can automatically obtain the new device information of the new hardware acceleration device, including relevant information such as hardware type, model, driver version, etc., which will help the system perform subsequent operations and configurations. Then, based on the new device information, the system can register the new hardware acceleration device. The registration process can include binding the hardware device to the system and configuring the driver of the hardware device to ensure that the system can correctly identify and use the new hardware acceleration device. At the same time, based on the new device information, the system can also update the preset mapping relationship. The preset mapping relationship can include the correspondence between virtual machines and hardware acceleration devices, as well as the mapping relationship between hardware engines and virtual machines. By updating these mapping relationships, the system can ensure that virtual machines can correctly utilize the new hardware acceleration device to improve performance and efficiency.

[0060] In the above process, the system can identify and register the new hardware acceleration device through the device management module, configure the driver of the hardware device through the driver management module, and update the mapping relationship between the virtual machine and the hardware acceleration device through the mapping relationship management module. The system can perform dynamic configuration and adjustment according to the characteristics and performance characteristics of the new hardware acceleration device, improve the flexibility and adaptability of the system, and enable the system to utilize hardware resources more flexibly and efficiently, improving the overall performance and efficiency of the system.

[0061] In an embodiment of the present invention, by using a target hardware acceleration device to perform an operation corresponding to a data operation request on target data corresponding to the data operation request, it includes: importing operation process data corresponding to the data operation request into the target hardware acceleration device; generating a hardware operation instruction corresponding to the target hardware acceleration device based on the data operation request; in response to the hardware operation instruction being a data read instruction, reading encrypted data corresponding to the data read instruction from a target disk, and performing a decryption operation on the encrypted data through the target hardware acceleration device to obtain decrypted data; in response to the hardware operation instruction being a data storage instruction, performing an encryption operation on the original data carried in the hardware operation instruction through the target hardware acceleration device.

[0062] In an alternative embodiment, in the process of improving virtual machine performance, a method of using a hardware engine to accelerate data reading and writing can realize data encryption, decryption, and storage functions, and improve the efficiency and security of data processing by importing operation process data corresponding to a data operation request into a target hardware acceleration device and generating a hardware operation instruction corresponding to the target hardware acceleration device based on the data operation request. Specifically, when a virtual machine receives a data operation request, it can import the data flow corresponding to the request into the target hardware acceleration device, which can transfer the data processing process from the software level to the hardware level, improving the speed and efficiency of data processing. Then, based on the data operation request, a hardware operation instruction corresponding to the target hardware acceleration device can be generated, and these instructions can include data read instructions and data storage instructions for guiding the hardware acceleration device to perform data reading, encryption, decryption, and storage operations.

[0063] In another alternative embodiment, when the hardware operation instruction is a data read instruction, the target hardware acceleration device can read the requested encrypted data from the target disk and perform a decryption operation through the hardware acceleration device to obtain decrypted data, which can improve the speed and security of data reading. When the hardware operation instruction is a data storage instruction, the target hardware acceleration device can perform an encryption operation on the original data carried in the hardware operation instruction and then store it in the target disk, which can protect the security of the data and prevent the data from being maliciously tampered with or stolen. In this application, the hardware engine for accelerating data reading and writing can be implemented using a specially designed hardware acceleration device, such as a field-programmable gate array or an application-specific integrated circuit. These hardware acceleration devices have the characteristic of high parallelism, can accelerate the data processing speed, and improve the overall performance of the system. During the implementation process, the efficiency and accuracy of data processing can be improved by optimizing the design and algorithm of the hardware acceleration device. For example, a hardware-accelerated encryption algorithm can be used to implement data encryption operations to improve data security; at the same time, a high-speed storage controller and cache technology can be used to improve the data reading and writing speed and reduce data access latency.

[0064] In the above process, by importing the operation flow data corresponding to the data operation request into the hardware acceleration device and generating hardware operation instructions based on the data operation request, the automation and high efficiency of data processing can be achieved. This can reduce the data processing overhead at the software level, improve the overall performance and response speed of the system. By accelerating data reading and writing through hardware, the speed of data reading, encryption / decryption, and storage can be increased, improving the overall performance and response speed of the system. By accelerating data reading and writing through the hardware engine, the high efficiency and security of data processing can be achieved, improving the overall performance and response speed of the system, providing effective technical support for the performance improvement of the virtual machine.

[0065] In an embodiment of the present invention, in response to determining that the target computing node does not adopt the hardware acceleration processing flow, the method further includes: in response to the data operation request being a data reading request, reading the encrypted data corresponding to the data reading instruction from the target disk, and performing a decryption operation on the encrypted data using a decryption algorithm to obtain the decrypted data; in response to the data operation request being a data storage request, performing an encryption operation on the original data carried in the data operation request using an encryption algorithm to obtain the encrypted data, and storing the encrypted data in the target disk.

[0066] In an alternative embodiment, if it is determined that the target computing node does not adopt the hardware acceleration processing flow, the efficiency of data reading and writing can also be improved through software algorithms, which can include performing encryption and decryption operations on the data to protect the security of the data and improve the efficiency of data transmission. When receiving a data operation request as a data reading request, the system can read the encrypted data corresponding to the data reading instruction from the target disk. These encrypted data can be processed by an encryption algorithm, so decryption operations can be performed to obtain the original data. The system can use a decryption algorithm to perform a decryption operation on the encrypted data to convert the encrypted data into decrypted data. In this way, the original data requested by the user can be obtained and then transmitted to the application program for processing.

[0067] In another alternative embodiment, when receiving a data operation request as a data storage request, the system can perform an encryption operation on the original data carried in the data operation request using an encryption algorithm. This can protect the security of the data and prevent the data from being stolen during transmission and storage. The encrypted data will be stored in the target disk to ensure the integrity and confidentiality of the data.

[0068] During the above process, by encrypting the data, the security of the data can be effectively protected, preventing data leakage and malicious tampering. By processing the data through software algorithms, the dependence on hardware resources can be reduced, and the performance and stability of the system can be improved. It is determined that the target computing node does not adopt the hardware acceleration processing flow, and the data can also be encrypted and decrypted through software algorithms, ensuring the flexibility of the virtual machine to process requests.

[0069] In an embodiment of the present invention, the method further includes: in response to receiving a query instruction sent by a client, parsing the query instruction to obtain query identification information of a query computing node corresponding to the query instruction; based on the query identification information, obtaining third configuration information of the query computing node, where the third configuration information at least includes: device information of a hardware acceleration device carried by the query computing node; sending the device information of the hardware acceleration device carried by the query computing node to the client.

[0070] In an alternative embodiment, when processing a query instruction sent by a client, the hardware acceleration device can accelerate the data reading and processing speed, thereby improving the response speed and performance of the system. Specifically, the virtual machine receives the query instruction sent by the client, and the query instruction may include content such as data information to be queried and query conditions. The virtual machine can parse the received query instruction to obtain the query identification information of the query computing node corresponding to the query instruction, and the query identification information may include information such as the network address and port number of the node. According to the query identification information, the virtual machine can obtain the third configuration information of the query computing node, and the configuration information may include the device information of the hardware acceleration device carried by the query computing node. Finally, the virtual machine can send the device information of the hardware acceleration device carried by the query computing node to the client. The client can select a suitable hardware acceleration device according to this information to accelerate the data processing process. In addition, the virtual machine management software can manage the hardware acceleration device in a software-defined manner to achieve dynamic allocation and scheduling of the acceleration device. In this way, the hardware resources can be utilized more flexibly, and the overall performance of the system can be improved.

[0071] During the above process, sending the device information of the hardware acceleration device carried by the query computing node to the client realizes the display of the acceleration engines supported by each computing node through a visual engine list, and users can more intuitively understand the available acceleration engine resources in the system, so as to better configure and optimize the system and improve the overall performance of the system.

[0072] The technical solution proposed in this application will be described below in combination with an optional embodiment. This application proposes a method and device for improving the performance of virtual machines with software-hardware collaboration under heterogeneous computing power. For different architecture platforms, different hardware engines are used for computing offloading, and pure software encryption algorithms are accelerated using hardware instructions, which improves the input / output (IO) performance of encrypted virtual machines, saves the computing resources of the central processing unit (CPU), and expands the applicable range of encrypted virtual machines.

[0073] Specifically, in the virtual machine performance improvement device, the acceleration engine management module can be deployed in the logical unit of a management node and is mainly responsible for the registration and management of the acceleration engine. The following functions can be conveniently implemented through the acceleration engine management module: registering a new acceleration engine to facilitate the extension of new acceleration engines to the system; maintaining the association relationship between the acceleration engine and the processor model, and maintaining the corresponding association relationship based on different processor architectures and different processor models under the same architecture. This function is to establish the association relationship between the acceleration engine and the processor model; notifying the IO acceleration processing module to select an appropriate acceleration processing method, that is, whether to use hardware acceleration, and which hardware engine to use when using hardware acceleration; displaying the list of supported engines to visualize the acceleration engines of each computing node.

[0074] The processor model detection module can be deployed in the logical unit of each computing node and is mainly responsible for detecting the processor model of each computing node. When a computing node is initialized or the processor of the computing node is replaced and upgraded, this module can quickly detect and report to the acceleration engine management module to select an appropriate hardware acceleration processing method.

[0075] The IO encryption processing module can be deployed in the logical unit of each computing node and mainly receives messages from the acceleration engine management module to control the processing logic of the IO encryption processing module. When this module receives a message from the acceleration engine management module to use hardware acceleration, it can convert the IO encryption processing process into an IO encryption processing process recognizable by the hardware acceleration device and offload the IO processing logic to the hardware acceleration device.

[0076] The hardware acceleration device can be deployed on the hardware device of each computing node to offload the IO processing process to the hardware chip, that is, convert the pure software acceleration algorithm into an instruction-level hardware acceleration logic to obtain performance improvement.

[0077] The method for improving the performance of virtual machines with software-hardware collaboration under heterogeneous computing power proposed in this application has the following specific implementation process: First, the processor model detection module on each computing node processes as follows: Perform initialization detection. At the initialization stage of the computing node, the processor model detection module first performs initialization detection. This includes obtaining the processor information carried by the current computing node and reporting it to the acceleration engine management module. Perform processor replacement and upgrade detection. If the computing node has replaced or upgraded the processor, the processor model detection module will detect this change, can re-obtain the model information of the new processor, and compare it with the previous information. If it is found that the processor model has changed, the module will promptly report to the acceleration engine management module and trigger the corresponding update of the processor model association relationship. Then, it can be reported to the acceleration engine management module. When the processor model detection module initializes or detects a change in the processor model, it can send a report to the acceleration engine management module.

[0078] Second, the acceleration engine management module processes as follows: Register a new acceleration engine. When adding a new acceleration engine to the system, it can first be registered in the acceleration engine management module. During the registration process, basic information about the acceleration engine, such as name, model, applicable processor architecture, etc., needs to be provided. Then, maintain the association relationship between the acceleration engine and the processor model. In the system, different processor architectures and models may correspond to different acceleration engines. Therefore, the acceleration engine management module can maintain the association relationship between each acceleration engine and the processor architectures and models it supports. In this way, when performing acceleration processing, the system can select the appropriate acceleration engine for processing according to the processor model currently in use. Then, it can notify the IO acceleration processing module to select the appropriate acceleration processing method. According to the current system configuration and usage scenario, the acceleration engine management module will send a notice to the IO acceleration processing module to inform whether hardware acceleration is required and which hardware engine should be used for acceleration processing. Through communication with the IO acceleration processing module, the acceleration engine management module can ensure that the system can fully utilize the available acceleration engine resources when performing computing tasks. Then, it can display the list of supported engines. The acceleration engine management module also provides a visual list of engines for displaying the acceleration engines supported by each computing node. Users can view the engine list to understand the currently available acceleration engine resources in the system, so as to better configure and optimize the system.

[0079] Next, the IO encryption processing module processes according to the following process: It can receive messages. First, the IO encryption processing module can receive messages sent by the acceleration engine management module. These messages contain information indicating whether to use hardware acceleration. When the IO encryption processing module receives a message to use hardware acceleration, it needs to give the field of which engine to use at the same time. Conversion processing logic: When the IO encryption processing module receives a message not to use hardware acceleration, the IO encryption processing module does not unload the IO to the hardware engine and performs encryption or decryption processing according to the pure software algorithm; when the IO encryption processing module receives a message to use hardware acceleration, it parses the field of which engine to use and then executes and issues it to the corresponding hardware engine for acceleration.

[0080] Finally, if the IO encryption processing module imports the IO encryption processing process into the hardware acceleration device, which can include but is not limited to a hardware compute accelerator (abbreviated as HCT), a physics accelerator (abbreviated as PHYACC), and a kernel acceleration engine (abbreviated as KAE), then the hardware acceleration device performs hardware processing at the instruction level to efficiently complete the IO encryption processing. That is, multiple IO encryption processing operations will be completed by the hardware acceleration device, thereby reducing the burden on the CPU on the computing node and improving the efficiency and throughput of IO processing.

[0081] Figure 3 is a schematic diagram of a system for an optional execution data processing method according to an embodiment of the present invention, as Figure 3 shown, the management node is connected to computing nodes such as two computing nodes with an X86 architecture and an ARM computing node. The acceleration engine management module set on the management node can detect the processor models, IO encryption processing modules, and hardware acceleration devices on each computing node.

[0082] The above two computing nodes with an X86 architecture can be processors of different models under the same architecture.

[0083] Figure 4 is a schematic diagram of module interaction in a system for an optional execution data processing method according to an embodiment of the present invention, as Figure 4 shown, the processor model detection module to the acceleration engine management module can be initialized, replaced, and upgraded. The acceleration engine management module to the IO encryption processing module can determine whether to perform hardware acceleration and the hardware acceleration engine to be used. In the case where the IO encryption processing module is not accelerated, the pure software algorithm is used. In the case of hardware acceleration, the hardware acceleration device is used.

[0084] Based on different architecture platforms, this application proposes to use the acceleration engine management mode to register and manage hardware engine types under multiple architectures, match different hardware engines for different architecture hardwares, transform the pure software encryption processing algorithm into a hardware instruction-level processing logic, and give play to the advantage of fast hardware acceleration speed, so as to achieve software and hardware collaboration, greatly improve the IO performance of the encrypted virtual machine, and propose that through the acceleration engine management mode, multiple hardware engines can be dynamically registered and managed, such as HCT, PHYACC, etc., and select appropriate hardware engines for acceleration processing according to different encryption algorithms and application scenarios. In the virtual machine, the encryption algorithm is converted into the instruction set of the corresponding hardware engine to realize the hardware acceleration processing logic. Through software and hardware collaboration, the advantages of hardware acceleration can be fully utilized, the IO performance of the virtual machine can be improved, the speed of data encryption and decryption can be accelerated, and the efficiency and performance of the overall system can be improved. At the same time, this method has high flexibility and scalability and is applicable to different hardware platforms and application scenarios. This method can effectively improve the performance of the virtual machine under heterogeneous computing power, improve the overall efficiency and response speed of the system, and has high practical and promotional value.

[0085] In the data center cluster, this application adopts a multi-architecture hardware acceleration engine fusion management mode for different architecture platforms, dynamically registers and manages multiple hardware engines, including but not limited to HCT, PHYACC, etc., greatly improving the integration, flexibility and scalability of the system; based on the computing nodes of different hardware platforms, through the mutual collaboration of software-defined engine management and the hardware instructions of the computing nodes, select appropriate hardware engines for acceleration processing, effectively improving the IO performance of the encrypted virtual machine.

[0086] According to another aspect of the embodiments of the present invention, a data processing system is further provided. This system can execute the data processing method of the above embodiments. The specific implementation method and preferred application scenarios are the same as those of the above embodiments and will not be elaborated here.

[0087] Figure 5 is a schematic diagram of a data processing system according to an embodiment of the present application, as Figure 5 shown, the device includes the following: an acceleration device management module 502 and an acceleration processing module 504.

[0088] Among them, the acceleration device management module is deployed on the management node in the target cluster and is used to determine whether any computing node in the target cluster adopts the hardware acceleration processing flow, and in response to determining that the computing node adopts the hardware acceleration processing flow, determine the hardware acceleration device corresponding to the computing node; the acceleration processing module is deployed on the computing node and is connected to the acceleration device management module, and is used to respond to receiving a data operation request sent by the virtual machine, and based on the notification message sent by the acceleration device management module, determine whether the target computing node where the virtual machine is deployed adopts the hardware acceleration processing flow, and in response to the target computing node adopting the hardware acceleration processing flow, determine the target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices in the target computing node, where the data operation request is used to request data storage or data reading for the target disk, and the virtual machine and the target disk are deployed on the computing node; the target hardware acceleration device is connected to the acceleration processing module and is used to perform the operation corresponding to the data operation request on the target data corresponding to the data operation request.

[0089] In an embodiment of the present invention, the system further includes: a processor type detection module, which is deployed on the computing node and is connected to the acceleration device management module, and is used to detect the processor carried by the computing node in response to the computing node being in the initialization state, obtain the processor information of the processor, and in response to detecting that the processor carried by the computing node has changed, detect the changed processor to obtain the device information of the changed processor.

[0090] According to another aspect of the embodiments of the present invention, there is also provided a data processing device, which can execute the data processing method in the above embodiments. The specific implementation method and preferred application scenario are the same as those in the above embodiments and will not be elaborated here.

[0091] Figure 6 is a schematic diagram of a data processing device according to an embodiment of the present application, as Figure 6 shown, the device includes the following: a first determination module 602, a second determination module 604, and an operation module 606.

[0092] Among them, the first determination module is used to determine whether the target computing node where the virtual machine is deployed adopts the hardware acceleration processing flow in response to receiving a data operation request sent by the virtual machine, where the data operation request is used to request data storage or data reading for the target disk in the target computing node, and the target computing node is any computing node in the target cluster; the second determination module is used to determine the target hardware acceleration device corresponding to the data operation request from multiple hardware acceleration devices in the target computing node in response to the target computing node adopting the hardware acceleration processing flow; the operation module is used to perform the operation corresponding to the data operation request on the target data corresponding to the data operation request through the target hardware acceleration device.

[0093] Among them, the first determination module is configured to, in response to a data operation request, parse the data operation request to obtain the node identification information of the target computing node carried in the data operation request; based on the node identification information, obtain the first configuration information of the target computing node and the hardware acceleration policy pre-configured for the target computing node, where the first configuration information at least includes: the device information of the hardware acceleration device carried by the target computing node and the device information of the processor carried by the target computing node; monitor the target computing node and the virtual machine to obtain the resource usage status of the target computing node and the running status of the virtual machine; based on the resource usage status and the running status, determine the usage scenario of the target computing node; make a decision on the target computing node based on the hardware acceleration policy, the first configuration information and the usage scenario to determine whether the target computing node adopts the hardware acceleration processing flow.

[0094] Among them, the first determination module is configured to, in response to a data operation request, parse the data operation request to obtain the node identification information of the target computing node and the disk identification information of the target disk; based on the node identification information, obtain the second configuration information of the target computing node, where the second configuration information is used to characterize the data storage status of the disk carried by the target computing node; based on the disk identification information, read out the data storage status of the target disk from the second configuration information; in response to the data storage status of the target disk being the encrypted storage status, determine whether the target computing node adopts the hardware acceleration processing flow.

[0095] Among them, the second determination module is configured to determine the target processor corresponding to the virtual machine from the multiple processors carried by the target computing node; detect the target processor to obtain the device information of the target processor; read out the device information of the multiple hardware acceleration devices from the first configuration information of the target computing node; match the device information of the target processor with the device information of the multiple hardware acceleration devices to obtain multiple matching results, where different matching results are used to characterize whether the device information and the different device information match successfully; in response to any one of the multiple matching results indicating that the device information and the corresponding device information match successfully, use the hardware acceleration device corresponding to any one of the matching results as the target hardware acceleration device; in response to two or more of the multiple matching results both indicating that the device information and the corresponding device information match successfully, screen out one hardware acceleration device from the hardware acceleration devices corresponding to the two or more matching results according to a preset policy as the target hardware acceleration device.

[0096] Among them, the second determination module is configured to obtain a preset mapping relationship, where the preset mapping relationship is used to represent the association relationship between different device information and different device information; based on the preset mapping relationship, the device information is respectively matched with multiple device information to obtain multiple matching results.

[0097] Among them, the second determination module is configured to, in response to the target cluster being in an initialization state, detect the processors carried by multiple computing nodes in the target cluster to obtain the device information of the multiple processors, obtain the device information of the hardware acceleration devices carried by the multiple computing nodes to obtain the device information of the multiple hardware acceleration devices, and construct a preset mapping relationship based on the device information of the multiple processors and the device information of the multiple hardware acceleration devices; or in response to detecting that the processor carried by any computing node has changed, detect the changed processor carried by the computing node to obtain the device information of the changed processor, and update the preset mapping relationship based on the device information of the changed processor.

[0098] Among them, the second determination module is configured to, in response to detecting that a new hardware acceleration device is added to the target computing node, obtain the new device information of the new hardware acceleration device; register the new hardware acceleration device based on the new device information; and update the preset mapping relationship based on the new device information.

[0099] Among them, the operation module is configured to import the operation process data corresponding to the data operation request into the target hardware acceleration device; generate a hardware operation instruction corresponding to the target hardware acceleration device based on the data operation request; in response to the hardware operation instruction being a data read instruction, read the encrypted data corresponding to the data read instruction from the target disk, and decrypt the encrypted data through the target hardware acceleration device to obtain the decrypted data; in response to the hardware operation instruction being a data storage instruction, encrypt the original data carried in the hardware operation instruction through the target hardware acceleration device.

[0100] Among them, the operation module is configured to, in response to the data operation request being a data read request, read the encrypted data corresponding to the data read instruction from the target disk, and decrypt the encrypted data using a decryption algorithm to obtain the decrypted data; in response to the data operation request being a data storage request, encrypt the original data carried in the data operation request using an encryption algorithm to obtain the encrypted data, and store the encrypted data in the target disk.

[0101] Among them, the operation module is configured to parse a query instruction in response to receiving a query instruction sent by a client, so as to obtain query identification information of a query computing node corresponding to the query instruction; based on the query identification information, obtain third configuration information of the query computing node, where the third configuration information at least includes: device information of a hardware acceleration device carried by the query computing node; and send the device information of the hardware acceleration device carried by the query computing node to the client.

[0102] An embodiment of the present application further provides a computer-readable storage medium, which includes an executable program stored therein. When the executable program runs, it controls the device where the computer-readable storage medium is located to execute the methods in various embodiments of the present invention.

[0103] The above computer storage medium may refer to a medium in a computer memory for storing a certain discontinuous physical quantity. The computer storage medium mainly includes semiconductors, magnetic cores, magnetic drums, magnetic tapes, laser discs, etc.; the stored program included in the computer-readable storage medium may be a set of instructions that can be recognized and executed by a computer, running on an electronic computer, and is an information tool that meets certain human needs.

[0104] An embodiment of the present application further provides an electronic device, including: a memory storing an executable program; a processor configured to run the program, where when the program runs, it executes the methods in various embodiments of the present invention.

[0105] The above memory may refer to a device inside a computer for storing data and programs, and may include a memory, a hard disk, etc. Among them, the memory can be used to temporarily store running programs and data, and the hard disk can be used to store programs and data for a long time. The memory can be used to enable a computer to read and write data and execute programs; the above processor can be responsible for executing instructions in a computer program and performing data processing, and can be responsible for controlling and executing various operations, including arithmetic operations, logical operations, data transmission, etc.

[0106] An embodiment of the present application further provides a computer program product, including a computer program, where when the computer program is executed by a processor, it implements the methods in various embodiments of the present invention.

[0107] The above computer program product may refer to a software program that has been written, tested, and released, and can run on a computer or other devices. The computer program product may include application programs, operating systems, tool software, etc., and is used to implement specific functions or solve specific problems.

[0108] Embodiments of the present application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the methods in various embodiments of the present invention.

[0109] The above-mentioned non-volatile computer-readable storage medium may refer to a medium for storing data. The non-volatile computer-readable storage medium can keep the data from being lost when powered off and can be used to store data for long-term preservation, such as operating systems, application programs, and user files. The non-volatile storage medium may include hard disk drives, solid-state drives, optical discs, and flash storage devices, etc.

[0110] Embodiments of the present application also provide a computer program, which, when executed by a processor, implements the methods in various embodiments of the above-mentioned present invention.

[0111] The above-mentioned computer program may refer to a set of instructions for telling a computer to perform specific tasks or operations. The computer program can be written by a programmer using a specific programming language and may include contents such as algorithms, data structures, logic, and control flows. The computer program can be used for various purposes, including application software, operating systems, etc.

[0112] In the above embodiments of the present invention, the descriptions of the various embodiments have their own focuses. For parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0113] In the several embodiments provided by the present application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only illustrative. For example, the division of the units can be a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection to each other can be through some interfaces. The indirect coupling or communication connection of units or modules can be in an electrical or other form.

[0114] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place, or can be distributed to multiple units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0115] In addition, in each embodiment of the present invention, the functional units can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0116] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), mobile hard disks, magnetic disks, or optical discs that can store program codes.

[0117] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A data processing method, characterized in that: include: In response to receiving a data operation request sent by a virtual machine, determining whether a target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow, wherein the data operation request is used to request data storage or data reading on a target disk in the target computing node, and the target computing node is any computing node in a target cluster; in response to the target computing node adopting the hardware acceleration processing flow, determining a target hardware acceleration device corresponding to the data operation request from a plurality of hardware acceleration devices in the target computing node; The target hardware acceleration device performs an operation corresponding to the data operation request on the target data corresponding to the data operation request.

2. The method according to claim 1, characterized in that The step of determining, in response to receiving a data operation request sent by the virtual machine, whether a target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow comprises: In response to the data operation request, the data operation request is parsed to obtain node identification information of the target computing node carried in the data operation request; Based on the node identification information, first configuration information of the target computing node and a hardware acceleration strategy pre-configured for the target computing node are acquired, wherein the first configuration information at least includes: device information of a hardware acceleration device carried by the target computing node and device information of a processor carried by the target computing node; Monitoring the target computing node and the virtual machine to obtain the resource usage status of the target computing node and the operating status of the virtual machine; Determining a usage scenario of the target computing node based on the resource usage status and the operating status; A decision is made on the target computing node based on the hardware acceleration strategy, the first configuration information, and the usage scenario to determine whether the target computing node adopts a hardware acceleration processing flow.

3. The method according to claim 1, characterized in that The step of determining, in response to receiving a data operation request sent by the virtual machine, whether a target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow comprises: In response to the data operation request, the data operation request is parsed to obtain node identification information of the target computing node and disk identification information of the target disk; Based on the node identification information, acquiring second configuration information of the target computing node, wherein the second configuration information is used to characterize the data storage state of the disk carried by the target computing node; Based on the disk identification information, the data storage state of the target disk is read from the second configuration information; in response to the data storage state of the target disk being an encrypted storage state, it is determined whether the target computing node adopts a hardware acceleration processing flow.

4. The method according to claim 1, characterized in that: The step of determining, from among a plurality of hardware acceleration devices in the target computing node, a target hardware acceleration device corresponding to the data operation request comprises: Determining a target processor corresponding to the virtual machine from a plurality of processors carried by the target computing node; Detecting the target processor to obtain device information of the target processor; Reading device information of the plurality of hardware acceleration devices from the first configuration information of the target computing node; Matching the device information of the target processor with the device information of multiple hardware acceleration devices to obtain multiple matching results, wherein different matching results are used to indicate whether the device information matches different device information successfully; In response to any one of the plurality of matching results indicating that the device information successfully matches the corresponding apparatus information, taking the hardware acceleration apparatus corresponding to the any one of the matching results as the target hardware acceleration apparatus; In response to two or more matching results among the multiple matching results indicating that the device information matches the corresponding apparatus information successfully, a hardware acceleration device is selected from the hardware acceleration devices corresponding to the two or more matching results according to a preset strategy as the target hardware acceleration device.

5. The method according to claim 4, characterized in that The device information of the target processor is matched with the device information of multiple hardware acceleration devices to obtain multiple matching results, including: Acquire a preset mapping relationship, wherein the preset mapping relationship is used to characterize the association relationship between different device information and different apparatus information; Based on the preset mapping relationship, the device information is matched with the plurality of apparatus information respectively to obtain the plurality of matching results.

6. The method according to claim 5, characterized in that The method further comprises: In response to the target cluster being in an initialized state, detecting processors carried by multiple computing nodes in the target cluster to obtain device information of the multiple processors, acquiring device information of hardware acceleration devices carried by the multiple computing nodes, obtaining device information of multiple hardware acceleration devices, and constructing the preset mapping relationship based on the device information of the multiple processors and the device information of the multiple hardware acceleration devices; or In response to detecting a change in a processor carried by any computing node, the changed processor carried by the computing node is detected to obtain device information of the changed processor, and the preset mapping relationship is updated based on the device information of the changed processor.

7. The method according to claim 5, characterized in that The method further comprises: In response to detecting that a new hardware acceleration device is added to the target computing node, obtaining new device information of the new hardware acceleration device; Registering the new hardware acceleration device based on the new device information; Based on the new device information, the preset mapping relationship is updated.

8. The method according to claim 1, characterized in that The step of performing the operation corresponding to the data operation request on the target data corresponding to the data operation request by the target hardware acceleration device includes: Importing the operation process data corresponding to the data operation request into the target hardware acceleration device; Based on the data operation request, generate a hardware operation instruction corresponding to the target hardware acceleration device; In response to the hardware operation instruction being a data read instruction, the encrypted data corresponding to the data read instruction is read from the target disk, and the encrypted data is decrypted by the target hardware acceleration device to obtain decrypted data; In response to the hardware operation instruction being a data storage instruction, the target hardware acceleration device performs an encryption operation on the original data carried in the hardware operation instruction.

9. The method according to any one of claims 1 to 8, characterized in that In response to determining that the target computing node does not adopt the hardware acceleration processing flow, the method further includes: In response to the data operation request being a data read request, reading the encrypted data corresponding to the data read instruction from the target disk, and performing a decryption operation on the encrypted data using a decryption algorithm to obtain decrypted data; In response to the data operation request being a data storage request, an encryption algorithm is used to perform an encryption operation on the original data carried in the data operation request to obtain encrypted data, and the encrypted data is stored in the target disk.

10. The method according to any one of claims 1 to 8, characterized in that The method further comprises: In response to receiving a query instruction sent by a client, parsing the query instruction to obtain query identification information of a query computing node corresponding to the query instruction; Based on the query identification information, third configuration information of the query computing node is acquired, wherein the third configuration information at least includes: device information of a hardware acceleration device carried by the query computing node; The device information of the hardware acceleration device carried by the query computing node is sent to the client.

11. A data processing system, characterized in that: include: An acceleration device management module, deployed on a management node in a target cluster, for determining whether any computing node in the target cluster adopts a hardware acceleration processing flow, and in response to determining that the computing node adopts the hardware acceleration processing flow, determining a hardware acceleration device corresponding to the computing node; an acceleration processing module, deployed on the computing node and connected to the acceleration device management module, for determining, in response to receiving a data operation request sent by the virtual machine, whether a target computing node where the virtual machine is deployed adopts a hardware acceleration processing flow based on a notification message sent by the acceleration device management module, and in response to the target computing node adopting the hardware acceleration processing flow, determining a target hardware acceleration device corresponding to the data operation request from a plurality of hardware acceleration devices in the target computing node, wherein the data operation request is used to request data storage or data reading on a target disk, and the virtual machine and the target disk are deployed on the computing node; The target hardware acceleration device is connected to the acceleration processing module, and is used to perform the operation corresponding to the data operation request on the target data corresponding to the data operation request.

12. The system according to claim 11, characterized in that The system further comprises: A processor type detection module is deployed on the computing node and connected to the acceleration device management module. In response to the computing node being in an initialized state, the processor carried by the computing node is detected to obtain processor information of the processor. In response to detecting that the processor carried by the computing node has changed, the changed processor is detected to obtain device information of the changed processor.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 10 when executed by a processor.

14. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 10 are implemented.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 10 are implemented.

Images