Display device and vehicle including the same

By adjusting the gamma voltage according to the operating mode and the emission angle in the display device of the vehicle, the problem of inconsistent brightness of multiple display panels in the panoramic mode is solved, and the image consistency and high brightness display are achieved.

CN120048202APending Publication Date: 2025-05-27LG DISPLAY CO LTD
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Patent Information

Application Number
CN202411500508.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-27
Filing Date
2024-10-25
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

In a vehicle, when multiple display panels display images in panoramic mode, the consistency of the image cannot be ensured due to brightness deviation.

Method used

By controlling the gamma voltage provided to the plurality of display panels according to the operating mode and the emission angle of the display device, unified control of the brightness of the plurality of display panels is achieved.

Benefits of technology

It effectively solves the problem of inconsistent brightness of multiple display panels, ensuring the consistency of images and high-brightness display effect in panoramic mode.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present disclosure may provide a display device including: a first display panel configured to display a first image; a second display panel configured to display a second image; a gate driving circuit configured to provide a gate signal to the first display panel and the second display panel; a first data driving circuit configured to supply a first data voltage to the first display panel; a second data driving circuit configured to supply a second data voltage to a second display panel; a gamma circuit configured to supply a gamma voltage to the first data driving circuit and the second data driving circuit; and a timing controller configured to supply image data to the first data driving circuit and the second data driving circuit, and control the gamma circuit to change a gamma voltage supplied to the first data driving circuit and the second data driving circuit according to a driving mode.
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Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2023 - 0166206, filed on November 27, 2023, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical field

[0003] Embodiments of the present disclosure relate to a display device and a vehicle including the display device, the display device being capable of effectively controlling the brightness of a plurality of display panels in a vehicle. Background art

[0004] A vehicle refers to a transportation device that can move people or loads using kinetic energy. Here, the vehicle may include various types of transportation devices that can transport people, such as cars, trucks, buses, airplanes, and ships.

[0005] For the safety and convenience of vehicle users, vehicles may include various sensors and electronic devices, and the functions of vehicles have become more diverse.

[0006] The functions of a vehicle may include convenience functions for the convenience of the driver and safety functions for promoting the safety of the driver or pedestrians.

[0007] Convenience functions may include technologies such as functions for providing infotainment (information + entertainment), autonomous driving functions, and functions for helping the driver be safely visible at night or in blind spots. For example, functions such as adaptive cruise control (ACC), smart parking assist system (SPAS), night vision (NV), head - up display (HUD), and around - view monitor (AVM), and adaptive headlight system (AHS) may be referred to as convenience functions.

[0008] Safety functions may include technologies for ensuring the safety of the driver or pedestrians, such as lane departure warning system (LDWS), lane - keeping assist system (LKAS), and autonomous emergency braking (AEB) system, etc.

[0009] Meanwhile, a vehicle may include a display device having various types of display panels. A vehicle control device may provide various convenience functions and safety functions to a driver or a passenger by controlling the information provided to an interior display panel.

[0010] Various types of display panels may be liquid crystal displays, organic light - emitting display panels, etc.

[0011] At this time, since there may be other passengers and a driver inside the vehicle, different information can be displayed through multiple display panels so that the occupants (driver or passengers) can recognize it.

[0012] At this time, the multiple display panels can display information individually, but can also display an image in a panoramic form. In this way, when the multiple display panels display an image in a panoramic form, due to the brightness deviation of each display panel, the consistency of the image may not be ensured. SUMMARY OF THE INVENTION

[0013] Accordingly, the inventors of the present disclosure have invented a display device and a vehicle including the display device, the display device being capable of uniformly controlling the brightness of multiple display panels according to the operation mode of the display device on the vehicle.

[0014] Embodiments of the present invention can provide a display device and a vehicle including the display device, the display device being capable of uniformly controlling the brightness of multiple display panels by supplying individual gamma voltages or a common gamma voltage to the multiple display panels depending on the operation mode of the display device.

[0015] Embodiments of the present disclosure can provide a display device and a vehicle including the display device, the display device being capable of effectively controlling the brightness according to changes in the operation mode and emission angle by controlling the gamma voltage supplied to the multiple display panels based on the operation mode and emission angle of the display device.

[0016] Embodiments of the present disclosure provide a display device including: a first display panel configured to display a first image; a second display panel configured to display a second image; a third display panel configured to display a third image; a first data driving circuit configured to supply a first data voltage to the first display panel; a second data driving circuit configured to supply a second data voltage to the second display panel; a third data driving circuit configured to supply a third data voltage to the third display panel; a gamma circuit configured to supply a gamma voltage to the first data driving circuit to the third data driving circuit; and a timing controller configured to supply image data to the first data driving circuit to the third data driving circuit and control the gamma circuit to change the gamma voltage supplied to the first data driving circuit to the third data driving circuit according to the driving mode.

[0017] Embodiments of the present disclosure provide a display device, including: a first display panel configured to display a first image; a second display panel configured to display a second image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a gamma circuit configured to provide a gamma voltage to the first data driving circuit and the second data driving circuit; and a timing controller configured to provide image data to the first data driving circuit and the second data driving circuit and control the gamma circuit to change the gamma voltage provided to the first data driving circuit and the second data driving circuit according to a driving mode.

[0018] Embodiments of the present disclosure provide a vehicle, including: a first display panel configured to display a first image; a second display panel configured to display a second image; a third display panel configured to display a third image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a third data driving circuit configured to provide a third data voltage to the third display panel; a gamma circuit configured to provide a gamma voltage to the first to third data driving circuits; and a timing controller configured to provide image data to the first to third data driving circuits and control the gamma circuit to change the gamma voltage provided to the first to third data driving circuits according to a driving mode.

[0019] According to an embodiment of the present disclosure, the brightness of multiple display panels can be uniformly controlled according to the operation mode of the display device on the vehicle.

[0020] According to an embodiment of the present disclosure, the brightness of multiple display panels can be uniformly controlled or low power can be consumed by providing separate gamma voltages or a common gamma voltage to the multiple display panels according to the operation mode of the display device.

[0021] According to an embodiment of the present disclosure, the brightness can be effectively controlled according to changes in the operation mode and emission angle by controlling the gamma voltage provided to the multiple display panels based on the operation mode and emission angle of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features, and advantages of the present disclosure will be more clearly understood from the following detailed description in conjunction with the accompanying drawings, in which:

[0023] Figure 1 is a view showing the interior of a vehicle according to an embodiment of the present disclosure;

[0024] Figure 2 is a schematic diagram showing the configuration of a display device according to an embodiment of the present disclosure;

[0025] Figure 3 is an exemplary view showing a display device according to an embodiment of the present disclosure;

[0026] Figure 4 is a view showing an example of a structure for driving a plurality of display panels in a display device according to an embodiment of the present disclosure;

[0027] Figure 5 is a view showing a display panel operating in a normal mode in a display device according to an embodiment of the present disclosure;

[0028] Figure 6 is a view showing the operation of a gamma circuit in a normal mode in a display device according to an embodiment of the present disclosure;

[0029] Figure 7 is a view showing a display panel operating in a panoramic mode in a display device according to an embodiment of the present disclosure;

[0030] Figure 8 is a view showing the operation of a gamma circuit in a panoramic mode in a display device according to an embodiment of the present disclosure;

[0031] Figure 9 is a view showing the structure of a gamma voltage generation circuit in a display device according to an embodiment of the present disclosure;

[0032] Figure 10 is a block diagram showing a source driver integrated circuit in a display device according to an embodiment of the present disclosure;

[0033] Figure 11 is a view showing a display panel including sub-pixels having different emission angles in a display device according to an embodiment of the present disclosure;

[0034] Figure 12 is a view showing different structures of a first sub-pixel and a second sub-pixel constituting a unit sub-pixel in a display device according to an embodiment of the present disclosure;

[0035] Figure 13 is a view showing a first lens provided on a first sub-pixel and a second lens provided on a second sub-pixel in a display device according to an embodiment of the present disclosure;

[0036] Figure 14is a cross-sectional view of a unit sub-pixel in a display device according to an embodiment of the present disclosure;

[0037] Figure 15 is a view showing a case where images with different viewing angles are displayed in a first region and a second region of a display panel in a display device according to an embodiment of the present disclosure;

[0038] Figure 16 is a block diagram showing a configuration of a gate driving circuit in a display device according to an embodiment of the present disclosure;

[0039] Figure 17 is a view showing a gate signal output from a gate driving circuit in a display device according to an embodiment of the present disclosure;

[0040] Figure 18 is a view showing a circuit operation in which a first sub-pixel of a unit sub-pixel emits light in a display device according to an embodiment of the present disclosure;

[0041] Figure 19 is a view showing a signal waveform driven by a first sub-pixel of a unit sub-pixel in a display device according to an embodiment of the present disclosure;

[0042] Figure 20 is a view showing a circuit operation in which a second sub-pixel of a unit sub-pixel emits light in a display device according to an embodiment of the present disclosure;

[0043] Figure 21 is a view showing a signal waveform driven by a second sub-pixel of a unit sub-pixel in a display device according to an embodiment of the present disclosure;

[0044] Figure 22 is a view showing a case where the viewing angle is changed for some regions of a display panel operating in a normal mode in a display device according to an embodiment of the present disclosure;

[0045] Figure 23 is a view showing an operation of a gamma circuit for changing the viewing angle for some regions of a display panel operating in a normal mode in a display device according to an embodiment of the present disclosure;

[0046] Figure 24 is a view showing a case where the viewing angle of some display panels operating in a panoramic mode is controlled in a display device according to an embodiment of the present disclosure; and

[0047] Figure 25 is a view showing an operation of a gamma circuit for controlling the viewing angle of some display panels in a panoramic mode in a device according to an embodiment of the present disclosure. Detailed Description

[0048] In the following, some embodiments of the present disclosure will be described in detail with reference to the exemplary drawings. In the following description of examples or embodiments of the present disclosure, reference will be made to the drawings, in which specific examples or embodiments that can be implemented are shown by way of illustration, and in which the same or similar components may be denoted by the same reference numerals and symbols even when shown in different drawings. Further, in the following description of examples or embodiments of the present disclosure, when it is determined that the description may obscure the subject matter in some embodiments of the present disclosure, the detailed description of well-known functions and components incorporated herein will be omitted. Terms such as "comprising", "having", "containing", "constituting", "consisting of", and "formed of" used herein are generally intended to allow the addition of other components, unless these terms are used together with the term "only". As used herein, the singular form is intended to include the plural form unless the context clearly dictates otherwise.

[0049] Terms such as "first", "second", "A", "B", "(A)", or "(B)" may be used herein to describe elements of the present disclosure. Each of these terms is not used to define the essence, order, sequence, or quantity, etc. of the element, but is only used to distinguish the corresponding element from other elements.

[0050] When it is mentioned that a first element "is connected or coupled to", "contacts or overlaps", etc. a second element, it should be interpreted that not only can the first element "be directly connected or coupled to" or "directly contact or overlap" the second element, but also a third element can "intervene" between the first element and the second element, or the first element and the second element can "be connected or coupled", "contact or overlap", etc. with each other via a fourth element. Here, the second element may be included in at least one of two or more elements that are "connected or coupled", "contact or overlap", etc. with each other.

[0051] When using time-related terms such as "after", "subsequently", "next", "before", etc. to describe a process or operation of an element or configuration, or a flow or step in an operation, process, or manufacturing method, these terms can be used to describe a non-continuous or non-sequential process or operation, unless the terms "directly" or "immediately" are used together.

[0052] In addition, when referring to any size, relative size, etc., even when no relevant description is specified, the numerical value or corresponding information (e.g., level, range, etc.) of the element or feature should be considered to include the tolerance or error range that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.). Further, the term "may" fully encompasses all meanings of the term "can".

[0053] In the following, various embodiments of the present disclosure will be described in detail with reference to the drawings.

[0054] Figure 1 is a view showing the interior of a vehicle according to an embodiment of the present disclosure.

[0055] Referring Figure 1 , the interior of the vehicle 1000 according to an embodiment of the present disclosure may include a driver's seat, a passenger seat, an instrument panel having various instruments required for driving in front of the driver's seat and the passenger seat, and a center instrument panel having a control panel for electronic devices.

[0056] The instrument panel may include a first display panel 111 for displaying information required for driving, including a speedometer. The first display panel 111 may be referred to as an instrument panel display panel.

[0057] The first display panel 111 is a display panel for allowing the vehicle 1000 to be safely driven by transmitting information about the driving state of the vehicle 1000 and the operation of various electronic devices installed in the vehicle 1000 to the driver. The first display panel 111 located behind the steering wheel relative to the driver's seat may include a speedometer for indicating the driving speed, an odometer for indicating the driving distance, a tachometer for indicating the engine speed, a fuel gauge, a water temperature gauge, an engine thermometer, and various warning lights.

[0058] The center instrument panel may be located between the driver's seat and the passenger seat and may correspond to the area where the instrument panel and the shift lever intersect vertically. Audio, air conditioning, heater controller, navigator, ventilation holes, cigar jacks, ashtrays, cup holders, etc. may be provided on the center instrument panel. In addition, the center instrument panel may include a second display panel 112.

[0059] The second display panel 112 may display the route to the destination or display a map image corresponding to the current location, and may display a user interface related to the control of various electronic devices in the vehicle 1000. In addition, when the vehicle 1000 is connected to a mobile device, the screen provided by the mobile device may be displayed on the second display panel 112.

[0060] The second display panel 112 located between the driver's seat and the passenger seat of the vehicle 1000 may be referred to as a center instrument panel display panel.

[0061] In addition, for the convenience of passengers, a third display panel 113 may be located in front of the passenger seat. The third display panel 113 located on the passenger seat may be referred to as a passenger display panel.

[0062] The first display panel 111, the second display panel 112, and the third display panel 113 may be integrated.

[0063] In addition, in addition to the instrument panel display panel 111, the center instrument panel display panel 112, and the passenger display panel 113, the display panel 110 may further include at least one of a front window display panel, a side mirror display panel, a rearview mirror display panel, and a side window display panel. Of course, various types of display panels can be installed in greater numbers.

[0064] The front window display panel may be a display panel that projects a virtual image onto a partial area of the front window that can be seen through the front of the vehicle 1000. By displaying vehicle speed, remaining fuel, and route information through the front window display panel, the driver's unnecessary eye movements to other places can be minimized.

[0065] The side mirror display panel may be a display panel capable of displaying a side image captured by a side camera on a partial or entire area of the side mirror to observe the side of the vehicle 1000. Therefore, the driver can not only check the side image reflected by the side mirror, but also check the side image captured by the side camera through the side mirror display panel.

[0066] The rearview mirror display panel may be a display panel capable of displaying a rear image captured by a rear camera on a partial or entire area of the rearview mirror to observe the rear of the vehicle 1000. Therefore, the driver can not only check the rear image reflected by the rearview mirror, but also check the rear image captured by the rear camera through the rearview mirror display panel.

[0067] The side window display panel may be a display panel for projecting a virtual image onto a partial area of the side window that can be seen through the side of the vehicle 1000. Various information of the vehicle can be displayed through the side window display panel.

[0068] Figure 2 is a schematic diagram showing the configuration of a display device according to an embodiment of the present disclosure.

[0069] Reference Figure 2 , the display device 100 according to an embodiment of the present disclosure may include: a display panel 110, which is connected to a plurality of gate lines GL and a plurality of data lines DL, and in which a plurality of sub-pixels SP are arranged in a matrix form; a gate driving circuit 120, which provides a gate signal to the plurality of gate lines GL; a data driving circuit 130, which provides a data voltage through the plurality of data lines DL; a timing controller 140, which is used to control the gate driving circuit 120 and the data driving circuit 130; and a power management circuit 150, which provides power for the display driving operation.

[0070] The display panel 110 displays an image based on a scan signal transmitted from the gate driving circuit 120 through the plurality of gate lines GL and a data voltage transmitted from the data driving circuit 130 through the plurality of data lines DL.

[0071] In the case of a liquid crystal display device, the display panel 110 includes a liquid crystal layer formed between two substrates and can operate in any known mode such as a twisted nematic (TN) mode, a vertical alignment (VA) mode, an in-plane switching (IPS) mode, or an edge field switching (FFS) mode. Meanwhile, in the case of an organic light emitting display device, the display panel 110 can be implemented by a top emission method, a bottom emission method, or a dual emission method.

[0072] In the display panel 110, a plurality of sub-pixels SP can be arranged in a matrix form. Each sub-pixel SP can be formed by sub-pixels SP having different colors, for example, a white sub-pixel, a red sub-pixel, a green sub-pixel, and a blue sub-pixel. And each sub-pixel SP can be defined by a plurality of data lines DL and a plurality of gate lines GL.

[0073] A sub-pixel SP can include a thin film transistor (TFT), a light emitting element that emits light according to a data voltage, and a storage capacitor that is electrically connected to the light emitting element to hold a voltage. They are arranged in an area formed by one data line DL and one gate line GL.

[0074] For example, when the display device 100 with a resolution of 2160×3840 is formed by four sub-pixels SP including a white sub-pixel, a red sub-pixel, a green sub-pixel, and a blue sub-pixel, since there are 2160 gate lines GL and 3840 data lines DL connected to the four sub-pixels SP, a total of 3840×4 = 15360 data lines DL can be provided, and the sub-pixels SP can be arranged in an area formed by the gate lines GL and the data lines DL.

[0075] The gate driving circuit 120 is controlled by the timing controller 140 and sequentially outputs scan signals to a plurality of gate lines GL provided in the display panel 110 to control the driving timing of the plurality of sub-pixels SP.

[0076] According to circumstances, the gate driving circuit 120 can generate a scan signal for controlling the driving timing of the sub-pixels SP and a light emitting signal for controlling the light emitting timing of the sub-pixels SP. In this case, the gate signal generated from the gate driving circuit 120 can include a scan signal and a light emitting signal. The circuit for generating the scan signal and the circuit for generating the light emitting signal can be implemented as separate circuits or one circuit.

[0077] If the circuit for generating the scan signal and the circuit for generating the light emitting signal are implemented as separate circuits, the gate driving circuit 120 can include a scan driving circuit for generating the scan signal and a light emitting driving circuit for generating the light emitting signal.

[0078] In the display device 100 having a resolution of 2160×3840, the case where scan signals are sequentially output from the first gate line to the 2160th gate line with respect to 2160 gate lines GL can be referred to as 2160-phase driving. Or, as in the case where scan signals are sequentially output from the first gate line to the fourth gate line and then from the fifth gate line to the eighth gate line, the case where scan signals are sequentially output based on four gate lines GL can be referred to as four-phase driving. That is, the case where scan signals are sequentially output for every N gate lines GL can be referred to as N-phase driving.

[0079] In this case, the gate driving circuit 120 may include one or more gate driver integrated circuits GDICs, and depending on the driving method, the gate driving circuit 120 may be located only on one side or both sides of the display panel 110. Alternatively, the gate driving circuit 120 may be directly formed in the border area of the display panel 110 so as to be implemented in the form of gate in panel (GIP).

[0080] The data driving circuit 130 receives digital image data DATA from the timing controller 140 and converts the received digital image data DATA into an analog data voltage. Then, the data voltage is output to each data line DL according to the timing of applying the scan signal through the gate line GL, so that each sub-pixel SP connected to the data line DL displays a light emitting signal having a luminance corresponding to the data voltage.

[0081] Similarly, the data driving circuit 130 may include one or more source driver integrated circuits SDICs, and the source driver integrated circuit SDIC may be connected to the bonding pads of the panel 110, or may be directly disposed on the display panel 110 using a tape automated bonding (TAB) method or a chip on glass (COG) method.

[0082] In some cases, each source driver integrated circuit SDIC may be integrated and disposed in the display panel 110. In addition, each source driver integrated circuit SDIC may be implemented in a chip on film (COF) manner. In this case, each source driver integrated circuit SDIC may be mounted on a circuit film and may be electrically connected to the data line DL of the display panel 110 through the circuit film.

[0083] The timing controller 140 provides various control signals to the gate driving circuit 120 and the data driving circuit 130 to control the operations of the gate driving circuit 120 and the data driving circuit 130. That is, the timing controller 140 controls the gate driving circuit 120 to generate a scan signal according to the timing achieved in each frame. On the other hand, the timing controller 140 controls the data driving circuit 130 to convert the image data DATA and generate a data voltage.

[0084] In this case, in addition to the digital image data DATA, the timing controller 140 may also receive various timing signals including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a main clock MCLK from an external component (e.g., a host system).

[0085] The host system may include one or more of a TV (television) system, a set-top box, a navigation system, a personal computer (PC), a home theater system, a mobile device, and a wearable device.

[0086] Accordingly, the timing controller 140 generates control signals using the various timing signals received from the host system and transmits the control signals to the gate driving circuit 120 and the data driving circuit 130.

[0087] For example, to control the gate driving circuit 120, the timing controller 140 outputs various gate control signals including a gate start pulse GSP, a gate clock GCLK, and a gate output enable signal GOE. Here, the gate start pulse GSP controls the timing at which one or more GDICs constituting the gate driving circuit 120 start operating. Additionally, the gate clock GCLK is a clock signal commonly input to one or more gate driving integrated circuits GDICs and controls the shift timing of the scan signal. Additionally, the gate output enable signal GOE specifies the timing information of one or more gate driving integrated circuits GDICs.

[0088] In addition, to control the data driving circuit 130, the timing controller 140 outputs various data control signals including a source start pulse SSP, a source sampling clock SCLK, and a source output enable signal SOE. Here, the source start pulse SSP controls the timing at which one or more SDICs constituting the data driving circuit 130 start sampling data. The source sampling clock SCLK is a clock signal for controlling the timing at which the SDIC samples data. The source output enable signal SOE controls the output timing of the data driving circuit 130.

[0089] The display device 100 may further include a power management circuit 150 that supplies various voltages or currents to the display panel 110, the gate driving circuit 120, or the data driving circuit 130, or controls the various voltages or various currents to be supplied.

[0090] The power management circuit 150 may generate the power required to drive the display panel 110, the gate driving circuit 120, and the data driving circuit 130 by adjusting a DC input voltage.

[0091] Figure 3 is an exemplary view of a display device according to an embodiment of the present disclosure.

[0092] ReferenceFigure 3 In the display device 100 according to an embodiment of the present disclosure, the source driver integrated circuit SDIC included in the data driving circuit 130 may be implemented in the form of the COF method among various methods (TAB, COG, and COF), and the gate driving circuit 120 may be implemented in the form of GIP among various methods (TAB, COG, COF, and GIP).

[0093] When the gate driving circuit 120 is implemented in the form of GIP, a plurality of gate driver integrated circuits GDIC included in the gate driving circuit 120 may be directly formed in the non-display area of the display panel 110. In this case, the gate driver integrated circuit GDIC may receive various signals (clock signal, gate high signal, and gate low signal) required to generate a scan signal through gate driving-related signal lines provided in the non-display area.

[0094] Similarly, one or more source driver integrated circuits SDIC included in the data driving circuit 130 may be respectively mounted on the source film SF, and one side of the source film SF may be electrically connected to the display panel 110. In addition, lines for electrically connecting the source driver integrated circuit SDIC to the display panel 110 may also be provided on the source film SF.

[0095] The display device 100 may include at least one source printed circuit board SPCB for connecting a plurality of source driver integrated circuit SDIC circuits to other devices, and a control printed circuit board CPCB for mounting control components and various electrical devices.

[0096] In this case, the side of the source film SF on which the source driver integrated circuit SDIC is mounted may be connected to at least one source printed circuit board SPCB. That is, the side of the source film SF on which the source driver integrated circuit SDIC is mounted may be electrically connected to the display panel 110, and the other side of the source film SF may be electrically connected to the source printed circuit board SPCB.

[0097] The timing controller 140 and the power management circuit 150 may be mounted on the control printed circuit board CPCB. The timing controller 140 may control the operations of the data driving circuit 130 and the gate driving circuit 120. The power management circuit 150 may supply a driving voltage or current to the display panel 110, the data driving circuit 130, and the gate driving circuit 120, and control the voltage or current to be supplied.

[0098] At least one source printed circuit board SPCB and at least one control printed circuit board CPCB may be electrically connected through at least one connection member, and the connection member may be formed as, for example, a flexible printed circuit FPC, a flexible flat cable FFC, etc. In addition, at least one source printed circuit board SPCB and at least one control printed circuit board CPCB may be implemented to be integrated into one printed circuit board.

[0099] In the case where the display device 100 has the above configuration, the power management circuit 150 transmits the driving voltage required to drive the display or detect the characteristic value to the source printed circuit board SPCB through the flexible printed circuit FPC or the flexible flat cable FFC. The driving voltage transmitted to the source printed circuit board SPCB is provided by the source driver integrated circuit SDIC to drive a specific sub-pixel SP in the display panel 110 to emit light or sense the specific sub-pixel SP.

[0100] In this case, each sub-pixel SP provided in the display panel 110 may include a light-emitting element and circuit elements such as a driving transistor for driving the light-emitting element.

[0101] The types and numbers of the circuit elements constituting each sub-pixel SP may be determined differently according to the provided functions and design methods.

[0102] Figure 4 It is a view showing an example of a structure for driving a plurality of display panels in a display device according to an embodiment of the present disclosure.

[0103] Reference Figure 4 Referring to, the display device 100 according to an embodiment of the present disclosure may include one or more display panels 111, 112, 113, a timing controller 140, a gamma circuit 160, and one or more source driver integrated circuits SDIC1, SDIC2, SDIC3.

[0104] The one or more display panels may be at least one of a first display panel 111, a second display panel 112, and a third display panel 113. The first display panel 111 may be a dashboard display panel, the second display panel 112 may be a central instrument panel display panel, and the third display panel 113 may be a passenger display panel.

[0105] The first source driver integrated circuit SDIC1 converts the first image data DATA1 transmitted from the timing controller 140 into a first data voltage and supplies it to the first display panel 111. The second source driver integrated circuit SDIC2 converts the second image data DATA2 transmitted from the timing controller 140 into a second data voltage and supplies it to the second display panel 112. The third source driver integrated circuit SDIC3 converts the third image data DATA3 transmitted from the timing controller 140 into a third data voltage and supplies it to the third display panel 113.

[0106] Here, the first source driver integrated circuit SDIC1, the second source driver integrated circuit SDIC2, and the third source driver integrated circuit SDIC3 may be referred to as a first data driving circuit, a second data driving circuit, and a third data driving circuit.

[0107] The timing controller 140 may receive external timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a main clock MCLK, as well as image data DATA, from a host system through an interface (e.g., a low-voltage differential signal LVDS interface).

[0108] The timing controller 140 may generate control signals for the operation of the gate driving circuit 120 and the data driving circuit 130 based on the external timing signals, and supply the image data DATA to the source driver integrated circuits SDIC1 - SDIC3 that constitute the data driving circuit 130.

[0109] The timing controller 140 controls the gamma circuit 160 using a gamma control signal GCS. The gamma control signal GCS may include a reference gamma voltage for generating gamma voltages VG1 - VG3 and a mode control signal according to the driving modes of the plurality of display panels 111, 112, 113.

[0110] The gamma circuit 160 may generate a first gamma voltage VG1 for controlling the brightness of the first display panel 111, a second gamma voltage VG2 for controlling the brightness of the second display panel 112, and a third gamma voltage VG3 for controlling the brightness of the third display panel 113 according to the control of the timing controller 140.

[0111] In addition, the gamma circuit 160 may adjust the gamma voltages VG1, VG2, VG3 supplied to the plurality of display panels 111, 112, 113, respectively, according to the mode control signal included in the gamma control signal GCS.

[0112] Meanwhile, the timing controller 140 may receive the coordinates of important information from the host system and calculate a checksum based on the coordinates of the important information to check for errors in the image data DATA.

[0113] When the display device 100 displays vehicle-related information, important information may be information for displaying vehicle warnings such as safety control off, temperature warning, anti-lock braking system (ABS), low hydraulic pressure, etc.

[0114] The timing controller 140 transmits the coordinates and checksum of the important information to the source driver integrated circuits SDIC1 - SDIC3, respectively.

[0115] Thereafter, the timing controller 140 may receive feedback on whether there is an error in the image data DATA from the source driver integrated circuits SDIC1 - SDIC3 through a specific interface. In addition, the timing controller 140 may also receive feedback on whether there is an error in the communication state from the source driver integrated circuits SDIC1 - SDIC3.

[0116] Based on the feedback results, the timing controller 140 may determine whether an error has occurred in the communication state or whether an abnormal image is displayed in the source driver integrated circuits SDIC1 - SDIC3.

[0117] Each source driver integrated circuit SDIC1 - SDIC3 converts the image data DATA received from the timing controller 140 into an analog data voltage and provides it to the corresponding display panels 111 - 113 through data lines.

[0118] The first source driver integrated circuit SDIC1 may provide a data voltage through the data line connected to the first display panel 111, the second source driver integrated circuit SDIC2 may provide a data voltage through the data line connected to the second display panel 112, and the third source driver integrated circuit SDIC3 may provide a data voltage through the data line connected to the third display panel 113.

[0119] At this time, the display device 100 may operate in a normal mode in which different images are displayed on the plurality of display panels 111, 112, 113 or in a panoramic mode in which a continuous image is displayed on the plurality of display panels 111, 112, 113.

[0120] The display device 100 of the present disclosure may uniformly control the brightness of the plurality of display panels 111, 112, 113 by providing separate gamma voltages VG1, VG2, VG3 to the plurality of display panels 111, 112, 113 in the normal mode and providing a common gamma voltage to the plurality of display panels 111, 112, 113 in the panoramic mode.

[0121] Figure 5 is a view showing a display panel operating in the normal mode in a display device according to an embodiment of the present disclosure, Figure 6It is a view showing the operation of the gamma circuit in a normal mode in a display device according to an embodiment of the present disclosure.

[0122] Reference Figure 5 and 6 According to an embodiment of the present disclosure, the display device 100 can operate in a normal mode, in which different images are independently displayed on a plurality of display panels 111, 112, and 113.

[0123] In this case, the first source driver integrated circuit SDIC1 converts the first image data DATA1 into a first data voltage Vdata1 and provides it to the first display panel 111, thereby displaying the first image. In addition, the second source driver integrated circuit SDIC2 converts the second image data DATA2 into a second data voltage Vdata2 and provides it to the second display panel 112, thereby displaying the second image. In addition, the third source driver integrated circuit SDIC3 converts the third image data DATA3 into a third data voltage Vdata3 and provides it to the third display panel 113, thereby displaying the third image.

[0124] At this time, the gamma circuit 160 can provide a first gamma voltage VG1 corresponding to the first image data DATA1 to the first source driver integrated circuit SDIC1, provide a second gamma voltage VG2 corresponding to the second image data DATA2 to the second source driver integrated circuit SDIC2, and provide a third gamma voltage VG3 corresponding to the third image data DATA3 to the third source driver integrated circuit SDIC3.

[0125] For this operation, the gamma circuit 160 can include a plurality of gamma voltage generation circuits GAMC1, GAMC2, GAMC3 and a plurality of switch circuits MUX1, MUX2.

[0126] The plurality of gamma voltage generation circuits GAMC can include a first gamma voltage generation circuit GAMC1 that generates the first gamma voltage VG1, a second gamma voltage generation circuit GAMC2 that generates the second gamma voltage VG2, and a third gamma voltage generation circuit GAMC3 that generates the third gamma voltage VG3.

[0127] The first gamma voltage generation circuit GAMC1 can generate the first gamma voltage VG1 using the first reference gamma voltage RVG1. The second gamma voltage generation circuit GAMC2 can generate the second gamma voltage VG2 using the second reference gamma voltage RVG2. The third gamma voltage generation circuit GAMC3 can generate the third gamma voltage VG3 using the third reference gamma voltage RVG3.

[0128] The switching circuit may include a first switching circuit MUX1 that selects an output signal from among a first gamma voltage VG1 and a second gamma voltage VG2, and a second switching circuit MUX2 that selects an output signal from among the second gamma voltage VG2 and a third gamma voltage VG3.

[0129] The first switching circuit MUX1 and the second switching circuit MUX2 may select an output signal through a panoramic mode control signal PM.

[0130] When the display device 100 operates in a normal mode or a panoramic mode, the panoramic mode control signal PM controls the operations of the switching circuits MUX1 and MUX2.

[0131] For example, when the display device 100 operates in a normal mode in which different images are independently displayed on a plurality of display panels 111, 112, and 113, the panoramic mode control signal PM is provided at an off level. Accordingly, the first switching circuit MUX1 provides the first gamma voltage VG1 to the first source driver integrated circuit SDIC1, and the second switching circuit MUX2 provides the third gamma voltage VG3 to the third source driver integrated circuit SDIC3.

[0132] That is, in the case of the normal mode in which different images are independently displayed on the plurality of display panels 111, 112, and 113, each of the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3 receives the first gamma voltage VG1 to the third gamma voltage VG3 having different levels, respectively. As a result, in the normal mode, the plurality of display panels 111, 112, and 113 display images having different brightnesses.

[0133] On the other hand, in the panoramic mode in which a single continuous image is displayed on the plurality of display panels 111, 112, and 113, the brightnesses of the plurality of display panels 111, 112, and 113 can be uniformly controlled by providing a common gamma voltage to the plurality of display panels 111, 112, and 113.

[0134] Figure 7 is a view showing a display panel operating in a panoramic mode in a display device according to an embodiment of the present disclosure, Figure 8 is a view showing the operation of a gamma circuit in a panoramic mode in a display device according to an embodiment of the present disclosure.

[0135] Reference Figure 7 and 8 According to embodiments of the present disclosure, the display device 100 may operate in a panoramic mode in which a single continuous image is displayed on a plurality of display panels 111, 112, and 113.

[0136] In this case, the first data voltage Vdata1 provided from the first source driver integrated circuit SDIC1 to the first display panel 111 may correspond to the first part of the entire image. Additionally, the second data voltage Vdata2 provided from the second source driver integrated circuit SDIC2 to the second display panel 112 may correspond to the second part of the entire image. Additionally, the third data voltage Vdata3 provided from the third source driver integrated circuit SDIC3 to the third display panel 113 may correspond to the third part of the entire image.

[0137] The entire image displayed on the plurality of display panels 111, 112, 113 may represent a continuous image by connecting the first part, the second part, and the third part.

[0138] At this time, the gamma circuit 160 may provide a common gamma voltage such that the plurality of display panels 111, 112, 113 display the same brightness. For example, when the common gamma voltage is the second gamma voltage VG2, the second gamma voltage VG2 may be applied as the common gamma voltage to the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3.

[0139] The first gamma voltage generation circuit GAMC1 may generate the first gamma voltage VG1 using the first reference gamma voltage RVG1. The second gamma voltage generation circuit GAMC2 may generate the second gamma voltage VG2 using the second reference gamma voltage RVG2. The third gamma voltage generation circuit GAMC3 may generate the third gamma voltage VG3 using the third reference gamma voltage RVG3.

[0140] The switching circuit may include a first switching circuit MUX1 that selects an output signal between the first gamma voltage VG1 and the second gamma voltage VG2, and a second switching circuit MUX2 that selects an output signal between the second gamma voltage VG2 and the third gamma voltage VG3.

[0141] The first switching circuit MUX1 and the second switching circuit MUX2 may select an output signal through a panoramic mode control signal PM.

[0142] When the display device 100 of the present disclosure operates in a panoramic mode of displaying a continuous image on the plurality of display panels 111, 112, 113, the panoramic mode control signal PM is provided at an active level. Accordingly, both the first switching circuit MUX1 and the second switching circuit MUX2 transmit the second gamma voltage VG2.

[0143] As a result, the same second gamma voltage VG2 is provided as the common gamma voltage to the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3.

[0144] That is, in the case of a panoramic mode in which a continuous image is displayed on a plurality of display panels 111, 112, and 113, the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3 receive a common gamma voltage. As a result, in the panoramic mode, the plurality of display panels 111, 112, and 113 display images with the same brightness.

[0145] Here, a case where the second gamma voltage VG2 is selected as the common gamma voltage is illustrated. By changing the positions of the switch circuits MUX1 and MUX2, the first gamma voltage VG1 or the third gamma voltage VG3 can be selected as the common gamma voltage.

[0146] In this way, the display device 100 of the present disclosure can effectively control the brightness of the plurality of display panels 111, 112, and 113 by supplying separate gamma voltages VG1, VG2, VG3 or a common gamma voltage to the plurality of display panels 111, 112, and 113.

[0147] Here, a case where the display panel 110 is composed of the first display panel 111 to the third display panel 113 is illustrated. On the other hand, when the display panel 110 is composed of the first display panel 111 and the second display panel 112, the first switch circuit MUX1 can be used to supply different gamma voltages VG1, VG2 or a common gamma voltage to the first display panel 111 and the second display panel 112.

[0148] Figure 9 is a view showing the structure of a gamma voltage generation circuit in a display device according to an embodiment of the present disclosure.

[0149] Reference Figure 9 , the gamma voltage generation circuit GAMC of the display device 100 according to an embodiment of the present disclosure can receive an upper reference gamma voltage (VREG1_REF255) and a lower reference gamma voltage VREG1_REF1. The upper reference gamma voltage VREG1_REF255 and the lower reference gamma voltage VREG1_REF1 may be referred to as a reference gamma voltage RVG.

[0150] The gamma voltage generation circuit GMAC outputs a first reference voltage VREG1 for generating a gamma voltage by voltage division between the upper reference gamma voltage VREG1_REF255 and the lower reference gamma voltage VREG1_REF1.

[0151] The gamma voltage generation circuit GAMC receives a first reference voltage VREG1 at the top of the resistor string and a ground voltage as the second reference voltage at the bottom of the resistor string. The gamma voltage generation circuit GAMC can output a plurality of gamma voltages (e.g., 0G, 1G, 15G, 31G, 63G, 127G, 191G, 255G) through voltage division between the first reference voltage and the second reference voltage.

[0152] The gamma voltage generation circuit GAM can generate gamma voltages VG corresponding to low gray levels at narrow intervals to improve the performance of low gray levels.

[0153] In the normal driving mode, the gamma voltage VG corresponding to a high gray level can have a high level, and the gamma voltage VG corresponding to a low gray level can have a low level.

[0154] However, depending on the structure of the sub-pixel (or pixel), there is a case where a low-level voltage represents a high gray level and a high-level voltage represents a low gray level. In this case, the gamma voltage generation circuit GAMC can invert the gamma voltage VG.

[0155] For example, the gamma voltage V255 corresponding to 255G in the normal driving mode can be used as the gamma voltage V0 corresponding to 0G in the inverted driving mode. Additionally, the gamma voltage V191 corresponding to 191G in the normal driving mode can be used as the gamma voltage V64 corresponding to 64G in the inverted driving mode.

[0156] Figure 10 is a block diagram showing a source driver integrated circuit in a display device according to an embodiment of the present disclosure.

[0157] Reference Figure 10 , the source driver integrated circuit SDIC of the display device 100 according to an embodiment of the present disclosure may include a shift register 131, a sampling latch circuit 132, a holding latch circuit 133, a multiplexer 134, a decoder 135, and an output buffer 136.

[0158] The timing controller 140 can generate control signals including a source start pulse SSP, a source clock SCLK, a source output enable signal SOE, etc. to control the source driver integrated circuit SDIC.

[0159] The source start pulse SSP controls the data sampling start time of the source driver integrated circuit SDIC. The source clock SCLK is a clock signal that controls the image data sampling operation in the source driver integrated circuit SDIC based on the rising edge or falling edge. The source output enable signal SOE controls the output of the source driver integrated circuit SDIC.

[0160] The shift register 131 generates a sampling signal in response to a source start pulse SSP and a source clock SCLK transmitted from the timing controller 140.

[0161] The sampling latch circuits 132R, 132G, and 132B sequentially sample the image data DATA provided from the timing controller 140 via the data bus lines according to the sampling signal, and supply it to the holding latch circuits 133R, 133G, and 133B.

[0162] When the pixels of the display panel 110 include three sub-pixels: a red sub-pixel, a green sub-pixel, and a blue sub-pixel, the sampling latch circuits 132R, 132G, and 132B include a first sampling latch circuit 132R that samples the red image data DATA_R, a second sampling latch circuit 132G that samples the green image data DATA_G, and a third sampling latch circuit 132B that samples the blue image data DATA_B.

[0163] Accordingly, the first sampling latch circuit 132R and the third sampling latch circuit 132B each sample the image data of their corresponding colors.

[0164] The holding latch circuits 133R, 133G, and 133B store the image data sampled by the sampling latch circuits 132R, 132G, and 132B in units of one row, and supply the stored one-row image data to the multiplexer 134 in synchronization with the source output enable signal SOE.

[0165] In this case, the holding latch circuits 133R, 133G, and 133B may include a first holding latch circuit 133R that stores the red image data DATA_R, a second holding latch circuit 133G that stores the green image data DATA_G, and a third holding latch circuit 133B that stores the blue image data DATA_B, corresponding to the sampling latch circuits 132R, 132G, and 132B.

[0166] The multiplexer 134 selects the image data of the corresponding color according to the color selection signals SEL_R, SEL_G, and SEL_B, and supplies it to the decoder 135.

[0167] The decoder 135 converts one row of image data into an analog input voltage VIN in response to a gamma voltage VGAM transmitted from the gamma circuit 137.

[0168] The output buffer 136 amplifies or compensates the analog input voltage VIN transmitted from the decoder 135, and supplies a data voltage Vdata to the corresponding data line DL.

[0169] Meanwhile, the first sub-pixels and the second sub-pixels having different emission angles can be arranged together on at least one of the display panels 111, 112, 113 in the display device 100 of the present disclosure. The viewing angle of an image can be controlled by selectively controlling the driving operations of the first sub-pixels or the second sub-pixels.

[0170] Figure 11 FIG. is a view showing a display panel including sub-pixels having different emission angles in a display device according to an embodiment of the present disclosure.

[0171] Reference Figure 11 , a plurality of unit sub-pixels SPu can be provided on the first display panel 111 in the display device 100 according to an embodiment of the present disclosure.

[0172] Here, the unit sub-pixel SPu is a sub-pixel that emits light of a specified color, and may include a first sub-pixel SPw having a first emission angle and a second sub-pixel SPn having a second emission angle. The unit sub-pixel SPu may include a unit sub-pixel that emits red, a unit sub-pixel that emits green, and a unit sub-pixel that emits blue.

[0173] The first sub-pixel SPw may be a wide-angle sub-pixel having a wide emission angle, and the second sub-pixel SPn may be a narrow-angle sub-pixel having a narrow emission angle.

[0174] When the first sub-pixel SPw having a wide emission angle in the unit sub-pixel SPu provided on the first display panel 111 emits light, the image of the first display panel 111 is displayed at a wide viewing angle. Therefore, not only the driver but also the passengers in the passenger seats in the vehicle will be able to recognize the image of the first display panel 111.

[0175] On the other hand, when the second sub-pixel SPn having a narrow emission angle in the unit sub-pixel SPu provided on the first display panel 111 emits light, the image of the first display panel 111 has a narrow viewing angle. Therefore, only the occupants (e.g., the driver) located in front of the first display panel 111 in the vehicle will be able to recognize the image of the first display panel 111.

[0176] At this time, the area of the first display panel 111 can be divided, and images having different viewing angles can be displayed in each area, respectively.

[0177] For example, the outside of the first display panel 111 can be set as the first area A1, and the unit sub-pixels SPu located in the first area A1 can cause the first sub-pixels SPw in the first area A1 to emit light at a wide emission angle. In this case, the image displayed in the first area A1 can have a wide viewing angle.

[0178] On the other hand, the central portion of the first display panel 111 may be set as the second region A2, and the unit sub-pixels SPu located in the second region A2 may cause the second sub-pixels SPn to emit light at a narrow emission angle. In this case, the image displayed in the second region A2 may have a narrow viewing angle.

[0179] The size of the second region A2 may be changed based on the center of the first display panel 111. Therefore, the first region A1 may be the remaining outer region of the first display panel 111 except for the second region A2.

[0180] In this way, the display device 100 of the present disclosure can display images with different viewing angles according to the position of the first display panel 111 by selectively driving the sub-pixels SPw and SPn with different emission angles.

[0181] At this time, the first sub-pixel SPw and the second sub-pixel SPn constituting the unit sub-pixel SPu may have the same structure (size, number, position, etc.), but may also have different structures.

[0182] Figure 12 FIG. is a view showing different structures of the first sub-pixel and the second sub-pixel constituting a unit sub-pixel in a display device according to an embodiment of the present disclosure.

[0183] Reference Figure 12 FIG., the unit sub-pixels SPu provided on the display panel 110 in the display device 100 according to an embodiment of the present disclosure may include a first unit sub-pixel that emits red, a second unit sub-pixel that emits green, and a third unit sub-pixel that emits blue.

[0184] Each color unit sub-pixel SPu may include a first sub-pixel SPw with a wide emission angle and a second sub-pixel SPn with a narrow emission angle.

[0185] At this time, the first sub-pixel SPw may be different from the second sub-pixel SPn in size, number, or position.

[0186] For example, the first unit sub-pixel that emits red may include one first sub-pixel SPw and two second sub-pixels SPn. At this time, the size of the first sub-pixel SPw may be larger than that of the second sub-pixel SPn.

[0187] In addition, the second unit sub-pixel that emits green may include one first sub-pixel SPw and four second sub-pixels SPn. At this time, the four second sub-pixels SPn may be arranged in a square structure on the upper region of the first sub-pixel SPw.

[0188] In addition, the third unit sub-pixel that emits blue light may include one first sub-pixel SPw and four second sub-pixels SPn. At this time, the four second sub-pixels SPn may be arranged in a row on the upper region of the first sub-pixel SPw.

[0189] The sizes and arrangements of the first sub-pixel SPw and the second sub-pixel SPn may be determined according to the luminous efficiency of the corresponding color and the lifespan of the sub-pixels.

[0190] At this time, the emission angles of the first sub-pixel SPw and the second sub-pixel SPn may be controlled according to the shape of the lens provided on the emission surface.

[0191] Figure 13 is a view showing a first lens provided on the first sub-pixel and a second lens provided on the second sub-pixel in a display device according to an embodiment of the present disclosure.

[0192] Reference Figure 13 , in the unit sub-pixels of the display device 100 according to an embodiment of the present disclosure, the first lens Lz1 provided on the first sub-pixel SPw having a wide emission angle may be a semi-cylindrical lens, and the second lens Lz2 provided on the second sub-pixel SPn having a narrow emission angle may be a hemispherical lens.

[0193] The first lens Lz1 and the second lens Lz2 may have different shapes and different sizes, but may have the same thickness (height).

[0194] The first lens Lz1 and the second lens Lz2 may have different shapes, different sizes, and different thicknesses (heights).

[0195] The first lens Lz1 may have a semi-cylindrical shape with a rectangular bottom surface. Therefore, its light emission direction may be cut off in the y-y' direction and may not be cut off in the x-x' direction.

[0196] That is, since the length of the first lens Lz1 in the x-axis direction exceeds the width of the first sub-pixel SPw, the first lens Lz1 is not cut off in the x-x' direction. The first lens Lz1 has a curvature, and its width in the x-x' direction becomes smaller as it extends upward along the z-axis. Therefore, the first lens Lz1 is cut off in the y-y' direction.

[0197] The second lens Lz2 is a hemispherical shape with a circular bottom surface. The second lens Lz2 has a curvature, and its width in each of the x-x' direction and the y-y' direction becomes smaller as it extends upward along the z-axis.

[0198] Accordingly, the light emission direction can be cut off from the circular bottom surface in all directions in the x-x' direction and the y-y' direction by the width of the second sub-pixel SPn.

[0199] The size of each of the sub-pixels SPw, SPn, the first lens Lz1, and the second lens Lz2 can be varied according to the angle to cut off the light.

[0200] In addition, the size of each of the sub-pixels SPw, SPn, the first lens Lz1, and the second lens Lz2 can be varied according to the light efficiency and light concentration of the sub-pixels SPw, SPn.

[0201] Figure 14 is a cross-sectional view of a unit sub-pixel in a display device according to an embodiment of the present disclosure.

[0202] Reference Figure 14 , the unit sub-pixel provided on the display panel 110 in the display device 100 according to an embodiment of the present disclosure may include a first sub-pixel SPw having a first emission angle and a second sub-pixel SPn having a second emission angle.

[0203] The first emission angle emitted through the first sub-pixel SPw may be greater than the second emission angle emitted through the second sub-pixel SPn.

[0204] The first sub-pixel SPw may include a first anode electrode AE1, a first emission layer EL1, and a first cathode electrode CE1. The first anode electrode AE1, the first emission layer EL1, and the first cathode electrode CE1 may constitute a first light-emitting element.

[0205] In addition, a first black matrix BM1, a first insulating layer ENCAP1, a first gap filler GF1, and a first lens Lz1 having a first emission angle may be sequentially stacked on the first cathode electrode CE1. An auxiliary gap filler may be additionally provided on the first lens Lz1.

[0206] Here, a part of the region of the first black matrix BM1 overlapping with the first anode electrode AE1 may be open.

[0207] The second sub-pixel SPn may include a second anode electrode AE2, a second emission layer EL2, and a second cathode electrode CE2. The second anode electrode AE2, the second emission layer EL2, and the second cathode electrode CE2 may constitute a second light-emitting element.

[0208] In addition, a second black matrix BM2, a second insulating layer ENCAP2, a second gap filler GF2, and a second lens Lz2 having a second emission angle may be sequentially stacked on the second cathode electrode CE2. An auxiliary gap filler may be additionally provided on the second lens Lz2.

[0209] A part of the region of the second black matrix BM2 overlapping with the second anode electrode AE2 may be open.

[0210] The first black matrix BM1 and the second black matrix BM2 can prevent light from entering the active layer of the driving transistor constituting the sub-pixel to prevent the generation of leakage current.

[0211] The first anode electrode AE1 of the first sub-pixel SPw and the second anode electrode AE2 of the second sub-pixel SPn can be formed in the same process, on the same layer, with the same material, and with the same thickness. The first anode electrode AE1 and the second anode electrode AE2 can be formed using photoresist through a mask process.

[0212] The first emission layer EL1 of the first sub-pixel SPw and the second emission layer EL2 of the second sub-pixel SPn can be formed in the same layer, with the same material, the same color, and the same thickness through the same process.

[0213] Each of the first emission layer EL1 and the second emission layer EL2 may include a hole injection layer (HIL), a hole transport layer (HTL), an emission material layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL).

[0214] The first cathode electrode CE1 of the first sub-pixel SPw and the second cathode electrode CE2 of the second sub-pixel SPn can be formed in the same layer, with the same material, the same color, and the same thickness through the same process.

[0215] The first cathode electrode CE1 and the second cathode electrode CE2 can be made of an opaque metal material, such as at least one selected from the group consisting of aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), and alloys formed by their combination.

[0216] The first gap filler GF1 of the first sub-pixel SPw and the second gap filler GF2 of the second sub-pixel SPn can be formed in the same layer, with the same material, the same color, and the same thickness through the same process.

[0217] The space between the first emission layer EL1 and the first lens Lz1 can be adjusted based on the thickness (height) of the first gap filler GF1. In addition, the space between the second emission layer EL2 and the second lens Lz2 can be adjusted based on the thickness (height) of the second gap filler GF2.

[0218] The first gap filler GF1 or the second gap filler GF2 can be made of one or a combination of acrylic, epoxy resin, and silicon. In addition, the first gap filler GF1 or the second gap filler GF2 can be made of an organic material.

[0219] The particle size in the first gap filler GF1 or the second gap filler GF2 can be equal to the wavelength of light, or can be larger or smaller than the wavelength of light within a certain range. The first gap filler GF1 or the second gap filler GF2 can have a forward diffusion property based on one of the particle density, particle size, and particle shape.

[0220] In this regard, the first gap filler GF1 or the second gap filler GF2 can have a refractive index smaller than that of the first insulating layer ENCAP1. That is, due to one of the particle density, size, and shape, the first gap filler GF1 and the second gap filler GF2 can have a refractive index smaller than that of the first insulating layer ENCAP1.

[0221] The material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 can be TiO 2 , Al 2 O 3 and SiO 2 one of them.

[0222] When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is TiO 2 , the first insulating layer ENCAP1 or the second insulating layer ENCAP2 can have a refractive index in the range of 2.6 to 2.9. When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is Al 2 O 3 , the first insulating layer ENCAP1 or the second insulating layer ENCAP2 can have a refractive index in the range of 1.75 to 1.76. When the material of the first insulating layer ENCAP1 or the second insulating layer ENCAP2 is SiO 2 , the first insulating layer ENCAP1 or the second insulating layer ENCAP2 can have a refractive index in the range of 1.40 to 1.55.

[0223] The first lens Lz1 of the first sub-pixel SPw and the second lens Lz2 of the second sub-pixel SPn can be formed on the same layer with the same material, the same color, and the same thickness by the same process. However, the first lens Lz1 and the second lens Lz2 can be formed to have different shapes and different sizes.

[0224] The refractive indices of the first lens Lz1 and the second lens Lz2 can be determined according to the shape of the lens and the thickness (height) of the gap fillers GF1, GF2.

[0225] Figure 15It is a view showing a case where images with different viewing angles are displayed in a first region and a second region of a display panel in a display device according to an embodiment of the present disclosure.

[0226] Reference Figure 15 , the display device 100 according to an embodiment of the present disclosure may include a plurality of display panels (e.g., a first display panel to a third display panel). At least one display panel (e.g., the first display panel) may be driven to a plurality of regions (e.g., a first region and a second region) having different viewing angles.

[0227] For example, the first region A1 of the first display panel 111 may be displayed with a wide viewing angle because the first sub-pixel SPw having a wide emission angle in the unit sub-pixel SPu emits light with a high gray level (e.g., 255 gray levels). Therefore, not only the driver in the vehicle but also the passengers in the passenger seats will be able to recognize the image of the first display panel 111. At this time, it can be said that the first region A1 of the first display panel 111 operates in the first viewing angle mode.

[0228] On the other hand, the second region A2 of the first display panel 111 may be displayed with a narrow viewing angle because the second sub-pixel SPn having a narrow emission angle in the unit sub-pixel SPu emits light with a high gray level (e.g., 255 gray levels). Therefore, only the driver located in front of the first display panel 111 in the vehicle will be able to recognize the image of the first display panel 111. At this time, it can be said that the second region A2 of the first display panel 111 operates in the second viewing angle mode.

[0229] At this time, the size of the first region A1 operating in the first viewing angle mode with a narrow viewing angle may be variable.

[0230] Figure 16 It is a block diagram showing the configuration of a gate driving circuit in a display device according to an embodiment of the present disclosure;

[0231] Reference Figure 16 , the gate driving circuit 120 in the display device 100 according to an embodiment of the present disclosure may be provided in the side border region of the display panel 110.

[0232] The gate driving circuit 120 may be composed of n stages STG1 - STGn, and n (natural numbers of 2 or more) gate driving integrated circuits GDIC#1 - GDIC#n are correspondingly connected to the n stages STG1 - STGn. Each of the gate driving integrated circuits GDIC#1 - GDIC#n receives a gate high voltage VGH and a gate low voltage VGL as driving voltages, and operates through a gate clock signal GCLK.

[0233] The first gate driving integrated circuit GDIC#1 starts operating through a gate start signal GVST, and the second gate driving integrated circuit GDIC#2 to the nth gate driving integrated circuit GDIC#n can receive the gate signals GS1 - GS(n - 1) output from the output terminal of the previous stage as start signals.

[0234] For example, the first gate signal GS1 output from the output terminal of the first gate driving integrated circuit GDIC#1 corresponding to the first stage STG1 can be provided to the start signal input terminal of the first sub - pixel row SPL1 set in the first row and the second gate driving integrated circuit GDIC#2 of the second stage STG2.

[0235] Therefore, the first gate driving integrated circuit GDIC#1 of the first stage STG1 can use the gate start signal GVST as a start signal, but each of the second gate driving integrated circuit GDIC#2 of the second stage STG2 to the nth gate driving integrated circuit GDIC#n of the nth stage STGn can use the gate signal output from the output terminal of the previous gate driving integrated circuit as a start signal.

[0236] Here, the first gate signal GS1 output from the output terminal of the first gate driving integrated circuit GDIC#1 is an expression of the first start signal START1, which is used to indicate that the first gate signal GS1 generated in the first stage STG1 is used as the start signal for the next stage.

[0237] As shown in the relationship between the (n - 1)th stage STG(n - 1) and the nth stage STGn, the configuration of connecting related stages and using the gate signal of the previous stage as the start signal for the next stage can be equally applied to all stages STG1 - STGn.

[0238] Meanwhile, the gate signal output from one stage (one gate driving integrated circuit) can include one or more scan signals and one or more emission signals. For example, two scan signals and one emission signal can be generated from one stage (one gate driving integrated circuit).

[0239] In addition, the gate driving circuit 120 in the display device 100 of the present disclosure can generate a viewing angle control signal, which is used to control the emission from the first region A1 with a first emission angle and the second region A2 with a second emission angle.

[0240] Figure 17 It is a view showing the gate signal output from the gate driving circuit in the display device according to an embodiment of the present disclosure.

[0241] Reference Figure 17, each of the plurality of gate driver integrated circuits GDICs constituting the gate driving circuit 120 in the display device 100 according to an embodiment of the present disclosure may generate a gate signal to drive sub-pixels of the display panel 110.

[0242] At this time, the gate signal GS output from the gate driver integrated circuit GDIC may include a scan signal SC for controlling the driving timing of the sub-pixel, an emission signal EM for controlling the emission timing of the sub-pixel, and a viewing angle control signal PS for controlling the emission angle of the sub-pixel.

[0243] According to the circuit configuration of the sub-pixel, the scan signal SC may include one or more scan signals.

[0244] According to the circuit configuration of the sub-pixel, the emission signal EM may include one or more emission signals.

[0245] The viewing angle control signal PS may include a first viewing angle control signal PS1 for controlling a first sub-pixel SPw having a first emission angle and a second viewing angle control signal PS2 for controlling a second sub-pixel SPn having a second emission angle.

[0246] Therefore, the area that emits light through the first viewing angle control signal PS1 will operate in a first viewing angle mode, and the area that emits light through the second viewing angle control signal PS2 will operate in a second viewing angle mode.

[0247] Figure 18 is a view showing the circuit operation of the first sub-pixel of the unit sub-pixel in the display device according to an embodiment of the present disclosure, and Figure 19 is a view of the signal waveform driven by the first sub-pixel of the unit sub-pixel in the display device according to an embodiment of the present disclosure.

[0248] Reference Figure 18 and 19 , the unit sub-pixel in the display device 100 according to an embodiment of the present invention may include a first light-emitting element ED1, a second light-emitting element ED2, a driving transistor DT, and an internal compensation circuit.

[0249] Here, the first light-emitting element ED1 may be placed in the first sub-pixel SPw, and the second light-emitting element ED2 may be placed in the second sub-pixel SPn.

[0250] The first lens Lz1 may be located on the first light-emitting element ED1, and the second lens Lz2 may be located on the second light-emitting element ED2.

[0251] The transistors T1-T8, DT provided in the unit sub-pixel may be implemented as PMOS type LTPS (low temperature polycrystalline silicon) transistors, and desired response characteristics may be obtained from these transistors.

[0252] For example, at least one of the switching transistors T1 - T8 can be implemented as an NMOS - type or PMOS - type oxide transistor having good leakage current characteristics in the off - state, and the remaining transistors can be implemented as PMOS - type LTPS transistors having good response characteristics.

[0253] The unit sub - pixel can include a first transistor T1 connected to a data line and transmitting a data voltage Vdata through a second scan signal SC2.

[0254] The unit sub - pixel can include a second transistor T2 connected to a driving voltage VDD and transmitting the driving voltage VDD through an emission signal EM.

[0255] The driving transistor DT connects a first node N1 shared by the first transistor T1 and the second transistor T2 to a third node N3, and receives the voltage charged in the storage capacitor Cst as a gate voltage through a second node N2.

[0256] A fourth transistor T4 controlled by the emission signal EM and a sixth transistor T6 controlled by a first viewing - angle control signal PS1 are connected between the third node N3 and a first light - emitting element ED1.

[0257] A fourth transistor T4 controlled by the emission signal EM and an eighth transistor T8 controlled by a second viewing - angle control signal PS2 are connected between the third node N3 and a second light - emitting element ED2. The eighth transistor T8 is connected to a fourth node N4 of the fourth transistor T4.

[0258] Therefore, in a state where the fourth transistor T4 is turned on by the emission signal EM, the first light - emitting element ED1 or the second light - emitting element ED2 can emit light through the first viewing - angle control signal PS1 and the second viewing - angle control signal PS2.

[0259] A third transistor T3 controlled by the second scan signal SC2 can connect the second node N2 to the third node N3.

[0260] A fifth transistor T5 is connected between the second node N2 and a line providing a second initialization voltage Vini2, and can be controlled by a first scan signal SC1. Therefore, the fifth transistor T5 can initialize the gate node of the driving transistor DT to the second initialization voltage Vini2 through the first scan signal SC1.

[0261] A seventh transistor T7 is connected between the anode electrode of the first light - emitting element ED1 and a line providing a first initialization voltage Vini1, and can be controlled by the second scan signal SC2. Therefore, the seventh transistor T7 can initialize the anode electrode of the first light - emitting element ED1 to the first initialization voltage Vini1 through the second scan signal SC2.

[0262] At this time, the first to eighth transistors T1 - T8 can be respectively referred to as the first to eighth switching transistors.

[0263] The first light - emitting element ED1 and the second light - emitting element ED2 emit light with a current amount controlled by the voltage Vgs between the gate node and the source node of the driving transistor DT.

[0264] The first light - emitting element ED1 can be connected to the driving transistor DT through the fourth transistor T4 and the sixth transistor T6. The second light - emitting element ED2 can be connected to the driving transistor DT through the fourth transistor T4 and the eighth transistor T8.

[0265] The cathode electrodes of the first light - emitting element ED1 and the second light - emitting element ED2 are connected to the low - potential voltage VSS.

[0266] The driving transistor DT can control the driving current Id flowing through the first light - emitting element ED1 or the second light - emitting element ED2 according to the voltage Vgs between the gate node and the source node.

[0267] The compensation circuit can sample the voltage Vgs between the gate node and the source node of the driving transistor DT to compensate for the change in the threshold voltage of the driving transistor DT. The compensation circuit can include the first to eighth transistors T1 - T8 and the storage capacitor Cst. Or, the remaining part excluding the first transistor T1 for providing the data voltage Vdata can be referred to as the compensation circuit.

[0268] Therefore, the unit sub - pixel constituting the display device 100 of the present disclosure can control the first light - emitting element ED1 through the first viewing - angle control signal PS1 and can control the second light - emitting element ED2 through the second viewing - angle control signal PS2.

[0269] For example, the period during which the first light - emitting element ED1 emits light will correspond to the first viewing - angle mode in which the first viewing - angle control signal PS1 is provided at the conductive level (e.g., low level) and the second viewing - angle control signal PS2 is provided at the non - conductive level (e.g., high level).

[0270] Reference Figure 19 , in the first period P1, the gate node of the driving transistor DT is initialized to the second initialization voltage Vini2 through the first scan signal SC1.

[0271] In the second period P2, the data voltage Vdata is provided to the driving transistor DT through the second scan signal SC2, and the anode electrode of the first light - emitting element ED1 can be initialized with the first initialization voltage Vini1.

[0272] In a third period P3, a first light-emitting element ED1 emits light through a first viewing-angle control signal PS1, and a second light-emitting element ED2 is turned off through a second viewing-angle control signal PS2. The third period P3 operates in a first viewing-angle mode.

[0273] Figure 20 is a view showing the circuit operation of the second sub-pixel of a unit sub-pixel in a display device according to an embodiment of the present disclosure, and Figure 21 is a view of a signal waveform driven by the second sub-pixel of a unit sub-pixel in a display device according to an embodiment of the present disclosure.

[0274] Since Figure 20 is the same as the configuration of Figure 18 the description of the configuration will be omitted.

[0275] However, in a period when the second light-emitting element ED2 emits light, the second viewing-angle control signal PS2 may be provided at a conduction level (e.g., a low level), and the first viewing-angle control signal PS1 may be provided at a turn-off level (e.g., a high level). The period when the second light-emitting element ED2 emits light may correspond to a second viewing-angle mode.

[0276] Referring to Figure 21 in a first period P1, a gate node of a driving transistor DT is initialized to a second initialization voltage Vini2 through a first scan signal SC1.

[0277] In a second period P2, a data voltage Vdata may be provided to the driving transistor DT through a second scan signal SC2, and an anode electrode of the first light-emitting element ED1 may be initialized with a first initialization voltage Vini1.

[0278] In a third period P3, a second light-emitting element ED2 emits light through a second viewing-angle control signal PS2, and a first light-emitting element ED1 is turned off through a first viewing-angle control signal PS1. The third period P3 may operate in a second viewing-angle mode.

[0279] The display device 100 of the present disclosure may control the brightness according to a change in viewing angle to suit the operation mode by controlling the gamma voltage VG provided to the plurality of display panels 111, 112, 113 based on the region operating in any viewing-angle mode.

[0280] Figure 22 is a view showing a case where the viewing angle is changed for some regions of a display panel operating in a normal mode in a display device according to an embodiment of the present disclosure, and Figure 23 is a view showing the operation of a gamma circuit for changing the viewing angle for some regions of a display panel operating in a normal mode in a display device according to an embodiment of the present disclosure.

[0281] Reference Figure 22 and 23 According to an embodiment of the present disclosure, the display device 100 may operate in a normal mode. In the normal mode, different images may be independently displayed on the plurality of display panels 111, 112, 113.

[0282] In the normal mode, the first source driver integrated circuit SDIC1 converts the first image data DATA1 into a first data voltage Vdata1 and provides it to the first display panel 111, thereby displaying the first image. Additionally, the second source driver integrated circuit SDIC2 converts the second image data DATA2 into a second data voltage Vdata2 and provides it to the second display panel 112, thereby displaying the second image. Additionally, the third source driver integrated circuit SDIC3 converts the third image data DATA3 into a third data voltage Vdata3 and provides it to the third display panel 113, thereby displaying the third image.

[0283] At this time, some of the plurality of display panels 111, 112, 113 may be divided into a first region operating in a first viewing angle mode and a second region operating in a second viewing angle mode.

[0284] For example, the third display panel 113 may be divided into a (3 - 1) region 113A1 and a (3 - 2) region 113A2, and the (3 - 1) region 113A1 may operate in the first viewing angle mode, and the (3 - 2) region 113A2 may operate in the second viewing angle mode.

[0285] At this time, the third source driver integrated circuit SDIC3 that provides the third data voltage Vdata3 to the third display panel 113 may use a third gamma voltage VG3 to control the brightness of the (3 - 1) region 113A1, and may use a fourth gamma voltage VG4 to control the brightness of the (3 - 2) region 113A2.

[0286] The gamma circuit 160 may provide a first gamma voltage VG1 corresponding to the first image data DATA1 to the first source driver integrated circuit SDIC1, and may provide a second gamma voltage VG2 corresponding to the second image data DATA2 to the second source driver integrated circuit SDIC2. Additionally, the gamma circuit 160 may provide a third gamma voltage VG3 and a fourth gamma voltage VG4 corresponding to the third image data DATA3 to the third source driver integrated circuit SDIC3.

[0287] For this operation, the gamma circuit 160 may include a first gamma voltage generation circuit GAMC1 to a fourth gamma voltage generation circuit GAMC4, and a first switch circuit MUX1 to a third switch circuit MUX3.

[0288] The first gamma voltage generation circuit GAMC1 can generate a first gamma voltage VG1 to be provided to the first display panel 111, and the second gamma voltage generation circuit GAMC2 can generate a second gamma voltage VG2 to be provided to the second display panel 112. Additionally, the third gamma voltage generation circuit GAMC3 can generate a third gamma voltage VG3 to be provided to the (3 - 1) region 113A1 of the third display panel 113, and the fourth gamma voltage generation circuit GAMC4 can generate a fourth gamma voltage VG4 to be provided to the (3 - 2) region 113A2 of the third display panel 113.

[0289] The first gamma voltage generation circuit GAMC1 can generate the first gamma voltage VG1 using a first reference gamma voltage RVG1. The second gamma voltage generation circuit GAMC2 can generate the second gamma voltage VG2 using a second reference gamma voltage RVG2. The third gamma voltage generation circuit GAMC3 can generate the third gamma voltage VG3 using a third reference gamma voltage RVG3, and the fourth gamma voltage generation circuit GAMC4 can generate the fourth gamma voltage VG4 using a fourth reference gamma voltage RVG4.

[0290] The first switching circuit MUX1 can select an output signal from the first gamma voltage VG1 and the second gamma voltage VG2 through a panoramic mode control signal PM, and the second switching circuit MUX2 can select an output signal from the second gamma voltage VG2 and the third gamma voltage VG3 through the panoramic mode control signal PM. Additionally, the third switching circuit MUX3 can select an output signal from the third gamma voltage VG3 and the fourth gamma voltage VG4 through a viewing angle control signal PS.

[0291] When the display device 100 operates in a normal mode or a panoramic mode, the panoramic mode control signal PM can control the operations of the first switching circuit MUX1 and the second switching circuit MUX2.

[0292] When at least one display panel operates in a first viewing angle mode and a second viewing angle mode respectively, the viewing angle control signal PS can control the operation of the third switching circuit MUX3.

[0293] For example, the display device 100 of the present disclosure can operate in a normal mode, which independently displays different images on the multiple display panels 111, 112, 113, and only the third display panel 113 can be divided into a first viewing angle mode and a second viewing angle mode. In this case, the panoramic mode control signal PM can be provided at an off level, and the viewing angle control signal PS can be provided at an on level.

[0294] Therefore, the first switching circuit MUX1 can supply the first gamma voltage VG1 to the first source driver integrated circuit SDIC1, and the second gamma voltage generation circuit GAMC2 can supply the second gamma voltage VG2 to the second source driver integrated circuit SDIC2.

[0295] In addition, the second switching circuit MUX2 can supply the third gamma voltage VG3 to the third source driver integrated circuit SDIC3, and the third switching circuit MUX3 can supply the fourth gamma voltage VG4 to the third source driver integrated circuit SDIC3.

[0296] The third source driver integrated circuit SDIC3 can supply the third gamma voltage VG3 to the (3 - 1)th region 113A1, and supply the fourth gamma voltage VG4 to the (3 - 2)th region 113A2.

[0297] That is, in the normal mode where different images are independently displayed on the multiple display panels 111, 112, 113, the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3 can respectively receive different first gamma voltage VG1 to the third gamma voltage VG3. In addition, the third source driver integrated circuit SDIC3 can supply the third gamma voltage VG3 to the (3 - 1)th region 113A1 of the third display panel 113, and can supply the fourth gamma voltage VG4 to the (3 - 2)th region 113A2 of the third display panel 113.

[0298] As a result, in the normal mode, the multiple display panels 111, 112, 113 can display images with different brightness, and the separated regions of at least one display panel (for example, the third display panel) can be driven in the first viewing angle mode and the second viewing angle mode respectively.

[0299] Here, as an example, the case where the third display panel 113 is divided into the first viewing angle mode and the second viewing angle mode has been described. In addition, the first display panel 111 or the second display panel 112 can be divided into the first viewing angle mode and the second viewing angle mode. In this case, a switching circuit and a gamma voltage generation circuit for controlling the first display panel 111 or the second display panel 112 can be added.

[0300] In addition, in the panoramic mode where continuous images are displayed on the multiple display panels 111, 112, 113 of the present disclosure, the brightness of the multiple display panels 111, 112, 113 can be uniformly controlled by supplying a common gamma voltage to the multiple display panels 111, 112, 113.

[0301] Figure 24is a view showing a situation in which the viewing angles of some display panels operating in a panoramic mode are controlled in a display device according to an embodiment of the present disclosure, and Figure 25 is a view showing an operation of a gamma circuit that controls the viewing angles of some display panels in a panoramic mode in a device according to an embodiment of the present disclosure.

[0302] Reference Figure 24 and 25 , a display device 100 according to an embodiment of the present disclosure may operate in a panoramic mode, in which a single continuous image is displayed on a plurality of display panels 111, 112, 113.

[0303] In this case, a first data voltage Vdata1 supplied from a first source driver integrated circuit SDIC1 to a first display panel 111 may correspond to a first portion of the entire image. Additionally, a second data voltage Vdata2 supplied from a second source driver integrated circuit SDIC2 to a second display panel 112 may correspond to a second portion of the entire image. Additionally, a third data voltage Vdata3 supplied from a third source driver integrated circuit SDIC3 to a third display panel 113 may correspond to a third portion of the entire image.

[0304] The entire image displayed on the plurality of display panels 111, 112, 113 may represent a single continuous image formed by connecting the first portion, the second portion, and the third portion.

[0305] At this time, the gamma circuit 160 may provide a common gamma voltage such that the plurality of display panels 111, 112, 113 display the same brightness. For example, when the common gamma voltage is a second gamma voltage VG2, the second gamma voltage VG2 may be provided as the common gamma voltage to the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3.

[0306] A first gamma voltage generation circuit GAMC1 may generate a first gamma voltage VG1 using a first reference gamma voltage RVG1. A second gamma voltage generation circuit GAMC2 may generate a second gamma voltage VG2 using a second reference gamma voltage RVG2. A third gamma voltage generation circuit GAMC3 may generate a third gamma voltage VG3 using a third reference gamma voltage RVG3. Additionally, a fourth gamma voltage generation circuit GAMC4 may generate a fourth gamma voltage VG4 using a fourth reference gamma voltage RVG4.

[0307] The switching circuit may include a first switching circuit MUX1 that selects an output signal from a first gamma voltage VG1 and a second gamma voltage VG2, a second switching circuit MUX2 that selects an output signal from the second gamma voltage VG2 and a third gamma voltage VG3, and a third switching circuit MUX3 that selects an output signal from the output signal of the second switching circuit MUX2 and a fourth gamma voltage VG4.

[0308] The first switching circuit MUX1 and the second switching circuit MUX2 may select output signals through a panoramic mode control signal PM. Additionally, the third switching circuit MUX3 may select an output signal through a viewing angle control signal PS.

[0309] When the display device 100 of the present disclosure operates in a panoramic mode of displaying consecutive images on multiple display panels 111, 112, 113, the panoramic mode control signal PM may be provided at an on level. Thus, both the first switching circuit MUX1 and the second switching circuit MUX2 may output the second gamma voltage VG2.

[0310] Additionally, the viewing angle control signal PS may be provided at an off level. Thus, the third switching circuit MUX3 may output the second gamma voltage VG2 corresponding to the output signal of the second switching circuit MUX2.

[0311] As a result, the same second gamma voltage VG2 may be provided as a common gamma voltage to the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3.

[0312] That is, in a panoramic mode of displaying one consecutive image on multiple display panels 111, 112, 113, the first source driver integrated circuit SDIC1 to the third source driver integrated circuit SDIC3 may receive a common gamma voltage. As a result, in the panoramic mode, the multiple display panels 111, 112, 113 may display images with the same brightness.

[0313] Of course, even when the display device 100 operates in the panoramic mode, the brightness of the (3-1) area 113A1 and the (3-2) area 113A2 of the third display panel 113 may be differently controlled by applying the viewing angle control signal PS at an on level.

[0314] Here, the case of selecting the second gamma voltage VG2 as the common gamma voltage has been described. However, the first gamma voltage VG1 or the third gamma voltage VG3 may also be selected as the common gamma voltage.

[0315] In this way, the display device 100 of the present disclosure can effectively control the brightness of the plurality of display panels 111, 112, 113 by supplying separate gamma voltages VG1, VG2, VG3 or a common gamma voltage to the plurality of display panels 111, 112, 113.

[0316] The foregoing embodiments will be briefly described below.

[0317] Embodiments of the present disclosure may provide a display device including: a first display panel configured to display a first image; a second display panel configured to display a second image; a third display panel configured to display a third image; a first data driving circuit configured to supply a first data voltage to the first display panel; a second data driving circuit configured to supply a second data voltage to the second display panel; a third data driving circuit configured to supply a third data voltage to the third display panel; a gamma circuit configured to supply gamma voltages to the first data driving circuit to the third data driving circuit; and a timing controller configured to supply image data to the first data driving circuit to the third data driving circuit and control the gamma circuit to change the gamma voltages supplied to the first data driving circuit to the third data driving circuit according to a driving mode.

[0318] The display device further includes a gate driving circuit configured to supply gate signals to the first display panel to the third display panel.

[0319] The first display panel is an instrument panel display panel located in the driver's seat.

[0320] The second display panel is a center instrument panel display panel located between the driver's seat and the passenger seat.

[0321] The third display panel is a passenger display panel located on the passenger seat.

[0322] The first display panel, the second display panel, and the third display panel are formed integrally.

[0323] The gamma circuit includes: a first gamma voltage generation circuit configured to generate a first gamma voltage using a first reference gamma voltage; a second gamma voltage generation circuit configured to generate a second gamma voltage using a second reference gamma voltage; a third gamma voltage generation circuit configured to generate a third gamma voltage using a third reference gamma voltage; a first switch circuit configured to provide an output signal selected from the first gamma voltage and the second gamma voltage to a first data driving circuit according to a first mode control signal; and a second switch circuit configured to provide an output signal selected from the second gamma voltage and the third gamma voltage to a third data driving circuit according to the first mode control signal.

[0324] The first mode control signal is a signal for selecting a normal mode in which a first image, a second image, and a third image are displayed as independent images or a panoramic mode in which the first image, the second image, and the third image are displayed as one continuous image.

[0325] When the first mode control signal selects the panoramic mode, the first switch circuit and the second switch circuit output the second gamma voltage.

[0326] The third display panel includes a plurality of unit sub-pixels composed of a first sub-pixel having a first emission angle and a second sub-pixel having a second emission angle.

[0327] The second emission angle is narrower than the first emission angle and is a viewing angle that can only be recognized by the occupant of the seat where the third display panel is located.

[0328] The first sub-pixel includes: a first light-emitting element; a first black matrix including an opening above the first light-emitting element; a first insulating layer formed on the first black matrix; a first gap filler formed on the first insulating layer; and a first lens having a first emission angle formed on the first gap filler.

[0329] The first lens is a semi-cylindrical lens having a rectangular bottom.

[0330] The second sub-pixel includes: a second light-emitting element; a second black matrix including an opening above the second light-emitting element; a second insulating layer formed on the second black matrix; a second gap filler formed on the second insulating layer; and a second lens having a second emission angle formed on the second gap filler.

[0331] The second lens is a hemispherical lens having a circular bottom.

[0332] The gamma circuit further includes a fourth gamma voltage generation circuit configured to generate a fourth gamma voltage using a fourth reference gamma voltage; and a third switch circuit configured to provide an output signal selected from the output signal of the second switch circuit and the fourth gamma voltage to the third data driver circuit according to a viewing angle control signal.

[0333] The gate driver circuit outputs a scan signal that controls the driving timing of the unit sub-pixels; a transmission signal that controls the transmission timing of the unit sub-pixels; a first viewing angle control signal that controls the emission period of the first sub-pixel; and a second viewing angle control signal that controls the emission period of the second sub-pixel.

[0334] The unit sub-pixel includes: a first light-emitting element; a second light-emitting element; a first transistor configured to transmit a data voltage according to a second scan signal; a second transistor configured to transmit a driving voltage according to the transmission signal; a driving transistor that connects a first node shared by the first transistor and the second transistor to a third node and receives, as a gate voltage, a voltage charged in a storage capacitor through a second node; a third transistor that connects the second node to the third node and is controlled by the second scan signal; a fourth transistor that is connected to the third node and is controlled by the transmission signal; a fifth transistor that is connected between the second node and a line providing a second initialization voltage and is controlled by a first scan signal; a sixth transistor that is connected between a fourth node of the fourth transistor and an anode electrode of the first light-emitting element and is controlled by the first viewing angle control signal; a seventh transistor that is connected between the anode electrode of the first light-emitting element and a line providing a first initialization voltage and is controlled by the second scan signal; and an eighth transistor that is connected between the fourth node of the fourth transistor and an anode electrode of the second light-emitting element and is controlled by the second viewing angle control signal.

[0335] Another embodiment of the present disclosure may provide a display device, including: a first display panel configured to display a first image; a second display panel configured to display a second image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a gamma circuit configured to provide a gamma voltage to the first data driving circuit and the second data driving circuit; and a timing controller configured to provide image data to the first data driving circuit and the second data driving circuit, and control the gamma circuit to change the gamma voltage provided to the first data driving circuit and the second data driving circuit according to a driving mode.

[0336] The display device further includes a gate driving circuit configured to provide a gate signal to the first display panel and the second display panel.

[0337] The gamma circuit includes: a first gamma voltage generating circuit configured to generate a first gamma voltage using a first reference gamma voltage; a second gamma voltage generating circuit configured to generate a second gamma voltage using a second reference gamma voltage; and a switching circuit configured to provide an output signal selected from the first gamma voltage and the second gamma voltage to the first data driving circuit according to a mode control signal.

[0338] Another embodiment of the present disclosure may provide a vehicle, including: a first display panel configured to display a first image; a second display panel configured to display a second image; a third display panel configured to display a third image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a third data driving circuit configured to provide a third data voltage to the third display panel; a gamma circuit configured to provide a gamma voltage to the first to third data driving circuits; and a timing controller configured to provide image data to the first to third data driving circuits, and control the gamma circuit to change the gamma voltage provided to the first to third data driving circuits according to a driving mode.

[0339] The vehicle further includes a gate driving circuit configured to provide a gate signal to the first to third display panels.

[0340] The foregoing description has been presented to enable any person skilled in the art to make and use the inventive concept of the present disclosure, and the foregoing description has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. The foregoing description and the accompanying drawings have provided examples of the inventive concept of the present disclosure for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the inventive concept of the present disclosure.

Claims

1. A display device, comprising: a first display panel, the first display panel being configured to display a first image; a second display panel, the second display panel being configured to display a second image; a third display panel, the third display panel being configured to display a third image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a third data driving circuit configured to provide a third data voltage to the third display panel; a gamma circuit configured to provide a gamma voltage to the first data driving circuit to the third data driving circuit; as well as A timing controller is configured to provide image data to the first to third data driving circuits and control the gamma circuit to change the gamma voltage provided to the first to third data driving circuits according to a driving mode. 2 . The display device according to claim 1 , further comprising a gate driving circuit configured to provide a gate signal to the first to third display panels.

3. The display device according to claim 1 or 2, wherein: The first display panel is an instrument panel display panel located in the driver's seat.

4. The display device according to claim 1 or 2, wherein: The second display panel is a central instrument panel display panel located between the driver's seat and the passenger seat.

5. The display device according to claim 1 or 2, wherein: The third display panel is a passenger display panel located on the passenger seat.

6. The display device according to claim 1 or 2, wherein: The first display panel, the second display panel and the third display panel are formed as one body.

7. The display device according to claim 1 or 2, wherein: The gamma circuit comprises: a first gamma voltage generating circuit configured to generate a first gamma voltage using a first reference gamma voltage; a second gamma voltage generating circuit configured to generate a second gamma voltage using a second reference gamma voltage; a third gamma voltage generating circuit configured to generate a third gamma voltage using a third reference gamma voltage; a first switch circuit configured to provide an output signal selected from the first gamma voltage and the second gamma voltage to the first data driving circuit according to a first mode control signal; and a second switch circuit configured to provide an output signal selected from the second gamma voltage and the third gamma voltage to the third data driving circuit according to the first mode control signal.

8. The display device according to claim 7, wherein: The first mode control signal is a signal for selecting the following mode: A normal mode in which the first image, the second image, and the third image are displayed as independent images; or A panoramic mode in which the first image, the second image, and the third image are displayed as one continuous image.

9. The display device according to claim 8, wherein: When the first mode control signal selects the panoramic mode, the first switch circuit and the second switch circuit output the second gamma voltage.

10. The display device according to claim 7, wherein: The third display panel includes a plurality of unit sub-pixels consisting of a first sub-pixel having a first emission angle and a second sub-pixel having a second emission angle.

11. The display device according to claim 10, wherein: The second emission angle is narrower than the first emission angle and is a viewing angle recognized only by an occupant of a seat where the third display panel is located.

12. The display device according to claim 10, wherein: The first sub-pixel comprises: a first light emitting element; a first black matrix including openings above the first light emitting element; forming a first insulating layer on the first black matrix; a first gap filler formed on the first insulating layer; as well as A first lens having a first emission angle is formed on the first gap filler.

13. The display device according to claim 12, wherein: The first lens is a semi-cylindrical lens with a rectangular base.

14. The display device according to claim 10, wherein: The second sub-pixel comprises: a second light emitting element; a second black matrix including openings above the second light emitting element; a second insulating layer formed on the second black matrix; a second gap filler formed on the second insulating layer; and A second lens having a second emission angle is formed on the second gap filler.

15. The display device according to claim 14, wherein: The second lens is a hemispherical lens with a circular bottom.

16. The display device according to claim 10, wherein: The gamma circuit further comprises: a fourth gamma voltage generating circuit configured to generate a fourth gamma voltage using a fourth reference gamma voltage; and A third switch circuit configured to provide an output signal selected from an output signal of the second switch circuit and the fourth gamma voltage to the third data driving circuit according to a viewing angle control signal.

17. The display device according to claim 10, wherein: The gate drive circuit outputs: A scanning signal, wherein the scanning signal controls the driving timing of the unit sub-pixel; an emission signal, wherein the emission signal controls the emission timing of the unit sub-pixel; a first viewing angle control signal, wherein the first viewing angle control signal controls an emission period of the first sub-pixel; as well as A second viewing angle control signal is provided, wherein the second viewing angle control signal controls an emission period of the second sub-pixel.

18. The display device according to claim 17, wherein: The unit sub-pixel comprises: a first light emitting element; a second light emitting element; a first transistor, the first transistor transmitting a data voltage according to a second scanning signal; a second transistor, the second transistor transmitting a driving voltage according to the emission signal; a driving transistor that connects a first node shared by the first transistor and the second transistor to a third node and receives a voltage charged in a storage capacitor as a gate voltage through a second node; a third transistor connecting the second node to the third node and controlled by the second scan signal; a fourth transistor connected to the third node and controlled by the emission signal; a fifth transistor connected between the second node and a line providing a second initialization voltage and controlled by a first scan signal; a sixth transistor, the sixth transistor being connected between the fourth node of the fourth transistor and the anode electrode of the first light-emitting element and being controlled by the first viewing angle control signal; a seventh transistor connected between the anode electrode of the first light emitting element and a line providing a first initialization voltage and controlled by the second scan signal; and an eighth transistor, wherein the eighth transistor is connected between the fourth node of the fourth transistor and the anode electrode of the second light emitting element and is controlled by the second viewing angle control signal.

19. A display device comprising: a first display panel, the first display panel being configured to display a first image; a second display panel, the second display panel being configured to display a second image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a gamma circuit configured to provide a gamma voltage to the first data driving circuit and the second data driving circuit; as well as A timing controller is configured to provide image data to the first data driving circuit and the second data driving circuit, and control the gamma circuit to change the gamma voltages provided to the first data driving circuit and the second data driving circuit according to a driving mode. 20 . The display device of claim 19 , further comprising a gate driving circuit configured to provide gate signals to the first display panel and the second display panel.

21. The display device according to claim 19 or 20, wherein: The gamma circuit comprises: a first gamma voltage generating circuit configured to generate a first gamma voltage using a first reference gamma voltage; a second gamma voltage generating circuit configured to generate a second gamma voltage using a second reference gamma voltage; and A switch circuit is configured to provide an output signal selected from the first gamma voltage and the second gamma voltage to the first data driving circuit according to a mode control signal.

22. A means of transport, comprising: a first display panel, the first display panel being configured to display a first image; a second display panel, the second display panel being configured to display a second image; a third display panel, the third display panel being configured to display a third image; a first data driving circuit configured to provide a first data voltage to the first display panel; a second data driving circuit configured to provide a second data voltage to the second display panel; a third data driving circuit configured to provide a third data voltage to the third display panel; a gamma circuit configured to provide a gamma voltage to the first data driving circuit to the third data driving circuit; as well as A timing controller is configured to provide image data to the first to third data driving circuits and control the gamma circuit to change the gamma voltage provided to the first to third data driving circuits according to a driving mode. 23 . The vehicle of claim 22 , further comprising a gate driving circuit configured to provide a gate signal to the first to third display panels.

Citation Information

Patent Citations

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