Low-power-consumption high-precision current frequency conversion circuit and implementation method

Abstract

The invention discloses a low-power-consumption high-precision current frequency conversion circuit and an implementation method, and particularly relates to the technical field of analog-to-digital conversion, and the low-power-consumption high-precision current frequency conversion circuit comprises an automatic gain control transimpedance amplification circuit, an integrator charge balance conversion circuit and an arm single-chip microcomputer compensation circuit. The automatic gain control transimpedance amplification circuit is connected with input current, the automatic gain control transimpedance amplification circuit is respectively connected with the integrator charge balance conversion circuit and the arm single chip microcomputer compensation circuit, the arm single chip microcomputer compensation circuit is connected with the constant current source and the FPGA logic control circuit, the constant current source is connected with the integrator charge balance conversion circuit, and the FPGA logic control circuit is connected with the FPGA logic control circuit. And the integrator charge balance conversion circuit is connected with the FPGA logic control circuit. The automatic gain control transimpedance amplification circuit is utilized to enable the actual current input into the integrator charge balance conversion circuit and the original input current to be subjected to gain adjustment control, the current actually input into the integrator circuit is reduced during large current conversion, the output current requirement for a constant current source is reduced, and the power consumption requirement of the circuit is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of analog-to-digital conversion, and more specifically, to a low-power and high-precision current-frequency conversion circuit and an implementation method thereof. Background Art

[0002] The known current / frequency conversion circuit is one of the important components of an inertial navigation system, which converts the output current of an accelerometer into a digital pulse signal proportional thereto. Due to the use of a constant-current source in the current / frequency conversion circuit, the power consumption is generally high and the heat generation is large. Generally, heat dissipation measures need to be taken, which limits its application range. In order to reduce the power consumption of the current / frequency converter, generally, the input current is first shunted and then converted; or a large and small constant-current source is used for detection and switching.

[0003] However, in actual use, these methods are either complex in operation or poor in implementation accuracy. In order to better achieve low power consumption and high precision, a low-power and high-precision current-frequency conversion circuit and an implementation method are proposed as a further improvement. Summary of the Invention

[0004] In order to overcome the above-mentioned defects of the prior art, an embodiment of the present invention provides a low-power and high-precision current-frequency conversion circuit and an implementation method thereof to solve the problems raised in the above background art.

[0005] To achieve the above object, the present invention provides the following technical solution: A low-power and high-precision current-frequency conversion circuit, the conversion circuit comprising: an automatic gain control transimpedance amplifier circuit, an integrator charge balance conversion circuit, and an arm single-chip microcomputer compensation circuit;

[0006] The automatic gain control transimpedance amplifier circuit is connected to an input current Iin, and the automatic gain control transimpedance amplifier circuit is also respectively connected to the integrator charge balance conversion circuit and the arm single-chip microcomputer compensation circuit. The arm single-chip microcomputer compensation circuit is also connected to a constant current source and an FPGA logic control circuit. The constant current source is connected to the integrator charge balance conversion circuit through a switching circuit. The integrator charge balance conversion circuit is connected to the FPGA logic control circuit;

[0007] The output end of the FPGA logic control circuit is set as the output end of the conversion circuit.

[0008] Further, the automatic gain control transimpedance amplifier circuit comprises: an automatic gain control transimpedance amplifier connected to the input current Iin;

[0009] The integrator charge balance conversion circuit comprises: an integrator;

[0010] The arm single-chip microcomputer compensation circuit comprises: an arm single-chip microcomputer;

[0011] One output terminal of the automatic gain control transimpedance amplifier is connected to the input terminal of the ARM single-chip microcomputer through a voltage follower amplifier. Another output terminal of the automatic gain control transimpedance amplifier is connected to one input terminal of the integrator. The output terminal of the ARM single-chip microcomputer is respectively connected to the input terminal of the automatic gain control transimpedance amplifier, the input terminal of the constant current source, and one input terminal of the FPGA logic control circuit. The output terminal of the constant current source is connected to the other input terminal of the integrator through a switching circuit. The output terminal of the integrator is connected to one input terminal of the FPGA logic control circuit. The other input terminal of the FPGA logic control circuit is also connected to the output terminal of the clock.

[0012] Further, the automatic gain control transimpedance amplifier circuit includes: an operational amplifier, a junction field effect transistor, a first-stage transimpedance amplifier circuit, and a second-stage current gain discharge loop;

[0013] The input terminal of the operational amplifier connected to the input current Iin is respectively connected to the drain D of the junction field effect transistor and the first-stage transimpedance amplifier circuit;

[0014] The output terminal of the operational amplifier connected to the integrator charge balance conversion circuit is connected to the first-stage transimpedance amplifier circuit,

[0015] And the output terminal of the operational amplifier is also connected to the source S of the junction field effect transistor through the second-stage current gain discharge loop,

[0016] The output terminal of the operational amplifier is also connected to the ARM single-chip microcomputer through a voltage follower amplifier. The other end of the ARM single-chip microcomputer is connected to the gate G of the junction field effect transistor.

[0017] Further, the first-stage transimpedance amplifier circuit includes: a first-stage current discharge resistor;

[0018] The output terminal of the operational amplifier is connected to the input terminal of the operational amplifier through the first-stage current discharge resistor.

[0019] Further, the second-stage current gain discharge loop includes: a second-stage current discharge resistor;

[0020] The output terminal of the operational amplifier is also connected to the source S of the junction field effect transistor through the second-stage current discharge resistor.

[0021] A method for implementing a low-power and high-precision current-frequency conversion circuit, including the described low-power and high-precision current-frequency conversion circuit, the method includes the following steps:

[0022] S1: After the input current Iin enters the transimpedance amplifier with automatic gain control in the automatic gain control transimpedance amplifier circuit, the transimpedance amplifier with automatic gain control inputs the voltage to the ARM microcontroller in the ARM microcontroller compensation circuit through a voltage follower amplifier; then S2 is performed;

[0023] S2: The ARM microcontroller realizes the gain amplification of the input current Iin; and feeds back to the transimpedance amplifier with automatic gain control; then S3 and S4 are entered;

[0024] S3: The transimpedance amplifier with automatic gain control transmits the input current Iin after gain amplification to the integrator in the integrator charge balance conversion circuit, and then S6 is performed;

[0025] S4: The ARM microcontroller compensation circuit collects the voltage of the voltage follower amplifier in the transimpedance amplifier with automatic gain control circuit, forms the corresponding compensation voltage to control the current output of the constant current source and the frequency conversion output of the FPGA logic control circuit; then S5 is performed;

[0026] S5: The ARM microcontroller controls the constant current source to output current to the integrator through the switch circuit; then S6 is entered;

[0027] S6: According to the currents input to the integrator in S3 and S5, the integrator in the integrator charge balance conversion circuit converts the current into frequency, and the frequency is output through the FPGA logic control circuit.

[0028] Further, in S2, when a small current is input, the input current Iin basically flows into the first-stage transimpedance amplifier circuit; when the current increases, the discharge voltage provided by the output of the ARM microcontroller is used to control the opening of the second-stage current gain discharge loop for current release, so that the actual current input to the integrator charge balance conversion circuit is gain-regulated with the original input current Iin, reducing the current actually input to the integrator charge balance conversion circuit during large-current conversion, reducing the output current demand for the constant current source, and reducing the power consumption demand of the corresponding circuit.

[0029] Further, in S4, the ARM microcontroller realizes the non-linear compensation of the output frequency and output current according to the corresponding compensation voltage.

[0030] Further, in S4, the ARM microcontroller compensation circuit outputs a pulse frequency conversion coefficient to control the FPGA logic control circuit to realize frequency extended output.

[0031] The technical effects and advantages of the present invention:

[0032] The present invention uses an automatic gain control transimpedance amplifier circuit to perform gain adjustment control on the actual current of the input integrator charge balance conversion circuit and the original input current, reducing the current of the actual input integrator circuit during large-current conversion, reducing the output current requirement of the constant current source, and reducing the power consumption requirement of the circuit. Additionally, the arm single-chip microcomputer compensation circuit compensates for the linear error caused by the automatic gain control, effectively ensuring the non-linearity of the circuit. After compensation, the circuit conversion accuracy can be controlled within 30 ppm, achieving a good unity of power consumption and accuracy and improving the market application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is the overall structural block diagram of the present invention.

[0034] Figure 2 It is the principle block diagram of the automatic gain control transimpedance amplifier circuit of the present invention for realizing input current gain amplification.

[0035] Figure 3 It is the relationship diagram of the input current and output current of the automatic gain control transimpedance amplifier circuit of the present invention.

[0036] Figure 4 It is the algorithm flowchart of the non-linearity compensation of the present invention.

[0037] The reference signs are:

[0038] 1. Automatic gain control transimpedance amplifier circuit; A. Operational amplifier; J1. Junction field effect transistor;

[0039] 11. Automatic gain control transimpedance amplifier;

[0040] 12. First-stage transimpedance amplifier circuit; R1. First-stage current discharge resistor;

[0041] 13. Second-stage current gain discharge loop; R2. Second-stage current discharge resistor;

[0042] 2. Integrator charge balance conversion circuit; 21. Integrator;

[0043] 3. Arm single-chip microcomputer compensation circuit; 31. Arm single-chip microcomputer;

[0044] 4. Constant current source;

[0045] 5. FPGA logic control circuit;

[0046] 6. Switching circuit;

[0047] 7. Voltage follower amplifier;

[0048] 8. Clock. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0049] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0050] As shown in the attached Figures 1-4 A low-power and high-precision current-frequency conversion circuit, the conversion circuit includes: an automatic gain control transimpedance amplifier circuit 1, an integrator charge balance conversion circuit 2, and an arm single-chip microcomputer compensation circuit 3;

[0051] The automatic gain control transimpedance amplifier circuit 1 is connected to the input current Iin, and the automatic gain control transimpedance amplifier circuit 1 is also respectively connected to the integrator charge balance conversion circuit 2 and the arm single-chip microcomputer compensation circuit 3.

[0052] The arm single-chip microcomputer compensation circuit 3 is also connected to the constant current source 4 and the FPGA logic control circuit 5. The constant current source 4 is connected to the integrator charge balance conversion circuit 2 through the switch circuit 6. The integrator charge balance conversion circuit 2 is connected to the FPGA logic control circuit 5;

[0053] The output end of the FPGA logic control circuit 5 is set as the output end of the conversion circuit.

[0054] In a preferred embodiment, as shown in the attached Figures 1-4 The automatic gain control transimpedance amplifier circuit 1 includes: an automatic gain control transimpedance amplifier 11 connected to the input current Iin;

[0055] The integrator charge balance conversion circuit 2 includes: an integrator 21;

[0056] The arm single-chip microcomputer compensation circuit 3 includes: an arm single-chip microcomputer 31;

[0057] One output end of the automatic gain control transimpedance amplifier 11 is connected to the input end of the arm single-chip microcomputer 31 through a voltage follower amplifier 7.

[0058] The other output end of the automatic gain control transimpedance amplifier 11 is connected to one input end of the integrator 21. The output end of the arm single-chip microcomputer 31 is respectively connected to the input end of the automatic gain control transimpedance amplifier 11, the input end of the constant current source 4, and one input end of the FPGA logic control circuit 5;

[0059] Among them, the automatic gain control transimpedance amplifier 11 of the automatic gain control transimpedance amplifier circuit 1 amplifies the input current Iin and inputs it into the integrator charge balance conversion circuit 2, which is converted into a frequency output; that is, the automatic gain control transimpedance amplifier circuit 1 realizes the gain amplification of the input current through the output of the arm single-chip microcomputer 31 to provide a discharge voltage and a discharge loop, and then inputs it into the integrator 21 to be converted into a frequency output.

[0060] The output terminal of the constant current source 4 is connected to the other input terminal of the integrator 21 through the switch circuit 6. The output terminal of the integrator 21 is connected to one input terminal of the FPGA logic control circuit 5. The other input terminal of the FPGA logic control circuit 5 is also connected to the output terminal of the clock 8.

[0061] Among them, the arm single-chip microcomputer compensation circuit 3 collects the voltage of the voltage follower amplifier 7 to form a corresponding compensation voltage to adjust the current output of the constant current source 4, realizes the non-linear compensation of the output frequency and the output current, and at the same time outputs a pulse frequency conversion coefficient to control the FPGA logic control circuit 5 to realize frequency expansion output.

[0062] Among them, through gain amplification control, the current actually input to the integrator 21 during large current conversion is effectively reduced, thereby reducing the power consumption of the constant current source 4 and the overall power consumption requirement of the circuit; the arm single-chip microcomputer compensation circuit 3 uses the arm single-chip microcomputer 31 to connect the voltage follower amplifier 7 and the constant current source 4, and controls the current output of the constant current source 4 and the overall frequency of the FPGA logic control circuit 5 by collecting the voltage value of the voltage follower amplifier 7, realizing the non-linear compensation of the output frequency and the output current.

[0063] In a preferred embodiment, as shown in the appendix Figures 1-4 The automatic gain control transimpedance amplifier circuit 1 includes: an operational amplifier A, a junction field effect transistor J1, a first-stage transimpedance amplifier circuit 12, and a second-stage current gain bleeding loop 13;

[0064] The input terminal of the operational amplifier A connected to the input current Iin is respectively connected to the drain D of the junction field effect transistor J1 and the first-stage transimpedance amplifier circuit 12;

[0065] The output terminal of the operational amplifier A connected to the integrator charge balance conversion circuit 2 is connected to the first-stage transimpedance amplifier circuit 12,

[0066] And the output terminal of the operational amplifier A is also connected to the source S of the junction field effect transistor J1 through the second-stage current gain bleeding loop 13,

[0067] The output terminal of the operational amplifier A is also connected to the arm single-chip microcomputer 31 through the voltage follower amplifier 7. The other end of the arm single-chip microcomputer 31 is connected to the gate G of the junction field effect transistor J1.

[0068] Among them, the arm single-chip microcomputer 31 provides a threshold voltage to control the turn-on and turn-off of the junction field effect transistor J1:

[0069] When a small current is input, the input current Iin only flows into the first-stage transimpedance amplifier circuit 12, making the second-stage current gain bleeding loop 13 ineffective;

[0070] When the current increases, the ARM single-chip microcomputer 31 controls the junction field-effect transistor J1 to gradually open the secondary current gain discharge circuit 13 to release a certain proportion of current, so that the actual current of the input integrator 21 decreases proportionally. The larger the current, the larger the reduction coefficient.

[0071] As Figure 3 shown in the figure, it is the relationship diagram of the input current and output current of the automatic gain control transimpedance amplifier circuit 1 of the present invention. When the input current > the threshold of Ii_T, the secondary current gain discharge circuit 13 is opened, and the ratio of the output current to the input current gradually decreases, achieving the purpose of shunting at large currents.

[0072] Among them, the ARM single-chip microcomputer 31 can adopt the ADUC7026 series single-chip microcomputer with multiple AD sampling channels; the ARM single-chip microcomputer 31 collects the voltage of the voltage follower amplifier 7 to control the FPGA logic control circuit 5 to provide the corresponding modulation square wave to change the FPGA frequency output.

[0073] In a preferred embodiment, as shown in the appendix Figures 1-4 shown, the first-stage transimpedance amplifier circuit 12 includes: a first-stage current discharge resistor R1;

[0074] The output end of the operational amplifier A is connected to the input end of the operational amplifier A through the first-stage current discharge resistor R1.

[0075] In a preferred embodiment, as shown in the appendix Figures 1-4 shown, the secondary current gain discharge circuit 13 includes: a secondary current discharge resistor R2;

[0076] The output end of the operational amplifier A is also connected to the source S of the junction field-effect transistor J1 through the secondary current discharge resistor R2.

[0077] As shown in the appendix Figures 1-4 shown, a method for realizing a low-power and high-precision current-frequency conversion circuit, including a low-power and high-precision current-frequency conversion circuit, the method includes the following steps:

[0078] S1: After the input current Iin enters the automatic gain control transimpedance amplifier 11 of the automatic gain control transimpedance amplifier circuit 1, the automatic gain control transimpedance amplifier 11 inputs the voltage to the ARM single-chip microcomputer 31 of the ARM single-chip microcomputer compensation circuit 3 through the voltage follower amplifier 7; then S2 is carried out;

[0079] S2: The ARM single-chip microcomputer 31 realizes the gain amplification of the input current Iin; and feeds back the automatic gain control transimpedance amplifier 11; then enters S3 and S4;

[0080] S3: The automatic gain control transimpedance amplifier 11 transmits the gain-amplified input current Iin to the integrator 21 of the integrator charge balance conversion circuit 2, and then S6 is carried out;

[0081] S4: The arm single-chip microcomputer compensation circuit 3 collects the voltage of the voltage follower amplifier 7 in the automatic gain control transimpedance amplifier circuit 1 to form a corresponding compensation voltage to control the current output of the constant current source 4 and the frequency conversion output of the FPGA logic control circuit 5; then S5 is performed.

[0082] S5: The arm single-chip microcomputer 31 controls the constant current source 4 to output current to the integrator 21 through the switch circuit 6; then it enters S6.

[0083] S6: According to the inputs of S3 and S5, the current of the integrator 21 in the integrator charge balance conversion circuit 2 is converted into frequency, and the frequency output is performed through the FPGA logic control circuit 5.

[0084] In a preferred embodiment, as shown in the appendix Figures 1-4 In S2, when a small current is input, the input current Iin basically flows into the first-stage transimpedance amplifier circuit 12 for amplification.

[0085] When the current increases, the discharge voltage provided by the output of the arm single-chip microcomputer 31 is used to control the opening of the second-stage current gain discharge loop 13 for current release, so that the actual current input to the integrator charge balance conversion circuit 2 is gain-adjusted and controlled with the original input current Iin, reducing the current actually input to the integrator charge balance conversion circuit 2 during large-current conversion, reducing the output current demand for the constant current source 4, and reducing the power consumption demand of the corresponding circuit.

[0086] In a preferred embodiment, as shown in the appendix Figures 1-4 In S4, the arm single-chip microcomputer 31 realizes the non-linear compensation of the output frequency and output current according to the corresponding compensation voltage; so that this non-linear compensation circuit makes up for the linear error brought by the automatic gain control and effectively guarantees the non-linearity of the circuit.

[0087] Among them, as Figure 4 shown, the algorithm flow chart of the non-linear compensation of the present invention is as follows: First, the register initialization configuration is performed, and then the quantization relationship table of the voltage of the voltage follower amplifier 7 and the control voltage of the constant current source 4 is stored. This quantization relationship table is obtained through multiple compensation corrections by testing the linearity of the product.

[0088] Then, according to the voltage of the voltage follower amplifier 7 collected, the quantization relationship table is searched to output the control voltage of the constant current source 4 to change the output size of the constant current source 4.

[0089] Subsequently, according to the voltage of the voltage follower amplifier 7 collected, a modulation square wave with a corresponding frequency is generated and output to the FPGA to change the FPGA frequency output, realizing non-linear compensation.

[0090] In a preferred embodiment, as shown in the appendix Figures 1-4As shown, in S4, the arm single-chip microcomputer compensation circuit 3 outputs a pulse frequency conversion coefficient to control the FPGA logic control circuit 5 to achieve frequency expansion output.

[0091] Working principle of the present invention: The present invention uses an automatic gain control transimpedance amplifier circuit 1 to perform gain adjustment control on the actual current of the input integrator charge balance conversion circuit 2 and the original input current, reducing the current of the actual input integrator charge balance conversion circuit 2 during large current conversion, reducing the output current demand for the constant current source 4, and reducing the power consumption demand of the circuit; the overall power consumption is less than 1W, reduced to 1 / 4 of the original circuit. In addition, the arm single-chip microcomputer compensation circuit 3 compensates for the linear error caused by automatic gain control, effectively ensuring the non-linearity of the circuit. After compensation, the circuit conversion accuracy can be controlled within 30ppm, achieving a good unity of power consumption and accuracy, and improving the market application prospect.

[0092] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device.

[0093] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A low power consumption and high precision current-frequency conversion circuit, characterized in that: The conversion circuit comprises: an automatic gain control transimpedance amplifier circuit (1), an integrator charge balance conversion circuit (2) and an ARM single chip microcomputer compensation circuit (3); The automatic gain control transimpedance amplifier circuit (1) is connected to the input current Iin, and the automatic gain control transimpedance amplifier circuit (1) is also connected to the integrator charge balance conversion circuit (2) and the ARM single-chip microcomputer compensation circuit (3) respectively, and the ARM single-chip microcomputer compensation circuit (3) is also connected to the constant current source (4) and the FPGA logic control circuit (5), and the constant current source (4) is connected to the integrator charge balance conversion circuit (2) through the switch circuit (6), and the integrator charge balance conversion circuit (2) is connected to the FPGA logic control circuit (5); The output end of the FPGA logic control circuit (5) is arranged as the output end of the conversion circuit.

2. The low power consumption and high precision current-frequency conversion circuit according to claim 1, characterized in that: The automatic gain control transimpedance amplifier circuit (1) comprises: an automatic gain control transimpedance amplifier (11) connected to the input current Iin; The integrator charge balance conversion circuit (2) comprises: an integrator (21); The ARM single-chip microcomputer compensation circuit (3) comprises: an ARM single-chip microcomputer (31); An output end of the automatic gain control transimpedance amplifier (11) is connected to an input end of an ARM single-chip computer (31) via a voltage follower amplifier (7); another output end of the automatic gain control transimpedance amplifier (11) is connected to an input end of an integrator (21); an output end of the ARM single-chip computer (31) is respectively connected to an input end of the automatic gain control transimpedance amplifier (11), an input end of a constant current source (4), and an input end of an FPGA logic control circuit (5); an output end of the constant current source (4) is connected to another input end of the integrator (21) via a switch circuit (6); an output end of the integrator (21) is connected to an input end of the FPGA logic control circuit (5); and another input end of the FPGA logic control circuit (5) is also connected to an output end of a clock (8).

3. The low power consumption and high precision current-frequency conversion circuit according to claim 2, characterized in that: The automatic gain control transimpedance amplifier circuit (1) comprises: an operational amplifier (A), a junction field transistor (J1), a first-stage transimpedance amplifier circuit (12) and a second-stage current gain discharge loop (13); The input end of the operational amplifier (A) connected to the input current Iin is respectively connected to the drain D of the junction field transistor (J1) and a first-stage transimpedance amplifier circuit (12); The output end of the operational amplifier (A) connected to the integrator charge balance conversion circuit (2) is connected to a first-stage transimpedance amplifier circuit (12). The output end of the operational amplifier (A) is also connected to the source S of the junction field transistor (J1) through a secondary current gain discharge loop (13). The output end of the operational amplifier (A) is also connected to an ARM single-chip microcomputer (31) via a voltage follower amplifier (7), and the other end of the ARM single-chip microcomputer (31) is connected to a gate G of a junction field transistor (J1).

4. The low power consumption and high precision current-frequency conversion circuit according to claim 3, characterized in that: The first-level transimpedance amplifier circuit (12) comprises: a first-level current discharge resistor (R1); The output end of the operational amplifier (A) is connected to the input end of the operational amplifier (A) via a primary current discharge resistor (R1).

5. The low power consumption and high precision current-frequency conversion circuit according to claim 3, characterized in that: The secondary current gain discharge loop (13) comprises: a secondary current discharge resistor (R2); The output end of the operational amplifier (A) is also connected to the source S of the junction field transistor (J1) through a secondary current discharge resistor (R2).

6. A method for implementing a low-power and high-precision current-frequency conversion circuit, comprising a low-power and high-precision current-frequency conversion circuit as claimed in any one of claims 1 to 5, characterized in that: The method comprises the following steps: S1: After the input current Iin is input into the automatic gain control transimpedance amplifier (11) of the automatic gain control transimpedance amplifier circuit (1), the automatic gain control transimpedance amplifier (11) inputs a voltage to the arm single chip microcomputer (31) of the arm single chip microcomputer compensation circuit (3) through the voltage follower amplifier (7); then S2 is performed; S2: ARM single chip microcomputer (31) realizes input current Iin gain amplification; and feeds back automatic gain control transimpedance amplifier (11); then enters S3 and S4; S3: the automatic gain control transimpedance amplifier (11) transmits the gain-amplified input current Iin to the integrator (21) of the integrator charge balance conversion circuit (2), and then proceeds to S6; S4: the ARM single chip microcomputer compensation circuit (3) collects the voltage of the voltage follower amplifier (7) in the automatic gain control transimpedance amplifier circuit (1), forms a corresponding compensation voltage to control the current output of the constant current source (4) and the frequency conversion output with the FPGA logic control circuit (5); then proceeds to S5; S5: the ARM single chip microcomputer (31) controls the constant current source (4) to output current to the integrator (21) through the switch circuit (6); then enters S6; S6: According to S3 and S5, the current of the integrator (21) input into the integrator charge balance conversion circuit (2) is converted into a frequency, and the frequency is output through the FPGA logic control circuit (5).

7. The method for implementing a low power consumption and high precision current-frequency conversion circuit according to claim 6, characterized in that: In the S2, when a small current is input, the input current Iin basically flows into the first-stage transimpedance amplifier circuit (12); when the current increases, the discharge voltage provided by the output of the ARM single-chip computer (31) is controlled to open the second-stage current gain discharge loop (13) to release the current, so that the actual current of the input integrator charge balance conversion circuit (2) and the original input current Iin are gain-adjusted and controlled, thereby reducing the current of the actual input integrator charge balance conversion circuit (2) during large current conversion, reducing the output current demand of the constant current source (4), and reducing the power consumption demand of the corresponding circuit.

8. The method for implementing a low power consumption and high precision current-frequency conversion circuit according to claim 6, characterized in that: In S4, the ARM single chip microcomputer (31) realizes nonlinear compensation of output frequency and output current according to the corresponding compensation voltage.

9. The method for implementing a low power consumption and high precision current-frequency conversion circuit according to claim 6, characterized in that: In S4, the ARM single chip microcomputer compensation circuit (3) outputs a pulse frequency conversion coefficient to control the FPGA logic control circuit (5) to achieve frequency expansion output.

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