Display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel and electronic equipment, and relates to the technical field of display. In the display panel, an isolation structure forms a first isolation opening and a second isolation opening in a first display area, a sub-pixel device with a light blocking effect is only arranged in the second isolation opening, and no sub-pixel device with poor light transmittance is arranged in the first isolation opening; the first isolation opening has higher light transmittance, so that the light transmittance of the first display area can be improved. Besides, the array substrate is provided with a conductive shielding structure in the area where the first isolation opening is located, electric signal interference of wires in the array substrate and wires in the touch function layer in the area where the first isolation opening is located can be shielded, the display panel has a good display function and a good touch function, and the use experience of a user is improved.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and more particularly, to a display panel and an electronic device. Background Art

[0002] With the development of technologies, the industry often disposes some optical sensors (such as fingerprint recognition sensors, infrared ranging sensors, and ambient light sensing sensors, etc.) under a display panel to increase the functions of an electronic device and improve the attractiveness of the electronic device to users.

[0003] To ensure the normal operation of an optical sensor, a certain light transmittance is required for the display panel area corresponding to the optical sensor. Therefore, it is necessary to adjust the film layer structure of this display panel area. However, after the film layer adjustment, there are problems of poor display function and / or touch function of the display panel, reducing the user experience. Summary of the Invention

[0004] To overcome the technical problems mentioned in the above technical background, the present application provides a display panel and an electronic device.

[0005] In a first aspect of the present application, a display panel is provided. The display panel includes a first display area and at least a part of a second display area surrounding the first display area;

[0006] The display panel includes:

[0007] An array substrate;

[0008] An isolation structure, which is located on one side of the array substrate and includes a first isolation opening and a second isolation opening. Among them, the first isolation opening is located in the first display area, and the second isolation opening is located in the first display area and the second display area;

[0009] Sub-pixel devices, which are located in the second isolation opening;

[0010] A touch function layer, which is located on the side of the sub-pixel devices away from the array substrate;

[0011] In a direction perpendicular to the plane where the array substrate is located, a conductive shielding structure is further provided in the area of the array substrate where the first isolation opening is located.

[0012] In a possible implementation manner of the present application, in a direction perpendicular to the plane where the array substrate is located, a through hole penetrating the array substrate is further provided in the area of the array substrate where the first isolation opening is located, and the conductive shielding structure is disposed around the through hole;

[0013] Preferably, the conductive shielding structure protrudes away from the array substrate relative to the array substrate;

[0014] Preferably, in the first display area, the first isolation opening and the second isolation opening are evenly distributed;

[0015] Preferably, in the first display area, the ratio of the number of the first isolation openings to the number of the second isolation openings ranges from greater than or equal to 1:2 to less than or equal to 2:1;

[0016] Preferably, the array substrate further includes driving traces, and the touch function layer includes touch traces. In the first display area, the orthographic projection of the driving traces and / or the touch traces on the array substrate does not overlap with the orthographic projection of the first isolation opening on the array substrate;

[0017] Preferably, the array substrate further includes a grounding trace, and the grounding trace is located on a side of the driving trace away from the touch function layer;

[0018] Preferably, the driving trace is insulated from the conductive shielding structure;

[0019] Preferably, the isolation structure includes a stacked isolation portion and a blocking portion, and the orthographic projection of the isolation portion on the array substrate is located within the orthographic projection of the blocking portion on the array substrate;

[0020] Preferably, the isolation structure further includes an isolation substrate, and the isolation substrate, the isolation portion, and the blocking portion are stacked in sequence. The orthographic projection of the isolation portion on the array substrate is located within the orthographic projection of the isolation substrate on the array substrate, and the orthographic projection of the isolation substrate on the array substrate is located within the orthographic projection of the blocking portion on the array substrate;

[0021] In a direction towards the corresponding first isolation opening or the second isolation opening, the isolation substrate and the blocking portion respectively protrude relative to the isolation portion;

[0022] Preferably, the isolation substrate is a conductive isolation substrate, the isolation portion is a conductive isolation portion, and the blocking portion is a conductive blocking portion;

[0023] Preferably, the conductive shielding structure is connected to the grounding trace;

[0024] Preferably, the conductive shielding structure is insulated from the isolation structure forming the first isolation opening.

[0025] In a possible implementation manner of the present application, the display panel further includes a packaging layer, and the packaging layer includes a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer;

[0026] The first inorganic encapsulation layer is located on a side of the sub-pixel device facing away from the array substrate, and extends to a side of the isolation structure forming the second isolation opening and facing away from the array substrate;

[0027] The organic encapsulation layer at least covers the first inorganic encapsulation layer, and a positive projection of the organic encapsulation layer on the array substrate does not overlap with a positive projection of the first isolation opening on the array substrate;

[0028] The second inorganic encapsulation layer is located on a side of the organic encapsulation layer facing away from the array substrate;

[0029] The touch function layer is located on a side of the second inorganic encapsulation layer facing away from the array substrate;

[0030] Preferably, the first inorganic encapsulation layer and the second inorganic encapsulation layer are also stacked in a region outside the through hole in the first isolation opening.

[0031] In a possible implementation manner of the present application, the display panel further includes a barrier wall, and the barrier wall is located on a side of the isolation structure forming the first isolation opening and facing away from the array substrate;

[0032] Preferably, a barrier groove is provided on a side of the barrier wall facing away from the array substrate;

[0033] Preferably, the barrier wall surrounds the through hole, and a positive projection of the barrier wall on the array substrate is located within a positive projection of the isolation structure forming the first isolation opening on the array substrate;

[0034] Preferably, an included angle range between a side wall and a bottom wall of the barrier groove is 20 degrees to 90 degrees;

[0035] Preferably, in a direction perpendicular to the array substrate, a height range of the isolation structure is greater than or equal to 0.6 um and less than or equal to 0.9 um; a height range of the barrier wall is greater than or equal to 1 um and less than or equal to 2 um; a groove depth range of the barrier groove is greater than or equal to 0.5 um and less than or equal to 0.8 um.

[0036] In a possible implementation manner of the present application, a side of the conductive shielding structure facing away from the array substrate is flush with a side of the isolation structure facing away from the array substrate;

[0037] Preferably, a material of a first end of the conductive shielding structure facing away from the array substrate is the same as a material of the blocking portion, a material of a second end of the conductive shielding structure connected to the ground trace is the same as a material of the isolation substrate, and a portion of the conductive shielding structure located between the first end and the second end is the same as a material of the isolation portion;

[0038] Preferably, the conductive shielding structure is located between the isolation structure forming the first isolation opening and the through hole.

[0039] In a possible implementation manner of the present application, the array substrate includes a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer that are sequentially stacked and insulated from each other. The driving trace is formed by the third metal layer and / or the fourth metal layer, and the grounding trace is formed by the first metal layer or the second metal layer.

[0040] In a possible implementation manner of the present application, the display panel further includes a pixel defining layer. The pixel defining layer is located on one side of the array substrate, and the isolation structure is located on the side of the pixel defining layer away from the array substrate;

[0041] The pixel defining layer includes a pixel opening. Among them, the pixel opening communicates with the second isolation opening, and the sub-pixel device is disposed in the pixel opening;

[0042] The sub-pixel device includes an anode, a light-emitting material layer, and a cathode that are stacked;

[0043] Preferably, the light-emitting material layer extends from the pixel opening to the side of the pixel defining layer away from the array substrate, and the cathode extends from the pixel opening to the side of the pixel defining layer away from the array substrate and overlaps with the isolation substrate around the second isolation opening.

[0044] In a possible implementation manner of the present application, the touch function layer includes a touch pattern formed by the touch traces;

[0045] In the first display area, the touch function layer further includes a shielding layer, and the shielding layer is located on the side of the touch pattern facing the array substrate;

[0046] In the first display area, the orthographic projection of the touch pattern on the array substrate is located within the orthographic projection of the shielding layer on the array substrate;

[0047] Preferably, the distance range between the contour edge of the orthographic projection of the shielding layer on the array substrate and the contour edge of the orthographic projection of the touch pattern on the array substrate is greater than or equal to 0.5um and less than or equal to 1um.

[0048] In a possible implementation manner of the present application, the shielding layer includes a metal layer and an insulating layer. The insulating layer is located on the side of the touch pattern facing the array substrate, and the metal layer is located on the side of the insulating layer facing the array substrate;

[0049] The orthographic projection of the insulating layer on the array substrate coincides with the orthographic projection of the metal layer on the array substrate.

[0050] In a second aspect of the present application, there is provided an electronic device, which includes an optical sensor and a display panel in any one of the possible implementation manners in the first aspect;

[0051] The optical sensor is located on the backlight side of the display panel and at a position corresponding to the first display area.

[0052] The embodiments of the present application provide a display panel and an electronic device. In the display panel, an isolation structure forms a first isolation opening and a second isolation opening in the first display area. Sub-pixel devices that block light are only arranged in the second isolation opening, and sub-pixel devices with poor light transmittance are not arranged in the first isolation opening. Compared with the second isolation opening, the first isolation opening has stronger light transmittance, so that the light transmittance of the first display area can be improved. In addition, a conductive shielding structure is arranged in the area where the first isolation opening is located on the array substrate, which can shield the electrical signal interference of the traces in the array substrate and the traces in the touch control functional layer at the position area of the first isolation opening, so that the display panel has good display and touch control functions and improves the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained according to these drawings without creative efforts.

[0054] Figure 1 Schematically shows the regional distribution of the display panel provided in this embodiment;

[0055] Figure 2 Schematically shows Figure 1 One of the partial film layer structure diagrams of the first display area in

[0056] Figure 3 Schematically shows the distribution of the isolation structure provided in this embodiment in the first display area and the second display area;

[0057] Figure 4 Schematically shows Figure 1 Another partial film layer structure diagram of the first display area in

[0058] Figure 5 Schematically shows Figure 1 Another partial film layer structure diagram of the first display area in

[0059] Figure 6 Illustrates Figure 1 The fourth partial film layer structure diagram of the first display area in

[0060] Figure 7 Illustrates Figure 1 The fifth partial film layer structure diagram of the first display area in

[0061] Figure 8 Illustrates the structure diagram of the isolation structure and the barrier wall provided in this embodiment;

[0062] Figure 9 Illustrates Figure 1 The sixth partial film layer structure diagram of the first display area in

[0063] Figure 10 Illustrates the positional relationship among the through hole, the conductive shielding structure and the isolation structure in this embodiment;

[0064] Figure 11 Illustrates Figure 1 The seventh partial film layer structure diagram of the first display area in

[0065] Figure 12 Illustrates the top view schematic diagram of the touch pattern and the shielding layer provided in this embodiment;

[0066] Figure 13 Illustrates Figure 1 The eighth partial film layer structure diagram of the first display area in

[0067] Figure 14 Is Figure 13 The partial enlarged schematic diagram of the dotted line area in

[0068] Figure 15 Illustrates the partial structure schematic diagram of the electronic device provided in this embodiment.

[0069] Icon: 1 - Electronic device; 10 - Display panel; 10A - Second display area; 10B - First display area; 101 - Through - hole; 102 - Conductive shielding structure; 1021 - First end; 1022 - Second end; 110 - Array substrate; 1101 - Driving trace; 1102 - Grounding trace; 120 - Isolation structure; 12011 - First isolation opening; 12012 - Second isolation opening; 1202 - Isolation substrate; 1203 - Isolation part; 1204 - Blocking part; 130 - Sub - pixel device; 1301 - Anode; 1302 - Light - emitting material layer; 1303 - Cathode; 140 - Touch - control function layer; 141 - Touch - control pattern; 1401 - Touch - control trace; 1402 - Shielding layer; 14021 - Metal layer; 14022 - Insulating layer; 160 - Encapsulation layer; 1601 - First inorganic encapsulation layer; 1602 - Organic encapsulation layer; 1603 - Second inorganic encapsulation layer; 170 - Barrier wall; 1701 - Barrier groove; 180 - Pixel definition layer; 1801 - Pixel opening; 20 - Optical sensor. Detailed implementation manners

[0070] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0071] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "upper" and "lower" is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this application is usually placed during use. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0072] The inventor has discovered through long - term research that in some display panels, in order to reduce the difficulty of the evaporation process of the light - emitting material, an isolation structure is provided on the pixel definition layer between the pixel openings. When the light - emitting material layer and the cathode layer are evaporated in a whole layer, the light - emitting material layer and the cathode layer between adjacent pixel openings can be disconnected at the position of the isolation structure. Through multiple evaporation and multiple etching processes, the corresponding sub - pixel device film layers can be formed in the pixel openings corresponding to different - color sub - pixel devices.

[0073] When an optical sensor is provided below such a display panel, in order to ensure that a certain light transmittance is achieved in the target display panel area corresponding to the optical sensor, through - holes can be provided in the target display panel area to increase the light transmittance of the target display panel area.

[0074] However, after the through holes are formed in the target display panel area, it is found that the display function and / or touch function of the display panel will be affected to a certain extent. For example, the touch accuracy of the target panel area decreases, and the display uniformity of the display panel is affected, etc.

[0075] To solve the above problems, the inventor has innovatively designed the following technical solutions. The specific implementation solutions of this application will be described in detail below with reference to the accompanying drawings. It should be noted that the defects existing in the above prior art solutions are all the results obtained by the inventor through practice and careful research. Therefore, the discovery process of the above technical problems and the solutions proposed by this embodiment below for the above problems should be the contributions made by the inventor to this application during the invention creation process, and should not be understood as the technical content known to those skilled in the art.

[0076] Please refer to Figure 1 、 Figure 2 and Figure 3 , Figure 1 for the distribution schematic diagrams of the regions of the display panel provided in this embodiment, Figure 2 illustrate Figure 1 a partial film layer structure schematic diagram of the first display area in Figure 3 and illustrate the distribution schematic diagrams of the isolation structure in the first display area and the second display area. In this embodiment, the display panel 10 includes a first display area 10B and a second display area 10A. The second display area 10A at least partially surrounds the first display area 10B. The light transmittance of the first display area 10B is greater than that of the second display area 10A. The shape of the first display area 10B may include a circle, a rectangle, a water droplet shape, etc. In this embodiment, the shape of the first display area 10B is not specifically limited.

[0077] The display panel 10 includes an array substrate 110, an isolation structure 120, sub-pixel devices 130, and a touch function layer 140. The isolation structure 120 is located on one side of the array substrate 110. The isolation structure 120 forms a first isolation opening 12011 and a second isolation opening 12012 on the array substrate 11. The first isolation opening 12011 is located in the first display area 10B, and the second isolation opening 12012 is located in the first display area 10B and the second display area 10A. That is, the first isolation opening 12011 and the second isolation opening 12012 are distributed in the first display area 10B, and the second isolation opening 12012 is distributed in the second display area 10A.

[0078] The sub-pixel device 130 is located within the second isolation opening 12012. Specifically, the cathode of the sub-pixel device 130 is electrically connected to the isolation structure 120 that forms the second isolation opening 12012. In the second display area 10A, the cathode of the sub-pixel device 130 is electrically connected to the isolation structure 120 to form a conductive layer covering the entire second display area 10A, so that the cathodes of different sub-pixel devices 130 have the same potential. At least one sub-pixel device 130 can be disposed within the second isolation opening 12012. The pixel driving circuit in the array substrate 110 is connected to the sub-pixel device 130 to drive the sub-pixel device 130 to emit light. Preferably, one sub-pixel device 130 is disposed within one second isolation opening 12012.

[0079] The touch function layer 140 is located on the side of the sub-pixel device 130 away from the array substrate 110.

[0080] In this embodiment, in the direction perpendicular to the plane of the array substrate 110, the array substrate 110 is provided with a conductive shielding structure 102 in the position area where the first isolation opening 12011 is located. Since no sub-pixel device 130 is disposed within the first isolation opening 12011, there is no conductive layer in the position area of the first isolation opening 12011 that can shield the electrical signal interference between the traces in the array substrate 110 and the traces in the touch function layer 140. By providing the conductive shielding structure 102 distributed in the direction perpendicular to the array substrate 110, the electrical signal interference between the traces in the array substrate 110 and the traces in the touch function layer 140 can be shielded.

[0081] In the above structure, the isolation structure 120 forms the first isolation opening 12011 and the second isolation opening 12012 in the first display area 10B. The sub-pixel device 130 that blocks light is only disposed within the second isolation opening 12012, and no sub-pixel device 130 with poor light transmittance is disposed within the first isolation opening 12011. Compared with the second isolation opening 12012, the first isolation opening 12011 has a stronger light transmittance, so that the light transmittance of the first display area 10B can be improved. In addition, the array substrate 110 is provided with a conductive shielding structure 102 in the position area where the first isolation opening 12011 is located, which can shield the electrical signal interference of the traces in the array substrate 110 and the traces in the touch function layer 140 in the position area of the first isolation opening 12011, so that the display panel 10 has good display and touch functions.

[0082] Please refer to Figure 4 , in this embodiment, in order to further improve the light transmittance of the display panel 10, a through hole 101 penetrating the array substrate 110 in the direction perpendicular to the plane of the array substrate 110 can be opened on the array substrate 110 corresponding to the position area where the first isolation opening 12011 is located, and the conductive shielding structure 102 is disposed around the through hole 101.

[0083] Further, please refer to Figure 4 again. The conductive shielding structure 102 can protrude away from the array substrate 110 relative to the array substrate 110. Specifically, the conductive shielding structure 102 can protrude towards the touch control function layer 140 relative to the array substrate 110. In this way, the area of the conductive shielding structure 102 at the corresponding position of the through hole 101 can be increased, and the signal shielding effect can be improved.

[0084] Further, in order to make the light transmission of the first display area 10B uniform, please refer to Figure 3 again. In the first display area 10B, the first isolation openings 12011 and the second isolation openings 12012 are evenly distributed. In this embodiment, in the first display area 10B, the number ratio range of the first isolation openings 12011 to the second isolation openings 12012 is greater than or equal to 1:2 and less than or equal to 2:1. Exemplarily, the number ratio of the first isolation openings 12011 to the second isolation openings 12012 includes 1:2, 3:5, 2:3, 1:1, 3:2, 5:3, and 2:1. In order to balance the light transmission and display functions of the first display area 10B, preferably, the number ratio of the first isolation openings 12011 to the second isolation openings 12012 is 1:1.

[0085] Further, in this embodiment, the conductive shielding structure 102 is connected to the ground trace 1102 in the array substrate 110 to form a signal shielding structure, which can shield the signal interference between the traces in the array substrate 110 and the traces in the touch control function layer at the through hole 101. In addition, the conductive shielding structure 102 is insulated from the isolation structure 120 forming the first isolation opening 12011, which can avoid the negative charge at the position of the through hole 101, reduce the risk of electrostatic discharge, and ensure the functional stability of the display panel 10.

[0086] Further, in order to increase the light transmittance of the first display area 10B, it is necessary to increase the light transmittance of the area where the first isolation opening 12011 is located. For this purpose, there is no trace with poor light transmittance passing through the area where the first isolation opening 12011 is located. Specifically, please refer to Figure 2, in this embodiment, the array substrate 110 includes driving traces 1101 that provide display driving signals for the pixel driving circuit. The driving traces 1101 can be formed by different metal layers in the array substrate 110. The touch function layer 140 includes touch traces 1401 for forming touch patterns. In the first display area 10B, the orthographic projection of the driving traces 1101 and / or the touch traces 1401 on the array substrate 110 does not overlap with the orthographic projection of the first isolation opening 12011 on the array substrate 110. With such a design, the light transmittance of the area where the first isolation opening 12011 is located can be improved, and thus the light transmittance of the first display area 10B is increased.

[0087] To ensure that signal crosstalk does not occur between the driving traces 1101 and the touch traces 1401, when the conductive shielding structure 102 is connected to the grounding trace 1102 to form a signal shielding structure, all the driving traces 1101 are preferably enclosed within the signal shielding structure to avoid signal coupling between the driving traces 1101 and the touch traces 1401. That is, in this embodiment, the grounding trace 1102 is located on the side of the driving traces 1101 away from the touch function layer 140. At the same time, to ensure that the formed signal shielding structure does not affect the signals in the array substrate 110, the conductive shielding structure 102 is insulated from the driving traces 1101 in the array substrate 110.

[0088] Further, please refer to Figure 5 , the isolation structure 120 includes an isolation portion 1203 and a blocking portion 1204 that are stacked. The orthographic projection of the isolation portion 1203 on the array substrate 110 is located within the orthographic projection of the blocking portion 1204 on the array substrate 110. Optionally, in this embodiment, the isolation structure 120 may further include an isolation substrate 1202. The isolation substrate 1202, the isolation portion 1203, and the blocking portion 1204 are stacked in sequence. The orthographic projection of the isolation portion 1203 on the array substrate 110 is located within the orthographic projection of the isolation substrate 1202 on the array substrate 110, and the orthographic projection of the isolation substrate 1202 on the array substrate 110 is located within the orthographic projection of the blocking portion 1204 on the array substrate 110.

[0089] In the direction facing the corresponding first isolation opening 12011 or the second isolation opening 12012, the isolation substrate 1202 and the blocking portion 1204 protrude relative to the isolation portion 1203, respectively. In this embodiment, the isolation substrate 1202 is a conductive isolation substrate, the isolation portion 1203 is a conductive isolation portion, and the blocking portion 1204 is a conductive blocking portion. Exemplarily, the isolation substrate 1202 can be made of metal molybdenum, the isolation portion 1203 can be made of metal aluminum, and the blocking portion 1204 can be made of metal titanium. By applying an external voltage signal to the blocking portion 1204, the in-plane cathode voltage signal of the display panel 10 can be made the same, thereby ensuring the display uniformity of the display panel.

[0090] Please refer to Figure 6 In this embodiment, the display panel 10 includes an array substrate 110, an isolation structure 120, sub-pixel devices 130, a touch control function layer 140, and a packaging layer 160. The isolation structure 120 is located on one side of the array substrate 110. The isolation structure 120 isolates and forms a first isolation opening 12011 and a second isolation opening 12012 on the array substrate 110. The first isolation opening 12011 is located in the first display area 10B, and the second isolation opening 12012 is located in the first display area 10B and the second display area 10A. The isolation structure 120 includes a stacked isolation substrate 1202, an isolation portion 1203, and a blocking portion 1204. The sub-pixel devices 130 are located in the second isolation opening 12012. Specifically, the cathode of the sub-pixel device 130 is lapped with the isolation substrate 1202 of the isolation structure 120. In the second display area 10A, the cathode of the sub-pixel device 130 is electrically connected to the isolation structure 120 to form a conductive layer covering the entire second display area 10A, so that the cathodes of different sub-pixel devices 130 have the same potential. At least one sub-pixel device 130 may be disposed in the second isolation opening 12012. The pixel driving circuit in the array substrate 110 is connected to the sub-pixel device 130 to drive the sub-pixel device 130 to emit light. Preferably, one sub-pixel device 130 is disposed in one second isolation opening 12012. The packaging layer 160 includes a first inorganic packaging layer 1601, an organic packaging layer 1602, and a second inorganic packaging layer 1603. The first inorganic packaging layer 1601 is located on the side of the sub-pixel device 130 facing away from the array substrate 110 and extends to the side of the isolation structure 120 forming the second isolation opening 12012 facing away from the array substrate 110. The first inorganic packaging layer 1601 includes a plurality of packaging units, and adjacent packaging units are disconnected on the side of the same isolation structure 120 facing away from the array substrate 110. Each packaging unit is used to package the sub-pixel device 130 in one second isolation opening 12012. The first inorganic packaging layer 1601 can be fabricated by chemical vapor deposition. The organic packaging layer 1602 at least covers the first inorganic packaging layer 1601, and the orthographic projection of the organic packaging layer 1602 on the array substrate 110 does not overlap with the orthographic projection of the first isolation opening 12011 on the array substrate 110. The organic packaging layer 1602 can be fabricated by inkjet printing. The organic packaging layer 1602 can fill the light-emitting surface of the area other than the through hole 101 in the entire display panel flat, so as to fabricate subsequent film layers above it. The second inorganic packaging layer 1603 is located on the side of the organic packaging layer 1602 facing away from the array substrate 110. The second inorganic packaging layer 1603 is fabricated by chemical vapor deposition. The touch control function layer 140 is located on the side of the second inorganic packaging layer 1603 facing away from the array substrate 110.

[0091] In order to increase the water and oxygen isolation ability at the through hole 101, in this embodiment, the first inorganic encapsulation layer 1601 and the second inorganic encapsulation layer 1603 are also stacked in the area outside the through hole 101 in the first isolation opening 12011, that is, two inorganic encapsulation layers are used for encapsulation in the area outside the through hole 101 in the first isolation opening 12011 to improve the encapsulation reliability of this position area.

[0092] In order to improve the encapsulation reliability of the first isolation opening 12011 area, in this embodiment, please refer to Figure 7 , the display panel 10 includes an array substrate 110, an isolation structure 120, sub-pixel devices 130, a touch control function layer 140, an encapsulation layer 160, and a barrier wall 170. The isolation structure 120 is located on one side of the array substrate 110. The isolation structure 120 forms a first isolation opening 12011 and a second isolation opening 12012 on the array substrate 110. The first isolation opening 12011 is located in the first display area 10B, and the second isolation opening 12012 is located in the first display area 10B and the second display area 10A. The isolation structure 120 includes a stacked isolation substrate 1202, an isolation portion 1203, and a blocking portion 1204. The sub-pixel devices 130 are located in the second isolation opening 12012, and the cathodes of the sub-pixel devices 130 are lapped with the isolation substrate 1202 of the isolation structure 120. At least one sub-pixel device 130 can be provided in the second isolation opening 12012. The barrier wall 170 is located on the side of the isolation structure 120 forming the first isolation opening 12011 away from the array substrate 110. Preferably, a barrier groove 1701 is provided on the side of the barrier wall 170 away from the array substrate 110. Exemplarily, the barrier wall 170 can be made of an organic material. The barrier wall 170 surrounds the through hole 101, and the orthographic projection of the barrier wall 170 on the array substrate 110 is located within the orthographic projection of the isolation structure 120 forming the first isolation opening 12011 on the array substrate 110. The encapsulation layer 160 includes a first inorganic encapsulation layer 1601, an organic encapsulation layer 1602, and a second inorganic encapsulation layer 1603. The touch control function layer 140 is located on the side of the second inorganic encapsulation layer 1603 away from the array substrate 110. With such a design, during the process of forming the organic encapsulation layer 1602, the overflow of the organic encapsulation material into the first isolation opening 12011 can be blocked.

[0093] Further, please refer to Figure 8 , in order to make the organic encapsulation layer 1602 disconnected at the position of the barrier groove 1701, in this embodiment, the included angle α between the side wall and the bottom wall of the barrier groove 1701 ranges from 20 degrees to 90 degrees. Exemplarily, the included angle α between the side wall and the bottom wall of the barrier groove 1701 includes 20 degrees, 22 degrees, 25 degrees, 30 degrees, 35 degrees, 42 degrees, 49 degrees, 55 degrees, 64 degrees, 73 degrees, 85 degrees, and 90 degrees.

[0094] In this embodiment, in the direction perpendicular to the array substrate 110, the height H1 of the isolation structure 120 ranges from greater than or equal to 0.6um to less than or equal to 0.9um. Exemplarily, the height H1 of the isolation structure 120 includes 0.6um, 0.61um, 0.65um, 0.68um, 0.74um, 0.79um, 0.83um, 0.88um, 0.9um, etc. The height H2 of the barrier wall 170 ranges from greater than or equal to 1um to less than or equal to 2um. Exemplarily, the height H2 of the barrier wall 170 includes 1um, 1.05um, 1.15um, 1.28um, 1.42um, 1.56um, 1.65um, 1.88um, 1.95um, 2um. The groove depth H3 of the barrier groove 1701 ranges from greater than or equal to 0.5um to less than or equal to 0.8um. Exemplarily, the groove depth H3 of the barrier groove 1701 includes 0.5um, 0.52um, 0.56um, 0.62um, 0.65um, 0.72um, 0.75um, 0.78um, 0.8um, etc.

[0095] Further, please refer to Figure 9 , in this embodiment, the side of the conductive shielding structure 102 away from the array substrate 110 is flush with the side of the isolation structure 120 away from the array substrate 110. The material of the first end 1021 of the conductive shielding structure 102 away from the array substrate 110 is the same as that of the blocking portion 1204. The material of the second end 1022 of the conductive shielding structure 102 connected to the ground trace 1102 is the same as that of the isolation substrate 1202. The portion of the conductive shielding structure 102 between the first end 1021 and the second end 1022 is the same as the material of the isolation portion 1203. Exemplarily, the first end 1021 of the conductive shielding structure 102 can be made of metal titanium, the second end 1022 of the conductive shielding structure 102 can be made of metal molybdenum, and the portion of the conductive shielding structure 102 between the first end 1021 and the second end 1022 can be made of metal aluminum. With such a design, the conductive shielding structure 102 can be fabricated synchronously when fabricating the isolation structure 120 without additional new processes.

[0096] Further, please refer to Figure 10 , the conductive shielding structure 102 is located between the isolation structure 120 forming the first isolation opening 12011 and the through hole 101, and the conductive shielding structure 102 is an annular structure surrounding the through hole 101.

[0097] The array substrate 110 may include a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer that are sequentially stacked and insulated from each other. The first metal layer, the second metal layer, the third metal layer, and the fourth metal layer may be used to form signal leads of each layer in the array substrate 110. Exemplarily, the scan signal leads may be formed by the first metal layer, the reset signal leads and the enable signal leads may be formed by the second metal layer, the power supply voltage signal leads may be formed by the third metal layer or the fourth metal layer, and the data voltage signal leads may be formed by the fourth metal layer. In this embodiment, the driving trace 1101 may be formed by the third metal layer and / or the fourth metal layer, and the grounding trace 1102 may be formed by the first metal layer or the second metal layer. Exemplarily, the driving trace 1101 may be formed by the third metal layer and the fourth metal layer, and the grounding trace 1102 may be formed by the first metal layer.

[0098] Please refer to Figure 11 , further, the display panel 10 further includes a pixel defining layer 180. The pixel defining layer 180 is located on one side of the array substrate 110, and the isolation structure 120 is located on the side of the pixel defining layer 180 away from the array substrate 110. The pixel defining layer 180 includes a pixel opening 1801. The pixel opening 1801 communicates with the second isolation opening 12012, and the sub-pixel device 130 is disposed in the pixel opening 1801.

[0099] The sub-pixel device 130 includes an anode 1301, a light-emitting material layer 1302, and a cathode 1303 that are stacked. The anode 1301 is distributed at intervals on one side of the array substrate 110. Exemplarily, the anode 1301 is distributed at the position of the array substrate 110 corresponding to the second isolation opening 12012, and the pixel opening 1801 exposes the anode 1301. The light-emitting material layer 1302 extends from the pixel opening 1801 to the side of the pixel defining layer 180 away from the array substrate 110, and the cathode 1303 extends from within the pixel opening 1801 to the side of the pixel defining layer 180 away from the array substrate 110 and overlaps with the isolation substrate 1202 around the second isolation opening 12012.

[0100] Please refer to Figure 12 and Figure 13 , the touch function layer 140 includes a touch pattern 141 formed by touch traces 1401. In the first display area 10B, the touch function layer 140 further includes a shielding layer 1402. The shielding layer 1402 is located on the side of the touch pattern 141 facing the array substrate 110. In the first display area 10B, the orthographic projection of the touch pattern 141 on the array substrate 110 is located within the orthographic projection of the shielding layer 1402 on the array substrate 110. In this embodiment, please refer to Figure 14, the range of the distance d between the contour edges of the orthographic projection of the shielding layer 1402 on the array substrate 110 and the contour edges of the orthographic projection of the touch pattern 141 on the array substrate 110 is greater than or equal to 0.5 um and less than or equal to 1 um. Exemplarily, the distance d includes 0.5 um, 0.52 um, 0.58 um, 0.63 um, 0.72 um, 0.81 um, 0.87 um, 0.98 um, 1 um, etc. With such a design, signal interference between the driving trace 1101 and the touch trace 1401 can be further avoided, and the anti-interference capabilities of the driving trace 1101 and the touch trace 1401 can be improved.

[0101] Furthermore, the shielding layer 1402 includes a metal layer 14021 and an insulating layer 14022. The insulating layer 14022 is located on the side of the touch pattern 141 facing the array substrate 110, and the metal layer 14021 is located on the side of the insulating layer 14022 facing the array substrate 110. The orthographic projection of the insulating layer 14022 on the array substrate 110 coincides with the orthographic projection of the metal layer 14021 on the array substrate 110. With such a design, not only can the anti-interference capabilities of the traces in the first display area 10B be enhanced, but the newly added metal layer 14021 and insulating layer 14022 can also disperse the folding stress generated during folding, improving the anti-folding performance of the display panel 10.

[0102] Based on the same inventive concept, this embodiment also provides an electronic device. Please refer to Figure 15 , the electronic device 1 includes an optical sensor 20 and the display panel 10 described in the previous embodiment. The optical sensor 20 is located on the backlight side of the display panel 10 and at a position corresponding to the first display area 10B. Using the above display panel 10 can not only ensure the light transmittance of the first display area 10B corresponding to the optical sensor 20, but also enable the display panel 10 to have good display and touch functions, ensuring a good user experience for the user.

[0103] The embodiment of the present application provides a display panel and an electronic device. In the display panel, the isolation structure forms a first isolation opening and a second isolation opening in the first display area. The sub-pixel devices that block light are only arranged in the second isolation opening, and the sub-pixel devices with poor light transmittance are not arranged in the first isolation opening. Compared with the second isolation opening, the first isolation opening has a stronger light transmittance, so that the light transmittance of the first display area can be improved. In addition, the array substrate is provided with a conductive shielding structure in the area where the first isolation opening is located, which can shield the electrical signal interference of the traces in the array substrate and the traces in the touch functional layer at the position area of the first isolation opening, enabling the display panel to have good display and touch functions and ensuring the functional stability of the display panel.

[0104] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various modifications and variations can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A display panel, characterized in that, the display panel includes a first display area and a second display area at least partially surrounding the first display area; the display panel includes: an array substrate; an isolation structure, the isolation structure is located on one side of the array substrate and includes a first isolation opening and a second isolation opening, wherein the first isolation opening is located in the first display area, and the second isolation opening is located in the first display area and the second display area; sub-pixel devices, the sub-pixel devices are located in the second isolation opening; a touch function layer, the touch function layer is located on a side of the sub-pixel devices away from the array substrate; in a direction perpendicular to a plane where the array substrate is located, the array substrate is further provided with a conductive shielding structure in a position area where the first isolation opening is located.

2. The display panel according to claim 1, characterized in that, in a direction perpendicular to a plane where the array substrate is located, the array substrate is further provided with a through hole penetrating the array substrate in a position area where the first isolation opening is located, and the conductive shielding structure is disposed around the through hole; preferably, the conductive shielding structure protrudes away from the array substrate relative to the array substrate; preferably, in the first display area, the first isolation opening and the second isolation opening are evenly distributed; preferably, in the first display area, a ratio range of the number of the first isolation openings to the number of the second isolation openings is greater than or equal to 1:2 to less than or equal to 2:1; preferably, the array substrate further includes driving traces, the touch function layer includes touch traces, in the first display area, a positive projection of the driving traces and / or the touch traces on the array substrate does not overlap with a positive projection of the first isolation opening on the array substrate; preferably, the array substrate further includes a grounding trace, and the grounding trace is located on a side of the driving traces away from the touch function layer; preferably, the driving traces are insulated from the conductive shielding structure; preferably, the isolation structure includes a stacked isolation portion and a blocking portion, and a positive projection of the isolation portion on the array substrate is located within a positive projection of the blocking portion on the array substrate; preferably, the isolation structure further includes an isolation substrate, the isolation substrate, the isolation portion and the blocking portion are stacked in sequence, a positive projection of the isolation portion on the array substrate is located within a positive projection of the isolation substrate on the array substrate, and a positive projection of the isolation substrate on the array substrate is located within a positive projection of the blocking portion on the array substrate; in a direction facing the corresponding first isolation opening or the second isolation opening, the isolation substrate and the blocking portion respectively protrude relative to the isolation portion; preferably, the isolation substrate is a conductive isolation substrate, the isolation portion is a conductive isolation portion, and the blocking portion is a conductive blocking portion; preferably, the conductive shielding structure is connected to the grounding trace; preferably, the conductive shielding structure is insulated from the isolation structure forming the first isolation opening.

3. The display panel according to claim 1, characterized in that, The display panel further includes a packaging layer, and the packaging layer includes a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer; The first inorganic packaging layer is located on a side of the sub-pixel device facing away from the array substrate, and extends to a side of the isolation structure forming the second isolation opening and facing away from the array substrate; The organic packaging layer at least covers the first inorganic packaging layer, and a positive projection of the organic packaging layer on the array substrate does not overlap with a positive projection of the first isolation opening on the array substrate; The second inorganic packaging layer is located on a side of the organic packaging layer facing away from the array substrate; The touch function layer is located on a side of the second inorganic packaging layer facing away from the array substrate; Preferably, the first inorganic packaging layer and the second inorganic packaging layer are also stacked in a region outside the through hole in the first isolation opening.

4. The display panel according to claim 3, wherein, the display panel further includes a barrier wall, and the barrier wall is located on a side of the isolation structure forming the first isolation opening and facing away from the array substrate; Preferably, a barrier groove is provided on a side of the barrier wall facing away from the array substrate; Preferably, the barrier wall surrounds the through hole, and a positive projection of the barrier wall on the array substrate is located within a positive projection of the isolation structure forming the first isolation opening on the array substrate; Preferably, an included angle range between a side wall and a bottom wall of the barrier groove is 20 degrees to 90 degrees; Preferably, in a direction perpendicular to the array substrate, a height range of the isolation structure is greater than or equal to 0.6 um and less than or equal to 0.9 um; a height range of the barrier wall is greater than or equal to 1 um and less than or equal to 2 um; a groove depth range of the barrier groove is greater than or equal to 0.5 um and less than or equal to 0.8 um.

5. The display panel according to claim 2, wherein, a side of the conductive shielding structure facing away from the array substrate is flush with a side of the isolation structure facing away from the array substrate; Preferably, a first end of the conductive shielding structure facing away from the array substrate is made of the same material as the blocking portion, a second end of the conductive shielding structure connected to the ground trace is made of the same material as the isolation substrate, and a portion of the conductive shielding structure located between the first end and the second end is made of the same material as the isolation portion; Preferably, the conductive shielding structure is located between the isolation structure forming the first isolation opening and the through hole.

6. The display panel according to claim 2, wherein, the array substrate includes a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer which are sequentially stacked and insulated from each other, the driving trace is formed by the third metal layer and / or the fourth metal layer, and the ground trace is formed by the first metal layer or the second metal layer.

7. The display panel according to any one of claims 1-6, wherein, the display panel further includes a pixel defining layer, the pixel defining layer is located on one side of the array substrate, and the isolation structure is located on a side of the pixel defining layer facing away from the array substrate; The pixel defining layer includes pixel openings, wherein the pixel openings communicate with the second isolation opening, and the sub-pixel device is disposed within the pixel openings; The sub-pixel device includes an anode, a light-emitting material layer, and a cathode which are stacked; Preferably, the light-emitting material layer extends from the pixel opening to the side of the pixel defining layer away from the array substrate, and the cathode extends from the pixel opening to the side of the pixel defining layer away from the array substrate and overlaps with the isolation substrate around the second isolation opening.

8. The display panel according to any one of claims 1-6, characterized in that, the touch function layer includes a touch pattern formed by touch traces; In the first display area, the touch function layer further includes a shielding layer, and the shielding layer is located on the side of the touch pattern facing the array substrate; In the first display area, the orthographic projection of the touch pattern on the array substrate is located within the orthographic projection of the shielding layer on the array substrate; Preferably, the distance range between the contour edge of the orthographic projection of the shielding layer on the array substrate and the contour edge of the orthographic projection of the touch pattern on the array substrate is greater than or equal to 0.5um and less than or equal to 1um.

9. The display panel according to claim 8, characterized in that, the shielding layer includes a metal layer and an insulating layer, the insulating layer is located on the side of the touch pattern facing the array substrate, and the metal layer is located on the side of the insulating layer facing the array substrate; The orthographic projection of the insulating layer on the array substrate coincides with the orthographic projection of the metal layer on the array substrate.

10. An electronic device, characterized in that, the electronic device includes an optical sensor and the display panel according to any one of claims 1-9; The optical sensor is located on the backlight side of the display panel and at a position corresponding to the first display area.

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