Power consumption control method, flash memory device and computer readable storage medium

Calculating the total power consumption of SSD through real-time monitoring and smoothing algorithms, the overload problem caused by peak power consumption of large-capacity SSD is solved, and power consumption optimization and stability improvement without affecting performance is achieved.

CN120066231APending Publication Date: 2025-05-30DAPUSTOR CORP
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Patent Information

Application Number
CN202411970955.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-05-30

AI Technical Summary

Technical Problem

The peak power consumption of large-capacity SSDs causes overload of data center devices, which may cause downtime.

Method used

By monitoring the read and write bandwidth of the host and flash memory space in real time, the total power consumption is calculated using the smoothing algorithm, and the read request or write request is stopped in the peak power consumption state until the total power consumption drops to the threshold calculated by the smoothing algorithm.

Benefits of technology

Without affecting read and write performance, optimize peak power consumption, improve the stability of flash memory devices, and avoid overload and downtime of data center devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention relates to the field of storage equipment application, and discloses a power consumption control method, flash memory equipment and a computer readable storage medium, and the power consumption control method comprises the following steps: when the power consumption state of the flash memory equipment is in a bandwidth stable state, smoothing a plurality of pieces of total power consumption based on a smoothing algorithm to obtain first total power consumption; and determining that the power consumption state of the flash memory device is in a peak power consumption state by using the read bandwidth of the host and the read bandwidth of the flash memory space, or by using the write bandwidth of the host and the write bandwidth of the flash memory space, so as to stop sending a read request or a write request to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, therefore, the peak power consumption can be optimized on the premise of not influencing the read-write performance, so that the stability of the flash memory equipment is improved.
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Description

Technical Field

[0001] This application relates to the field of storage device applications, and particularly to a power consumption control method, a flash memory device, and a computer-readable storage medium. Background Art

[0002] A flash memory device refers to a storage device manufactured based on flash memory technology (Flash Memory). Flash (Flash) is an electronic storage medium that stores and reads data using an electric current in semiconductor transistors. For example: NAND flash is a type of flash memory composed of multiple storage units, where each unit can store a data bit (0 or 1). A flash memory device can be an independent storage unit, such as a USB flash drive, a solid-state drive (SSD), etc., or a storage module embedded in other devices, such as eMMC or UFS storage in a smartphone.

[0003] With the development of NAND Flash manufacturing technology, combined with the requirements for the single-disk storage capacity in usage scenarios such as AI and data centers, the single-disk capacity of SSDs is getting larger and larger. And the Nand Flash, RAM, Flash, and peripheral auxiliary components on large-capacity SSDs are also increasing, which will inevitably lead to an increase in the basic power consumption of the entire disk (basic power consumption refers to the pure standby power consumption when the disk is in a state without IO). The load capacity of each slot on the server is limited. At this time, the working power consumption reserved for reading and writing will be less and less. For the application scenario of a data center, when many SSDs are mounted in a chassis, when these SSDs are all at peak power consumption, it is easy to cause overload and lead to downtime. Summary of the Invention

[0004] Embodiments of this application provide a power consumption control method, a flash memory device, and a computer-readable storage medium, which can optimize peak power consumption without affecting read and write performance, thereby improving the stability of the flash memory device.

[0005] Embodiments of this application provide the following technical solutions:

[0006] In a first aspect, an embodiment of this application provides a power consumption control method, which is applied to a flash memory device. The flash memory device is connected to a host, and the flash memory device includes a flash memory space. The method includes:

[0007] Obtain the read bandwidth or write bandwidth of the host, and obtain the read bandwidth or write bandwidth of the flash memory space;

[0008] Calculate the total power consumption of the flash memory space in real time to sample a number of total power consumptions;

[0009] When the power consumption state of the flash memory device is in a bandwidth stable state, based on a smoothing algorithm, smooth a plurality of total power consumptions to obtain a first total power consumption;

[0010] When the power consumption state of the flash memory device is in a peak power consumption state, if the total power consumption of the flash memory space is greater than the first total power consumption, stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, where the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth threshold.

[0011] In some embodiments,

[0012] The read bandwidth of the host is the bandwidth corresponding to the reading performed by the flash memory space for the read request of the host;

[0013] The write bandwidth of the host is the bandwidth corresponding to the writing performed by the flash memory space for the write request of the host;

[0014] The flash memory device includes a cache space. Obtaining the read bandwidth or write bandwidth of the host includes:

[0015] Real-time statistics of the first read data volume successfully read from the flash memory space to the host to construct a first read data volume curve, where the abscissa of the first read data volume curve is time and the ordinate is the first read data volume successfully read from the flash memory space to the host;

[0016] According to the sampling period, calculate the read bandwidth of the host, where the read bandwidth of the host = the increment of the first read data volume within the sampling period / the sampling period;

[0017] Or, real-time statistics of the first write data volume successfully written into the cache space to construct a first write data volume curve, where the abscissa of the first write data volume curve is time and the ordinate is the first write data volume successfully written into the cache space;

[0018] According to the sampling period, calculate the write bandwidth of the host, where the write bandwidth of the host = the increment of the first write data volume within the sampling period / the sampling period.

[0019] In some embodiments,

[0020] Obtaining the read bandwidth or write bandwidth of the flash memory space includes:

[0021] Real-time statistics of the second read data volume successfully read from the flash memory space to the cache space to construct a second read data volume curve, where the abscissa of the second read data volume curve is time and the ordinate is the second read data volume successfully read from the flash memory space to the cache space;

[0022] Calculate the read bandwidth of the flash memory space according to the sampling period, where the read bandwidth of the flash memory space = the increment of the second read data volume within the sampling period / the sampling period;

[0023] Alternatively, statistically count the second write data volume successfully written into the flash memory space in real time to construct a second write data volume curve, where the abscissa of the second write data volume curve is time and the ordinate is the second write data volume successfully written into the flash memory space;

[0024] Calculate the write bandwidth of the flash memory space according to the sampling period, where the write bandwidth of the flash memory space = the increment of the second write data volume within the sampling period / the sampling period.

[0025] In some embodiments,

[0026] The method further includes:

[0027] Determine the power consumption state of the flash memory device according to the read bandwidth or write bandwidth of the host and the read bandwidth or write bandwidth of the flash memory space, including:

[0028] If the bandwidth state of the host is in a fluctuating state, determine that the power consumption state of the flash memory device is a normal read / write state;

[0029] If the bandwidth state of the host is in a stable state, determine that the power consumption state of the flash memory device is a bandwidth stable state;

[0030] If the read bandwidth of the flash memory space is greater than the read bandwidth of the host, or the write bandwidth of the flash memory space is greater than the write bandwidth of the host, determine that the power consumption state of the flash memory device is a peak power consumption state.

[0031] In some embodiments,

[0032] The method further includes:

[0033] Determine the bandwidth state of the host, including:

[0034] Within the first sampling period, calculate the first read bandwidth or the first write bandwidth of the host;

[0035] Within the second sampling period, calculate the second read bandwidth or the second write bandwidth of the host, where the second sampling period is greater than the first sampling period;

[0036] If the absolute value of the difference between the first read bandwidth and the second read bandwidth is less than the first bandwidth fluctuation threshold, and the absolute value of the difference between the first write bandwidth and the second write bandwidth is less than the first bandwidth fluctuation threshold, determine that the bandwidth state of the host is a stable state;

[0037] If the absolute value of the difference between the first read bandwidth and the second read bandwidth is greater than or equal to the first bandwidth fluctuation threshold, or the absolute value of the difference between the first write bandwidth and the second write bandwidth is greater than or equal to the first bandwidth fluctuation threshold, then determine that the bandwidth state of the host is a fluctuating state.

[0038] In some embodiments,

[0039] The method further includes:

[0040] Switch the power consumption state of the flash device, including:

[0041] When the power consumption state of the flash device is in the normal read / write state, if the current conditions meet the first condition, then switch the power consumption state of the flash device to the bandwidth stable state, where the first condition includes: the bandwidth state of the host is in the stable state;

[0042] When the power consumption state of the flash device is in the bandwidth stable state, if the current conditions meet the second condition, then switch the power consumption state of the flash device to the normal read / write state, where the second condition includes: the bandwidth state of the host is in the fluctuating state;

[0043] When the power consumption state of the flash device is in the bandwidth stable state, if the current conditions meet the third condition, then switch the power consumption state of the flash device to the peak power consumption state, where the third condition includes: the read bandwidth of the flash space is greater than or equal to the sum of the host's read bandwidth and the second bandwidth fluctuation threshold, or the write bandwidth of the flash space is greater than or equal to the sum of the host's write bandwidth and the second bandwidth fluctuation threshold;

[0044] When the power consumption state of the flash device is in the peak power consumption state, if the current conditions meet the fourth condition, then switch the power consumption state of the flash device to the bandwidth stable state, where the fourth condition includes: the read bandwidth of the flash space is less than the sum of the host's read bandwidth and the second bandwidth fluctuation threshold, and the write bandwidth of the flash space is less than the sum of the host's write bandwidth and the second bandwidth fluctuation threshold;

[0045] When the power consumption state of the flash device is in the peak power consumption state, if the current conditions meet the second condition, then switch the power consumption state of the flash device to the normal read / write state.

[0046] In some embodiments,

[0047] Determining the power consumption state of the flash device further includes:

[0048] Judge whether the write bandwidth or read bandwidth of the flash space is greater than the maximum host bandwidth threshold;

[0049] If so, determine that the power consumption state of the flash device is the peak power consumption state;

[0050] If not, further determine whether the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, or whether the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold, so as to determine whether the flash memory device is in the peak power consumption state.

[0051] In some embodiments,

[0052] The flash memory space includes multiple super blocks, each super block includes multiple physical blocks, and each physical block includes multiple word lines;

[0053] Calculate the total power consumption of the flash memory space in real time, including:

[0054] Obtain the overall disk basic power consumption of the flash memory device;

[0055] When receiving a read request from the host, determine the first read power consumption according to the read power consumption corresponding to the word lines of several physical blocks corresponding to the read request, so as to update the current overall disk power consumption, where the current overall disk power consumption = overall disk basic power consumption + first read power consumption, and the first read power consumption is the sum of the read power consumption corresponding to the word lines of several physical blocks; or,

[0056] When receiving a write request from the host, determine the first write power consumption according to the write power consumption corresponding to the word lines of several physical blocks corresponding to the write request, so as to update the current overall disk power consumption, where the current overall disk power consumption = overall disk basic power consumption + first write power consumption, and the first write power consumption is the sum of the write power consumption corresponding to the word lines of several physical blocks; or,

[0057] After the flash memory space completes the read request, reduce the current overall disk power consumption of the flash memory space by the first read power consumption to update the current overall disk power consumption; or,

[0058] After the flash memory space completes the write request, reduce the current overall disk power consumption of the flash memory space by the first write power consumption to update the current overall disk power consumption;

[0059] Use the current overall disk power consumption obtained by real-time update as the total power consumption of the flash memory space.

[0060] In some embodiments,

[0061] The method further includes:

[0062] Pre-calculate the read power consumption corresponding to each word line of each physical block, including:

[0063] Perform read operations on the Nth word line of each super block in sequence to determine the first overall disk power consumption, where N is an integer, and 0 ≤ N ≤ the total number of word lines of the super block;

[0064] Calculate the read power consumption of each physical block on the Nth word line according to the overall disk base power consumption and the first overall disk power consumption, where the read power consumption of each physical block on the Nth word line = (the first overall disk power consumption - the overall disk base power consumption) / X, and X is the number of physical blocks included in a super block;

[0065] The method further includes:

[0066] Pre-calculate the write power consumption corresponding to each word line of each physical block, including:

[0067] Perform a write operation on the Nth word line of each super block in sequence to determine the second overall disk power consumption, where N is an integer, and 0 ≤ N ≤ the total number of word lines of the super block;

[0068] Calculate the write power consumption of each physical block on the Nth word line according to the overall disk base power consumption and the second overall disk power consumption, where the write power consumption of each physical block on the Nth word line = (the second overall disk power consumption - the overall disk base power consumption) / X, and X is the number of physical blocks included in a super block.

[0069] In some embodiments,

[0070] The method further includes:

[0071] When the power consumption state of the flash memory device is in a bandwidth stable state, if the read bandwidth of the flash memory space is greater than the difference between the read bandwidth of the host and the third bandwidth fluctuation threshold, or the write bandwidth of the flash memory space is greater than the difference between the write bandwidth of the host and the fourth bandwidth fluctuation threshold, then sample several total power consumptions at regular intervals;

[0072] After the number of sampled total power consumptions is greater than the number threshold, smooth several total power consumptions based on a smoothing algorithm to obtain a second total power consumption.

[0073] In some embodiments,

[0074] The method further includes:

[0075] When the power consumption state of the flash memory device is in a peak power consumption state, determine whether to distribute the read request or write request of the host to the flash memory space, including:

[0076] If the second total power consumption is not an effective power consumption, or the sampled total power consumption is greater than the second total power consumption, then do not distribute the read request or write request of the host to the flash memory space;

[0077] If the second total power consumption is an effective power consumption, and the sampled total power consumption is less than or equal to the second total power consumption, then distribute the read request or write request of the host to the flash memory space.

[0078] In a second aspect, an embodiment of the present application provides a flash memory device, including:

[0079] A processor and a memory, where the processor is configured to execute executable program code in the memory. When the executable program code is executed, the processor executes instructions of the power consumption control method according to the first aspect.

[0080] In a third aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which, when executed, implements the power consumption control method according to the first aspect.

[0081] The beneficial effects of the embodiments of the present application are as follows: Different from the prior art, a power consumption control method provided by the embodiments of the present application is applied to a flash memory device. The flash memory device is connected to a host and includes a flash memory space. The method includes: obtaining the read bandwidth or write bandwidth of the host, and obtaining the read bandwidth or write bandwidth of the flash memory space; calculating the total power consumption of the flash memory space in real time to sample a plurality of total power consumptions; when the power consumption state of the flash memory device is in a peak power consumption state, smoothing the plurality of total power consumptions based on a smoothing algorithm to obtain a first total power consumption, where the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and a first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and a second bandwidth threshold.

[0082] By smoothing a plurality of total power consumptions based on a smoothing algorithm when the power consumption state of the flash memory device is in a bandwidth stable state to obtain a first total power consumption, and using the read bandwidth of the host and the read bandwidth of the flash memory space, or using the write bandwidth of the host and the write bandwidth of the flash memory space, to determine that the power consumption state of the flash memory device is in a peak power consumption state, and stopping sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, thereby being able to optimize the peak power consumption without affecting the read and write performance, and thus improving the stability of the flash memory device. Description of the Drawings

[0083] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings. These exemplary illustrations do not limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements, unless otherwise stated, and the drawings in the figures do not constitute a proportional limitation.

[0084] Figure 1 It is a schematic structural diagram of a flash memory device provided by an embodiment of the present application;

[0085] Figure 2 It is a schematic flowchart of a power consumption control method provided by an embodiment of the present application;

[0086] Figure 3 It is a schematic diagram of a host writing user data to a flash memory device provided by an embodiment of the present application;

[0087] Figure 4A It is a schematic diagram of a host reading user data from a flash memory space provided by an embodiment of the present application;

[0088] Figure 4B It is another schematic diagram of a host reading user data from a flash memory space provided by an embodiment of the present application;

[0089] Figure 5 It is a schematic flowchart of calculating the read bandwidth of a computing host provided by an embodiment of the present application;

[0090] Figure 6 It is yet another schematic diagram of reading user data from a flash memory space provided by an embodiment of the present application;

[0091] Figure 7 It is a schematic diagram of a first read data volume curve provided by an embodiment of the present application;

[0092] Figure 8 It is a schematic flowchart of calculating the write bandwidth of a computing host provided by an embodiment of the present application;

[0093] Figure 9 It is a schematic flowchart of calculating the write bandwidth of a flash memory space provided by an embodiment of the present application;

[0094] Figure 10 It is a schematic flowchart of calculating the read bandwidth of a flash memory space provided by an embodiment of the present application;

[0095] Figure 11 It is a schematic flowchart of calculating the total power consumption of a flash memory space in real time provided by an embodiment of the present application;

[0096] Figure 12 A schematic flowchart of pre-calculating the read power consumption corresponding to each word line of each physical block provided by an embodiment of the present application;

[0097] Figure 13 It is a schematic diagram of a super block provided by an embodiment of the present application;

[0098] Figure 14 A schematic flowchart of pre-calculating the write power consumption corresponding to each word line of each physical block provided by an embodiment of the present application;

[0099] Figure 15 It is a schematic flowchart of determining the power consumption state of a flash memory device provided by an embodiment of the present application;

[0100] Figure 16 It is a schematic flowchart of determining the bandwidth state of a host provided by an embodiment of the present application;

[0101] Figure 17It is a schematic diagram of a short sampling period and a long sampling period provided by an embodiment of the present application;

[0102] Figure 18 It is a schematic flowchart of a method for determining whether a flash memory device is in a peak power consumption state provided by an embodiment of the present application;

[0103] Figure 19 It is another schematic flowchart of a method for determining whether a flash memory device is in a peak power consumption state provided by an embodiment of the present application;

[0104] Figure 20 It is a schematic diagram of a method for switching the power consumption state of a flash memory device provided by an embodiment of the present application;

[0105] Figure 21 It is a schematic diagram of a method for sampling the total power consumption of a flash memory space provided by an embodiment of the present application;

[0106] Figure 22 It is a schematic diagram of a first total power consumption provided by an embodiment of the present application;

[0107] Figure 23 It is a schematic flowchart of a method for sampling the total power consumption provided by an embodiment of the present application;

[0108] Figure 24 It is a schematic flowchart of a method for determining whether to distribute a host read request or write request to a flash memory space provided by an embodiment of the present application;

[0109] Figure 25A It is a schematic diagram of power consumption without power consumption control provided by an embodiment of the present application;

[0110] Figure 25B It is a schematic diagram of power consumption with power consumption control provided by an embodiment of the present application;

[0111] Figure 26 It is another schematic diagram of the structure of a flash memory device provided by an embodiment of the present application.

[0112] Explanation of the reference numerals in the drawings:

[0113] Label Name Label Name 100 Flash device 200 Host 110 Flash medium 120 Controller 121 Processor 122 Memory 123 Flash controller 124 Interface Detailed implementation manners

[0114] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the scope of protection of the present application.

[0115] It should be noted that if there is no conflict, the various features in the embodiments of the present application can be combined with each other, and all are within the protection scope of the present application. In addition, although functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order from the module division in the device or the flowchart. Furthermore, the terms "first", "second", "third", etc. used in the present application do not limit the data and execution order, but only distinguish the same items or similar items with basically the same functions and effects.

[0116] The technical solution of the present application will be specifically described below in conjunction with the accompanying drawings of the specification:

[0117] The power consumption control method in the embodiments of the present application is applied to flash memory devices, such as: USB flash drives, SD cards, microSD cards, CF cards, solid state drives (SSDs), etc. A flash memory device is a storage device using semiconductor flash memory (NAND Flash) as the medium, and its main components include a flash memory medium, a flash memory controller, a dynamic random access memory (DRAM), etc. Among them, an important function of the flash memory controller is to act as a driver for the flash memory chip for storage operations, and its main operations include erasing, writing, and reading.

[0118] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a flash memory device provided by an embodiment of the present application.

[0119] As Figure 1 shown, the flash memory device 100 includes a flash memory medium 110 and a controller 120 connected to the flash memory medium 110. Among them, the flash memory device 100 is communicatively connected to the host 200 by wired or wireless means to achieve data interaction.

[0120] The flash memory medium 110, as the storage medium of the flash memory device 100, is also called flash memory, NAND Flash, Flash memory, or Flash chip. It belongs to a type of storage device and is a non-volatile memory that can store data permanently without current supply. Its storage characteristics are equivalent to those of a hard disk, making the flash memory medium 110 the basis for the storage medium of various portable digital devices.

[0121] The controller 120 includes a processor 121, a memory 122, a flash memory controller 123, and an interface 124.

[0122] The processor 121 is respectively connected to the memory 122, the flash controller 123, and the interface 124. Among them, the processor 121 can be connected to the memory 122, the flash controller 123, and the interface 124 through a bus or other means. The processor is used to run non-volatile software programs, instructions, and modules stored in the memory 122, so as to implement any method embodiment of the present application. On this basis, through firmware development, it is also used to be responsible for the core processing of the Flash translation layer (FTL).

[0123] The memory 122 is mainly used to cache read / write instructions sent by the host 200, and to cache read data or write data obtained from the flash medium 110 according to the read / write instructions sent by the host 200.

[0124] The flash controller 123 is connected to the flash medium 110, the processor 121, and the memory 122, and is used to access the backend flash medium 110 and manage various parameters and data I / O of the flash medium 110.

[0125] The interface 124 is connected to the host 200, the processor 121, and the memory 122, and is used to receive data sent by the host 200, or to receive data sent by the processor 121, so as to realize data transmission between the host 200 and the processor 121. The interface 124 can be a SATA-2 interface, a SATA-3 interface, a SAS interface, an MSATA interface, a PCI-E interface, an NGFF interface, a CFast interface, an SFF-8639 interface, and an M.2 NVME / SATA protocol.

[0126] Currently, with the development of NAND Flash manufacturing technology, combined with the requirements for the single-disk storage capacity in usage scenarios such as AI and data centers, the single-disk capacity of SSDs is getting larger and larger. And there are more and more peripheral auxiliary components for Nand Flash, RAM, Flash, and RAM on large-capacity SSDs, which will inevitably lead to an increase in the basic power consumption of the entire disk (basic power consumption refers to the pure standby power consumption when the disk platter has no I / O). The load capacity of each slot on the server is limited. At this time, the working power consumption reserved for reading and writing will be less and less. For the application scenario of the data center, when many SSDs are mounted in the chassis, when these SSDs are all at the peak power consumption, it is easy to overload and cause downtime.

[0127] In view of this, the embodiments of the present application provide a power consumption control method to optimize the peak power consumption, thereby improving the stability of the flash device.

[0128] Specifically, please refer to Figure 2 , Figure 2It is a schematic flow chart of a power consumption control method provided by an embodiment of the present application.

[0129] Among them, this power consumption control method is applied to a flash memory device. Specifically, it is applied to at least one processor of the flash memory device, and the execution entity of this data writing method is at least one processor of the flash memory device.

[0130] As Figure 2 shown, the flow of this power consumption control method includes the following steps S201 - step S204:

[0131] Step S201: Obtain the read bandwidth or write bandwidth of the host, and obtain the read bandwidth or write bandwidth of the flash memory space.

[0132] It can be understood that for the reading and writing of a flash memory device, for example, the reading and writing of a Solid State Drive (SSD), the power consumption mainly consists of the following parts:

[0133] (1) The basic power consumption of the entire disk.

[0134] Specifically, the basic power consumption of the entire disk refers to the standby power consumption, that is, the standby power consumption when the disk platter is in a state without IO.

[0135] (2) The operations of the main control chip.

[0136] Specifically, the operations of the main control chip include operations such as scheduling and calculation.

[0137] (3) The read and write operations of the Cache module.

[0138] Specifically, the read and write operations of the cache module include read operations and write operations, that is, the read operation and write operation of the Cache module.

[0139] (4) The operations of the Flash Array

[0140] Specifically, the operations of the flash array include read operation (Read), write operation (Write), and erase operation (Erase).

[0141] It can be understood that for a flash memory device, most of the power consumption overhead comes from the operations of the flash array.

[0142] Please refer to Figure 3 , Figure 3 which is a schematic diagram of a host writing user data to a flash memory device provided by an embodiment of the present application.

[0143] As Figure 3As shown, the flash memory device includes a cache space and a flash memory space. The host writes data A to the cache space, and the data A is further written from the cache space to the flash memory array in the flash memory space.

[0144] It should be noted that when the host sends a write request to the flash memory device to write user data, the flash memory device usually has abnormal power-off protection, that is, after the user data is written to the cache space, it is considered that the host's write is completed.

[0145] It can be seen that the process of the host writing user data to the cache space and the process of the user data being written from the cache space to the flash memory array are asynchronous. Since the bandwidth of the host (BandWidth, BW) is different from the write bandwidth of the flash memory array (Program BW), there will be lag or lead.

[0146] Currently, there are two ways for the host to read data from the flash memory device. The following specifically describes the two ways:

[0147] For the first way, please refer to Figure 4A , Figure 4A which is a schematic diagram of a host reading user data from the flash memory space provided by an embodiment of the present application.

[0148] As Figure 4A shown, the host reads user data from the flash memory space, including the following steps (1)-(4):

[0149] Step (1): The Host initiates a read request (Host Read).

[0150] Step (2): The SSD firmware finds the location where the data is stored in the Flash Array and initiates a Flash read (FlashRead).

[0151] Step (3): After the Flash read is completed, the data is passed to the Host. (Flash Read Done)

[0152] Step (4): The Host finishes reading the data (Host Read Done).

[0153] It can be seen that the above method directly obtains the user data corresponding to the host's read request from the flash memory array through the SSD firmware.

[0154] For the second way, please refer to Figure 4B , Figure 4B which is another schematic diagram of a host reading user data from the flash memory space provided by an embodiment of the present application.

[0155] As Figure 4BAs shown in the figure, the host reads user data from the flash memory space, including the following steps (1)-(3):

[0156] Step (1): The Host initiates a read request (Host Read).

[0157] Step (2): In the cache space (Cache) of the SSD, the data corresponding to the read request can be found, and the data is transferred to the Host.

[0158] Step (3): The SSD firmware actively initiates a Flash read according to a certain strategy, and prepares the data in advance into the Cache.

[0159] It can be seen that the above method is a prefetch strategy, that is, the SSD firmware pre-gets data from the flash array and saves the data to the cache space (Cache), so that after receiving the host's read request, the data can be directly read from the cache space.

[0160] From the above processing process of the host's write request and read request, the bandwidth (BW) provided by the flash device to the host may not be real-time matched with the bandwidth (BW) on the flash array (Flash Array) of the flash device. For example: the read bandwidth of the Host is 3000MB / s, and the read bandwidth that occurs on the flash may be 2500MB / s - 3500MB / s, and the same is true for the write direction. Therefore, it is necessary to calculate the bandwidth of the host and the flash memory space in real time, including the read bandwidth and the write bandwidth.

[0161] Specifically, please refer to Figure 5 , Figure 5 which is a schematic flow chart of calculating the read bandwidth of the host provided by the embodiment of the present application.

[0162] As Figure 5 shown, the process of calculating the read bandwidth of the host includes the following steps S501 - step S502:

[0163] Step S501: Real-time statistics of the first read data volume successfully read from the flash memory space to the host to construct a first read data volume curve.

[0164] It can be understood that in the data processing of the flash memory space, in addition to the host's read operation or write operation, the internal data transfer in the flash memory space will also read or write data to the flash array, which will also cause changes in the read bandwidth or write bandwidth.

[0165] Specifically, please refer to Figure 6 , Figure 6 which is another schematic diagram of reading user data from the flash memory space provided by the embodiment of the present application.

[0166] AsFigure 6 As shown, for a flash memory device, there are internal data migrations (moves, MVs) triggered by mechanisms such as garbage collection and data retention. Such internal data migrations also trigger Flash reads and writes. Therefore, in order to more accurately count the bandwidth of the flash memory space, when this application counts the bandwidth (BW) of the flash memory space, it only counts the requests initiated by the Host. Taking the case where there is an internal data migration and a Host read occur simultaneously as an example, when counting BW Flash only the Host read done part is counted, and the Mv Read Done part is not counted.

[0167] In the embodiments of this application, in order to distinguish the sources of read requests or write requests, marks are added to the operations of the Flash to characterize the sources of the requests. For example: data migrations from the host or inside the flash memory device.

[0168] It can be understood that at the same time, the flash memory array in the flash memory space can only process one of the read request, write request, and erase request, that is, the flash memory array can only process one of the read request, write request, and erase request at a certain moment. Therefore, for each request, this application sets a first identifier and a second identifier. Among them, the first identifier is used to characterize the type of the request. The types of requests include read requests, write requests, or erase requests. For example: if the first identifier is 1, it means the type of the request is a read request; if the first identifier is 2, it means the type of the request is a write request; if the first identifier is 3, it means the type of the request is an erase request. Among them, the second identifier is used to identify the source of the request. Among them, the sources of the requests include from the host and from the flash memory array. For example: if the second identifier is 1, it means the source of the request is from the host; if the second identifier is 2, it means the source of the request is from the flash memory array, so as to be able to distinguish data from the host or the flash memory device to better calculate the bandwidth.

[0169] It can be understood that for Nand Flash, only one of Program / Read can be performed on the same Die at the same time. There may be request backlogs on the same Die. Counting the data volume of Program / Read done can reflect the current real-time bandwidth.

[0170] Specifically, the real-time statistics of the first read data volume successfully read from the flash memory space to the host to construct a first read data volume curve includes:

[0171] The first read data volume successfully read from the flash memory space to the host is counted and recorded as Cnt. It can be understood that the first read data volume increases with time. By recording the first read data volume corresponding to each moment, the first read data volume curve can be constructed.

[0172] Please refer to Figure 7 , Figure 7 which is a schematic diagram of a first read data volume curve provided by an embodiment of the present application.

[0173] As Figure 7 shown, the abscissa of the first read data volume curve is time t, and the ordinate is the read data volume Cnt, that is, the first read data volume successfully read from the flash memory space to the host.

[0174] Step S502: Calculate the read bandwidth of the host according to the sampling period.

[0175] Among them, the read bandwidth of the host is the bandwidth corresponding to the reading performed by the flash memory space for the read request of the host, and the read bandwidth of the host = increment of the first read data volume within the sampling period / sampling period. Specifically, record the current first read data volume in real time, denoted as Cnt Read _ curr , and record the current time T Read _ curr , where the sampling period corresponds to the first moment and the current moment, the first moment is the start moment of the sampling period, and the current moment is the end moment of the sampling period.

[0176] Assume that the first read data volume at the first moment is denoted as Cnt Read _ Rcd1 , and the first moment is denoted as T Read _ Rcd1 , then according to the first read data volume Cnt Read _ Rcd1 at the first moment, the current read data volume Cnt Read _ curr1 , the first moment T Read _ Rcd1 and the current moment T Read _ curr1 , the read bandwidth of the host can be calculated.

[0177] The read bandwidth BW Host _ read = (Cnt Read _ curr1 - Cnt Read _ Rcd1 ) / (T Read _ curr1- - T Read _ Rcd1 ), where (Cnt Read _ curr - Cnt Read _ Rcd ) is the increment of the first read data volume within the sampling period.

[0178] As shown Figure 7 , assuming that the duration of the sampling period is T timer , then the read bandwidth BW Host _ read = (Cnt Read _ curr1 - Cnt Read _ Rcd1 ) / (T Read _ curr1- T Read _ Rcd1 ) = (Cnt Read _ curr1 - Cnt Read _ Rcd1 ) / T timer

[0179] In the embodiments of the present application, by adjusting the duration T of the sampling period timer and the first moment, and determining the second moment, the read bandwidth corresponding to any sampling period can be calculated by using the first read data volume curve.

[0180] Specifically, please refer to Figure 8 , Figure 8 which is a schematic flow chart of calculating the write bandwidth of the host provided by the embodiments of the present application.

[0181] As shown Figure 8 , the process of calculating the read bandwidth of the host includes the following steps S801 - step S802:

[0182] Step S801: Real - time statistics of the first write data volume successfully written into the cache space to construct a first write data volume curve.

[0183] Specifically, the first write data volume successfully written into the cache space is statistically recorded as Cnt write _ curr1 . It can be understood that the write data volume successfully written into the cache space refers to the data volume that the host writes user data into the cache space, and the first write data volume increases with time. By recording the first write data volume corresponding to each moment, a first write data volume curve can be constructed.

[0184] It can be understood that the first write data volume curve is similar to the curve in Figure 7 , the difference is that the ordinate is the first write data volume successfully written into the cache space.

[0185] Step S802: Calculate the write bandwidth of the host according to the sampling period.

[0186] Among them, the write bandwidth of the host is the bandwidth corresponding to the writing performed by the flash memory space for the write requests of the host, and the write bandwidth of the host = the increment of the first write data volume within the sampling period / the sampling period. Specifically, the write bandwidth of the host = BW Host _ Write =(Cnt write _ curr1 -Cnt write _ Rcd1 ) / (T write _ curr1- T write _ Rcd1 )

[0187] Among them, BW Host _ Write is the write bandwidth of the host, Cnt write _ curr1 is the first write data volume at the current moment, Cnt write _ Rcd1 is the first write data volume at the first moment, T write _ curr1 is the current moment, T write _ Rcd1 is the first moment.

[0188] It should be noted that the calculation process of the write bandwidth of the host is similar to the calculation process of the read bandwidth of the host. For specific content, reference can be made to the above calculation process and related descriptions of the read bandwidth of the host, which will not be elaborated here.

[0189] Please refer to Figure 9 , Figure 9 which is a schematic flowchart of a process for calculating the write bandwidth of a flash memory space provided by an embodiment of the present application.

[0190] As Figure 9 shown, the process for calculating the write bandwidth of the flash memory space includes the following steps S901 - step S902:

[0191] Step S901: Real - time statistics of the second read - out data volume successfully read out from the flash memory space to the cache space to construct a second read - out data volume curve.

[0192] Specifically, the second read - out data volume successfully read out from the flash memory space to the cache space is statistically recorded as Cnt Read _ curr2It can be understood that the second read data volume successfully read from the flash memory space to the cache space refers to the data volume of the user data in the flash memory space read into the cache space, and this second read data volume increases with time. By recording the second read data volume corresponding to each moment, a second read data volume curve can be constructed. Among them, the abscissa of the second read data volume curve is time, and the ordinate is the second read data volume successfully read from the flash memory space to the cache space.

[0193] It can be understood that the second read data volume curve is similar to the curve in Figure 7 , and the difference is that the ordinate is the second read data volume successfully read into the cache space.

[0194] Step S902: Calculate the read bandwidth of the flash memory space according to the sampling period.

[0195] Among them, the read bandwidth of the flash memory space = the increment of the second read data volume within the sampling period / the sampling period. Specifically, the read bandwidth of the flash memory space = BW SSD _ Read =(Cnt Read _ curr2 -Cnt Read _ Rcd2 ) / (T Read _ curr2 -T write _ Rcd2 )

[0196] Among them, BW SSD _ Write is the write bandwidth of the host, Cnt Read _ curr1 is the second read data volume at the current moment, Cnt Read _ Rcd2 is the second read data volume at the first moment, T Read _ curr2 is the current moment, and T Read _ Rcd2 is the first moment.

[0197] It should be noted that the calculation process of the read bandwidth of the flash memory space is similar to the calculation process of the read bandwidth of the host. For specific content, reference can be made to the above calculation process and related descriptions of the read bandwidth of the host, which will not be elaborated here.

[0198] Please refer to Figure 10 , Figure 10 which is a schematic flowchart of a process for calculating the read bandwidth of a flash memory space provided by an embodiment of the present application.

[0199] As shown in Figure 10As shown in the figure, the process of calculating the write bandwidth of the flash memory space includes the following steps S1001 - S1002:

[0200] Step S1001: Statistically count the second write data volume successfully written into the flash memory space in real time to construct a second write data volume curve.

[0201] Specifically, statistically count the second write data volume successfully written into the flash memory space, denoted as Cnt Program _ curr2 . It can be understood that the second write data volume successfully written into the flash memory space refers to the data volume of writing user data into the flash memory space, and this second write data volume increases with time. By recording the second write data volume corresponding to each moment, a second write data volume curve can be constructed. Among them, the abscissa of the second write data volume curve is time, and the ordinate is the second write data volume successfully written into the flash memory space.

[0202] It can be understood that the second write data volume curve is similar to the curve in Figure 7 , and the difference is that the ordinate is the second write data volume successfully written into the flash memory space.

[0203] Step S1002: Calculate the write bandwidth of the flash memory space according to the sampling period.

[0204] Among them, the write bandwidth of the flash memory space = the increment of the second write data volume within the sampling period / the sampling period. Specifically, the write bandwidth of the flash memory space = BW SSD _ Program =(Cnt Program _ curr2 - Cnt Program _ Rcd2 ) / (T Program _ curr2- T Program _ Rcd2 )

[0205] Among them, BW SSD _ Program is the write bandwidth of the flash memory space, Cnt Program _ curr2 is the second write data volume at the current moment, Cnt Program _ Rcd2 is the second write data volume at the first moment, T Program _ curr2 is the current moment, T Program _ Rcd2 is the first moment.

[0206] It should be noted that the calculation process of the write bandwidth of the flash memory space is similar to that of the read bandwidth of the host. For specific details, reference can be made to the above-mentioned calculation process and related descriptions of the host's read bandwidth, which will not be elaborated here.

[0207] Step S202: Calculate the total power consumption of the flash memory space in real time to sample several total power consumptions.

[0208] Among them, the flash memory space includes multiple super blocks, each super block includes multiple physical blocks, and each physical block includes multiple word lines (Word Line, WL).

[0209] Specifically, please refer to Figure 11 , Figure 11 which is a schematic flowchart of calculating the total power consumption of the flash memory space in real time provided by an embodiment of the present application.

[0210] As Figure 11 shown, the process of calculating the total power consumption of the flash memory space in real time includes the following steps S1101 - step S1106:

[0211] Step S1101: Obtain the overall disk basic power consumption of the flash memory device.

[0212] Specifically, the overall disk basic power consumption of the flash memory device refers to the basic power consumption of the flash memory device when there is no read operation, write operation, or erase operation on the flash array (Flash Array). This overall disk basic power consumption can be obtained through the product data manual or specification provided by the SSD manufacturer, or can be measured through a power consumption measurement tool, such as a power meter or an oscilloscope. For example, after the flash memory device is powered on and left idle, that is, without performing read operations, write operations, or erase operations, at this time, use a power consumption measurement tool to measure the overall disk basic power consumption, denoted as PS 0 .

[0213] Step S1102: When receiving a read request from the host, determine the first read power consumption according to the read power consumptions corresponding to the word lines of several physical blocks corresponding to the read request to update the current overall disk power consumption.

[0214] It can be understood that when the flash memory device receives a read request from the host, it needs to feedback the corresponding user data to the host, and at this time, corresponding read power consumption will be generated.

[0215] For Nand Flash, the power consumptions of read operations occurring at different word lines (Word Line, WL) of different physical blocks (Block) are different. Therefore, in the embodiments of the present application, the read power consumption of the host is calculated in units of word lines.

[0216] Specifically, the current overall power consumption = overall basic power consumption + first read power consumption, and the first read power consumption is the sum of the read power consumptions corresponding to the word lines of several physical blocks.

[0217] It should be noted that before calculating the first read power consumption, it is necessary to pre-calculate the read power consumption corresponding to each word line of each physical block.

[0218] Please refer to Figure 12 , Figure 12 the schematic flowchart provided by an embodiment of the present application for pre-calculating the read power consumption corresponding to each word line of each physical block.

[0219] As Figure 12 shown, pre-calculating the read power consumption corresponding to each word line of each physical block includes the following steps S1201 - step S1202:

[0220] Step S1201: Perform read operations on the Nth word line of each super block in sequence to determine the first overall power consumption.

[0221] Specifically, the first overall power consumption is the sum of the read power consumption generated by performing read operations on the Nth word line of each super block and the overall basic power consumption. By performing read operations on the Nth word line (WL N ), the read power consumption of all physical blocks of the super block at WL N can be calculated, where N is an integer, and 0 ≤ N ≤ the total number of word lines of the super block.

[0222] Step S1202: Calculate the read power consumption of each physical block at the Nth word line according to the overall basic power consumption and the first overall power consumption.

[0223] Please refer to Figure 13 , Figure 13 which is the schematic diagram of a super block provided by an embodiment of the present application.

[0224] As Figure 13 shown, a super block (SuperBlock, SBLK) includes X physical blocks (Block), and each physical block includes (M + 1) word lines (Word Line). In the embodiment of the present application, the read power consumption and write power consumption of the host are both calculated in units of word lines.

[0225] It can be understood that the flash memory device includes multiple Dies, and each Die selects one Block to form a set, and this set is the super block. Since each Die includes multiple Blocks, multiple super blocks can be formed.

[0226] Specifically, the read power consumption of each physical block on the Nth word line = (the first overall disk power consumption - the overall disk base power consumption) / X, where X is the number of physical blocks included in a super block.

[0227] For example: the overall disk base power consumption is PS 0 , the first overall disk power consumption is PS 1 , assuming that (the first overall disk power consumption - the overall disk base power consumption) is PS delta_Read , that is, PS 1 - PS 0 = PS delta_Read , where PS delta_Read represents the read power consumption of X Blocks on WL N , then PS n = PS delta_Read / X can represent the read power consumption of a single Block on WL N .

[0228] Furthermore, the present application can also generate a first power consumption table according to the read power consumption of each physical block on the Nth word line, where the first power consumption table is used to store the read power consumption of each physical block on the Nth word line, and the read power consumption corresponds one-to-one with the word lines of the physical blocks.

[0229] In the embodiments of the present application, by generating the first power consumption table, the read power consumption of the word lines of the physical blocks corresponding to the read request can be queried through the first power consumption table, so as to better calculate the total power consumption of the flash memory space.

[0230] In the embodiments of the present application, the power consumption generated by data transmission and the read operation of Nand Flash is not distinguished. Specifically, reading data from the Flash Array to the Cache will generate read power consumption, and the transmission process will also generate transmission power consumption. The present application does not distinguish, that is, the read power consumption includes the power consumption generated by reading data from the Flash Array to the Cache, and also includes the transmission power consumption generated during the data transmission process.

[0231] Step S1103: When receiving a write request from the host, determine a first write power consumption according to the write power consumption corresponding to the word lines of several physical blocks corresponding to the write request, so as to update the current overall disk power consumption.

[0232] It can be understood that when the flash memory device receives a write request from the host, it is necessary to write the user data sent by the host into the cache space or the flash memory space, and at this time, corresponding write power consumption will be generated.

[0233] For Nand Flash, the power consumption of write operations occurring at different word lines (WL) in different physical blocks (Block) is different. Therefore, in the embodiments of the present application, the write power consumption of the host is calculated in units of word lines. And due to the characteristics of Nand Flash, when measuring the write power consumption, it is necessary to measure each word line one by one. For example: in the order of WL 0 、WL 1 、WL 2 ,……,WL M , calculate the write power consumption corresponding to each word line in sequence.

[0234] It should be noted that since one Block includes multiple WLs, for example: including hundreds of WLs, and the write operation is in units of word lines, therefore, writing a full Block requires writing operations on hundreds of word lines, while the erase operation is in units of physical blocks. Therefore, the number of write operations and erase operations differs significantly. Therefore, the erase operation in the embodiments of the present application is approximated as a write operation.

[0235] Specifically, the current overall disk power consumption = overall disk basic power consumption + first write power consumption, and the first write power consumption is the sum of the write power consumptions corresponding to the word lines of several physical blocks.

[0236] It should be noted that before calculating the first write power consumption, it is necessary to pre-calculate the write power consumption corresponding to each word line of each physical block.

[0237] Please refer to Figure 14 , Figure 14 which is a schematic flowchart of a method for pre-calculating the write power consumption corresponding to each word line of each physical block provided by the embodiments of the present application.

[0238] As Figure 14 shown, pre-calculating the write power consumption corresponding to each word line of each physical block includes the following steps S1401 - step S1402:

[0239] Step S1401: Perform write operations on the Nth word line of each super block in sequence to determine the second overall disk power consumption.

[0240] Specifically, the second overall disk power consumption is the sum of the write power consumption generated by performing write operations on the Nth word line of each super block and the overall disk basic power consumption. By performing write operations on the Nth word line (WL N ) of each super block, the read power consumption of all physical blocks of the super block at WL N can be calculated, where N is an integer, and 0 ≤ N ≤ the total number of word lines of the super block.

[0241] Step S1402: Calculate the write power consumption of each physical block on the Nth word line according to the overall disk base power consumption and the second overall disk power consumption.

[0242] Specifically, the write power consumption of each physical block on the Nth word line = (the second overall disk power consumption - the overall disk base power consumption) / X, where X is the number of physical blocks included in a super block.

[0243] For example: the overall disk base power consumption is PS 0 , the second overall disk power consumption is PS 2 , assume that (the first overall disk power consumption - the overall disk base power consumption) is PS delta_Write , that is, PS 2 - PS 0 = PS delta_Write , where PS delta_Write represents the write power consumption of X Blocks on WL N , then PS n = PS delta_Write / X can represent the write power consumption of a single Block on WL N .

[0244] Furthermore, the present application can also generate a second power consumption table according to the write power consumption of each physical block on the Nth word line. The second power consumption table is used to store the write power consumption of each physical block on the Nth word line, where the write power consumption corresponds one-to-one with the word lines of the physical blocks.

[0245] In the embodiments of the present application, by generating the second power consumption table, the write power consumption of the word lines of the physical blocks corresponding to the write requests can be queried through the second power consumption table, so as to better calculate the total power consumption of the flash memory space.

[0246] In the embodiments of the present application, the power consumption generated by data transmission and read operations on Nand Flash is not distinguished. Specifically, it takes transmission power consumption to transfer data from the cache space (Cache) to the flash memory array (Flash Array), and it also takes write power consumption to program (Program) the data in the Flash Array. The present application does not distinguish, that is, the write power consumption includes the transmission power consumption generated by transferring data from the cache space (Cache) to the flash memory array (Flash Array), and also includes the write power consumption generated by programming (Program) the data in the Flash Array.

[0247] Step S1104: After the read request is completed in the flash memory space, reduce the current overall disk power consumption of the flash memory space by the first read power consumption to update the current overall disk power consumption;

[0248] Specifically, a read request corresponds to word lines of several physical blocks, and the first read power consumption is the sum of the read power consumptions corresponding to the word lines of the several physical blocks. After the read request is completed in the flash memory space, the current overall disk power consumption needs to be reduced by the first read power consumption, that is, the current overall disk power consumption = the current overall disk power consumption - the first read power consumption.

[0249] Step S1105: After the write request is completed in the flash memory space, reduce the current overall disk power consumption of the flash memory space by the first write power consumption to update the current overall disk power consumption;

[0250] Specifically, a write request corresponds to word lines of several physical blocks, and the first write power consumption is the sum of the write power consumptions corresponding to the word lines of the several physical blocks. After the write request is completed in the flash memory space, the current overall disk power consumption needs to be reduced by the first write power consumption, that is, the current overall disk power consumption = the current overall disk power consumption - the first write power consumption.

[0251] Step S1106: Use the current overall disk power consumption obtained by real-time update as the total power consumption of the flash memory space.

[0252] Specifically, the first read power consumption generated by a read operation and the first write power consumption generated by a write operation increase the overall disk power consumption when a read request / write request from the host is received; after the read request / write request is completed, the overall disk power consumption is reduced, so as to real-time update the current overall disk power consumption, and use the current overall disk power consumption obtained by real-time update as the total power consumption of the flash memory space.

[0253] Step S203: When the power consumption state of the flash memory device is in a bandwidth stable state, smooth several total power consumptions based on a smoothing algorithm to obtain a first total power consumption.

[0254] Among them, the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and a first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and a second bandwidth threshold.

[0255] Specifically, the smoothing algorithm includes algorithms such as Moving Average, Median Filtering, Locally Weighted Regression Smoothing, Gaussian Smoothing, Weighted Regression, Box Smoothing, Exponential Smoothing, etc. For example: the smoothing algorithm is the first-order lag filtering algorithm in the exponential smoothing method, and the calculation method of the first-order lag filtering algorithm is as follows:

[0256] PS avg =PS avg *(1 - a)+PS*a

[0257] Among them, PS avgLet \(P_1\) be the first total power consumption, \(a\) be a coefficient, and \(BW\) be the total power consumption of sampling.

[0258] Alternatively, a circular queue is used to record the total power consumption in the last period of time, that is, multiple total power consumptions in the last period of time, and the average value of the multiple total power consumptions is taken to obtain the first total power consumption.

[0259] It can be understood that the smaller the value of \(a\), the better the smoothing effect and the longer the sampling period. For example, when the sampling period is 100 ms, \(a = 1 / 64\) can be taken.

[0260] In the embodiments of the present application, by sampling the historical total power consumption and using a smoothing algorithm to smooth multiple historical total power consumptions, the first total power consumption is obtained, so that the power consumption of the flash memory device can be better smoothed, and then the peak power consumption can be optimized, thereby improving the stability of the flash memory device.

[0261] In the embodiments of the present application, the power consumption state of the flash memory device is determined by the read bandwidth or write bandwidth of the host and the read bandwidth or write bandwidth of the flash memory space.

[0262] Specifically, please refer to Figure 15 , Figure 15 which is a schematic flow chart for determining the power consumption state of a flash memory device provided in the embodiments of the present application.

[0263] As Figure 15 shown, the process of determining the power consumption state of the flash memory device includes the following steps S1501 - step S1504:

[0264] Step S1501: Obtain the read bandwidth or write bandwidth of the host and the read bandwidth or write bandwidth of the flash memory space.

[0265] Step S1502: If the bandwidth state of the host is in a fluctuating state, determine that the power consumption state of the flash memory device is a normal read / write state.

[0266] Step S1503: If the bandwidth state of the host is in a stable state, determine that the power consumption state of the flash memory device is a bandwidth stable state.

[0267] Specifically, the power consumption state of the flash memory device needs to be determined by the bandwidth state of the host.

[0268] Please refer to Figure 16 , Figure 16 which is a schematic flow chart for determining the bandwidth state of a host provided in the embodiments of the present application.

[0269] As Figure 16 shown, the process of determining the bandwidth state of the host includes the following steps S1601 - step S1604:

[0270] Step S1601: Calculate the first read bandwidth or the first write bandwidth of the host within the first sampling period.

[0271] Specifically, through the above-mentioned first read data volume curve, the first read bandwidth of the host can be calculated within the first sampling period, denoted as BW Host_Read1 ; through the above-mentioned first write data volume curve, the first write bandwidth of the host can be calculated within the first sampling period, denoted as BW Host_Write1 .

[0272] Step S1602: Calculate the second read bandwidth or the second write bandwidth of the host within the second sampling period.

[0273] Similarly, through the above-mentioned first read data volume curve, the second read bandwidth of the host can be calculated within the second sampling period, denoted as BW Host_Read2 ; through the above-mentioned first write data volume curve, the second write bandwidth BW of the host can be calculated within the second sampling period Host_Write2 .

[0274] In the embodiment of the present application, the first sampling period is less than the second sampling period. It can be considered that the first sampling period is a short sampling period and the second sampling period is a long sampling period.

[0275] Please refer to Figure 17 , Figure 17 which is a schematic diagram of a short sampling period and a long sampling period provided by the embodiment of the present application.

[0276] As Figure 17 shown, the bandwidth calculated by the short sampling period is BW S , and the bandwidth calculated by the long sampling period is BW L . It can be understood that after the bandwidth state of the host is in a stable state, the bandwidth corresponding to the long sampling period can be used to characterize the current bandwidth of the host.

[0277] Step S1603: If the absolute value of the difference between the first read bandwidth and the second read bandwidth is less than the first bandwidth fluctuation threshold, and the absolute value of the difference between the first write bandwidth and the second write bandwidth is less than the first bandwidth fluctuation threshold, then determine that the bandwidth state of the host is in a stable state.

[0278] Specifically, if ABS(BW Host_Read1 , BW Host_Read2 ) < BW thred1 , and ABS(BW Host_Write1 , BW Host_Write2 ) < BW thred1 , then determine that the bandwidth state of the host is in a stable state. At this time, it can be determined that the power consumption state of the flash memory device is a bandwidth stable state, where BW thred1is the first bandwidth fluctuation threshold, and ABS is an algorithm for calculating the absolute value of the difference between two numbers.

[0279] In the embodiments of the present application, the first bandwidth fluctuation threshold BW thred1 can be set according to the empirical value of the actual scenario. For example, it can be set according to the current bandwidth of the host. For instance, it can be set to MIN (the current bandwidth of the host * the first preset ratio, the first preset bandwidth threshold), that is, the smaller value between the current bandwidth of the host * the first preset ratio and the first preset bandwidth threshold. Here, the current bandwidth of the host is the performance bandwidth of the host. For example, the current read bandwidth of the host or the current write bandwidth of the host. Preferably, the smaller value between the current read bandwidth or the current write bandwidth of the host is taken.

[0280] It can be understood that the first preset ratio can be set according to specific needs. For example, it can be set to 99%, and the first preset bandwidth threshold can also be set according to specific needs. For example, it can be set to 100 MB / s. Then, at this time, the first bandwidth fluctuation threshold BW thred1 = MIN(BW Host * 99%, 100 MB / s), where MIN is an algorithm for finding the smaller value of two numbers.

[0281] Step S1604: If the absolute value of the difference between the first read bandwidth and the second read bandwidth is greater than or equal to the first bandwidth fluctuation threshold, or the absolute value of the difference between the first write bandwidth and the second write bandwidth is greater than or equal to the first bandwidth fluctuation threshold, then determine that the bandwidth state of the host is a fluctuating state.

[0282] Specifically, if ABS(BW Host_Read1 , BW Host_Read2 ) ≥ BW thred1 , or ABS(BW Host_Write1 , BW Host_Write 2 ) ≥ BW thred1 , then determine that the bandwidth state of the host is a fluctuating state. At this time, it can be determined that the power consumption state of the flash memory device is a normal read / write state.

[0283] Step S1504: If the read bandwidth of the flash memory space is greater than the read bandwidth of the host, or the write bandwidth of the flash memory space is greater than the write bandwidth of the host, then determine that the power consumption state of the flash memory device is a peak power consumption state.

[0284] Specifically, it can be determined whether the power consumption state of the flash memory device is a peak power consumption state according to the size relationship between the read bandwidth of the flash memory space and the read bandwidth of the host, or according to the size relationship between the write bandwidth of the flash memory space and the write bandwidth of the host.

[0285] It is understandable that the host corresponds to a maximum host bandwidth threshold. If the write bandwidth or read bandwidth of the flash memory space is greater than this maximum host bandwidth threshold, it is directly determined that the flash memory device is in the peak power consumption state.

[0286] Specifically, please refer to Figure 18 , Figure 18 which is a schematic flowchart of a process for determining whether a flash memory device is in the peak power consumption state provided by an embodiment of the present application.

[0287] As Figure 18 shown, the process of determining whether a flash memory device is in the peak power consumption state includes the following steps S1801 - step S1805:

[0288] Step S1801: Obtain the write bandwidth of the flash memory space.

[0289] Step S1802: Determine whether the write bandwidth of the flash memory space is greater than the maximum host bandwidth threshold.

[0290] Specifically, assume that the write bandwidth of the flash memory space is BW SSD_Program , and the maximum host bandwidth threshold is BW host_max . If BW SSD_Program > BW host_max , then proceed to step S1804; if BW SSD_Program ≤ BW host_max , then proceed to step S1803.

[0291] Step S1803: Determine whether the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold.

[0292] Specifically, assume that the second bandwidth fluctuation threshold is BW thred2 , and the write bandwidth of the host is BW Host_Write . Then determine whether BW SSD_Program is greater than BW Host_Write + BW thred2 . If BW SSD_Program > BW Host_Write + BW thred2 , then proceed to step S1804; if BW SSD_Program ≤ BW Host_Write + BW thred2 , then proceed to step S1805.

[0293] In the embodiment of the present application, the second bandwidth fluctuation threshold is BW thred2 which can be calibrated according to the experimental effect of the usage scenario. For example, it is set to 50 MB / s.

[0294] Step S1804: Determine that the flash memory device is in the peak power consumption state.

[0295] Specifically, if the write bandwidth of the flash memory space is greater than the maximum host bandwidth threshold, or if the write bandwidth of the flash memory space is greater than the sum of the host write bandwidth and the second bandwidth fluctuation threshold, it is determined that the flash memory device is in the peak power consumption state.

[0296] Step S1805: Determine that the flash memory device is not in the peak power consumption state.

[0297] If the write bandwidth of the flash memory space is less than or equal to the sum of the host write bandwidth and the second bandwidth fluctuation threshold, it is determined that the flash memory device is not in the peak power consumption state.

[0298] Specifically, please refer to Figure 19 , Figure 19 which is another schematic flowchart for determining whether the flash memory device is in the peak power consumption state provided by the embodiments of the present application.

[0299] As Figure 19 shown, the process for determining whether the flash memory device is in the peak power consumption state includes the following steps S1901 - step S1905:

[0300] Step S1901: Obtain the read bandwidth of the flash memory space.

[0301] Step S1902: Determine whether the read bandwidth of the flash memory space is greater than the maximum host bandwidth threshold.

[0302] Specifically, assume that the read bandwidth of the flash memory space is BW SSD_Read , and the maximum host bandwidth threshold is BW host_max . If BW SSD_Read > BW host_max , then go to step S1904; if BW SSD_Read ≤BW host_max , then go to step S1903.

[0303] It can be understood that for flash memory devices, such as solid - state drives (SSDs), there is an upper bandwidth limit BW host_max for the protocol of the Host interface. For example, for an SSD with NVMe over PCIE Gen4, in a 4 - lane configuration, the upper performance limit BW host_max for read and write in one direction is generally 7500MB / s. The cache space (Cache) of the SSD generally uses Double Data Rate Synchronous Dynamic Random Access Memory (DDRAM) or Synchronous Dynamic Random Access Memory (SDRAM). The read and write bandwidths of DDRAM and SDRAM are greater than BW host_maxFor large - capacity disks, the Flash Array will also be relatively large and will have multiple dies. For example, for a 64T SSD, when using 1Tb / Die Nand Flash, generally 256 dies will be configured on the disk. It can be understood that the specific number of dies will vary according to the specific implementation. At this time, BW Flash may also be greater than BW host_max . Therefore, in this application, when BW Flash >BW host_max , there is no need to judge the relationship between BW Flash and BW host , and directly perform the restriction, setting the state of the flash device to PeakPS_State.

[0304] Step S1903: Determine whether the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold.

[0305] Specifically, assuming that the second bandwidth fluctuation threshold is BW thred2 , and the read bandwidth of the host is BW Host_Read , then judge whether BW SSD_Read is greater than BW Host_Read +BW thred2 . If BW SSD_Read >BW Host_Read +BW thred2 , then go to step S1904; if BW SSD_Read ≤BW Host_Read +BW thred2 , then go to step S1905.

[0306] In the embodiment of this application, the second bandwidth fluctuation threshold BW thred2 can be calibrated according to the experimental effect of the usage scenario. For example, it can be set to 50MB / s.

[0307] Step S1904: Determine that the flash device is in the peak power consumption state.

[0308] Specifically, if the read bandwidth of the flash memory space is greater than the maximum host bandwidth threshold, or the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, then determine that the flash device is in the peak power consumption state.

[0309] Step S1905: Determine that the flash device is not in the peak power consumption state.

[0310] If the read bandwidth of the flash memory space is less than or equal to the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, then determine that the flash device is not in the peak power consumption state.

[0311] In the embodiments of the present application, by first determining whether the read bandwidth or the write bandwidth of the flash memory space is greater than the maximum host bandwidth threshold, if so, it is not necessary to further determine the size relationship between the read bandwidth or the write bandwidth corresponding to the flash memory space and the host, which can improve the judgment efficiency.

[0312] Further, after determining the power consumption state of the flash memory device, if the current conditions change, it is necessary to dynamically switch the power consumption state of the flash memory device.

[0313] Please refer to Figure 20 , Figure 20 which is a schematic diagram of switching the power consumption state of the flash memory device provided by the embodiments of the present application.

[0314] As Figure 20 shown, when the host starts to write user data to the flash memory device, or when the flash memory array of the flash memory device starts to write, read, or erase user data, the power consumption state of the flash memory device enters the normal read / write state (Normal_State).

[0315] When the power consumption state of the flash memory device is in the normal read / write state, if the current conditions meet the first condition, the power consumption state of the flash memory device is switched to the bandwidth stable state (BWStable_State), where the first condition includes: the bandwidth state of the host is in a stable state.

[0316] Specifically, the bandwidth state of the host being in a stable state includes: the absolute value of the difference between the first read bandwidth and the second read bandwidth is less than the first bandwidth fluctuation threshold, and the absolute value of the difference between the first write bandwidth and the second write bandwidth is less than the first bandwidth fluctuation threshold.

[0317] When the power consumption state of the flash memory device is in the bandwidth stable state, if the current conditions meet the second condition, the power consumption state of the flash memory device is switched to the normal read / write state, where the second condition includes: the bandwidth state of the host is in a fluctuating state.

[0318] Specifically, the bandwidth state of the host being in a fluctuating state includes: the absolute value of the difference between the first read bandwidth and the second read bandwidth is greater than or equal to the first bandwidth fluctuation threshold, or the absolute value of the difference between the first write bandwidth and the second write bandwidth is greater than or equal to the first bandwidth fluctuation threshold.

[0319] When the power consumption state of the flash memory device is in the bandwidth stable state, if the current conditions meet the third condition, the power consumption state of the flash memory device is switched to the peak power consumption state (PeakPS_State), where the third condition includes: the read bandwidth of the flash memory space is greater than or equal to the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, or the write bandwidth of the flash memory space is greater than or equal to the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold.

[0320] Specifically, assume that the second bandwidth fluctuation threshold is BW thred2 , at this time, if BW Flash ≥BW host +BW thred2 , then switch the power consumption state from the bandwidth stable state (BWStable_State) to the peak power consumption state (PeakPS_State).

[0321] In the embodiment of the present application, the second bandwidth fluctuation threshold is BW thred2 which can be calibrated according to the experimental effect of the usage scenario. For example, it is set to 50MB / s.

[0322] When the power consumption state of the flash memory device is in the peak power consumption state, if the current condition meets the fourth condition, then switch the power consumption state of the flash memory device to the bandwidth stable state, where the fourth condition includes: the read bandwidth of the flash memory space is less than the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, and the write bandwidth of the flash memory space is less than the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold;

[0323] When the power consumption state of the flash memory device is in the peak power consumption state, if the current condition meets the second condition, then switch the power consumption state of the flash memory device to the normal read / write state.

[0324] It can be understood that the total power consumption of the flash memory space is the sum of the power consumptions of all read operations, write operations, and erase operations of the flash memory array (Flash Array) in the flash memory space.

[0325] Assume that the total power consumption of the flash memory space is PS total , then when sending a write operation (Program) or a read operation (Read) to the Flash Array, the total power consumption PS of the flash memory space total plus the PS corresponding to the WL position where each Block Program / Read occurs in the write request or read request N_Program / PS N_Read . It can be understood that a write request or a read request may be an operation of multiple planes (multi-plane), and multiple Block Program / Reads will occur simultaneously. Therefore, it is necessary to add the write power consumption (PS N_Program ) or the read power consumption (PS N_Read ) corresponding to the WL position of each Block corresponding to the write request or read request.

[0326] And, when the Flash Array completes the write request or read request, PS total needs to subtract the write power consumption corresponding to the WL position where each Block Program / Read occurs in the write request or read request (PSN_Program ) or read power consumption (PS N_Read ).

[0327] In the embodiment of the present application, the total power consumption of the flash memory space is calculated in real time to sample several total power consumptions, including:

[0328] In each sampling period, the total power consumption of the flash memory space is sampled to obtain several total power consumptions. For example, the sampling period is T sample , after each sampling period, the total power consumption PS of the flash memory space total is sampled to record multiple total power consumptions, which are PStotal1, PStotal2, PStotal 3,..., PStotaly respectively, where y is the number of sampling times.

[0329] Among them, the sampling period T sample can be set according to specific needs. For example, the sampling period is set to 50 ms, and the number of sampling times y can be set according to specific needs. For example, if the number of sampling times y = 20, then sampling y data at this time requires 50 ms * 20 = 1 s.

[0330] Please refer to again Figure 21 , Figure 21 is a schematic diagram of sampling the total power consumption of the flash memory space provided by the embodiment of the present application.

[0331] As Figure 21 shown, by setting a power consumption queue, y total power consumptions are stored in the power consumption queue, and the total power consumption in the power consumption queue is updated in real time. For example, according to the time sequence of entering the queue, the earliest entered total power consumption PStotal_1 is eliminated, and the latest total power consumption PStotal_y is inserted.

[0332] Step S204: When the power consumption state of the flash memory device is in the peak power consumption state, if the total power consumption of the flash memory space is greater than the first total power consumption, stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption.

[0333] Among them, the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth threshold. It can be understood that the first total power consumption is less than the total power consumption of the flash memory space in the peak power consumption state.

[0334] It can be understood that the first bandwidth threshold and the second bandwidth threshold can be set according to specific needs. For example, they are set to 50 MB / s and 45 MB / s respectively. The first bandwidth threshold can be equal to the second bandwidth threshold or not equal to the second bandwidth threshold.

[0335] When the read bandwidth of the flash memory space is greater than the sum of the host's read bandwidth and the first bandwidth threshold, or when the write bandwidth of the flash memory space is greater than the sum of the host's write bandwidth and the second bandwidth threshold, at this time, it is considered that the power consumption state of the flash memory device is in the peak power consumption state. Then, it is necessary to control the power consumption of the flash memory device. Specifically, by stopping sending read requests or write requests to the flash memory space, the power consumption of the flash memory device will no longer increase. And, wait for a read request or a write request in the flash memory array to be completed, so as to reduce the power consumption of the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption. At this time, read requests or write requests can be distributed to the flash memory space.

[0336] It can be understood that when stopping distributing read requests or write requests to the flash memory space, the flash memory device first suspends the read requests or write requests sent by the host. After the total power consumption of the flash memory space is less than or equal to the first total power consumption, the suspended read requests or write requests are then sent to the flash memory space.

[0337] Please refer to Figure 22 , Figure 22 which is a schematic diagram of a first total power consumption provided by an embodiment of the present application.

[0338] As Figure 22 shown, the first total power consumption is PS Thred . If the current total power consumption is greater than the first total power consumption, then stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption.

[0339] In the embodiment of the present application, by stopping sending read requests or write requests to the flash memory space, the present application can control the total power consumption of the flash memory device, so that the total power consumption is controlled at the first total power consumption, thereby optimizing the peak power consumption and further improving the stability of the flash memory device.

[0340] Further, when the bandwidth of the flash memory space is close to the host's bandwidth, the present application performs power consumption sampling.

[0341] Please refer to Figure 23 , Figure 23 which is a schematic flowchart of sampling the total power consumption provided by an embodiment of the present application.

[0342] As Figure 23 shown, the process of sampling the total power consumption includes the following steps S2301 - step S2302:

[0343] Step S2301: Regularly sample several total power consumptions;

[0344] Specifically, when the power consumption state of the flash memory device is in the bandwidth stable state, if the read bandwidth of the flash memory space is greater than the difference between the read bandwidth of the host and the third bandwidth fluctuation threshold, or the write bandwidth of the flash memory space is greater than the difference between the write bandwidth of the host and the fourth bandwidth fluctuation threshold, then a plurality of total power consumptions are sampled at regular intervals.

[0345] Assume that the read bandwidth of the flash memory space is BW SSD _ Read , and the read bandwidth of the host is BW Host _ read , and the third bandwidth fluctuation threshold is BW thred3 . If BW Flash ≥BW host -BW thred3 , then it is considered that BW Flash is close to or reaches BW host , and power consumption sampling can be performed at this time.

[0346] Among them, the third bandwidth fluctuation threshold can be set according to the empirical value of the actual scenario. For example, it can be set according to the current bandwidth of the host, such as being set to MIN (the current bandwidth of the host * the second preset ratio, the second preset bandwidth threshold), that is, the smaller value of the current bandwidth of the host * the second preset ratio and the second preset bandwidth threshold. Among them, the current bandwidth of the host is the performance bandwidth of the host. For example, the current read bandwidth BW Host _ Read of the host.

[0347] It can be understood that the second preset ratio can be set according to specific needs. For example, it can be set to 98%, and the second preset bandwidth threshold can also be set according to specific needs. For example, it can be set to 150 MB / s. Then, at this time, the third bandwidth fluctuation threshold BW thred3 =MIN(BW Host *98%, 150 MB / s), where MIN is an algorithm for finding the smaller value of two numbers.

[0348] It can be understood that the setting method of the fourth bandwidth fluctuation threshold is similar to that of the third bandwidth fluctuation threshold and will not be elaborated here. The difference is that the current bandwidth of the host is the performance bandwidth of the host. For example, the current write bandwidth BW Host _ Write of the host.

[0349] Step S2302: After the number of sampled total power consumptions is greater than or equal to the number threshold, based on the smoothing algorithm, smooth a plurality of total power consumptions to obtain the second total power consumption.

[0350] Specifically, the quantity threshold can be determined according to the power consumption sampling period of the power consumption measurement tool, where the quantity threshold = (the power consumption sampling period of the power consumption measurement tool * preset coefficient) / sampling period. The preset coefficient can be set according to specific needs. For example, it is set to 2. Assuming that the power consumption sampling period of the power consumption measurement tool is 100 ms and the sampling period is 50 ms, then the quantity threshold at this time is (100 ms * 2) / 50 ms = 4.

[0351] Specifically, the method of smoothing several total power consumptions to obtain the second total power consumption is similar to the method of calculating the first total power consumption described above, and will not be elaborated here.

[0352] In the embodiment of the present application, when the quantity of the sampled total power consumption is less than the quantity threshold, the total power consumption is not smoothed, that is, the second total power consumption is not calculated, thereby avoiding the distortion of the second total power consumption caused by too small data volume.

[0353] Further, the present application also determines whether to distribute the read request or write request of the host to the flash memory space by judging whether the second total power consumption is effective power consumption.

[0354] Specifically, please refer to Figure 24 , Figure 24 which is a schematic flowchart of a process for determining whether to distribute the read request or write request of the host to the flash memory space provided by the embodiment of the present application.

[0355] As Figure 24 shown, the process of determining whether to distribute the read request or write request of the host to the flash memory space includes the following steps S2401 - step S2405:

[0356] Step S2401: Determine that the power consumption state of the flash device is in the peak power consumption state.

[0357] Step S2402: Judge whether the second total power consumption is effective power consumption.

[0358] Specifically, judging whether the second total power consumption is effective power consumption includes: determining that the second total power consumption is not zero. If the second total power consumption is zero, then it is determined that the second total power consumption is not effective power consumption. At this time, go to step S2405; if the second total power consumption is not zero, then it is determined that the second total power consumption is effective power consumption. At this time, go to step S2403.

[0359] Step S2403: Judge whether the sampled total power consumption is less than or equal to the second total power consumption.

[0360] Specifically, the total power consumption of sampling is the current total power consumption. If the current total power consumption is less than or equal to the second total power consumption, it is determined that the flash memory space can continue to process the read request or write request of the host. At this time, step S2404 is entered, that is, the read request or write request of the host is distributed to the flash memory space. If the current total power consumption is greater than the second total power consumption, in order to control the total power consumption of the flash memory device, at this time, the read request or write request is stopped from being sent to the flash memory space, and step S2405 is entered, that is, the read request or write request of the host is not distributed to the flash memory space.

[0361] Step S2404: Distribute the read request or write request of the host to the flash memory space.

[0362] Specifically, when the power consumption state of the flash memory device is in the peak power consumption state, if the second total power consumption is the effective power consumption, and the sampled total power consumption is less than or equal to the second total power consumption, the read request or write request of the host is distributed to the flash memory space.

[0363] Step S2405: Do not distribute the read request or write request of the host to the flash memory space.

[0364] When the power consumption state of the flash memory device is in the peak power consumption state, if the second total power consumption is not the effective power consumption, or the sampled total power consumption is greater than the second total power consumption, the read request or write request of the host is not distributed to the flash memory space.

[0365] Next, a specific example is used to show the difference between without power consumption control and with power consumption control. Among them, taking the capacity of the flash memory device as 64TB and the Host sequential read bandwidth all at 7400MB / s, the read scenario is taken as an example.

[0366] Please refer to Figure 25A and Figure 25B , Figure 25A is a power consumption schematic diagram without power consumption control provided by an embodiment of the present application; Figure 25B is a power consumption schematic diagram with power consumption control provided by an embodiment of the present application.

[0367] As Figure 25A shown, when there is no power consumption control, the average power consumption is about 11.8w, and the peak power consumption is about 12.4w.

[0368] As Figure 25B shown, when there is power consumption control, the average power consumption is about 11.6w, and the peak power consumption is about 11.9w.

[0369] It can be seen that on the premise of not affecting the bandwidth, controlling the power consumption of the flash memory device at PS Thred , the optimization of the peak power consumption can be achieved, and the peak power consumption and the average power consumption are appropriately aligned, that is, the gap between the peak power consumption and the average power consumption is reduced, which is beneficial to improving the stability of the flash memory device.

[0370] It should be noted that the above is an example of the read scenario. In the write scenario or other scenarios, the optimization effect of the peak power consumption is more obvious.

[0371] In an embodiment of the present application, by providing a power consumption control method applied to a flash memory device, the flash memory device is connected to a host, and the flash memory device includes a flash memory space. The method includes: obtaining the read bandwidth or write bandwidth of the host, and obtaining the read bandwidth or write bandwidth of the flash memory space; calculating the total power consumption of the flash memory space in real time to sample a plurality of total power consumptions; when the power consumption state of the flash memory device is in a bandwidth stable state, smoothing the plurality of total power consumptions based on a smoothing algorithm to obtain a first total power consumption; when the power consumption state of the flash memory device is in a peak power consumption state, if the total power consumption of the flash memory space is greater than the first total power consumption, stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, where the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and a first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and a second bandwidth threshold.

[0372] By smoothing a plurality of total power consumptions based on a smoothing algorithm when the power consumption state of the flash memory device is in a bandwidth stable state to obtain a first total power consumption, and using the read bandwidth of the host and the read bandwidth of the flash memory space, or using the write bandwidth of the host and the write bandwidth of the flash memory space, to determine that the power consumption state of the flash memory device is in a peak power consumption state, and stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, thereby being able to optimize the peak power consumption without affecting the read and write performance, and thus improving the stability of the flash memory device.

[0373] Please refer to Figure 26 , Figure 26 which is a schematic structural diagram of another flash memory device provided by an embodiment of the present application.

[0374] As Figure 26 shown, the flash memory device 100 includes one or more processors 121 and a memory 122. Among them, Figure 26 one processor 121 is taken as an example.

[0375] The processor 121 and the memory 122 can be connected through a bus or other means, Figure 26 and taking the connection through a bus as an example.

[0376] A processor 121, configured to provide computing and control capabilities to control the flash memory device 100 to perform corresponding tasks. For example, it controls the flash memory device 100 to execute the power consumption control method in any of the above method embodiments. The power consumption control method is applied to a flash memory device. The flash memory device is connected to a host and includes a flash memory space. The method includes: obtaining the read bandwidth or write bandwidth of the host, and obtaining the read bandwidth or write bandwidth of the flash memory space; calculating the total power consumption of the flash memory space in real time to sample a plurality of total power consumptions; when the power consumption state of the flash memory device is in a bandwidth stable state, smoothing the plurality of total power consumptions based on a smoothing algorithm to obtain a first total power consumption; when the power consumption state of the flash memory device is in a peak power consumption state, if the total power consumption of the flash memory space is greater than the first total power consumption, stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, where the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and a first bandwidth threshold, or the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and a second bandwidth threshold.

[0377] By smoothing a plurality of total power consumptions based on a smoothing algorithm when the power consumption state of the flash memory device is in a bandwidth stable state to obtain a first total power consumption, and using the read bandwidth of the host and the read bandwidth of the flash memory space, or using the write bandwidth of the host and the write bandwidth of the flash memory space, to determine that the power consumption state of the flash memory device is in a peak power consumption state, and stopping sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, it is possible to optimize the peak power consumption without affecting the read and write performance, thereby improving the stability of the flash memory device.

[0378] The processor 121 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), a hardware chip, or any combination thereof; it may also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The above PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0379] The memory 122, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the power consumption control method in the embodiments of the present application. By running the non-transitory software programs, instructions, and modules stored in the memory 122, the processor 121 can implement the power consumption control method in any of the following method embodiments. Specifically, the memory 122 may include volatile memory (VM), such as random access memory (RAM); the memory 122 may also include non-volatile memory (NVM), such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state drive (SSD), or other non-transitory solid-state storage devices; the memory 122 may further include a combination of the above types of memories.

[0380] The memory 122 may include high-speed random access memory and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage devices. In some embodiments, the memory 122 optionally includes a memory remotely located relative to the processor 121, and these remote memories can be connected to the processor 121 through a network. Examples of the above networks include but are not limited to the Internet, intranet, local area network, mobile communication network, and combinations thereof.

[0381] One or more modules are stored in the memory 122 and, when executed by one or more processors 121, implement the power consumption control method in any of the above method embodiments. For example, execute the Figure 2 respective steps shown above.

[0382] In the embodiments of the present application, the flash device 100 may further have components such as a wired or wireless network interface, a keyboard, and an input / output interface for input / output. The flash device 100 may further include other components for implementing the functions of the device, which will not be elaborated here.

[0383] The embodiments of the present application also provide a computer-readable storage medium, such as a memory including program codes, and the above program codes can be executed by a processor to complete the power consumption control method in the above embodiments. For example, the computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CDROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0384] The embodiments of the present application also provide a computer program product, which includes one or more program codes, and the program codes are stored in a computer-readable storage medium. The processor of the flash device reads the program codes from the computer-readable storage medium, and the processor executes the program codes to complete the method steps of the power consumption control method provided in the above embodiments.

[0385] Those of ordinary skill in the art can understand that all or part of the steps of implementing the above embodiments can be completed by hardware, or can be completed by hardware related to program codes. The program can be stored in a computer-readable storage medium, and the above-mentioned storage medium can be a read-only memory, a magnetic disk, or an optical disc, etc.

[0386] Through the description of the above embodiments, those of ordinary skill in the art can clearly understand that each embodiment can be implemented by means of software plus a general hardware platform, and of course, it can also be implemented by hardware. Those of ordinary skill in the art can understand that all or part of the processes of implementing the method in the above embodiments can be completed by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above methods. Among them, the storage medium can be a magnetic disk, an optical disc, a read-only memory (ROM), or a random access memory (RAM), etc.

[0387] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than limiting them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above. For the sake of brevity, they are not provided in detail; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the various embodiments of the present application.

Claims

1. A power consumption control method, characterized in that: Applied to a flash memory device, the flash memory device is connected to a host, the flash memory device includes a flash memory space, and the method includes: Obtaining a read bandwidth or a write bandwidth of the host, and obtaining a read bandwidth or a write bandwidth of the flash memory space; Calculating the total power consumption of the flash memory space in real time to sample a number of total power consumptions; When the power consumption state of the flash memory device is in a bandwidth stable state, based on a smoothing algorithm, smoothing a plurality of the total power consumptions to obtain a first total power consumption; When the power consumption state of the flash memory device is in the peak power consumption state, if the total power consumption of the flash memory space is greater than the first total power consumption, stop sending read requests or write requests to the flash memory space until the total power consumption of the flash memory space is less than or equal to the first total power consumption, wherein the peak power consumption state includes that the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the first bandwidth threshold, or that the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth threshold.

2. The method according to claim 1, characterized in that: The read bandwidth of the host is the bandwidth corresponding to the reading performed by the flash memory space in response to the read request of the host; The write bandwidth of the host is the bandwidth corresponding to the write performed by the flash memory space in response to the write request of the host; The flash memory device includes a cache space, and the obtaining of the read bandwidth or the write bandwidth of the host includes: Real-time statistics are generated on the first read data volume successfully read from the flash memory space to the host to construct a first read data volume curve, wherein the abscissa of the first read data volume curve is time, and the ordinate is the first read data volume successfully read from the flash memory space to the host; Calculate the read bandwidth of the host according to the sampling period, wherein the read bandwidth of the host=the increment of the first read data amount within the sampling period / the sampling period; Alternatively, the amount of first written data successfully written into the cache space is counted in real time to construct a first written data amount curve, wherein the abscissa of the first written data amount curve is time, and the ordinate is the amount of first written data successfully written into the cache space; The write bandwidth of the host is calculated according to the sampling period, wherein the write bandwidth of the host=the increment of the first write data amount within the sampling period / the sampling period.

3. The method according to claim 2, characterized in that The obtaining of the read bandwidth or the write bandwidth of the flash memory space includes: real-time statistics of the amount of second read data successfully read from the flash memory space to the cache space to construct a second read data amount curve, wherein the abscissa of the second read data amount curve is time, and the ordinate is the amount of second read data successfully read from the flash memory space to the cache space; Calculate the read bandwidth of the flash memory space according to the sampling period, wherein the read bandwidth of the flash memory space=the increment of the second read data amount within the sampling period / the sampling period; Alternatively, the amount of second written data successfully written into the flash memory space is counted in real time to construct a second written data amount curve, wherein the abscissa of the second written data amount curve is time, and the ordinate is the amount of written data successfully written into the flash memory space; The write bandwidth of the flash memory space is calculated according to the sampling period, wherein the write bandwidth of the flash memory space=the increment of the second write data amount within the sampling period / the sampling period.

4. The method according to claim 1, characterized in that: The method further comprises: Determining the power consumption state of the flash memory device according to the read bandwidth or the write bandwidth of the host and the read bandwidth or the write bandwidth of the flash memory space includes: If the bandwidth state of the host is in a fluctuating state, determining that the power consumption state of the flash memory device is a normal read-write state; If the bandwidth state of the host is in a stable state, determining that the power consumption state of the flash memory device is a bandwidth stable state; If the read bandwidth of the flash memory space is greater than the read bandwidth of the host, or the write bandwidth of the flash memory space is greater than the write bandwidth of the host, it is determined that the power consumption state of the flash memory device is a peak power consumption state.

5. The method according to claim 4, characterized in that The method further comprises: Determining the bandwidth status of the host includes: In a first sampling period, calculating a first read bandwidth or a first write bandwidth of the host; In a second sampling period, calculating a second read bandwidth or a second write bandwidth of the host, wherein the second sampling period is greater than the first sampling period; If the absolute value of the difference between the first read bandwidth and the second read bandwidth is less than the first bandwidth fluctuation threshold, and the absolute value of the difference between the first write bandwidth and the second write bandwidth is less than the first bandwidth fluctuation threshold, it is determined that the bandwidth state of the host is a stable state; If the absolute value of the difference between the first read bandwidth and the second read bandwidth is greater than or equal to a first bandwidth fluctuation threshold, or the absolute value of the difference between the first write bandwidth and the second write bandwidth is greater than or equal to the first bandwidth fluctuation threshold, it is determined that the bandwidth state of the host is a fluctuating state.

6. The method according to claim 5, characterized in that The method further comprises: Switching the power consumption state of the flash memory device includes: When the power consumption state of the flash memory device is in a normal read-write state, if the current condition satisfies a first condition, the power consumption state of the flash memory device is switched to a bandwidth stable state, wherein the first condition includes: the bandwidth state of the host is in a stable state; When the power consumption state of the flash memory device is in a bandwidth stable state, if the current condition satisfies a second condition, the power consumption state of the flash memory device is switched to a normal read-write state, wherein the second condition includes: the bandwidth state of the host is in a fluctuating state; When the power consumption state of the flash memory device is in a bandwidth stable state, if the current condition satisfies a third condition, the power consumption state of the flash memory device is switched to a peak power consumption state, wherein the third condition includes: the read bandwidth of the flash memory space is greater than or equal to the sum of the read bandwidth of the host and a second bandwidth fluctuation threshold, or the write bandwidth of the flash memory space is greater than or equal to the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold; When the power consumption state of the flash memory device is in the peak power consumption state, if the current condition satisfies a fourth condition, the power consumption state of the flash memory device is switched to a bandwidth stable state, wherein the fourth condition includes: the read bandwidth of the flash memory space is less than the sum of the read bandwidth of the host and a second bandwidth fluctuation threshold, and the write bandwidth of the flash memory space is less than the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold; When the power consumption state of the flash memory device is in the peak power consumption state, if the current condition satisfies the second condition, the power consumption state of the flash memory device is switched to the normal reading and writing state.

7. The method according to claim 6, characterized in that The determining the power consumption state of the flash memory device further includes: Determine whether the write bandwidth or the read bandwidth of the flash memory space is greater than a maximum host bandwidth threshold; If yes, determining that the power consumption state of the flash memory device is a peak power consumption state; If not, it is further determined whether the read bandwidth of the flash memory space is greater than the sum of the read bandwidth of the host and the second bandwidth fluctuation threshold, or whether the write bandwidth of the flash memory space is greater than the sum of the write bandwidth of the host and the second bandwidth fluctuation threshold, so as to determine whether the flash memory device is in a peak power consumption state.

8. The method according to claim 1, characterized in that The flash memory space includes a plurality of super blocks, each super block includes a plurality of physical blocks, and each physical block includes a plurality of word lines; The total power consumption of the flash memory space is calculated in real time, including: Obtaining the basic power consumption of the entire disk of the flash memory device; When receiving a read request from the host, a first read power consumption is determined according to the read power consumption corresponding to the word lines of the several physical blocks corresponding to the read request, so as to update the current whole disk power consumption, wherein the current whole disk power consumption = the whole disk basic power consumption + the first read power consumption, and the first read power consumption is the sum of the read power consumption corresponding to the word lines of the several physical blocks; or, When receiving a write request from the host, a first write power consumption is determined according to the write power consumption corresponding to the word lines of the several physical blocks corresponding to the write request, so as to update the current whole disk power consumption, wherein the current whole disk power consumption = the whole disk basic power consumption + the first write power consumption, and the first write power consumption is the sum of the write power consumption corresponding to the word lines of the several physical blocks; or, After the flash memory space completes the read request, reducing the current whole disk power consumption of the flash memory space by the first read power consumption to update the current whole disk power consumption; or, After the flash memory space completes the write request, reducing the current whole disk power consumption of the flash memory space by the first write power consumption to update the current whole disk power consumption; The current whole disk power consumption obtained by real-time update is used as the total power consumption of the flash memory space.

9. The method according to claim 8, characterized in that The method further comprises: Pre-calculate the read power consumption corresponding to each word line of each physical block, including: Performing a read operation on the Nth word line of each super block in turn to determine the first whole disk power consumption, where N is an integer and 0≤N≤the total number of word lines of the super block; According to the whole disk basic power consumption and the first whole disk power consumption, the read power consumption of each physical block at the Nth word line is calculated, wherein the read power consumption of each physical block at the Nth word line=(first whole disk power consumption-whole disk basic power consumption) / X, wherein X is the number of physical blocks contained in a super block; The method further comprises: Pre-calculate the write power consumption corresponding to each word line of each physical block, including: Performing a write operation on the Nth word line of each super block in turn to determine a second whole disk power consumption, where N is an integer and 0≤N≤the total number of word lines of the super block; According to the whole disk basic power consumption and the second whole disk power consumption, the write power consumption of each physical block at the Nth word line is calculated, wherein the write power consumption of each physical block at the Nth word line = (second whole disk power consumption - whole disk basic power consumption) / X, wherein X is the number of physical blocks contained in a super block.

10. The method according to claim 1, characterized in that The method further comprises: When the power consumption state of the flash memory device is in a bandwidth stable state, if the read bandwidth of the flash memory space is greater than the difference between the read bandwidth of the host and a third bandwidth fluctuation threshold, or the write bandwidth of the flash memory space is greater than the difference between the write bandwidth of the host and a fourth bandwidth fluctuation threshold, then sampling a plurality of total power consumptions at regular intervals; After the number of sampled total power consumptions is greater than a number threshold, a plurality of the total power consumptions are smoothed based on a smoothing algorithm to obtain a second total power consumption.

11. The method according to claim 10, characterized in that The method further comprises: When the power consumption state of the flash memory device is in a peak power consumption state, determining whether to distribute a read request or a write request of the host to the flash memory space includes: If the second total power consumption is not effective power consumption, or the sampled total power consumption is greater than the second total power consumption, then the read request or write request of the host is not distributed to the flash memory space; If the second total power consumption is effective power consumption, and the sampled total power consumption is less than or equal to the second total power consumption, the read request or write request of the host is distributed to the flash memory space.

12. A flash memory device, characterized in that: include: A processor and a memory, wherein the processor is used to execute an executable program code in the memory, and when the executable program code is executed, the processor executes instructions of the power consumption control method according to any one of claims 1 to 11.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed, the power consumption control method according to any one of claims 1 to 11 is implemented.

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