Master-slave data interaction method and system based on double buffers and medium

Abstract

The invention discloses a master-slave machine data interaction method and system based on double buffer areas and a medium, and relates to the technical field of data interaction, the method comprises the following steps: after a slave machine is powered on, initializing a first buffer area, a second buffer area and a DMA controller, and starting a period adjustment algorithm based on a reading period of a master machine to generate an acquisition period; the slave machine writes the collected data into the first buffer area in the collection period; after being powered on, the host sends a reading instruction to the slave according to the reading period; if the slave does not receive the reading instruction, controlling the buffer area to switch through the DMA controller so as to write the data of the first buffer area into the second buffer area; and if the slave receives the reading instruction, locking the current writing position of the first buffer area through the DMA controller, and returning the data in the second buffer area as request data to the host. According to the embodiment of the invention, data loss is avoided, and the real-time performance of data transmission is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data interaction, and in particular, to a master-slave data interaction method, system and medium based on a double buffer. Background Art

[0002] The existing master-slave data interaction mainly has the following problems: (1) The master-slave interaction needs to wait for the host request to arrive before the slave starts to collect data, resulting in a high delay in the response time of the reading instruction; (2) Frequent locking is required during the alternation of data reading and writing, resulting in waste of time, insufficient real-time performance, and inability to meet the requirements of high-real-time scenarios; (3) When the frequency of the host sending the reading instruction changes, it is easy to cause buffer overflow or stale data. When the host densely sends the reading instruction, the slave is prone to data loss or protocol stack collapse due to resource competition, and the ability to handle sudden requests is poor; (4) The host reading cycle and the slave collection cycle are not decoupled, which is likely to cause misalignment of the data window. For example, when the host sends a reading instruction to request data, the slave has not completed data collection, and there is a risk of timing mismatch. Summary of the Invention

[0003] Embodiments of the present invention provide a master-slave data interaction method, system and medium based on a double buffer, aiming to solve the problems of low real-time performance of data transmission and easy data loss during the existing master-slave data interaction.

[0004] In a first aspect, embodiments of the present invention provide a master-slave data interaction method based on a double buffer, which includes: After the slave is powered on, it initializes the first buffer, the second buffer and the DMA controller, and starts a cycle adjustment algorithm based on the host reading cycle to generate a collection cycle; The slave writes the collected data into the first buffer within the collection cycle; After the host is powered on, it sends a reading instruction to the slave according to the reading cycle; If the slave does not receive the reading instruction, it controls the buffer to switch through the DMA controller to write the data in the first buffer into the second buffer; If the slave receives the reading instruction, it locks the current writing position of the first buffer through the DMA controller and returns the data in the second buffer to the host as the requested data.

[0005] In a second aspect, embodiments of the present invention further provide a master-slave data interaction system based on a double buffer, which includes: a generating unit, a writing unit, a switching unit and a returning unit configured in the slave, and a sending unit configured in the host. Among them, The generating unit is used to initialize the first buffer, the second buffer and the DMA controller after the slave machine is powered on, and start a cycle adjustment algorithm based on the reading cycle of the host to generate an acquisition cycle; The writing unit is used for the slave machine to write the acquired data into the first buffer within the acquisition cycle; The sending unit is used for the host to send a reading instruction to the slave machine according to the reading cycle after the host is powered on; The switching unit is used for the slave machine to control the buffer to switch through the DMA controller if the reading instruction is not received, so as to write the data in the first buffer into the second buffer; The returning unit is used for the slave machine to lock the current writing position of the first buffer through the DMA controller and return the data in the second buffer to the host as requested data if the reading instruction is received.

[0006] In a third aspect, an embodiment of the present invention further provides a master-slave data interaction system based on a dual buffer, which includes a host and a slave. Both the host and the slave include a memory and a processor. A computer program is stored on the memory. When the processors of the host and the slave execute their respective computer programs, the above method is jointly implemented.

[0007] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium. The storage medium stores a computer program, and when the computer program is executed by multiple processors, the above method can be implemented.

[0008] An embodiment of the present invention provides a master-slave data interaction method, system and medium based on a double buffer. Among them, the method includes: after the slave is powered on, initialize the first buffer, the second buffer and the DMA controller, and start a cycle adjustment algorithm based on the reading cycle of the master to generate a collection cycle; the slave writes the collected data into the first buffer within the collection cycle; after the master is powered on, send a reading instruction to the slave according to the reading cycle; if the slave does not receive the reading instruction, control the buffer to switch through the DMA controller to write the data in the first buffer into the second buffer; if the slave receives the reading instruction, lock the current writing position of the first buffer through the DMA controller, and return the data in the second buffer to the master as the requested data. In the technical solution of the embodiment of the present invention, the slave starts a cycle adjustment algorithm based on the reading cycle of the master to generate a collection cycle, realizing the dynamic adjustment of the collection cycle, and solving the problem that data is easily lost due to buffer overflow when the reading cycle changes; by setting a double buffer (the first buffer and the second buffer) in the slave, the data collection and data return are decoupled, greatly shortening the response time of the reading instruction, improving the real-time performance of data transmission, and further improving the efficiency of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0010] Figure 1 It is a schematic diagram of a master-slave data interaction system based on a double buffer provided by an embodiment of the present invention; Figure 2 It is a flowchart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention; Figure 3 It is a sub-flowchart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention; Figure 4 It is another sub-flowchart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention; Figure 5 It is another flowchart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention; Figure 6 It is a schematic block diagram of a master-slave data interaction system based on a double buffer provided by an embodiment of the present invention; Figure 7 A schematic block diagram of a computer device provided by an embodiment of the present invention. Detailed implementation manners

[0011] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0012] It should be understood that when used in this specification and the appended claims, the terms "comprises" and "comprising" indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.

[0013] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in this specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0014] It should be further understood that the term "and / or" used in this specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the related listed items, and includes these combinations.

[0015] As used in this specification and the appended claims, the term "if" can be interpreted as "when...", "once", "in response to determining", or "in response to detecting" according to the context. Similarly, the phrase "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined", "in response to determining", "once [the described condition or event] is detected", or "in response to detecting [the described condition or event]" according to the context.

[0016] Please refer to Figure 1 , Figure 1It is a schematic diagram of a master-slave data interaction system based on a dual buffer provided by an embodiment of the present invention. The master-slave data interaction system based on a dual buffer includes a master and a slave, and the master and the slave communicate with each other. It should be noted that, in this embodiment, the slave includes a first buffer, a second buffer, and a DMA (Direct Memory Access) controller, and the DMA controller controls the switching between the first buffer and the second buffer. It should also be noted that, in this embodiment, the DMA controller is a core module for realizing data transmission without the participation of the CPU, and is particularly important in scenarios such as real-time data acquisition and high-speed peripheral communication.

[0017] Figure 2 It is a schematic flowchart of a master-slave data interaction method based on a dual buffer provided by an embodiment of the present invention. As Figure 2 shown, the method includes the following steps S110-S150.

[0018] S110. After the slave is powered on, initialize the first buffer, the second buffer, and the DMA controller, and start a cycle adjustment algorithm based on the reading cycle of the master to generate an acquisition cycle.

[0019] In an embodiment of the present invention, after the slave is powered on, initialize the first buffer, the second buffer, and the DMA controller. After the initialization is completed, start a cycle adjustment algorithm based on the reading cycle of the master to generate an acquisition cycle. It should be noted that, in this embodiment, assume that the acquisition cycle of the slave is T1 and the reading cycle of the master is T2. The cycle adjustment algorithm dynamically adjusts the acquisition cycle T1 of the slave by analyzing the historical request pattern of the master in real time, that is, analyzing the historical request pattern of the master sending the reading instruction in real time, to ensure that T1<T2 and T2 = N×T1 are always satisfied, where N≥2, achieving the optimal balance between efficiency and resources. It should also be noted that, in this embodiment, the reading cycle is the time interval between two consecutive times the master sends a reading instruction, and the reading instruction is a command for the master to request data reading from the slave.

[0020] In some embodiments, such as this embodiment, as Figure 3 shown, the step S110 may include steps S111-S114.

[0021] S111. Obtain the times of sending the reading instruction in the most recent preset number of times according to the reading cycle, and calculate the current average cycle of the master through a sliding window statistical formula based on the times of sending the reading instruction in the most recent preset number of times; S112. Obtain the previous smoothed cycle estimate value, and calculate the current smoothed cycle estimate value of the master according to the current average cycle and the previous smoothed cycle estimate value; S113. Calculate the initial acquisition period through a PID control algorithm based on the current smoothed period estimate value and the actual period of the slave device obtained; S114. Adjust the initial acquisition period to obtain a target acquisition period, and use the target acquisition period as the acquisition period.

[0022] In the embodiment of the present invention, the preset number of times is K times, where, , the sliding window statistical formula is as shown in formula (1). In formula (1), is the time of the i-th master device sending a reading instruction, is the time of the (i - 1)-th master device sending a reading instruction, is the current average period of the most recent K times of the master device sending reading instructions; (1); After obtaining the current average period , obtain the previous smoothed period estimate value , according to and calculate the current smoothed period estimate value of the master device through formula (2), where, is the smoothing factor, controlling the and weight ratio. It should be noted that by assigning a decaying weight to , it can quickly respond to trend changes. It should also be noted that in this embodiment, = 0.3, the weight is 30%, the weight is 70%. Understandably, in other embodiments, can be set according to actual needs and will not be specifically limited here; (2); After obtaining the current smoothed period estimate value , obtain the actual period of the slave device, and calculate the initial acquisition period through a PID control algorithm according to and . Specifically, calculate the target period of the slave device according to the current smoothed period estimate value and a preset safety weight value, and use the target period as the initial acquisition period. During the calculation of the target period, obtain the actual period of the slave device, calculate the difference between the target period and the actual period to obtain an acquisition period deviation, calculate an error feedback value through the PID control algorithm according to the acquisition period deviation, and form a closed-loop control according to the error feedback value, where the preset safety weight value is , in this embodiment, = 0.8, with a 20% safety margin reserved to prevent the acquisition period from being too close to the reading period , understandably, in other embodiments, it can also be set to other values, such as 0.7, and set according to the actual situation. It should be noted that, in this embodiment, the actual acquisition period is , and the target period is , the target period , the acquisition period deviation is , , the PID control algorithm is as shown in formula (3). In formula (3), is the error feedback value, K p is the proportional gain, K i is the integral gain, K d is the derivative gain; (3); In some embodiments, such as this embodiment, as Figure 4 shown, step S114 may include steps S1141 - S1143.

[0023] S1141. Detect whether the initial acquisition period meets the preset period constraint conditions; S1142. If the initial acquisition period meets the preset period constraint conditions, then use the initial acquisition period as the target acquisition period; S1143. If the initial acquisition period does not meet the preset period constraint conditions, then calculate the period adjustment amplitude value according to the preset amplitude adjustment percentage and the initial acquisition period, and adjust the initial acquisition period according to the period adjustment amplitude value to obtain the target acquisition period.

[0024] In an embodiment of the present invention, detecting whether the initial acquisition period meets a preset period constraint condition specifically includes: determining whether the initial acquisition period is less than a preset acquisition period; if the initial acquisition period is less than the lower limit value of the preset acquisition period, it is determined that the initial acquisition period does not meet the preset period constraint condition; if the initial acquisition period is not less than the lower limit value of the preset acquisition period, continue to determine whether the initial acquisition period is greater than the upper limit value of the preset acquisition period; if the initial acquisition period is greater than the upper limit value of the preset acquisition period, it is determined that the initial acquisition period does not meet the preset period constraint condition; if the initial acquisition period is not greater than the upper limit value of the preset acquisition period, it is determined that the initial acquisition period meets the preset period constraint condition. Understandably, that is, if the initial acquisition period is not less than the lower limit value of the preset acquisition period and not greater than the upper limit value of the preset acquisition period, it is determined that the initial acquisition period meets the preset period constraint condition; if the initial acquisition period is less than the lower limit value of the preset acquisition period or greater than the upper limit value of the preset acquisition period, it is determined that the initial acquisition period does not meet the preset period constraint condition. It should be noted that in this embodiment, if it is assumed that the lower limit value of the preset acquisition period is , and the upper limit value of the preset acquisition period is , when ≤ the initial acquisition period ≤ , it is determined that the initial acquisition period meets the preset period constraint condition; conversely, when the initial acquisition period < or the initial acquisition period > , it is determined that the initial acquisition period does not meet the preset period constraint condition. It should also be noted that in this embodiment, the preset amplitude modulation percentage is set to 20%, the period adjustment amplitude value is equal to the initial acquisition period × 20%, and when the initial acquisition period does not meet the preset period constraint condition, the target acquisition period = the initial acquisition period ± the initial acquisition period × 20% to prevent violent oscillation.

[0025] S120. The slave writes the collected data into the first buffer area within the acquisition period.

[0026] In an embodiment of the present invention, the slave writes the collected data into the first buffer area through the DMA controller within the acquisition period. Understandably, at this time, the first buffer area is the active buffer area, and the second buffer area is the inactive buffer area. The active buffer area performs real-time data acquisition, and the inactive buffer area is locked and ready to respond to the host request. It should be noted that in this embodiment, when the slave writes the collected data into the active buffer area, a time stamp of the acquisition moment is added.

[0027] S130. After the host is powered on, it sends a reading instruction to the slave according to the reading period.

[0028] In an embodiment of the present invention, after the host is powered on, it establishes a communication connection with the slave. The host sends a reading instruction to the slave according to the reading period to obtain the data of the slave.

[0029] S140. If the slave does not receive the reading instruction, it controls the buffer to switch through the DMA controller to write the data in the first buffer into the second buffer.

[0030] In an embodiment of the present invention, if the slave does not receive the reading instruction sent by the host, it controls the buffer to switch through the DMA controller to write the data in the first buffer into the second buffer. It should be noted that in this embodiment, when the data in the first buffer is written into the second buffer, the old data is overwritten to avoid memory overflow. S150. If the slave receives the reading instruction, it locks the current writing position of the first buffer through the DMA controller and returns the data in the second buffer to the host as the requested data.

[0031] In an embodiment of the present invention, if the slave receives the reading instruction sent by the host, it locks the current writing position of the first buffer through the DMA controller and returns the data in the second buffer to the host as the requested data. It can be understood that at this time, the first buffer is an inactive buffer and the second buffer is an active buffer. It should be noted that in this embodiment, the active buffer and the inactive buffer are a process of switching. The first buffer performs real-time data acquisition, and the second buffer is locked and ready to respond to the host request, that is, to respond to the reading instruction. The switching between the first buffer and the second buffer is triggered by the DMA controller interrupt. The data in the second buffer is encapsulated according to the interaction protocol and returned to the host.

[0032] Figure 5 Another process schematic diagram of the master-slave data interaction method based on a dual buffer provided by an embodiment of the present invention is as follows. Figure 5 As shown, in this embodiment, the master-slave data interaction method based on a dual buffer in this embodiment includes steps S210 - S260. Among them, steps S210 - S250 are similar to steps S110 - S150 in the above embodiment and will not be elaborated here. The following details step S260 added in this embodiment.

[0033] S260. The host performs data validity verification on the received requested data according to the reading period to generate a verification result.

[0034] In an embodiment of the present invention, the host performs data validity verification on the received request data according to the reading period to generate a verification result, including: the host obtains the time when the slave returns the request data and the acquisition time corresponding to the request data; calculates the difference between the acquisition time and the time when the slave returns the request data to obtain an acquisition return time difference; if the acquisition return time difference is not greater than a preset multiple of the reading period, sets the verification result to the request data being valid; if the acquisition return time difference is greater than a preset multiple of the reading period, sets the verification result to the request data being invalid. It should be noted that in this embodiment, if the verification result is that the request data is invalid, the reading period is adjusted so that the obtained request data is valid.

[0035] In summary, the slave starts a cycle adjustment algorithm based on the host's reading period to generate an acquisition period, realizing dynamic adjustment of the acquisition period, and solving the problem that data loss is likely to occur due to buffer overflow when the reading period changes; by setting a double buffer (a first buffer and a second buffer) in the slave, decoupling of data acquisition and data return is achieved, greatly shortening the response time of the reading instruction, improving the real-time performance of data transmission, and further improving the efficiency of data transmission. Figure 6 It is a schematic block diagram of a master-slave data interaction system 70 based on a double buffer provided by an embodiment of the present invention. As Figure 6 shown, corresponding to the above master-slave data interaction method based on a double buffer applied to the host and the slave. The master-slave data interaction system 70 based on a double buffer includes units for executing the above master-slave data interaction method based on a double buffer. Specifically, please refer to Figure 5 . The master-slave data interaction system 70 based on a double buffer includes a generation unit 101, a writing unit 102, a switching unit 103, and a return unit 104 configured in the slave 10, and a sending unit 201 configured in the host 20.

[0036] Among them, the generating unit 101 is used to initialize the first buffer, the second buffer, and the DMA controller after the slave machine is powered on, and start a cycle adjustment algorithm based on the reading cycle of the host to generate an acquisition cycle; the writing unit 102 is used for the slave machine to write the acquired data into the first buffer during the acquisition cycle; the sending unit 201 is used for the host to send a reading instruction to the slave machine according to the reading cycle after the host is powered on; the switching unit 103 is used for the slave machine to control the buffer to switch through the DMA controller if the reading instruction is not received, so as to write the data in the first buffer into the second buffer; the returning unit 104 is used for the slave machine to lock the current writing position of the first buffer through the DMA controller if the reading instruction is received, and return the data in the second buffer to the host as the requested data.

[0037] In some embodiments, such as this embodiment, the generating unit 101 includes a first calculation unit, a second calculation unit, a third calculation unit, and an adjustment unit.

[0038] Among them, the first calculation unit is used to obtain the time of sending the reading instruction in the most recent preset number of times according to the reading cycle, and calculate the current average cycle of the host through a sliding window statistical formula according to the time of sending the reading instruction in the most recent preset number of times; the second calculation unit is used to obtain the previous smoothed cycle estimate value, and calculate the current smoothed cycle estimate value of the host according to the current average cycle and the previous smoothed cycle estimate value; the third calculation unit is used to calculate the initial acquisition cycle through a PID control algorithm according to the current smoothed cycle estimate value and the actual cycle of the slave machine obtained; the adjustment unit is used to adjust the initial acquisition cycle to obtain a target acquisition cycle, and use the target acquisition cycle as the acquisition cycle.

[0039] In some embodiments, such as this embodiment, the third calculation unit includes a fourth calculation unit.

[0040] Among them, the fourth calculation unit is used to calculate the target cycle of the slave machine according to the current smoothed cycle estimate value and a preset safety weight value, use the target cycle as the initial acquisition cycle. During the calculation of the target cycle, obtain the actual cycle of the slave machine, calculate the difference between the target cycle and the actual cycle to obtain an acquisition cycle deviation, calculate an error feedback value through the PID control algorithm according to the acquisition cycle deviation, and form a closed-loop control according to the error feedback value.

[0041] In some embodiments, such as this embodiment, the adjustment unit includes a detection unit, a weighting unit, and an adjustment subunit.

[0042] Wherein, the detection unit is used to detect whether the initial acquisition period meets a preset period constraint condition; the assignment unit is used to, if the initial acquisition period meets the preset period constraint condition, use the initial acquisition period as the target acquisition period; the adjustment subunit is used to, if the initial acquisition period does not meet the preset period constraint condition, calculate a period adjustment amplitude value according to a preset amplitude adjustment percentage and the initial acquisition period, and adjust the initial acquisition period according to the period adjustment amplitude value to obtain the target acquisition period.

[0043] In some embodiments, such as in this embodiment, the detection unit includes a first determination unit and a second determination unit.

[0044] Wherein, the first determination unit is used to, if the initial acquisition period is not less than a preset acquisition period lower limit value and not greater than a preset acquisition period upper limit value, determine that the initial acquisition period meets the preset period constraint condition; the second determination unit is used to, if the initial acquisition period is less than the preset acquisition period lower limit value or greater than the preset acquisition period upper limit value, determine that the initial acquisition period does not meet the preset period constraint condition.

[0045] In some embodiments, such as in another embodiment, the master-slave data interaction system 70 based on a double buffer further includes a verification unit configured in the host 20.

[0046] Wherein, the verification unit is used for the host to perform data validity verification on the received request data according to the reading period to generate a verification result.

[0047] In some embodiments, such as in this embodiment, the verification unit includes an acquisition unit, a fifth calculation unit, a first setting unit, and a second setting unit.

[0048] Wherein, the acquisition unit is used for the host to acquire the time when the slave returns the request data and the acquisition time corresponding to the request data; the fifth calculation unit is used to calculate the difference between the acquisition time and the time when the slave returns the request data to obtain an acquisition return time difference; the first setting unit is used to, if the acquisition return time difference is not greater than a preset multiple of the reading period, set the verification result to the request data being valid; the second setting unit is used to, if the acquisition return time difference is greater than the preset multiple of the reading period, set the verification result to the request data being invalid.

[0049] The above-mentioned master-slave data interaction system based on a double buffer can be implemented in the form of a computer program, and this computer program can run on a computer device as shown in Figure 7 shown.

[0050] Please refer to Figure 7 , Figure 7 which is a schematic block diagram of a computer device provided by an embodiment of the present application. The computer device 900 may be the above-mentioned host and slave devices.

[0051] Refer to Figure 7 , the computer device 900 includes a processor 902, a memory, and an interface 905 connected through a system bus 901. Among them, the memory may include a non-volatile storage medium 903 and an internal memory 904.

[0052] The non-volatile storage medium 903 can store an operating system 9031 and a computer program 9032. When the computer program 9032 is executed, it can cause the processor 902 to execute a master-slave data interaction method based on a double buffer.

[0053] The processor 902 is used to provide computing and control capabilities to support the operation of the entire computer device 900.

[0054] The internal memory 904 provides an environment for the operation of the computer program 9032 in the non-volatile storage medium 903.

[0055] The interface 905 is used to communicate with other devices. Those skilled in the art can understand that Figure 7 the structure shown in

[0056] is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device 900 to which the solution of the present application is applied. The specific computer device 900 may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0057] It should be understood that in the embodiments of the present application, the processor 902 may be a central processing unit (CPU), and the processor 902 may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0058] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a storage medium, and the storage medium is a computer-readable storage medium. The computer program is executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.

[0059] Therefore, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program. When the computer program is executed by a processor, the processor executes any of the embodiments of the above master-slave data interaction method based on a dual buffer.

[0060] The storage medium may be a variety of computer-readable storage media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disc that can store program codes.

[0061] Those of ordinary skill in the art can realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been generally described according to their functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of the present invention.

[0062] In several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of each unit is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0063] The steps in the method embodiments of the present invention can be adjusted, combined, and deleted according to actual needs. The units in the device embodiments of the present invention can be combined, divided, and deleted according to actual needs. In addition, the functional units in each embodiment of the present invention can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0064] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present invention.

[0065] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0066] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, provided that these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these changes and modifications.

[0067] As described above, the above are only the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A master-slave data interaction method based on double buffer, characterized in that: include: After the slave is powered on, the first buffer, the second buffer and the DMA controller are initialized, and a cycle adjustment algorithm is started based on the host's reading cycle to generate a collection cycle; The slave writes the collected data into the first buffer during the collection cycle; After the host is powered on, it sends a reading instruction to the slave according to the reading cycle; If the slave does not receive the copy-read instruction, the DMA controller controls the buffer to switch, so as to write the data of the first buffer into the second buffer; If the slave receives the copy-read instruction, it locks the current write position of the first buffer through the DMA controller, and returns the data in the second buffer as request data to the host.

2. The master-slave data interaction method based on double buffer according to claim 1, characterized in that: The host-based reading cycle starts the cycle adjustment algorithm to generate the collection cycle, including: According to the reading cycle, the time of sending the reading instruction for the latest preset number of times is obtained, and the current average cycle of the host is calculated by a sliding window statistical formula according to the time of sending the reading instruction for the latest preset number of times; Obtain the last estimated value of the smoothing cycle, and calculate the current estimated value of the smoothing cycle of the host according to the current average cycle and the last estimated value of the smoothing cycle; Calculating the initial acquisition period through a PID control algorithm according to the current smoothing period estimation value and the acquired actual period of the slave; The initial acquisition cycle is adjusted to obtain a target acquisition cycle, and the target acquisition cycle is used as the acquisition cycle.

3. The master-slave data interaction method based on double buffer according to claim 2 is characterized in that: The calculating the initial acquisition period by a PID control algorithm according to the current smoothing period estimation value and the acquired actual period of the slave includes: The target cycle of the slave is calculated according to the current smoothing cycle estimate and the preset safety weight value, and the target cycle is used as the initial acquisition cycle. During the calculation of the target cycle, the actual cycle of the slave is obtained, and the difference between the target cycle and the actual cycle is calculated to obtain the acquisition cycle deviation. The error feedback value is calculated according to the acquisition cycle deviation through the PID control algorithm, and a closed-loop control is formed according to the error feedback value.

4. The method according to claim 2, characterized in that: The adjusting the initial acquisition period to obtain a target acquisition period includes: Detecting whether the initial acquisition cycle meets a preset cycle constraint condition; If the initial acquisition cycle meets the preset cycle constraint condition, the initial acquisition cycle is used as the target acquisition cycle; If the initial acquisition period does not meet the preset period constraint condition, a period adjustment amplitude value is calculated according to a preset amplitude modulation percentage and the initial acquisition period, and the initial acquisition period is adjusted according to the period adjustment amplitude value to obtain the target acquisition period.

5. The method according to claim 4, characterized in that The detecting whether the initial acquisition period satisfies a preset period constraint condition includes: If the initial acquisition period is not less than the preset acquisition period lower limit and not greater than the preset acquisition period upper limit, it is determined that the initial acquisition period meets the preset period constraint condition; If the initial acquisition period is less than the preset acquisition period lower limit or greater than the preset acquisition period upper limit, it is determined that the initial acquisition period does not meet the preset period constraint condition.

6. The method according to any one of claims 1 to 5, characterized in that: The method further comprises: The host performs data validity verification on the received request data according to the copy reading cycle to generate a verification result.

7. The method according to claim 6, characterized in that The host performs data validity verification on the received request data according to the reading cycle to generate a verification result, including: The host obtains the time when the slave returns the request data and the collection time corresponding to the request data; Calculating the difference between the acquisition time and the time when the slave returns the requested data to obtain an acquisition return time difference; If the acquisition return time difference is not greater than the preset multiple of the copy reading cycle, the verification result is set as the request data is valid; If the acquisition return time difference is greater than a preset multiple of the copy reading cycle, the verification result is set as the request data invalid.

8. A master-slave data interaction system based on double buffer, characterized in that: include: A generating unit, a writing unit, a switching unit and a returning unit are configured in the slave, and a sending unit is configured in the host, wherein: The generating unit is used to initialize the first buffer, the second buffer and the DMA controller after the slave is powered on, and to generate a collection cycle based on the host's copying cycle start cycle adjustment algorithm; The writing unit is used for the slave to write the collected data into the first buffer during the collection cycle; The sending unit is used to send a reading instruction to the slave according to the reading cycle after the host is powered on; The switching unit is used for controlling the buffer to switch through the DMA controller if the slave does not receive the copy-read instruction, so as to write the data of the first buffer into the second buffer; The returning unit is used for the slave to lock the current writing position of the first buffer through the DMA controller if the slave receives the copy-read instruction, and return the data in the second buffer as request data to the host.

9. A master-slave data interaction system based on double buffer, characterized in that: The method comprises a host and a slave, wherein the host and the slave both comprise a memory and a processor, wherein a computer program is stored in the memory, and when the processors of the host and the slave execute their respective computer programs, the method as claimed in any one of claims 1 to 7 is jointly implemented.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a plurality of processors, the method according to any one of claims 1 to 7 can be implemented.

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