Method and device for screening semiconductor process

Abstract

The invention discloses a method and a device for screening a semiconductor process, which take a typical circuit module as a minimum unit for simulation evaluation, so that the problem that tiny errors of parameters of a single device are continuously accumulated under the increase of the number of devices and become huge errors influencing the overall function and performance of a chip can be avoided as far as possible. And the process platform evaluation is closer to the actual production.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor simulation applications, and particularly to a method and device for screening semiconductor processes. Background Art

[0002] Currently, in the professional field, the foundry will conduct various physical tests on basic devices produced, such as resistors, capacitors, inductors, CMOS transistors, diodes, and triodes, and make the test results into a document format and a PCELL single-device simulation model. When designers select a process, they usually check the process manual description or conduct simulation tests on the performance of a single device. Subjectively, they refer to past experience, market factors, product direction, etc. to decide which process to use for design.

[0003] Based on the above existing methods, it is difficult for designers to comprehensively and deeply understand the specific differences between different processes, and there is no specific method to make a standardized and visualized inspection for the process selection. Selecting a process based solely on document content and subjective awareness prolongs the product R & D cycle and is inefficient, and to a certain extent, it will increase the probability of tape-out failure and production costs.

[0004] The parameters currently provided by the foundry are generally single-device parameters, that is, the parameters of the basic devices that make up the circuit, such as the threshold voltage of a Cmos transistor and the resistance value of a resistor. In order to avoid errors, the foundry often gives relatively conservative values, and will round the values to retain two decimal places when giving the values, which will leave extremely small errors. Chip design often requires the application of hundreds of thousands or even millions of related devices, and the small errors of single-device parameters accumulate continuously with the increase in the number of devices, becoming huge errors that affect the overall function and performance of the chip. Chip design engineers can only select a process by the parameters of the underlying devices or their own experience when selecting a process. Summary of the Invention

[0005] The present invention provides a method and device for screening semiconductor processes, aiming to overcome the deficiencies of using the performance of basic devices as the process evaluation index in the prior art.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] A method for screening a semiconductor process according to the present invention, the method comprising the following steps:

[0008] Step 1: Build a simulation model library, which includes simulation circuit modules available for users to select and preset simulation schemes corresponding to each simulation circuit module; build a process database, which includes device performance data of process platforms available for users to select.

[0009] Step 2: Load the simulation circuit module and performance data of multiple candidate process platforms according to the user's selection.

[0010] Step 3: Based on the preset simulation scheme, obtain the simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module.

[0011] Step 4: Obtain the attention weight of the user, and statistically analyze the simulation evaluation results of each process platform according to the attention weight to obtain the final process evaluation result, providing a decision-making reference for the user to screen semiconductor processes.

[0012] Preferably, the simulation scheme includes simulation state parameters, simulation strategies, and evaluation performance parameters.

[0013] Preferably, the simulation state parameters include state parameters with at least two dimensions, and the environmental parameters of each dimension include a typical state parameter and multiple atypical state parameters.

[0014] Preferably, the construction method of the simulation strategy further includes:

[0015] Arrange and combine the state parameters of all dimensions to form a series of simulation schemes, and record the simulation results of the evaluation performance parameters;

[0016] Extract the simulation results when the state parameters of each dimension are all typical state parameters as the typical values of the evaluation performance parameters;

[0017] Based on the principle of controlling variables, extract the simulation results of the evaluation performance parameters when only the state parameters of each dimension are in atypical state parameters as the first atypical values;

[0018] Take the simulation results of the evaluation performance parameters of the remaining simulation schemes as the second atypical values;

[0019] Statistically analyze the deviation values of the first and second atypical values and the typical values of the state parameters of each dimension respectively.

[0020] Preferably, Step 4 further includes:

[0021] Step 401: The obtaining of the attention weight of the user is specifically the weight data of the user for each state parameter dimension.

[0022] Step 402, calculating a process evaluation result for a candidate process platform according to the weight data and the deviation value between the atypical value and the typical value of each dimensional state parameter;

[0023] Step 403 , compare the process evaluation results of each candidate process platform to provide a decision reference for the user's semiconductor process screening.

[0024] Preferably, the feature is that the statistical deviation between the atypical value and the typical value of each dimensional state parameter further comprises:

[0025] Step 4021, obtaining the maximum value and the minimum value of the first and second atypical values;

[0026] Step 4022, compare the maximum value and the minimum value of the first atypical value with the typical value of the evaluation performance parameter to obtain multiple first deviation values, wherein the first deviation value corresponds to each state parameter dimension.

[0027] Step 4023, comparing the maximum value and the minimum value of the atypical value with the typical value of the evaluation performance parameter to obtain a second deviation, wherein the second deviation meets the overall deviation standard;

[0028] Preferably, the environmental parameters include at least process angle, voltage and temperature.

[0029] The present application also provides a device for screening semiconductor processes, specifically comprising:

[0030] A simulation model library, wherein the simulation model library includes simulation circuit modules that can be selected by users, and a preset simulation scheme corresponding to each simulation circuit module;

[0031] A process database, the process database including device performance data of process platforms selectable by users;

[0032] A user selection module is used to load a simulation circuit module and performance data of multiple process platforms to be selected;

[0033] A simulation module, used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in a simulation circuit module based on a preset simulation scheme;

[0034] The process evaluation module is used to obtain the user's attention weight, and obtain the final process evaluation result by counting the simulation evaluation results of each process platform according to the attention weight, so as to provide a decision reference for the user's semiconductor process screening.

[0035] The solution of the present application uses a typical circuit module as the smallest unit of simulation evaluation, so as to avoid as much as possible the accumulation of small errors in single device parameters as the number of devices increases, which will turn into huge errors that affect the overall function and performance of the chip, and make the process platform evaluation closer to actual production. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a flow chart of the present invention.

[0037] Figure 2 It is a logic block diagram of the present invention.

[0038] Figure 3 This is an example diagram of the simulation circuit module in the present invention. DETAILED DESCRIPTION

[0039] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments.

[0040] A method for screening a semiconductor process according to the present invention comprises the following steps:

[0041] Step 1, construct a simulation model library, the simulation model library includes simulation circuit modules that can be selected by users, and each simulation circuit module corresponds to a preset simulation scheme; construct a process database, the process database includes device performance data of a process platform that can be selected by users.

[0042] The simulation scheme includes simulation state parameters, simulation strategy and evaluation performance parameters.

[0043] The simulation state parameters include state parameters of at least two dimensions, and the environmental parameters of each dimension include a typical state parameter and a plurality of atypical state parameters.

[0044] For example, commonly used environmental parameters include at least process angle, voltage and temperature.

[0045] Step 2: Loading simulation circuit modules and performance data of multiple process platforms to be selected according to user selection;

[0046] Step 3: Based on a preset simulation scheme, obtain simulation evaluation results of multiple performance parameters of each candidate process platform in a simulation circuit module.

[0047] This step is performed according to the simulation strategy in the simulation scheme corresponding to the simulation circuit module.

[0048] The construction method of the simulation strategy further includes:

[0049] Arrange and combine the state parameters of all dimensions to form a series of simulation scenarios, and record the simulation results of the evaluation performance parameters;

[0050] Extract the simulation results when the state parameters of each dimension are typical state parameters as the typical values of the evaluation performance parameters;

[0051] Based on the principle of controlling variables, extract the simulation results of the evaluation performance parameters when only the state parameters of each dimension are in non-typical state parameters as the first non-typical values;

[0052] Take the simulation results of the evaluation performance parameters of the remaining simulation scenarios as the second non-typical values;

[0053] Statistically calculate the deviation values of the first and second non-typical values and the typical values of the state parameters of each dimension respectively.

[0054] Step 4, obtain the attention weight of the user, and statistically calculate the simulation evaluation results of each process platform according to the attention weight to obtain the final process evaluation result, providing a decision-making reference for the user to screen semiconductor processes.

[0055] The said step 4 further includes:

[0056] Step 401, the said obtaining the attention weight of the user is specifically the weight data of the user for each state parameter dimension;

[0057] Step 402, calculate the process evaluation result for a to-be-selected process platform according to the weight data and the deviation values of the non-typical values and the typical values of the state parameters of each dimension;

[0058] The said statistically calculating the deviation values of the non-typical values and the typical values of the state parameters of each dimension further includes:

[0059] Step 4021, obtain the maximum and minimum values among the first and second non-typical values;

[0060] Step 4022, compare the maximum and minimum values among the first non-typical values with the typical value of this evaluation performance parameter to obtain multiple first deviation values, and the first deviation values correspond to each state parameter dimension.

[0061] Step 4023, compare the maximum and minimum values among the non-typical values with the typical value of this evaluation performance parameter to obtain the second deviation, and the second deviation reaches the overall deviation;

[0062] Step 403, compare the process evaluation results of each to-be-selected process platform to provide a decision-making reference for the user to screen semiconductor processes.

[0063] This application also provides a device for screening semiconductor processes, specifically including:

[0064] A simulation model library 1, where the simulation model library includes simulation circuit modules available for users to select, and a preset simulation scheme corresponding to each simulation circuit module;

[0065] A process database 2, where the process database includes device performance data of process platforms available for users to select;

[0066] A user selection module 3, which is used to load simulation circuit modules and performance data of multiple candidate process platforms;

[0067] A simulation module 4, which is used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in the simulation circuit module based on the preset simulation scheme;

[0068] A process evaluation module 5, which is used to obtain the attention weight of the user, and obtain the final process evaluation result according to the attention weight to statistically analyze the simulation evaluation results of each process platform, so as to provide a decision-making reference for the user to screen semiconductor processes.

[0069] As Figure 3 shown below, the solution of the present application will be further described with a specific example.

[0070] Here, the differences in performance indicators of a D flip-flop circuit module under different process platforms are taken as an example:

[0071] First, set the same POR structure, change the circuit diagram to POR, and six PORs are used to illustrate the disappearance of vth in the design process, and consistency should be maintained.

[0072] The standards of the simulation environment for various indicators of POR are unified. The unified standard here is to unify variables, and only when the results are simulated under the same variables can they be compared and have reference significance.

[0073] The factors that affect the circuit performance parameters are mainly three factors: process corner, voltage, and temperature.

[0074] The simulation environment standards are set as:

[0075] Process corner: tt, ss, ff, sf, fs, where tt means typical, and typical means the typical state.

[0076] Voltage: rated voltage (3.3V for this module), 0.9 * rated voltage, 1.1 * rated voltage

[0077] Temperature: -40°C, 25°C (room temperature), 125°C

[0078] Each factor is divided into three fixed points for simulation. That is, there are a total of 5 * 3 * 3 = 45 cases. The parameter range under this simulation includes all values of the circuit performance parameters.

[0079] Among the 45 states, tt (typical, typical), rated voltage (3.3V for this module), and 25°C (room temperature) are called typical states. The performance parameters of the circuit in this state are called typical values.

[0080] Simulations are carried out for three processes A / B / C. The following table shows the proposed results, not the simulation results.

[0081] Process A

[0082] Under 45 corners

[0083] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.40 1.60 1.80 V Falling Flip Point 1.32 1.50 1.78 V Hysteresis Voltage 80 100 150 mV

[0084] The process corner remains unchanged at tt, the power supply voltage remains unchanged at 3.3V, and the temperatures are -40°C, 25°C, and 125°C.

[0085] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.40 1.60 1.80 V Falling Flip Point 1.32 1.50 1.78 V Hysteresis Voltage 80 100 150 mV

[0086] The temperature remains unchanged at 25°C, the power supply voltage remains unchanged at 3.3V, and the process corners are tt, ss, ff, sf, and fs.

[0087] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.40 1.60 1.80 V Falling Flip Point 1.32 1.50 1.78 V Hysteresis Voltage 80 100 150 mV

[0088] The process corner remains unchanged at tt, the temperature remains unchanged at 25°C, and the power supply voltages are 3.63V, 3.3V, and 2.97V.

[0089]

[0090]

[0091] Process B

[0092] Under 45 corners

[0093] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.45 1.60 1.75 V Falling Flip Point 1.36 1.50 1.66 V Hysteresis Voltage 90 100 120 mV

[0094] The process corner remains unchanged at tt, the power supply voltage remains unchanged at 3.3V, and the temperatures are -40°C, 25°C, and 125°C.

[0095] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.45 1.60 1.75 V Falling Flip Point 1.36 1.50 1.66 V Hysteresis Voltage 90 100 120 mV

[0096] The temperature remains unchanged at 25°C, the power supply voltage remains unchanged at 3.3V, and the process corners are tt, ss, ff, sf, and fs.

[0097] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.45 1.60 1.75 V Falling Flip Point 1.36 1.50 1.66 V Hysteresis Voltage 90 100 120 mV

[0098] The process corner remains unchanged at tt, the temperature remains unchanged at 25°C, and the power supply voltages are 3.63V, 3.3V, and 2.97V

[0099] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.45 1.60 1.75 V Falling Flip Point 1.36 1.50 1.66 V Hysteresis Voltage 90 100 120 mV

[0100] C process

[0101] Under 45 corners

[0102] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.30 1.60 1.95 V Falling Flip Point 1.26 1.50 1.74 V Hysteresis Voltage 40 100 200 mV

[0103] The process corner remains unchanged at tt, the power supply voltage remains unchanged at 3.3V, and the temperatures are -40°C, 25°C, and 125°C

[0104] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.30 1.60 1.95 V Falling Flip Point 1.26 1.50 1.74 V Hysteresis Voltage 40 100 200 mV

[0105] The temperature remains unchanged at 25°C, the power supply voltage remains unchanged at 3.3V, and the process corners are tt, ss, ff, sf, and fs

[0106] Performance Parameter Minimum Value Typical Value Maximum Value Unit Rising Flip Point 1.30 1.60 1.95 V Falling Flip Point 1.26 1.50 1.74 V Hysteresis Voltage 40 100 200 mV

[0107] The process corner remains unchanged at tt, the temperature remains unchanged at 25°C, and the power supply voltages are 3.63V, 3.3V, and 2.97V

[0108]

[0109]

[0110] The deviation value of the maximum value compared to the typical value under all corners is Ax (percentage value);

[0111] The deviation value of the minimum value compared to the typical value under all corners is An (percentage value);

[0112] With the process corner tt unchanged, the power supply voltage 3.3V, the deviation value of the maximum value compared to the typical value under temperature variation is Tx (percentage value);

[0113] With the process corner tt unchanged, the power supply voltage 3.3V, the deviation value of the minimum value compared to the typical value under temperature variation is Tn (percentage value);

[0114] With the temperature unchanged at 25°C, the power supply voltage 3.3V, the deviation value of the maximum value compared to the typical value under process corner variation is Px (percentage value);

[0115] With the temperature unchanged at 25°C, the power supply voltage 3.3V, the deviation value of the minimum value compared to the typical value under process corner variation is Pn (percentage value);

[0116] With the process corner tt unchanged, the temperature unchanged at 25°C, the deviation value of the maximum value compared to the typical value under power supply voltage variation is Vx (percentage value);

[0117] The process corner tt remains unchanged, the temperature of 25 °C remains unchanged, and the deviation value of the maximum value from the typical value under the change of the power supply voltage is Vn (percentage value);

[0118] By comparing the best and worst results of the performance parameters under different process platforms, it is very clear which aspect of the performance of the module the engineer pays more attention to when selecting the process before designing the module.

[0119] In this embodiment, a weight data is provided

[0120] Attach great importance: a = 1.5

[0121] Attach relatively great importance: b = 1.25

[0122] Normal is fine: c = 1

[0123] Can be slightly worse: d = 0.75

[0124] Cannot be too bad: e = 0.5

[0125] Suppose the designer attaches great importance to Ax and An when selecting the process, attaches relatively great importance to Tx, thinks that Tn, Px, and Pn are normal, and the performance of Vx and Vn can be slightly worse.

[0126] Then he can substitute and calculate through the formula a*Ax + a*An + b*Tx + c*Tn + c*Px + c*Pn + d*Vx + d*Vn (or assign weights to each item on the software and calculate by the software). The process with the minimum value obtained is the process that best meets the engineer's design expectations. When the items that the engineer pays attention to change (that is, the weights of each item change), the optimal process obtained may also be different.

Claims

1. A method for screening a semiconductor process, characterized in that: The method comprises the following steps: Step 1, constructing a simulation model library, the simulation model library includes simulation circuit modules that can be selected by users, and each simulation circuit module corresponds to a preset simulation scheme; constructing a process database, the process database includes device performance data of a process platform that can be selected by users; Step 2: Loading simulation circuit modules and performance data of multiple process platforms to be selected according to user selection; Step 3, based on a preset simulation scheme, obtaining simulation evaluation results of multiple performance parameters of each candidate process platform in a simulation circuit module; Step 4, obtaining the user's attention weight, and obtaining the final process evaluation result by counting the simulation evaluation results of each process platform according to the attention weight, so as to provide a decision reference for the user's semiconductor process screening.

2. The method for screening semiconductor processes according to claim 1, characterized in that: The simulation scheme includes simulation state parameters, simulation strategy and evaluation performance parameters.

3. The method for screening semiconductor processes according to claim 2, characterized in that: The simulation state parameters include state parameters of at least two dimensions, and the environmental parameters of each dimension include a typical state parameter and a plurality of atypical state parameters.

4. The method for screening a semiconductor process according to claim 3, characterized in that: The construction method of the simulation strategy further includes: Arrange and combine the state parameters of all dimensions to form a series of simulation schemes, and record the simulation results of the evaluation performance parameters; The simulation results when the state parameters of each dimension are typical state parameters are extracted as typical values ​​of the performance evaluation parameters; Based on the control variable principle, the simulation results of the evaluation performance parameters of only each dimensional state parameter in the atypical state parameter are extracted as the first atypical value; The simulation results of the evaluation performance parameters of the remaining simulation schemes are taken as the second atypical values; The deviation values ​​of the first and second atypical values ​​and typical values ​​of each dimension state parameter are counted respectively.

5. The method for screening a semiconductor process according to claim 4, characterized in that: The step 4 further comprises: Step 401, obtaining the user's attention weight, specifically the user's weight data for each state parameter dimension; Step 402, calculating a process evaluation result for a candidate process platform according to the weight data and the deviation value between the atypical value and the typical value of each dimensional state parameter; Step 403 , compare the process evaluation results of each candidate process platform to provide a decision reference for the user's semiconductor process screening.

6. The method for screening a semiconductor process according to claim 5, characterized in that: The statistical calculation of the deviation between the atypical value and the typical value of each dimension state parameter further includes: Obtain the maximum and minimum values ​​of the first and second atypical values; The maximum value and the minimum value of the first atypical value are compared with the typical value of the evaluation performance parameter to obtain multiple first deviation values, and the first deviation values ​​correspond to each state parameter dimension. The maximum value and the minimum value of the atypical value are compared with the typical value of the evaluation performance parameter to obtain a second deviation, and the second deviation meets the overall deviation.

7. The method for screening semiconductor processes according to claim 2 or 3, characterized in that: The environmental parameters include at least process angle, voltage and temperature.

8. A device for screening semiconductor processes, characterized in that: include: A simulation model library, wherein the simulation model library includes simulation circuit modules that can be selected by users, and a preset simulation scheme corresponding to each simulation circuit module; A process database, the process database including device performance data of process platforms selectable by users; A user selection module is used to load a simulation circuit module and performance data of multiple process platforms to be selected; A simulation module, used to obtain simulation evaluation results of multiple performance parameters of each candidate process platform in a simulation circuit module based on a preset simulation scheme; The process evaluation module is used to obtain the user's attention weight, and obtain the final process evaluation result by counting the simulation evaluation results of each process platform according to the attention weight, so as to provide a decision reference for the user's semiconductor process screening.

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