Digital laser frequency stabilization system constructed by using FPGA (Field Programmable Gate Array)

Abstract

The invention discloses a digital frequency stabilization system based on a Pound-Drever-Hall (PDH) principle, the system is realized by using an FPGA (Field Programmable Gate Array), the system comprises a signal generation module, a signal demodulation module, a frequency stabilization point locking module and a servo control module, and traditional simulation hardware is replaced by a digital mode to realize laser frequency stabilization. The self-designed frequency stabilization point locking algorithm can ensure that the switching of the control state is completed at the frequency locking point, the frequency difference is accurately reflected in the linear interval, and automatic relocking is realized; a double-loop servo control module composed of an IQ modulator control loop and a laser voltage-controlled crystal oscillator control loop is constructed, and an unstable laser signal is modulated to a stable single side band so as to reduce errors of the laser; in addition, a master control module is designed in the system to control registers of all modules in the FPGA and manage state circulation of the system. The problems that in a traditional scheme, the hardware phase is unstable, insertion loss is likely to be introduced, and the system precision is affected are solved, and the stability and precision of the system are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of precision optical measurement and precision test metrology. More specifically, it relates to a digital laser frequency stabilization system based on the Pound-Drever-Hall (PDH) active frequency stabilization principle and constructed using a Field Programmable Gate Array (FPGA). Background Art

[0002] Ultra-stable lasers play a crucial role in many fields due to their advantages such as ultra-high frequency stability and extremely narrow linewidth. In the field of precision optical measurement and precision test metrology, it is the core light source for high-resolution laser spectroscopy, precise optical frequency control, and precision measurement physics, and has extensive applications in aspects such as cold atom optical clocks, geodesy, gravitational wave detection, and optical frequency transfer. For example, in space gravitational wave detection programs such as the European LISA program, and China's Taiji and Tianqin programs, etc., it is necessary to achieve ultra-long heterodyne laser interferometric measurement between test masses freely floating in space, which requires the linewidth of the ultra-stable laser to be ≤1 Hz and the frequency stability to reach the order of 10-15. The importance of ultra-stable lasers is self-evident. In the communication field, the demand for ultra-stable lasers is also increasing continuously. Especially in 5G communication, its stable frequency output can provide reliable guarantee for high-speed data transmission, ensuring the clarity and stability of communication signals. In the medical field, ultra-stable lasers can be used in medical imaging, etc. Its precise laser frequency helps to improve the clarity and accuracy of the image, providing more powerful support for the diagnosis and treatment of diseases. In addition, ultra-stable lasers also have broad application prospects in the field of environmental monitoring, capable of performing high-precision monitoring of atmospheric components, water quality, etc., providing a scientific basis for environmental protection and resource management. In the field of quantum computing, such as trapped ions and Rydberg atom arrays, etc., ultra-stable lasers can be used to precisely control quantum bits, improving the stability and reliability of quantum computing. In the field of quantum sensing, ultra-stable lasers can provide a high-precision frequency reference, enhancing the sensitivity and measurement accuracy of sensors.

[0003] Scholars at home and abroad have proposed many solutions for the construction of ultra-stable lasers. Among them, the PDH technology, as the most widely used active frequency stabilization technology at present, has received a great deal of attention. However, there are still many problems in the traditional PDH system, and new technologies need to be developed to further improve the accuracy of the system. For example, in the traditional PDH system, analog hardware is often used, including the demodulation module, which not only introduces errors but also affects the real-time performance of the system. At the same time, the PDH system needs to use a servo mechanism to control the piezoelectric ceramic transducer (PZT) to complete the tuning of the laser. However, the traditional control scheme uses the resonance frequency of the laser as the ideal signal, and it is very difficult to achieve precise control of the laser when the stability of the laser is poor. Further, the application system of the ultra-stable laser often needs to maintain stability for a long time. The traditional scheme lacks a corresponding frequency stabilization point locking scheme and an automatic relocking module. Based on the above three factors, the traditional scheme urgently needs to be optimized to ensure the accuracy and long-term stability of the system. Summary of the Invention

[0004] In view of the huge demand for lasers in many key fields such as scientific research, communication, medical treatment, environmental monitoring, and quantum technology, as well as the limitations of the traditional PDH frequency stabilization system, this application proposes an innovative digital laser frequency stabilization system solution. This solution still follows the PDH principle and uses FPGA to build the system architecture, realizing a comprehensive digital upgrade of the traditional analog hardware, effectively improving the flexibility and scalability of the system. In the system design, a single-sideband modulation loop is constructed by means of an IQ modulator, optimizing the signal modulation and demodulation process and significantly enhancing the anti-interference ability of the system. At the same time, this application designs a dual-loop control strategy for the high-frequency controller and the low-frequency controller. The two work together to achieve precise tuning of the laser frequency, greatly improving the tuning accuracy of the system and ensuring that the laser can stably output a high-precision laser frequency in a complex working environment. In addition, this application also deeply analyzes the core characteristics of the PDH system and designs a frequency stabilization point locking algorithm based on this. This algorithm can monitor the operation state of the system in real time, automatically adjust the frequency stabilization point, and effectively cope with various external interferences and system drifts, thus ensuring that the system always maintains excellent stability during long-term operation.

[0005] The specific content of the present invention is that we use FPGA to construct a signal generation module, a signal demodulation module, a frequency stabilization point locking module, and a servo control module. At the same time, we construct a main control module to control each module to achieve data transfer and system operation. At the same time, we use an IQ modulator to construct a high carrier suppression single-sideband modulation signal, modulate the unstable laser signal to a stable single sideband, and construct a low-frequency controller and a high-frequency controller to achieve coarse and fine tuning of the laser output signal to ensure system accuracy. Finally, we construct a frequency stabilization point locking algorithm based on the characteristics of the PDH system, and combine it with the automatic relocking algorithm constructed by FPGA to ensure the long-term stability of the system.

[0006] To achieve the above object, according to one aspect of the present invention, a digital laser frequency stabilization system constructed using FPGA based on the Pound-Drever-Hall principle is proposed, including the following steps.

[0007] (1) A PDH frequency stabilization system is built using a laser, an IQ modulator, an electro-optic modulator (EOM), a resonator, a photodetector, and an FPGA. The laser, IQ modulator, EOM, resonator, and photodetector are used to obtain an error signal that can reflect the frequency of the laser and the resonance frequency of the resonator. And an FPGA is used to construct a signal demodulation module that can implement band-pass filtering, mixing, and low-pass filtering, a signal generation module that can control various modulators by generating sine waves, a servo control module that can precisely control the laser PZT and IQ modulator, and a frequency stabilization point locking module constructed based on the characteristics of the PDH system.

[0008] (2) The IQ modulator is used to output a high carrier suppression single-sideband signal. By precisely modulating its five-way voltage signals, a high carrier suppression single-sideband signal is obtained, thereby providing a stable frequency reference for the laser, modulating the unstable laser signal to a stable carrier, and reducing the impact of laser instability on the overall frequency stabilization performance.

[0009] (3) The signal generation module constructed using FPGA in step (1) is based on (Direct Digital Synthesis, DDS). The DDS is used to output sine waves to control the IQ modulator and EOM respectively. The following points need to be noted when generating signals: First is the clock frequency. The DDS core usually requires a relatively high system clock frequency to achieve high-frequency output. The system clock and the maximum frequency of the generated sine and cosine signals should satisfy a 2:1 relationship, that is, if the system clock is 100 MHz, then the maximum sine and cosine signals that can be generated is 50 MHz. For better performance and accuracy, a higher clock frequency is usually selected. Second is the frequency control word. The formula for calculating the output signal frequency of DDS is shown in formula (1):

[0010]

[0011] where K is the frequency control word, f CLK is the system clock frequency, and N is the number of bits of the phase accumulator. To obtain the appropriate output frequency, the appropriate frequency control word needs to be calculated according to this formula. Finally, the bit width of the phase accumulator: the bit width of the phase accumulator determines the frequency resolution of the DDS, as shown in formula (2):

[0012]

[0013] The larger the bit width, the higher the frequency resolution, but it will also increase the computational complexity and resource consumption.

[0014] (4) In step (1), an FPGA is used to construct a signal demodulation module, which is composed of a band-pass filter, a mixer, and a low-pass filter to achieve the demodulation of the error signal. The implementation processes of the band-pass filter and the low-pass filter are as follows: They are jointly completed by using the filter design tool in the simulation software and the filter IP core provided by the FPGA. First, set the key parameters of the filter in the simulation software, such as the order, cut-off frequency, etc. Subsequently, quantize the generated filter tap coefficients. Finally, import the quantized results into the filter IP core and perform the corresponding configuration work.

[0015] (5) In step (1), an FPGA is used to construct a frequency stabilization point locking module, which realizes the positioning of the frequency stabilization point of the error signal through this module. At the same time, the algorithm design is combined to ensure that the system operates in the linear range to determine that the system can achieve automatic relocking when it loses lock in a complex environment.

[0016] (6) In step (1), an FPGA is used to construct a servo control module, which is composed of a high-frequency PID controller and a low-frequency PID controller. After the frequency stabilization point locking module successfully determines the frequency stabilization point, the clock of the servo control module is enabled, and the high-frequency controller and the low-frequency controller of the servo control module work together to achieve precise control of the laser output signal through precise control of the laser and the IQ modulator. Description of the Drawings

[0017] Figure 1 is the hardware structure diagram provided by this application;

[0018] Figure 2 is the schematic diagram of the frequency stabilization system constructed using an FPGA provided by this application;

[0019] Figure 3 is the system application flow chart provided by this application;

[0020] Figure 4It is the flowchart of the frequency stabilization point determination algorithm provided by this application; Detailed implementation manners

[0021] In order to make the objectives, technical solutions and advantages of the present invention more clear and understandable, a digital frequency stabilization system constructed using FPGA of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0022] Refer to Figure 1 : It is the hardware structure diagram of a digital frequency stabilization system constructed using FPGA provided by this application. The entire system realizes precise control and processing of signals through FPGA to ensure the synchronization and stability of the output signal of the laser and the resonant frequency of the resonant cavity. After the system is powered on, DDS1 outputs a triangular wave, which controls the PZT of the laser through a high-speed digital-to-analog converter 1 (DAC) to complete laser frequency sweeping. The optical signal emitted by the laser is modulated by an IQ modulator and then enters the EOM for further modulation. Then, the signal enters the resonant cavity, and a signal that can reflect the frequency error between the laser and the resonant cavity is obtained using a photodetector. Further, the output signal of the photodetector is converted into a digital signal by an analog-to-digital converter (ADC) and sent to the FPGA for data processing. The error signal passes through a frequency discrimination module composed of a band-pass filter, a mixer, and a low-pass filter, and a frequency discrimination curve that can characterize the frequency locking error is obtained through average value operation. After the frequency discrimination curve meets the requirements, the error signal successively passes through a high-frequency controller and a low-frequency controller to control the IQ modulator and the PZT of the laser. Among them, the output signal of the low-frequency controller is combined with the current signal of DDS1 and output a control signal through DAC1 to control the PZT, realizing the coarse adjustment of the laser. The high-frequency controller controls DDS2 to output a modulation signal to realize precise modulation of the IQ modulator. The unstable signal output by the laser is modulated to a stable sideband through the highly stable single-sideband signal generated by the IQ modulator, realizing the fine adjustment of the laser.

[0023] Refer to Figure 2, the proposed frequency stabilization system diagram constructed using FPGA in this application consists of four core modules: a signal generation module, a signal demodulation module, a frequency stabilization point locking module, and a servo control module. At the same time, the system also sets up a main controller module to control the key parameters of each module. After the system runs, the main control sets the controllable gate of the servo control module to 0. The DDS1 of the signal generation module outputs a triangular wave to complete the frequency sweep of the laser. DDS2 and DDS3 output sine waves with fixed frequencies to modulate the laser signal. After the signal enters the resonant cavity, a new signal reflecting the error between the laser and the resonant cavity resonant frequency is obtained using a photodetector. The output signal of the photodetector passes through an anti-aliasing filter and then enters the circuit board card through an AC coupling method and is collected by the ADC. The collected data then passes through a signal demodulation circuit composed of a band-pass filter, etc., and is converted into a frequency discrimination signal. After the frequency discrimination signal is processed by mean smoothing, it is divided into three paths: one path is transmitted to the frequency locking point positioning module, stored in FIFO1, and the precise positioning of the frequency locking point is achieved through the frequency locking point judgment algorithm. There are relevant registers inside the module to store the value of the frequency locking point and the current frequency locking point positioning status. At the same time, a control signal interface is also configured to receive instructions from the main control; one path enters the servo control module for feedback control, and the last path is passed to the FIFO module and then transmitted to the upper computer via QSFP for real-time observation of the error signal. After the frequency locking point positioning is completed, the output signal enables the control clock of the servo module. The main control module controls the controllable gate to be set to 1 and transmits the frequency locking voltage found by the frequency locking point positioning module to DDS1. At this time, the error signal passes through a high-frequency controller to control the output signal of DDS2 to achieve precise tuning of the IQ modulator. By controlling the IQ controller to output a precise single-sideband signal, the unstable laser signal is modulated to a stable single-sideband signal. Further, the error signal passes through a high-frequency controller and a low-frequency controller and then outputs a control signal and the DDS1 signal to jointly control the PZT of the laser. This signal is converted by the DAC and used to drive the PZT to achieve coarse tuning control of the laser frequency. Through the above servo control, precise tuning of the laser is achieved.

[0024] See Figure 3, which is the signal transmission flowchart of the implementation case of this application. After the system runs, it first enables the scanning sawtooth wave function to achieve the frequency sweeping of the laser. Subsequently, the signal is modulated, and the frequency discrimination curve is obtained through the signal demodulation module. After obtaining the frequency discrimination curve, the system will evaluate whether the curve meets the preset requirements. If the frequency discrimination signal does not meet the requirements, the system will return to the scanning sawtooth wave stage to perform frequency scanning again. Once the frequency discrimination signal meets the requirements, the system will activate the frequency locking signal function, and then activate the frequency locking point positioning module to accurately determine the frequency locking point. During the frequency locking point positioning process, the system will try to automatically find the frequency locking point. If the automatic search is successful, the system will switch to the servo control mode, output the control signal to the servo controller, and use the found frequency locking point coordinates as the theoretical signal for further optimization and calibration of the system. If the automatic search fails to find the frequency locking point, the frequency locking function will be turned off, and a rescan or other fault diagnosis process may be triggered. Finally, the system enters the state holding stage. In this stage, if the system successfully locks the frequency, the locked state will be maintained; if it fails to lock, the frequency locking process may need to be executed again. This closed-loop control mechanism ensures that the system can accurately lock to the target frequency point through continuous feedback and adjustment, thereby achieving high-precision control of the frequency.

[0025] See Figure 4 , which is a frequency locking point positioning algorithm constructed based on the characteristics of the PDH system provided by this application. After the error signal is input, first calculate the average value of the signal through the sliding window technology to reduce the influence of noise. Then, calculate the variance and set the threshold to three times the standard deviation to determine the maximum and minimum values of the signal baseline. Only keep the data greater than the upper limit of the baseline and the data less than the lower limit of the baseline, and discard the rest of the data. For the data exceeding the maximum value of the baseline, the algorithm forms the maximum value interval A i with it and determines the maximum value a i of each interval; for the data lower than the minimum value of the baseline, it forms the minimum value interval B j with the lower limit of the baseline and determines the minimum value b j of each interval. These maximum and minimum value points form a series of maximum-minimum pairs (a i , b j ). Judge whether these maximum-minimum pairs are adjacent and of different signs. If so, calculate the slope of the linear interval formed by these maximum-minimum pairs and determine the maximum-minimum pair with the largest slope. At this time, the maximum linear interval has been determined, and the frequency stabilization point is the intersection of this interval and the baseline. Finally, this flowchart describes a systematic method for accurately identifying the frequency locking point through continuous calculation and conditional judgment.

Claims

1. A digital frequency stabilization system constructed using FPGA, characterized in that: The following steps are involved: (1) A laser frequency stabilization system with dual control loops is constructed using a laser, an IQ modulator, an electro-optic modulator (EOM), a resonant cavity, a photodetector, and a field programmable gate array (FPGA). (2) Use FPGA to construct a signal generation module, a signal demodulation module, a frequency stabilization point locking module, a servo control module, and a main control module that can configure the above four modules. (3) The signal generation module is used to tune the IQ modulator and EOM and then obtain the error signal. Specifically, after the system is running, the signal generation module is used to output a sine wave through the digital-to-analog converter to control the IQ modulator and EOM. The laser signal passes through the IQ modulator and the EOM modulator and then enters the resonant cavity. The modulation frequency of the EOM should be greater than ten times the half-width of the resonant cavity. Finally, a photodetector is used to obtain an error signal that can reflect the resonant frequency of the laser and the resonant cavity. (4) The signal demodulation module is used to process the error signal. Specifically, the FPGA is used to construct a bandpass filter, a mixer, and a low-pass filter. The error signal collected by the photodetector is first bandpass filtered, mixed with the modulated signal of the EOM, and finally low-pass filtered to extract the low-frequency signal that can reflect the error. (5) Use the stable frequency point locking module to locate the locking frequency point. Specifically, use the self-written locking frequency point positioning algorithm to determine the optimal locking frequency point and provide a locking reference for the subsequent servo control module. (6) The error signal is optimized by using the servo control module. Specifically, the frequency stabilization point located in step (5) is used as a reference, and the IQ modulator and the laser piezoelectric ceramic transducer (PZT) are controlled by using a dual PID control loop. The error is optimized through fine control, and the laser output signal is locked to the resonant frequency of the resonant cavity, thus completing the laser frequency locking. (7) Use the main control module to complete the configuration of the above four modules and control the transmission of signals.

2. A digital frequency stabilization system constructed using FPGA according to claim 1, characterized in that: The IQ modulator in step (1) is a dual parallel Mach-Zehnder (MZM) interferometer modulator. By reasonably configuring two RF signals and three DC signals, a single-sideband modulation signal with high carrier suppression is obtained. Combined with the subsequent control loop, the unstable laser signal is modulated to a stable single-sideband, thereby eliminating the unstable factors of the laser.

3. A digital frequency stabilization system constructed using FPGA according to claim 1 and claim 2, characterized in that: The signal generation module constructed in step (2) and step (3) is specifically as follows: using direct digital synthesis (DDS) technology to generate an arbitrary signal, which is mainly composed of a phase accumulator and a phase-amplitude converter. The process of generating a fixed-frequency sine wave signal is as follows: the phase accumulator first cyclically accumulates an address sequence representing the sine wave phase according to the input frequency control word, and then, under the control of the system's high-speed clock, converts the phase-amplitude mapping relationship to obtain a discrete amplitude sequence describing the sine wave waveform, and finally converts it into an analog signal by DAC; this conversion process is similar to the so-called sample-and-hold circuit, that is, the signal waveform in the phase-amplitude converter is ideally sampled by pulses with extremely small phase intervals, and then the phase interval is kept unchanged, and a waveform composed of continuous "steps" is formed; because the system's operating clock frequency is high enough, the phase interval time, that is, the width of the step, can be ignored, and the final result is a continuous sine wave signal.

4. A digital frequency stabilization system constructed using FPGA according to claim 1 to claim 3, characterized in that: The signal demodulation module constructed in step (2) and step (4) is specifically as follows: the signal generation module outputs two identical sine waves, one of which completes the modulation of the EOM, and the other is input into the mixer as the local oscillator signal and mixed with the error signal collected by the photodetector after passing through the bandpass filter, and then the mixing result is input into the low-pass filter, and finally a low-frequency error signal that can reflect the resonant frequency of the laser and the resonant frequency of the resonant cavity is obtained; wherein the bandpass filter and the low-pass filter are completed by combining the filter design tool in the simulation software and the filter IP core provided by the FPGA, by setting the necessary filtering parameters such as order, cutoff frequency, etc. in the simulation software, and then quantizing the generated filter tap coefficients, and finally importing the quantized results into the filter IP core and completing the relevant configuration.

5. A digital frequency stabilization system constructed using FPGA according to claim 1 to claim 4, characterized in that: The frequency stabilization point locking module constructed in step (2) and step (5) is specifically as follows: the optimal frequency locking point is determined by using a self-written frequency locking point positioning algorithm. The algorithm calculates the sliding window average value of the error signal to reduce the influence of noise, then calculates the variance and sets the threshold to three times the standard deviation to determine the maximum and minimum values ​​of the signal baseline. Only data greater than the upper limit of the baseline and data less than the lower limit of the baseline are retained, and the remaining data are discarded; for data exceeding the maximum value of the baseline, it is combined with the upper limit of the baseline to form a maximum value interval, and the maximum value of each interval is determined; For data below the minimum value of the baseline, a minimum interval is formed with the lower limit of the baseline, and the minimum value of each interval is determined. These maximum and minimum points form a series of maximum and minimum pairs. It is determined whether these maximum pairs are adjacent and have opposite signs. If so, the slope of the linear interval composed of these maximum pairs is calculated, and the maximum pair with the largest slope is determined. At this time, the maximum linear interval has been determined, and the stable frequency point is the intersection of the interval and the baseline.

6. A digital frequency stabilization system constructed using FPGA according to claim 1 to claim 5, characterized in that: The servo control module constructed in step (2) and step (6) is specifically as follows: the module is composed of a high-frequency controller and a low-frequency controller. After the stable frequency point locking module successfully determines the stable frequency point, the clock of the servo control module is enabled, and the high-frequency controller and the low-frequency controller work together to achieve precise control of the laser output signal by respectively precisely controlling the IQ modulator and the laser PZT; wherein the low-frequency controller is a classic PI controller, and its output signal is combined with the current DC signal of DDS1 determined by the stable frequency point locking module to control the laser PZT through the DAC1 output to achieve coarse adjustment of the laser; the high-frequency controller is a fuzzy controller, which achieves precise modulation of the IQ modulator by controlling the DDS2 output modulation signal, and modulates the unstable signal output by the laser to the stable sideband through the high-stable single-sideband signal generated by the IQ modulator, thereby achieving fine adjustment of the laser.

7. A digital frequency stabilization system constructed using FPGA according to claim 1 to claim 6, characterized in that: The main control module constructed in step (2) and step (7) is specifically as follows: the main control module is used to realize the control of key parameters of each module and the flow of signals. After the system is running, the main control controls the controllable gate of the servo control module to 0, the DDS1 of the signal generating module outputs a triangle wave to complete the frequency sweep of the laser, and DDS2 and DDS3 output a fixed frequency sine wave to modulate the laser signal; after the frequency locking point positioning is completed, the output signal enables the control clock of the servo module, the main control module controls the controllable gate to 1 and passes the frequency locking voltage found by the frequency locking point positioning module to DDS1; at the same time, the main control module completes the communication with the host computer to realize the transmission of instructions from the host computer to the FPGA and the transmission of signals from the FPGA to the host computer.

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