Chip structure capable of simultaneously improving deep ultraviolet LED crystal quality and injection efficiency and preparation method

Abstract

The invention discloses a chip structure capable of simultaneously improving deep ultraviolet LED crystal quality and injection efficiency and a preparation method. The chip structure comprises a substrate, a buffer layer is arranged on the substrate, a multi-quantum well layer is arranged above the buffer layer, an n-type doping layer is arranged on the side face of the multi-quantum well layer, and an n-type contact electrode is arranged above the n-type doping layer. A plurality of p-type doped layer plugs are inserted in the multi-quantum well layer, a p-type doped layer is arranged above the p-type doped layer plugs and the multi-quantum well layer, and a p-type contact electrode is arranged on the p-type doped layer; a passivation layer is arranged on the upper surface of the whole structure, and the thickened metal electrode penetrates through the passivation layer and is located on the n-type contact electrode and the p-type contact electrode. According to the invention, insufficient hole injection in the multi-quantum well layer and the crystal quality of the multi-quantum well layer can be improved at the same time.

Description

Technical Field

[0001] The present invention relates to the field of ultraviolet light emitting devices, and particularly to a chip structure and a preparation method for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs. Background Art

[0002] Deep ultraviolet light has great application value in the fields of sterilization and disinfection, medical health, biochemical detection, curing and processing, industrial decontamination, etc. AlGaN-based deep ultraviolet light emitting diodes (LEDs) have the advantages of environmental friendliness, easy wavelength adjustment, fast response speed, easy integration, long service life, etc., and have attracted great attention from many domestic and foreign research institutions and the industrial community.

[0003] At present, although the technology for improving the efficiency of GaN-based LEDs is constantly developing, the quantum efficiency of GaN-based LEDs drops severely at high currents. Regarding the physical mechanism of the efficiency drop of GaN-based LEDs, it is generally believed that the hole transport characteristics of nitride materials are insufficient. Although multiple quantum well layers are used in LEDs, due to the poor hole transport characteristics, most of the light of GaN-based LEDs is emitted in the single quantum well near the p-GaN side. This local recombination process increases the Auger recombination rate and electron overflow, resulting in a drop in efficiency at high current densities. In addition, due to the lattice mismatch between the substrate and the buffer layer and between the buffer layer and the n-type layer, the crystal quality of the multiple quantum well layer becomes poor, which directly reduces the internal quantum efficiency of GaN-based LEDs. The above problems need to be solved urgently. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention provides a chip structure and a preparation method for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs, which can improve the insufficient hole injection in the multiple quantum well layer and improve the crystal quality of the multiple quantum well layer.

[0005] In a first aspect, the present invention provides a chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs, which is achieved through the following technical solutions.

[0006] A chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs includes a substrate, a buffer layer is provided on the substrate, a multiple quantum well layer is provided above the buffer layer, an n-type doped layer is provided on the side of the multiple quantum well layer, and an n-type contact electrode is provided above the n-type doped layer; a p-type doped layer plug is inserted into the multiple quantum well layer, a p-type doped layer is provided above the p-type doped layer plug and the multiple quantum well layer, and a p-type contact electrode is provided on the p-type doped layer; a passivation layer is provided on the upper surface of the entire structure, and a thickened metal electrode penetrates through the passivation layer and is located on the n-type contact electrode and the p-type contact electrode.

[0007] Further, the substrate material is selected from one of sapphire, silicon, SiC, GaN, and AlN.

[0008] Further, the buffer layer material is selected from one or more of AlN, AlGaN, and GaN; the thickness of the buffer layer is greater than or equal to 50 nm and less than or equal to 2 μm.

[0009] Further, the multiple quantum well layer is an Al x Ga 1-x N / Al y Ga 1-y N multiple quantum well layer, where 0 < x < 1 and 0 < y < 1; the number of well and barrier periods of the multiple quantum well layer is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multiple quantum well layer is 0.5 - 5 nm, and the thickness of the barrier layer of the multiple quantum well layer is 5 - 15 nm.

[0010] Further, the n-type doped layer is a doped semiconductor material obtained by doping one or more of AlN, GaN, and AlGaN with a doping element of Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 ; the thickness of the n-type doped layer is the same as the thickness of the multiple quantum well layer.

[0011] Further, the p-type doped layer plug and the p-type doped layer are doped semiconductor materials obtained by doping one or more of AlN, GaN, and AlGaN with a doping element of Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 ; the thickness of the p-type doped layer is greater than or equal to 50 nm and less than or equal to 2 μm; the p-type doped layer plug is inserted into the multiple quantum well layer to the Xth quantum well, where 0 < X ≤ 10 and X is an integer.

[0012] Further, the n-type contact electrode is Ti / Al / Ti / Au; the p-type contact electrode is Ni / Au.

[0013] Further, the passivation layer material is selected from one of SiO 2 、Si 3 N 4 、AlN、Al 2 O 3 、HfO 2 。

[0014] Further, the thickened metal electrode is Au / Sn.

[0015] In a second aspect, the present invention provides a method for fabricating a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, which is achieved through the following technical solutions.

[0016] A method for fabricating a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs includes the following steps:

[0017] S1. Epitaxially grow a buffer layer and a multi-quantum well layer on a substrate in sequence;

[0018] S2. Etch downward in the edge region of the multi-quantum well layer until reaching the buffer layer to form an n-type doped layer re-growth region for growing the subsequent n-type doped layer;

[0019] S3. Selective area epitaxially grow an n-type doped layer on the buffer layer on the side of the multi-quantum well layer;

[0020] S4. Etch in the multi-quantum well layer to form a p-groove for growing the subsequent p-type doped layer plug and p-type doped layer;

[0021] S5. Epitaxially grow a p-type doped layer plug and a p-type doped layer on the etched multi-quantum well layer respectively;

[0022] S6. Prepare an n-type contact electrode and a p-type contact electrode on the upper surfaces of the n-type doped layer and the p-type doped layer respectively;

[0023] S7. Cover the upper surface of the entire structure with a passivation layer to protect the multi-quantum well layer and separate the n-type doped layer and the p-type doped layer, open electrode windows at the n-type contact electrode and the p-type contact electrode, and then deposit and thicken metal electrodes in the electrode windows.

[0024] The present application has the following beneficial effects.

[0025] (1) For the deep ultraviolet LED structure of the present invention that improves carrier injection and quantum well crystal quality, by partially inserting the p-type doped layer plug into the multi-quantum well layer, the holes generated by the p-type doped layer can be better injected into other quantum wells close to the substrate;

[0026] (2) For the chip structure of the present invention that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, by arranging the n-type doped layer on the buffer layer and on the side of the multi-quantum well layer, the dislocations extending from the buffer layer to the multi-quantum well layer are reduced, thereby improving the crystal quality of the multi-quantum well layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the chip structure of the present invention that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs;

[0028] Figure 2 Flow chart of the preparation method steps of the chip structure for simultaneously improving the crystal quality and injection efficiency of the deep ultraviolet LED of the present invention;

[0029] Figure 3 Schematic diagram of the structure for completing the epitaxy of the multi-quantum well layer in the preparation method of the present invention;

[0030] Figure 4 Schematic diagram of the structure for completing the etching to form the n-type doped layer regrowth region in the preparation method of the present invention;

[0031] Figure 5 Schematic diagram of the structure for completing the epitaxial growth of the n-type doped layer in the preparation method of the present invention;

[0032] Figure 6 Schematic diagram of the structure for completing the etching to form the p-type doped layer plug and the p-type doped layer regrowth region in the preparation method of the present invention;

[0033] Figure 7 Schematic diagram of the structure for completing the epitaxial growth of the p-type doped layer plug in the preparation method of the present invention;

[0034] Figure 8 Schematic diagram of the structure for completing the epitaxial growth of the p-type doped layer in the preparation method of the present invention;

[0035] Figure 9 Schematic diagram of the structure for completing the preparation of the n-type contact electrode and the p-type contact electrode in the preparation method of the present invention;

[0036] Figure 10 Schematic diagram of the structure for completing the deposition of the passivation layer in the preparation method of the present invention;

[0037] Figure 11 Schematic diagram of the structure for completing the preparation of the thickened metal electrode in the preparation method of the present invention.

[0038] Among them, 1. Substrate; 2. Buffer layer; 3. Multi-quantum well layer; 4. n-type doped layer; 5. p-type doped layer plug; 6. p-type doped layer; 7. n-type contact electrode; 8. p-type contact electrode; 9. Passivation layer; 10. Thickened metal electrode. Detailed implementation manners

[0039] The invention will be further described below in conjunction with the drawings and embodiments. Unless otherwise specified, the experimental methods adopted in the present invention are conventional methods, and the experimental equipment, materials, reagents, etc. used can be purchased from relevant material sales companies.

[0040] As Figure 1As shown in the figure, a chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs includes: a substrate 1, a buffer layer 2, a multi-quantum well layer 3, an n-type doped layer 4, a p-type doped layer plug 5, a p-type doped layer 6, an n-type contact electrode 7, a p-type contact electrode 8, a passivation layer 9, and a thickened metal electrode 10.

[0041] Specifically, the material of the substrate 1 is any one of sapphire, silicon, SiC, GaN, and AlN.

[0042] The buffer layer 2 is located on the substrate 1, and the material of the buffer layer 2 is any one or more of AlN, AlGaN, and GaN. Among them, the thickness of the buffer layer 2 is greater than or equal to 50 nm and less than or equal to 2 μm.

[0043] The multi-quantum well layer 3 is located on the buffer layer 2 and on the side far from the substrate 1. The multi-quantum well layer 3 is an Al x Ga 1-x N / Al y Ga 1-y N multi-quantum well layer, where 0 < x < 1 and 0 < y < 1. The number of well layer and barrier layer periods of the multi-quantum well layer 3 is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multi-quantum well layer 3 is 0.5 - 5 nm, and the thickness of the barrier layer of the multi-quantum well layer 3 is 5 - 15 nm.

[0044] The n-type doped layer 4 is located on the buffer layer 2 and on the side of the multi-quantum well layer 3, and on the side far from the substrate 1. The n-type doped layer 4 is a doped semiconductor material obtained by doping any one material or any combination of materials of AlN, GaN, and AlGaN. Among them, the thickness of the n-type doped layer 4 is the same as the thickness of the multi-quantum well layer 3. The doping element of the material of the n-type doped layer 4 is Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 .

[0045] The p-type doped layer plug 5 is inserted into the multi-quantum well layer 3 and on the side far from the substrate 1; the p-type doped layer 6 is located on the multi-quantum well layer 3 and on the side far from the substrate 1. The p-type doped layer plug 5 and the p-type doped layer 6 are doped semiconductor materials obtained by doping any one material or any combination of materials of AlN, GaN, and AlGaN. Among them, the thickness of the p-type doped layer 6 is greater than or equal to 50 nm and less than or equal to 2 μm; the doping element of the materials of the p-type doped layer plug 5 and the p-type doped layer 6 is Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 1022 cm -3 ; The p-type doped layer plug 5 is inserted into the multi-quantum well layer 3 and the insertion depth is adjustable. The p-type doped layer plug 5 is inserted into the multi-quantum well layer 3 to the Xth quantum well, where 0 < X ≤ 10 and X is an integer.

[0046] The n-type contact electrode 7 is located on the n-type doped layer 4 and on the side far from the substrate 1. The n-type contact electrode 7 is Ti / Al / Ti / Au.

[0047] The p-type contact electrode 8 is located on the p-type doped layer 6 and on the side far from the substrate 1. The p-type contact electrode 8 is Ni / Au.

[0048] The passivation layer 9 is located on the upper surface of the LED and on the side far from the substrate 1. The material of the passivation layer 9 is SiO 2 、Si 3 N 4 、AlN、Al 2 O 3 、HfO 2 or any one of materials such as etc.

[0049] The thickened metal electrode 10 is located on the n-type contact electrode 7 and the p-type contact electrode 8 and on the side far from the substrate 1. The thickened metal electrode 10 is Au / Sn.

[0050] As Figure 2 shown, the present invention provides a preparation method of a chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs, including the following steps:

[0051] Step S1: Epitaxially grow a buffer layer 2 and a multi-quantum well layer 3 on the substrate 1 in sequence.

[0052] Please refer to Figure 3 , which is a schematic structural diagram of the epitaxy of the multi-quantum well layer 3 completed by the present invention. The epitaxy method can be any one of metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), ultra-high vacuum chemical vapor deposition (UHVCVD), atmospheric and reduced pressure epitaxy (ATM&RP Epi).

[0053] Step S2: Etch downward in the edge region of the multi-quantum well layer 3 until the buffer layer 2 to form a re-growth region for the n-type doped layer 4.

[0054] Please refer to Figure 4 , which is a schematic structural diagram of the etch to form the re-growth region for the n-type doped layer 4 completed by the present invention. In this embodiment, dry etching or wet etching can be used.

[0055] Step S3: Selective area epitaxial growth of an n-type doped layer 4 is carried out on the buffer layer 2 and on the sides of the multi-quantum well layer 3.

[0056] Please refer to Figure 5 , which is a schematic structural diagram of the epitaxial growth of the n-type doped layer 4 completed by the present invention. In this embodiment, a patterned mask is prepared on both sidewalls of the mesa of the multi-quantum well layer 3, and the n-type doped layer 4 is epitaxially grown, wherein the patterning process is any one of photolithography, nanoimprinting, or self-assembly, and the material of the mask is SiO 2 , Si 3 Al 4 or Al 2 O 3 any one of them, and the preparation method of the mask is any one of methods such as plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), physical vapor deposition (PVD), and magnetron sputtering.

[0057] Step S4: Etching is carried out in the multi-quantum well layer 3 to form a p-trench for growing subsequent p-type doped layer plugs 5 and p-type doped layer 6.

[0058] Please refer to Figure 6 , which is a schematic structural diagram of the re-growth area of the p-type doped layer plugs 5 and p-type doped layer 6 formed by etching completed by the present invention. In this embodiment, dry etching or wet etching can be used.

[0059] Step S5: The p-type doped layer plugs 5 and p-type doped layer 6 are respectively epitaxially grown on the etched multi-quantum well layer 3.

[0060] Please refer to Figure 7 , which is a schematic structural diagram of the epitaxial growth of the p-type doped layer plug 5 completed by the present invention. Please refer to Figure 8 , which is a schematic structural diagram of the epitaxial growth of the p-type doped layer 6 completed by the present invention. In this embodiment, a patterned mask is prepared on the mesa of the etched multi-quantum well layer 3 and on the mesa of the n-type doped layer 4, and selective area epitaxial growth of the p-type doped layer plug 5 is carried out in the unmasked area. Then, a patterned mask is prepared on the mesa of a part of the etched multi-quantum well layer 3 and on the mesa of the n-type doped layer 4, and selective area epitaxial growth of the p-type doped layer 6 is carried out in the unmasked area, wherein the patterning process is any one of photolithography, nanoimprinting, or self-assembly, and the material of the mask is SiO 2 , Si 3 N 4 or W any one of them, and the preparation method of the mask is any one of methods such as PECVD, ALD, PVD, and magnetron sputtering.

[0061] Step S6: Prepare the n-type contact electrode 7 and the p-type contact electrode 8 on the upper surfaces of the n-type doped layer 4 and the p-type doped layer 6 respectively.

[0062] Please refer to Figure 9 , which is a schematic structural diagram of the present invention for completing the preparation of the n-type contact electrode 7 and the p-type contact electrode 8. In this embodiment, electrode materials are deposited on the n-type doped layer 4 and the p-type doped layer 6 respectively, and then peeled off and annealed to prepare the n-type contact electrode 7 and the p-type contact electrode 8.

[0063] Step S7: Cover the upper surface of the LED with the passivation layer 9 to protect the multiple quantum well layer 3, separate the n-type doped layer 4 and the p-type doped layer 6, open electrode windows at the n-type contact electrode 7 and the p-type contact electrode 8, and deposit and thicken the metal electrode 10.

[0064] Please refer to Figure 10 , which is a schematic structural diagram of the present invention for completing the deposition of the passivation layer 9. Please refer to Figure 11 , which is a schematic structural diagram of the present invention for completing the preparation of the thickened metal electrode 10. In this embodiment, the passivation layer 9 is deposited by the PECVD method, the electrode windows of the n-type contact electrode 7 and the p-type contact electrode 8 are opened by photolithography and dry etching, and the thickened metal electrode 10 is deposited at the electrode windows.

[0065] In summary, the chip structure provided by the present invention for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs inserts part of the p-type doped layer plug 5 into the multiple quantum well layer 3, so that the holes generated by the p-type doped layer can be better injected into other quantum wells close to the substrate 1. By arranging the n-type doped layer 4 on the buffer layer 2 and on the side of the multiple quantum well layer 3, the dislocations extending from the buffer layer 2 to the multiple quantum well layer 3 are reduced, thereby improving the crystal quality of the multiple quantum well layer 3.

[0066] The embodiments of this specific implementation manner are all preferred embodiments of the present invention, and do not limit the protection scope of the present invention accordingly. Therefore, all equivalent changes made according to the structure, shape, and principle of the present invention should be covered within the protection scope of the present invention.

Claims

1. A chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency, comprising a substrate (1), characterized in that: A buffer layer (2) is provided on a substrate (1); a multi-quantum well layer (3) is provided above the buffer layer (2); an n-type doping layer (4) is provided on the side of the multi-quantum well layer (3); and an n-type contact electrode (7) is provided above the n-type doping layer (4); a p-type doping layer plug (5) is inserted into the multi-quantum well layer (3); a p-type doping layer (6) is provided above the p-type doping layer plug (5) and the multi-quantum well layer (3); and a p-type contact electrode (8) is provided on the p-type doping layer (6); and a passivation layer (9) is provided on the upper surface of the entire structure; a thickened metal electrode (10) is provided through the passivation layer (9) and is located on the n-type contact electrode (7) and the p-type contact electrode (8).

2. A chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The substrate (1) is made of a material selected from the group consisting of sapphire, silicon, SiC, GaN, and AlN.

3. A chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The material of the buffer layer (2) is selected from one or more of AlN, AlGaN and GaN; the thickness of the buffer layer (2) is greater than or equal to 50 nm and less than or equal to 2 μm.

4. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The multi-quantum well layer (3) is an Al x Ga 1-x N / Al y Ga 1-y N multi-quantum well layer, where 0 < x < 1 and 0 < y < 1; the number of well and barrier periods of the multi-quantum well layer (3) is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multi-quantum well layer (3) is 0.5 - 5 nm, and the thickness of the barrier layer of the multi-quantum well layer (3) is 5 - 15 nm.

5. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The n-type doped layer (4) is a doped semiconductor material obtained by doping one or more materials selected from AlN, GaN and AlGaN, the doping element is Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 The thickness of the n-type doped layer (4) is the same as the thickness of the multi-quantum well layer (3).

6. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The p-type doped layer plug (5) and the p-type doped layer (6) are doped semiconductor materials obtained by doping one or more of the materials of AlN, GaN, and AlGaN, the doping element is Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 ; the thickness of the p-type doped layer (6) is greater than or equal to 50 nm and less than or equal to 2 μm; the p-type doped layer plug (5) is inserted into the multi-quantum well layer (3) to the depth of the Xth quantum well, where 0 < X ≤ 10 and X is an integer.

7. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The n-type contact electrode (7) is Ti / Al / Ti / Au; and the p-type contact electrode (8) is Ni / Au.

8. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The material of the passivation layer (9) is selected from one of SiO2, Si3N4, AlN, Al2O3, and HfO2.

9. The chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to claim 1, characterized in that: The thickened metal electrode (10) is Au / Sn.

10. A method for preparing a chip structure for improving both the crystal quality and injection efficiency of deep ultraviolet LEDs according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1. epitaxially growing a buffer layer (2) and a multi-quantum well layer (3) on a substrate (1); S2. Etching downwards in the edge region of the multi-quantum well layer (3) until the buffer layer (2) is formed to form a regrowing region of the n-type doped layer (4) for growing a subsequent n-type doped layer (4); S3. performing selective epitaxial growth of an n-type doped layer (4) on the buffer layer (2) on the side of the multi-quantum well layer (3); S4. Etching is performed in the multi-quantum well layer (3) to form a p-groove for growing a subsequent p-type doped layer plug (5) and a p-type doped layer (6); S5. epitaxially growing a p-type doped layer plug (5) and a p-type doped layer (6) on the etched multi-quantum well layer (3); S6. Preparing an n-type contact electrode (7) and a p-type contact electrode (8) on the upper surfaces of the n-type doped layer (4) and the p-type doped layer (6), respectively; S7. Cover the upper surface of the entire structure with a passivation layer (9) to protect the multi-quantum well layer (3) and separate the n-type doped layer (4) and the p-type doped layer (6), and open electrode windows at the n-type contact electrode (7) and the p-type contact electrode (8), and then deposit a thickened metal electrode (10) in the electrode window.

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