Method and system for constructing behavior-level model of silicon carbide MOSFET (metal-oxide-semiconductor field effect transistor)

Abstract

The invention discloses a construction method and system of a silicon carbide MOSFET behavior-level model. The method comprises the following steps: S1, obtaining an electrical characteristic curve required for constructing the model; and S2, respectively modeling the core MOS module, the junction capacitor module and the body diode module according to the obtained electrical characteristic curve. And S3, building each sub-module in simulation software, and integrating the sub-modules into a complete behavior-level model. Compared with the prior art, the integrated behavior-level model not only occupies less computing resources, but also has higher simulation speed, and is suitable for rapid analysis and optimization of a large-scale complex circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device modeling and circuit simulation, and more specifically, to a method and system for constructing a behavioral model of a silicon carbide MOSFET. Background Art

[0002] With the rapid development of power electronics technology, the demand for high-performance power devices is increasing day by day. As a third-generation wide bandgap semiconductor material, silicon carbide (SiC) exhibits great potential in high-power density, high-efficiency, and high-temperature applications due to its advantages such as high breakdown electric field, high thermal conductivity, high carrier saturation velocity, and wide bandgap. Among them, silicon carbide MOSFETs have gradually become the core devices of the next-generation power electronic devices due to their low on-resistance, fast switching speed, and high-temperature resistance characteristics, and are widely used in fields such as new energy power generation, electric vehicles, industrial drives, and smart grids.

[0003] In order to accurately describe the electrical characteristics of silicon carbide MOSFETs in circuit design and simulation, the research on behavioral models is particularly important. Through the combination of mathematical expressions and sub-modules, behavioral models can quickly and accurately characterize the static characteristics of devices such as output characteristics and transfer characteristics, as well as dynamic characteristics such as parasitic capacitance characteristics. Compared with physical models, behavioral models achieve a better balance between accuracy and simulation efficiency, and are particularly suitable for the design and optimization of complex power electronic systems. However, the existing behavioral models of silicon carbide MOSFETs still face the following challenges in use:

[0004] (1) Complex data acquisition: Many models require additional experimental data or complex parameter extraction processes, which limits the generality of the models;

[0005] (2) Strong formula segmentation: Piecewise formulas are often used in existing models to describe the relationship between current and voltage, resulting in convergence problems in simulation and affecting simulation efficiency;

[0006] (3) High simulation resource consumption: Some models require high computing resources and have slow simulation speeds, which cannot meet the needs of large-scale power electronic system design.

[0007] The prior art discloses a modeling method for a field effect transistor, including: establishing an equivalent circuit for the small-signal intrinsic part of the FET, and thereby obtaining the relationship between the internal intrinsic parameters and the external bias; constructing a large-signal model of the FET, which includes a gate charge source, a drain charge source, a gate current source, a drain current source, and an NQS sub-circuit; obtaining the relationship between the non-linear current source, the charge source and the port voltage by performing a path integral on the port voltage; and then storing or using a neural network parsing model obtained by neural network training in a look-up table manner. The defect of this solution is that the output characteristic curves and the like required for constructing the model need complex tests and parameter extraction, and the threshold for modeling is relatively high.

[0008] Therefore, in combination with the above requirements and the defects of the prior art, the present application proposes a method and system for constructing a behavioral model of a silicon carbide MOSFET. Summary of the Invention

[0009] The present invention provides a method and system for constructing a behavioral model of a silicon carbide MOSFET. By using controlled current sources, controlled voltage sources, resistors, capacitors, and inductors to construct sub-circuit modules, and combining the output characteristic curve, transfer characteristic curve, junction capacitance characteristic curve, and body diode characteristic curve of the device, a behavioral model with a non-piecewise formula is constructed, which solves the deficiencies of the traditional model in terms of data acquisition, formula complexity, and simulation efficiency, and provides an efficient and reliable method for circuit simulation of silicon carbide MOSFETs.

[0010] The primary object of the present invention is to solve the above technical problems, and the technical solution of the present invention is as follows:

[0011] In a first aspect of the present invention, a method for constructing a behavioral model of a silicon carbide MOSFET is provided, and the method includes the following steps:

[0012] S1. Obtain the electrical characteristic curves required for constructing the model.

[0013] S2. According to the obtained electrical characteristic curves, respectively model the core MOS module, the junction capacitance module, and the body diode module.

[0014] S3. Build each sub-module in the simulation software and integrate them into a complete behavioral model.

[0015] Further, the electrical characteristic curves described in step S1 include: output characteristic curve I ds -V ds 、transfer characteristic curve I ds -V gs 、input capacitance characteristic curve C iss -V ds 、output capacitance characteristic curve C oss -V ds, Reverse transfer capacitance characteristic curve C rss -V ds , Body diode characteristic curve i body -V ds , The input capacitance C iss , Output capacitance C oss and reverse transfer capacitance C rss have the following functional relationship:

[0016] C iss = C fs + C gd

[0017] C oss = C ds + C gd

[0018] C rss = C g d

[0019] where C gd represents the gate-drain capacitance, C gs represents the gate-source capacitance, C ds represents the drain-source capacitance.

[0020] Further, the specific content of modeling the core MOS module in step S2 is: Analyze the output characteristic curve I ds -V ds and the transfer characteristic curve I ds -V gs , and establish the mathematical representation formula between the drain current I ds , drain-source voltage V ds and gate-source voltage V gs :

[0021]

[0022] where, K n represents the conduction parameter, α represents the influence index of the gate-source voltage on the drain current, β represents the current saturation slope control parameter, m represents the resistance nonlinear modulation factor, R j0 represents the initial junction resistance, R d represents the drain-end equivalent resistance.

[0023] Further, use the non-linear fitting method to process the mathematical representation formulas of the output characteristic curve I ds -V ds , transfer characteristic curve I ds -V gs and drain current I ds , and solve for the conduction parameter K n with the minimum error., the influence exponent α of the gate-source voltage on the drain current, the current saturation slope control parameter β, the resistance nonlinear modulation factor m, and the initial junction resistance R j0 , the drain-end equivalent resistance R d of the model parameter values.

[0024] Further, the specific content of modeling the junction capacitance module in step S2 is: analyzing the input capacitance characteristic curve C iss -V ds , the output capacitance characteristic curve C oss -V ds and the reverse transfer capacitance characteristic curve C rss -V ds , and establishing the mathematical representation formula between the gate-drain capacitance C ds , the drain-source capacitance C gd and the drain-source voltage V ds :

[0025]

[0026] where, C gd0 represents the initial value of the gate-drain capacitance, C gdmin represents the minimum value of the gate-drain capacitance, γ 1 , γ 2 and γ 3 represent voltage-dependent modulation parameters.

[0027] Further, the mathematical representation formula of the drain-source capacitance C ds is:

[0028]

[0029] where, the voltage-dependent modulation parameter γ 4 , the initial value of the drain-source capacitance C ds0 .

[0030] Further, the input capacitance characteristic curve C iss -V ds , the output capacitance characteristic curve C oss -V ds , the reverse transfer capacitance characteristic curve C rss -V ds and the mathematical representation formula of the gate-drain capacitance C gd and the mathematical representation formula of the drain-source capacitance C ds are processed by using the nonlinear fitting method, and the initial value C gd0 of the gate-drain capacitance, the minimum value C gdmin of the gate-drain capacitance, the voltage-dependent modulation parameters γ 1 , γ 2 , γ 3 , γ4 and the initial value C of the drain-source capacitance ds0 of the model parameter value.

[0031] Furthermore, the specific content of modeling the body diode module in step S2 is: analyzing the body diode characteristic curve i body -V ds , establishing a mathematical representation formula between the body diode current i body and the drain-source voltage V ds :

[0032]

[0033] where a represents the current modulation coefficient, b represents the resistance adjustment coefficient, and c represents the exponential control coefficient.

[0034] Furthermore, a non-linear fitting method is used to process the body diode characteristic curve i body -V ds and the mathematical representation formula of the body diode current i body , and the model parameter values of the current modulation coefficient a, the resistance adjustment coefficient b, and the exponential control coefficient c are obtained under the condition of minimizing the solution error.

[0035] The second aspect of the present invention provides a construction system for a silicon carbide MOSFET behavioral model, which is used for the construction method of a silicon carbide MOSFET behavioral model described above, and includes: a data acquisition module, a sub-circuit model construction module, and an integration module.

[0036] The data acquisition module acquires the electrical characteristic curves required for constructing the model. The sub-circuit model construction module respectively models the core MOS module, the junction capacitance module, and the body diode module according to the acquired electrical characteristic curves. The integration module builds each sub-module in the simulation software and integrates them into a complete behavioral model.

[0037] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:

[0038] The present invention provides a construction method and system for a silicon carbide MOSFET behavioral model. Based on modular modeling, the key characteristics of the silicon carbide MOSFET are decomposed into three main sub-circuit modules: the core MOS module, the junction capacitance module, and the body diode module, and they are respectively modeled. The used representation formulas all adopt continuous and smooth non-piecewise equations, which not only ensure the high accuracy of the model, but also make it easier to converge in the simulation. The integrated behavioral model not only occupies less computing resources, but also has a faster simulation speed, and is suitable for the rapid analysis and optimization of large-scale complex circuits. Description of the Drawings

[0039] Figure 1 Flow chart of a method for constructing a behavioral model of a silicon carbide MOSFET according to the present invention.

[0040] Figure 2 Schematic diagram of an equivalent circuit model of a behavioral model of a silicon carbide MOSFET constructed in an embodiment of the present invention.

[0041] Figure 3 Schematic diagram of an actual circuit model of a behavioral model of a silicon carbide MOSFET in an embodiment of the present invention.

[0042] Figure 4 Schematic circuit diagram of applying and verifying the constructed behavioral model of a silicon carbide MOSFET in SPICE circuit simulation software in an embodiment of the present invention.

[0043] Figure 5 Simulation output characteristic curve I of the constructed behavioral model of a silicon carbide MOSFET at -55 °C in an embodiment of the present invention ds -V ds and the obtained output characteristic curve I ds -V ds comparison chart.

[0044] Figure 6 Simulation output characteristic curve I of the constructed behavioral model of a silicon carbide MOSFET at 25 °C in an embodiment of the present invention ds -V ds and the obtained output characteristic curve I ds -V ds comparison chart.

[0045] Figure 7 Simulation output characteristic curve I of the constructed behavioral model of a silicon carbide MOSFET at 155 °C in an embodiment of the present invention ds -V ds and the obtained output characteristic curve I ds -V ds comparison chart.

[0046] Figure 8 Comparison chart of input capacitance characteristic curve, output capacitance characteristic curve, reverse transfer capacitance characteristic curve output by the simulation software and the input capacitance characteristic curve, output capacitance characteristic curve, reverse transfer capacitance characteristic curve in an embodiment of the present invention.

[0047] Figure 9 Schematic diagram of a construction system of a behavioral model of a silicon carbide MOSFET according to the present invention. Detailed implementation manner

[0048] To more clearly understand the above objects, features, and advantages of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.

[0049] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention can also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited by the specific embodiments disclosed below.

[0050] Embodiment 1

[0051] As Figure 1 shown, the present invention provides a method for constructing a behavioral model of a silicon carbide MOSFET, and this method includes the following steps:

[0052] S1. Obtain the electrical characteristic curves required for constructing the model.

[0053] S2. According to the obtained electrical characteristic curves, respectively model the core MOS module, the junction capacitance module, and the body diode module.

[0054] S3. Build each sub-module in the simulation software and integrate them into a complete behavioral model.

[0055] Further, the electrical characteristic curves described in step S1 include: output characteristic curve I ds -V ds 、transfer characteristic curve I ds -V gs 、input capacitance characteristic curve C iss -V ds 、output capacitance characteristic curve C oss -V ds 、reverse transfer capacitance characteristic curve C rss -V ds 、body diode characteristic curve i body -V ds , and the functional relationships of the input capacitance C iss 、output capacitance C oss and reverse transfer capacitance C rss are:

[0056] C iss =C gs +C gd

[0057] C oss =C ds +C gd

[0058] C rss= C g d

[0059] where C gd represents the gate-drain capacitance, and C gs represents the gate-source capacitance, and C ds represents the drain-source capacitance.

[0060] In a specific embodiment, a power device analyzer or the device official data sheet is used to obtain the electrical characteristic curves required for building the model.

[0061] Furthermore, the specific content of modeling the core MOS module in step S2 is: analyzing the output characteristic curve I ds -V ds and the transfer characteristic curve I ds -V gs , and establishing a mathematical representation formula between the drain current I ds , the drain-source voltage V ds and the gate-source voltage V gs :

[0062]

[0063] where K n represents the conduction parameter, α represents the influence index of the gate-source voltage on the drain current, β represents the current saturation slope control parameter, m represents the resistance nonlinear modulation factor, R j0 represents the initial junction resistance, and R d represents the drain-end equivalent resistance.

[0064] Furthermore, the output characteristic curve I ds -V ds , the transfer characteristic curve I ds -V gs and the mathematical representation formula of the drain current I ds are processed by means of nonlinear fitting to solve for the model parameter values of the conduction parameter K n , the influence index α of the gate-source voltage on the drain current, the current saturation slope control parameter β, the resistance nonlinear modulation factor m, the initial junction resistance R j0 , and the drain-end equivalent resistance R d .

[0065] In a specific embodiment, the output characteristic curve and the transfer characteristic curve are nonlinearly fitted with the mathematical representation formula of the drain current using mathematical software such as matlab, 1stopt, or excel.

[0066] Furthermore, the specific content of modeling the junction capacitance module in step S2 is: analyzing the input capacitance characteristic curve C iss -Vds 1. Output capacitance characteristic curve C oss -V ds and reverse transfer capacitance characteristic curve C rss -V ds to establish the mathematical representation formula between gate-drain capacitance C ds , drain-source capacitance C gd and drain-source voltage V ds :

[0067]

[0068] where C gd0 represents the initial value of the gate-drain capacitance, C gdmin represents the minimum value of the gate-drain capacitance, γ 1 , γ 2 and γ 3 represent voltage-dependent modulation parameters.

[0069] Furthermore, the mathematical representation formula of the drain-source capacitance C ds is:

[0070]

[0071] where the voltage-dependent modulation parameter γ 4 , the initial value of the drain-source capacitance C ds0 .

[0072] Furthermore, the input capacitance characteristic curve C iss -V ds , output capacitance characteristic curve C oss -V ds , reverse transfer capacitance characteristic curve C rss -V ds and the mathematical representation formula of the gate-drain capacitance C gd and the mathematical representation formula of the drain-source capacitance C ds are processed by non-linear fitting. The initial value of the gate-drain capacitance C gd0 , the minimum value of the gate-drain capacitance C gdmin , the voltage-dependent modulation parameters γ 1 , γ 2 , γ 3 , γ 4 and the initial value of the drain-source capacitance C ds0 are obtained under the condition of minimizing the solution error.

[0073] Furthermore, the specific content of modeling the body diode module in step S2 is: analyzing the body diode characteristic curve i body -V ds to establish the body diode current i body and the drain-source voltage Vds Mathematical representation formula between

[0074]

[0075] Wherein, a represents the current modulation coefficient, b represents the resistance adjustment coefficient, and c represents the exponential control coefficient.

[0076] Furthermore, a non-linear fitting method is adopted to process the mathematical representation formula of the body diode characteristic curve i body -V ds and the body diode current i body to obtain the model parameter values of the current modulation coefficient a, the resistance adjustment coefficient b, and the exponential control coefficient c under the condition of minimizing the solution error.

[0077] It should be noted that this method constructs a sub-circuit module by using a controlled current source, a controlled voltage source, resistors, capacitors, and inductors, and combines the output characteristic curve (Ids–Vds), transfer characteristic curve (Ids–Vgs), input capacitance characteristic curve (Ciss–Vds), output capacitance characteristic curve (Coss–Vds), reverse transmission capacitance characteristic curve (Crss–Vds), and body diode characteristic curve (ibody–Vds) of the device to construct a behavioral-level model with a non-piecewise formula, which solves the problems of the traditional model in data acquisition, formula complexity, and simulation efficiency, and provides an efficient and reliable method for the construction of a silicon carbide MOSFET simulation model. Compared with other modeling methods, the silicon carbide MOSFET model constructed by this invention has better convergence, consumes less computer resources, and has a simpler model parameter extraction process.

[0078] Among them, the characteristics of the silicon carbide MOSFET model constructed by this method are as follows: a sub-circuit module composed of a controlled current source, a controlled voltage source, resistors, capacitors, and inductors is used to comprehensively characterize the static and dynamic characteristics of the silicon carbide MOSFET. The core idea of the model design is based on modular modeling, and the key characteristics of the silicon carbide MOSFET are decomposed into three main sub-circuit modules: the core MOS module, the junction capacitance module, and the body diode module.

[0079] The core MOS module is used to simulate the static I-V characteristics of the silicon carbide MOSFET. By introducing a behavioral description method with a non-piecewise formula, it avoids the common discontinuity problems in traditional piecewise models and improves the convergence of the model in circuit simulation. The junction capacitance module accurately reflects the dynamic C-V characteristics of the device under different bias conditions through the non-linear relationship between capacitance and voltage, further enhancing the accuracy of the model. The body diode module specifically characterizes the conduction and reverse recovery characteristics of the integrated body diode in the silicon carbide MOSFET, and is particularly suitable for describing the device behavior in high-frequency and high-temperature environments.

[0080] One of the major advantages of this model is the accessibility of its data sources. The output characteristic curve, transfer characteristic curve, junction capacitance characteristic curve, and body diode characteristic curve required for constructing the model can all be directly obtained from the official data sheet of the device or directly obtained through the analysis of the device using a power device analyzer, without the need for additional complex tests and parameter extraction, significantly reducing the threshold for model establishment.

[0081] In addition, the characterization formulas used in each sub-circuit module of the present invention all adopt continuous and smooth non-piecewise equations, which not only ensure the high precision of the model but also make it easier to converge in simulation. Compared with the existing silicon carbide MOSFET models, this model not only occupies less computing resources but also has a faster simulation speed, making it suitable for the rapid analysis and optimization of large-scale complex circuits.

[0082] Embodiment 2

[0083] Based on the above Embodiment 1, combined with Figures 2 - 5 , this embodiment elaborates in detail the specific process of integrating the present invention in a simulation software after solving the model parameters of each sub-module.

[0084] In this embodiment, in the SPICE circuit simulation software, as Figure 2 shown, basic electronic devices such as controlled voltage sources, controlled current sources, capacitors, resistors, and inductors are used to build the core MOS module, junction capacitance module, and body diode module. The constructed equivalent circuit diagram, and its actual circuit model is as Figure 3 shown. In this model, G, DD, and SS respectively represent the gate, drain, and source of the silicon carbide MOSFET; the inductors Ldd and Lss represent the stray inductance caused by the package; the controlled current sources BG12 and BG13 respectively represent the junction capacitances Cgd and Cds, where the controlled voltage sources BE1 and BE2 are the auxiliary circuits for constructing the junction capacitance model; the controlled voltage sources BRd and BRj represent the initial junction resistance Rj0 and drain-end equivalent resistance Rd in the core MOS; the controlled current source BGsss and resistor RGsss constitute the body diode model; the model parameters are defined using the param parameter in the upper corner of the figure.

[0085] Then, the core MOS module, junction capacitance module, and body diode module are integrated using the sbuckt statement to finally complete the construction of the circuit simulation SPICE behavioral model of the silicon carbide MOSFET. Finally, simulation tests are carried out to verify the accuracy and reliability of the model. The simulation tests include the verification of static characteristics and dynamic characteristics, as follows:

[0086] First, set different gate-source voltages V gs conditions, and simulate the drain-source voltage V ds and drain current I dsto obtain the simulation output characteristic curve I ds -V gs and compare the simulation output characteristic curve I ds -V gs with the output characteristic curve I obtained in S1 ds -V gs .

[0087] Under the condition of a fixed drain-source voltage V ds , simulate the relationship between the gate-source voltage V gs and the drain current I ds to obtain the simulation transfer characteristic curve I ds -V gs , and compare the simulation transfer characteristic curve I ds -V gs with the transfer characteristic curve I obtained in S1 ds -V gs .

[0088] Then set the gate and the source to the same voltage, and simulate the relationship between the drain-source voltage V ds and the gate-drain capacitance C gd , drain-source capacitance C ds to obtain the simulation input capacitance characteristic curve C iss -V ds , simulation output capacitance characteristic curve C oss -V ds , simulation reverse transfer capacitance characteristic curve C rss -V ds . Compare the simulation input capacitance characteristic curve C iss -V ds , simulation output capacitance characteristic curve C oss -V ds , simulation reverse transfer capacitance characteristic curve C rss -V ds with the input capacitance characteristic curve C obtained in S1 iss -V ds , output capacitance characteristic curve C oss -V ds , reverse transfer capacitance characteristic curve C rss -V ds .

[0089] The circuit schematic diagram of applying and verifying the constructed SiC MOSFET behavioral model in the SPICE circuit simulation software is as shown in Figure 4 . Perform simulation tests by setting different gate-source voltages Vgs and different drain-source voltages Vds using the step and DC statements.

[0090] As shown in Figures 5 - 7As shown, it is the simulation output characteristic curve I of the silicon carbide MOSFET behavioral model constructed at -55°C, 25°C, and 155°C ds -V ds and the obtained output characteristic curve I ds -V ds comparison graph, the curve represents the simulation output characteristic curve I ds -V ds , the scatter points represent the output characteristic curve I obtained in process S1 ds -V ds . As Figure 8 shown, it is the simulation input capacitance characteristic curve C of the constructed silicon carbide MOSFET behavioral model iss -V ds , the simulation output capacitance characteristic curve C oss -V ds and the simulation reverse transfer capacitance characteristic curve C rss -V ds compared with the input capacitance characteristic curve C obtained in process S1 iss -V ds , the output capacitance characteristic curve C oss -V ds and the reverse transfer capacitance characteristic curve C rss -V ds . The curve represents the simulation input capacitance characteristic curve C iss -V ds , the simulation output capacitance characteristic curve C oss -V ds and the simulation reverse transfer capacitance characteristic curve C rss -V ds . The scatter points represent the input capacitance characteristic curve C obtained in process S1 iss -V ds , the output capacitance characteristic curve C oss -V ds and the reverse transfer capacitance characteristic curve C rss -V ds .

[0091] Example 3

[0092] As Figure 9 shown, the present invention also provides a construction system for a silicon carbide MOSFET behavioral model. This system is used for the construction method of the silicon carbide MOSFET behavioral model described above and includes: a data acquisition module, a sub-circuit model construction module, and an integration module.

[0093] The data acquisition module acquires the electrical characteristic curves required for building the model. The sub-circuit model building module models the core MOS module, the junction capacitance module, and the body diode module respectively according to the acquired electrical characteristic curves. The integration module builds each sub-module in a simulation software and integrates them into a complete behavioral model.

[0094] In the embodiments provided in this application, it should be understood that the disclosed system and method can be implemented in other ways. Those of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions. The foregoing program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps including the above method embodiments; and the foregoing storage medium includes: removable storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks and other various media that can store program codes.

[0095] Alternatively, if the above embodiments of the present invention are implemented in the form of software function modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device to execute all or part of the methods described in the various embodiments of the present invention. And the foregoing storage medium includes: removable storage devices, ROM, RAM, magnetic disks, or optical disks and other various media that can store program codes.

[0096] Obviously, the above embodiments of the present invention are merely examples for clearly explaining the present invention, rather than limitations on the implementation manners of the present invention. The icons describing the structural position relationships in the drawings are only for illustrative purposes and cannot be understood as limitations on the present invention. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. A method for constructing a behavioral model of a silicon carbide MOSFET, characterized in that: The following steps are involved: S1. Obtain the electrical characteristic curve required for building the model; S2. Model the core MOS module, junction capacitance module and body diode module respectively according to the obtained electrical characteristic curves; S3. Build each sub-module in the simulation software and integrate it into a complete behavioral level model.

2. The method for constructing a silicon carbide MOSFET behavioral model according to claim 1, characterized in that The electrical characteristic curves in step S1 include: output characteristic curve I ds -V ds , transfer characteristic curve I ds -V gs , Input capacitance characteristic curve C iss -V ds , Output capacitor characteristic curve C oss -V ds , Reverse transfer capacitance characteristic curve C rss -V ds , body diode characteristic curve i bodv -V ds , the input capacitor C iss , output capacitor C oss and reverse transfer capacitor C rss The functional relationship is: C iss =C gs +C gd C oss =C ds +C gd C rss =C gd Among them C gd Represents the gate-drain capacitance, C gs Represents the gate-source capacitance, C ds represents the drain-source capacitance.

3. The method for constructing a silicon carbide MOSFET behavioral level model according to claim 2, characterized in that: The specific contents of modeling the core MOS module in step S2 are: analyzing the output characteristic curve I ds -V ds and transfer characteristic curve I ds -V gs , establish the leakage current I ds , drain-source voltage V ds With the gate-source voltage V gs The mathematical representation formula between: Among them, K n represents the conduction parameter, α represents the influence index of gate-source voltage on leakage current, β represents the current saturation slope control parameter, m represents the resistance nonlinear modulation factor, R j0 represents the initial junction resistance, R d Represents the drain equivalent resistance.

4. The method for constructing a silicon carbide MOSFET behavioral level model according to claim 3, characterized in that: The output characteristic curve I is fitted by nonlinear fitting. ds -V ds , transfer characteristic curve I ds -V gs and leakage current I ds The mathematical representation formula is processed to obtain the conduction parameter K with the minimum error. n , the gate-source voltage influence index on the leakage current α, the current saturation slope control parameter β, the resistance nonlinear modulation factor m, the initial junction resistance R j0 , drain equivalent resistance R d The model parameter values.

5. The method for constructing a silicon carbide MOSFET behavioral level model according to claim 2, characterized in that: The specific content of modeling the junction capacitance module in step S2 is: analyzing the input capacitance characteristic curve C iss -V ds , Output capacitor characteristic curve C oss -V ds And reverse transfer capacitance characteristic curve C rss -V ds , establish the gate-drain capacitance C ds , drain-source capacitance C gd and drain-source voltage V ds The mathematical representation formula between: Among them, C gd0 Represents the initial value of the gate-drain capacitance, C gdmin represents the minimum value of the gate-drain capacitance, and γ1, γ2, and γ3 represent the voltage-dependent modulation parameters.

6. The method for constructing a silicon carbide MOSFET behavioral level model according to claim 5, characterized in that: The drain-source capacitance C ds The mathematical representation formula is: Among them, the voltage-dependent modulation parameter γ4, the initial value of the drain-source capacitance C ds0 .

7. The method for constructing a silicon carbide MOSFET behavioral level model according to claim 6, characterized in that: The input capacitance characteristic curve C is fitted by nonlinear fitting. iss -V ds , Output capacitor characteristic curve C oss -V ds , Reverse transfer capacitance characteristic curve C rss -V ds With the gate-drain capacitance C gd The mathematical representation formula and drain-source capacitance C ds The mathematical representation formula is processed to obtain the initial value of the gate-drain capacitance C under the condition of minimum error. gd0 , the minimum gate-drain capacitance C gdmin , voltage-dependent modulation parameters γ1, γ2, γ3, γ4 and the initial value of drain-source capacitance C ds0 The model parameter values.

8. The method for constructing a silicon carbide MOSFET behavioral model according to claim 2, characterized in that: The specific contents of modeling the body diode module in step S2 are: analyzing the body diode characteristic curve i body -V ds , establish the body diode current i body and drain-source voltage V ds The mathematical representation formula between: Among them, a represents the current modulation coefficient, b represents the resistance adjustment coefficient, and c represents the exponential control coefficient.

9. The method for constructing a silicon carbide MOSFET behavioral model according to claim 8, characterized in that: The body diode characteristic curve i is fitted by nonlinear fitting. body -V ds and the body diode current i body The mathematical characterization formula is processed to obtain the model parameter values ​​of the current modulation coefficient a, the resistance adjustment coefficient b and the exponential control coefficient c when the solution error is minimized.

10. A system for constructing a silicon carbide MOSFET behavioral model, the system being used in the method for constructing a silicon carbide MOSFET behavioral model according to any one of claims 1 to 9, characterized in that: It includes: data acquisition module, sub-circuit model building module and integration module; The data acquisition module acquires the electrical characteristic curves required for building the model. The sub-circuit model building module models the core MOS module, junction capacitance module and body diode module respectively according to the acquired electrical characteristic curves. The integration module builds each sub-module in the simulation software and integrates them into a complete behavioral level model.

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