RF switch with compensation

Abstract

Embodiments of the present disclosure generally relate to RF switches with compensation. A radio frequency switch includes a first transistor and a second transistor coupled together to establish a switchable RF path, and a first compensation network coupled between a body terminal of the first transistor and a drain terminal of the second transistor, wherein the first compensation network establishes a path for current flow between the body terminal of the first transistor and the drain terminal of the second transistor, and the first compensation network blocks current flow in a second direction opposite the first direction.

Description

[0001] This application is a divisional application of the application with the application date of March 27, 2020, application number 202010229106.4, and invention title "RF Switch with Compensation". Technical Field

[0002] The present invention generally relates to radio frequency (RF) switches with compensation circuits and corresponding compensation methods. Background Art

[0003] In the art, it is known that high-voltage RF switches are used in various applications (such as the tuning of high-voltage RF antennas). An RF switch typically includes a plurality of transistor stacks in a series configuration between an RF source and ground, and typically includes an accompanying bias circuit for biasing nodes (also referred to herein as "terminals") of the plurality of transistors. Although the stacked configuration of the RF switch is well-suited for many applications, parasitic leakage current can start to flow into and out of the plurality of transistors at extremely high peak RF voltages (e.g., when the RF switch is coupled between an RF source and ground). The parasitic leakage current can change the designed bias voltage value of the bias circuit. Summary of the Invention

[0004] According to one embodiment, a radio frequency (RF) switch device includes: a first transistor and a second transistor, each transistor including: a gate terminal; a source terminal; a drain terminal; and a body (or "body") terminal, wherein the first transistor and the second transistor are coupled in series to establish a switchable RF path; and a first compensation network coupled between the body terminal of the first transistor and the drain terminal of the second transistor, wherein the first compensation network is configured to establish a path for current flow in a first direction between the body terminal of the first transistor and the drain terminal of the second transistor, and is configured to block current flow in a second direction opposite to the first direction between the body terminal of the first transistor and the drain terminal of the second transistor.

[0005] According to another embodiment, a radio frequency (RF) switch device includes: a plurality of transistors connected in series to form a switchable current path; a plurality of first compensation networks coupled between the body terminal of the Nth transistor of the plurality of transistors and the drain terminal of the (N + 1)th transistor of the plurality of transistors, wherein each of the first compensation networks of the first compensation networks includes a rectifying element.

[0006] According to another embodiment, a method of compensating a radio frequency (RF) switching device, the RF switching device including a first transistor and a second transistor, the first transistor and the second transistor forming a switchable current path, the method including: generating a first compensation current in a first direction between a body terminal of the first transistor and a drain terminal of the second transistor, and blocking current flow in a second direction opposite to the first direction between the body terminal of the first transistor and the drain terminal of the second transistor.

[0007] According to another embodiment, an RF switching device includes a first transistor and a second transistor, wherein the first transistor and the second transistor are serially coupled at a common node to establish a switchable RF path between a load terminal of the second transistor and a load terminal of the first transistor; and a compensation network coupled between a body terminal of the first transistor and the load terminal of the second transistor, wherein the compensation network is configured to establish a path for current flow in a first direction between the body terminal of the first transistor and the load terminal of the second transistor, and the compensation network is configured to block current flow in a second direction opposite to the first direction between the body terminal of the first transistor and the load terminal of the second transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] To more fully understand the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0009] Figure 1 A block diagram of an RF system embodiment is illustrated, the RF system embodiment including: a transceiver, an antenna tuner including a plurality of capacitors and an RF switch, an antenna, and a controller;

[0010] Figure 2A A circuit diagram of an RF switch device is shown, the RF switch device including an exemplary biasing network;

[0011] Figure 2B is exposed to high RF voltage Figure 2A A circuit diagram of an RF switch device is shown, the RF switch device creating a leakage current and a corresponding voltage deviating from a designed bias voltage;

[0012] Figure 3 is in Figure 2A and Figure 2B A circuit diagram of an RF switch device embodiment is shown, but wherein the biasing current is removed and a leakage current compensation circuit is included;

[0013] Figure 4 Illustrates a typical response I-V of the leakage current compensation network shown in Figure 3 in accordance with an embodiment;

[0014] Figure 5is a circuit diagram showing current distribution in a compensated RF switch device including a bias circuit according to an embodiment;

[0015] Figure 6 illustrates an example of a specific implementation of a compensation network according to an embodiment;

[0016] Figure 7 is a circuit diagram of another embodiment RF switch device including a leakage current compensation circuit;

[0017] Figure 8A and Figure 8B is a circuit diagram of another embodiment of an RF switch device including a leakage current compensation circuit;

[0018] Figure 9A and Figure 9B is a circuit diagram of another embodiment of an RF switch device including a plurality of transistors and a plurality of leakage current compensation circuits;

[0019] Figure 10A 、 Figure 10B and Figure 11 is a circuit diagram of another embodiment of an RF switch device including a plurality of transistors and at least one leakage current compensation circuit;

[0020] Figure 12 is a circuit diagram of a PMOS-based RF switch device including a leakage current compensation circuit according to an embodiment; and

[0021] Figure 13 is a circuit diagram of an RF switch device including an alternative bias circuit.

[0022] Unless otherwise indicated, corresponding reference numerals and symbols in different figures refer to corresponding parts. The figures are drawn to clearly illustrate relevant aspects of the preferred embodiments and are not necessarily drawn to scale. To more clearly illustrate certain embodiments, letters indicating variations of the same structure, material, or processing step may follow the figure numbers. Detailed Description

[0023] The high-voltage RF switches described below can be used as, for example, antenna tuning switchable elements, and in particular can be used in high-voltage antenna tuning switches and tunable passive components (e.g., C-tuners (capacitive tuners), Z-tuners (impedance tuners), etc.). High-voltage RF switches are typically used in cellular handheld devices to tune the impedance and radiation characteristics of compact antennas. They are typically attached between the feed point or aperture point of the antenna and ground via external surface-mounted device (SMD) capacitors or inductors.

[0024] In the various embodiments illustrated and described below, one or more leakage current compensation circuits are used to mitigate the effects of leakage current that flows from the drain and source to the body of the MOS transistor in the RF switch device. In various embodiments, these leakage compensation circuits can include non-linear elements (such as diodes or other rectifying elements). By compensating for these leakage currents, a shift in the bias voltage in the design of the RF switch caused by the leakage current can be mitigated and / or avoided.

[0025] The leakage current mentioned herein can include gate-induced drain leakage current and source leakage current (GIDL and GISL), which flow from the drain terminal and source terminal to the body of the RF switch transistor at high V gs voltages. When the GIDL / GISL leakage current flows out of or into a high-impedance bias resistor, these GIDL / GISL leakage current shifts the operating point of the switching transistor in the RF switch. According to an embodiment, when compared with an uncompensated RF switch, the leakage compensation circuit described herein helps to make the operating point of the switching transistor in the RF switch closer to the originally designed operating point despite the presence of significant leakage current. The GIDL / GISL leakage current is caused by quantum mechanical effects and variations in carrier transport within the switching transistor. For example, the GIDL leakage current is at least partially caused by tunneling occurring in the narrow depletion region at the drain under the gate oxide.

[0026] Figure 1 An RF system 100 that can be configured to utilize embodiments of the RF switch device is illustrated. As shown, the RF system 100 includes an RF transceiver 102 coupled to an antenna 106 via an antenna tuner 104. The antenna tuner includes shunt capacitors C 1 、C 2 and C 3 ,shunt capacitors C 1 、C 2 and C 3It can be selectively coupled to antenna 106 via switches S1, S2, S3, S4, S5, and S6. In various embodiments, switches S1, S2, S3, S4, S5, and S6 can be implemented using the RF switch devices described herein. During operation, controller 108 provides control signals that selectively turn on and off switches S1, S2, S3, S4, S5, and S6 according to the antenna settings provided by transceiver 102. The switch configuration of the antenna tuner can be used to provide RF matching between antenna 106 and transceiver 102 at various frequencies. For example, RF system 100 can be used in multi-band cellular communication applications. It should be understood that RF system 100 is just one application example of many application examples that can utilize embodiments of the RF switch device. The RF switch can be used in applications that require a signal selection switch (e.g., for signal routing between instruments and devices under test in a microwave test system).

[0027] In Figure 1 it, representative RF switch nodes 110, 112, 114, and 116 are also shown to further illustrate the RF voltages applied across the switches. For example, the first switch node 110 of switch S5 is coupled to the RF voltage source provided by antenna 106. The second switch node 112 is coupled to an intermediate RF voltage source provided by the first node of capacitor C3. The first switch node 114 of switch S6 is coupled to another intermediate RF voltage source provided by the second node of capacitor C3. The second switch node 116 of switch S6 is directly coupled to ground. Switches S5 and S6 are switched between the "on" state and the "off" state by the application of a transistor gate voltage, which is illustrated and described in more detail below with reference to Figure 2A and Figure 2B Accordingly, in an embodiment, the RF switch can be positioned between a first source of RF voltage and a second source of RF voltage, or between an RF voltage and ground. For example, other RF voltage sources can be used, including RF voltage sources for providing an alternating voltage signal.

[0028] A common challenge in antenna tuning switch design is to achieve high voltage (up to 80V or above 80V peak) handling at RF frequencies while maintaining the same or similar performance at lower RF voltages. The switch is implemented as a MOSFET device stacked on silicon or other substrates.

[0029] In various embodiments, a MOS transistor used in an RF switch device includes: a gate terminal, a source terminal, a drain terminal, and a body terminal. By using a high-ohmic linear resistor, the MOS transistor is biased to a desired operating point. In some embodiments, a high-resistance DC path is provided for all terminals (including the gate, source, drain, and body terminals). After applying a target DC voltage on each terminal via a high-ohmic bias resistor, the gate-source voltage, the gate-drain voltage, the drain-body voltage, and the source-body voltage define the operating point of the MOS transistor in the switch device.

[0030] Parasitic leakage currents can be generated at high operating voltages and can flow into high ohmic bias resistors, generating significant voltage drops. As a result, the operating point of the desired high voltage RF switch can be shifted from the desired operating point, resulting in a loss of performance and, in extreme cases, signal distortion.

[0031] Figure 2A , Figure 2B , Figure 3 , Figure 4 and Figure 5 The series of circuit diagrams described below are presented to further aid in understanding both the nature and impact of these leakage currents, and the solutions provided by leakage compensation circuit embodiments. Figure 2A is a circuit diagram of a portion of an uncompensated RF switching device including a bias circuit. Figure 2B with Figure 2A The circuit diagram is the same as shown in Figure 2B It is shown that once the RF switching device is exposed to a high voltage RF signal, the gate introduces drain leakage current and source leakage current. Figure 3 is a circuit diagram of the same portion of an RF switch device including a leakage current compensation circuit, but with the bias circuit removed for ease of understanding the operation of the compensation circuit. Figure 4 illustrates the nonlinear nature of the leakage compensation circuit, and Figure 5 The same portion of the RF switch arrangement as previously illustrated is shown, but includes both bias circuitry and leakage compensation circuitry.

[0032] Figure 2A The second NMOS transistor M 2 The first NMOS transistor M connected in series 1 An exemplary circuit portion 200 of a high voltage RF switch of FIG. 1 is shown in FIG. 1 . In series connection, transistors M 1 The source node is coupled to transistor M 2 The drain node of transistor M 2 The drain node of transistor M is directly coupled to the RF high voltage source, or 2The drain node of 1 is indirectly coupled to the RF high-voltage source through one or more transistors (also connected in series). The source node of transistor M1 is directly coupled to ground or another RF high-voltage source, or the source node of transistor M 1 is indirectly coupled to another RF high-voltage source through one or more transistors (also connected in series). The gate node of transistor M g1 is coupled to the gate bias voltage V g through the bias resistor R 2 and the gate node of transistor M g2 is coupled to the gate bias voltage V g through the bias resistor R 1 The body node of transistor M b1 is coupled to the body bias voltage V b through the bias resistor R 2 and the body node of transistor M b2 is coupled to the body bias voltage V b through the bias resistor R 1 The source-drain node between transistor M 2 and M s1 is coupled to the bias voltage V s through the resistor R Figure 2A The above bias circuit can be repeated and used for any additional series transistors not shown in 2 The gate nodes of the first transistor and the second transistor are switched to turn on and off the transistors. In one embodiment, the switchable current path through the switch is the path from the drain node to the source node of the second transistor M 1 and the path from the drain node to the source node of the first transistor M

[0033] In Figure 2A the RF switch device shown provides a high impedance r sd1 at the source-drain node and a high impedance r b1 at the body node. For other RF switch devices described below, r sd1 and r b1 may have different absolute values.

[0034] Figure 2B is a circuit diagram of the RF switch device 200 exposed to a high RF voltage. Thus, except for additional marked leakage current and marked shifted bias voltage, Figure 2B the circuit of Figure 2A is similar to the circuit shown in

[0035] The leakage current generated due to exposure to the applied high RF voltage and its effect on the bias circuit will be described in further detail below.When the RF switch 200 is exposed to a high peak voltage at RF frequencies (defined as a peak voltage where the voltage drop across each individual transistor in the stack approaches the maximum allowable rating for a given MOS transistor type), parasitic leakage currents i leakd and i leaks begin to flow from the drain and source terminals into the body terminals of the corresponding MOS transistors in the RF switch device. This current shifts the operating point of the MOS transistor when flowing into the corresponding high-ohmic bias resistor: the source voltage shift value is ΔV rs1 = R s1 (i leakd + i leaks ); and the body voltage shift value is ΔV rb1 = R b1 (i leakd + i leaks ). The bias shift effect of the parasitic leakage current is illustrated in Figure 2.

[0036] Figure 2A and Figure 2B are circuit diagrams of the bias network in an RF switch device having two MOS transistors. Although two transistors coupled in series arrangement are shown in the circuits of Figure 2A and Figure 2B , those skilled in the art will understand that these circuits can be part of a larger high-voltage RF switch including multiple transistors coupled in series (e.g., in one embodiment, ten or twenty such transistors). The total number of transistors used in the switch is determined by the breakdown voltage of each transistor in the switch and the maximum peak RF voltage applied to the switch.

[0037] Figure 3 is a circuit diagram 300 of an embodiment of an RF switch device including transistors M 1 and M 2 , and a leakage current compensation circuit C 1 . In Figure 3 , for ease of understanding the leakage current compensation circuit C 1 , the bias circuits previously shown in Figure 2A and Figure 2B are not shown. The leakage current compensation circuit C 1 can be used together with the bias circuits illustrated in Figure 2A or Figure 2B or other bias circuits. The leakage current compensation circuit C 1It can also be used with other biasing circuits. One or more leakage compensation circuits can be used in an RF switch to direct the leakage current from a biasing resistor into the RF switch in a manner that the desired bias voltage does not deviate from the design nominal value. In an embodiment, one or two compensation circuits are provided for each transistor in the RF switch; however, a one-to-one correspondence between the compensation circuits and the transistors is not required. When compared with an uncompensated RF switch, multiple compensation circuits (even one compensation circuit) with fewer transistors in the RF switch will still have a positive impact on maintaining the bias voltage.

[0038] As shown in Figure 3 , according to one embodiment, a leakage current compensation circuit C including a non-linear compensation network 1 is coupled between the body terminal of a first transistor M 1 in an RF switch device 300 and the drain terminal of a second transistor M 2 . The non-linear compensation network of the leakage current compensation circuit C is configured to bypass current in a first direction from the body terminal of the first transistor M 1 to the drain terminal of the second transistor M 1 across a given voltage on the network (large arrow labeled 302), and block current in a second direction from the drain terminal of the second transistor M 2 to the body terminal of the first transistor M 2 if the applied voltage is reversed (small arrow labeled 304). In this way, the leakage current is absorbed back into the RF switch stack through the leakage compensation circuit and is not available to shift the desired bias voltage as described in further detail below, particularly with respect to 1 the description of Figure 5 .

[0039] In some embodiments, the RF switch device 300, other RF switch devices, and individual switching transistors such as the transistors M 1 and M 2 described herein are symmetric such that source and drain markings such as those shown in Figure 3 are interchangeable. In some embodiments, the individual switching transistors can be physically symmetric where the layout and configuration of the source and drain are substantially the same. Thus, the drain can be designated as the load terminal and the source can also be designated as the load terminal. Accordingly, in Figure 3 , the RF switch device 300 includes a first transistor M 2 and a second transistor M 1 coupled in series at a common node (the source of transistor M 1 and the drain of transistor M 2 ) to provide a load terminal at transistor M 2 (the load terminal of transistor M2 The drain of ) is connected to transistor M 1 The load terminal of (transistor M 1 The source of ) to establish a switchable RF path and is coupled between the body terminal of transistor M 1 And the load terminal of transistor M 2 A compensation network, wherein the compensation network is configured to establish a path for current flow in a first direction between the body terminal of the first transistor and the load terminal of the second transistor, and to block the current flowing between the body terminal of the first transistor and the load terminal of the second transistor in a second direction opposite to the first direction.

[0040] Figure 4 Illustrates the leakage current compensation network C according to an embodiment 1 The typical response I-V408. Generally speaking, as Figure 4 Shown, if the compensation network C 1 The characteristic I-V 408 is represented by the function I c (V c ), where I c Is the current flowing through network 400, and V c Is the voltage applied across the network, then the following relationship in Equation [1] generally applies:

[0041] I c (V c ) > -I c (-V c ). [1]

[0042] Equation [1] may not apply to certain abnormal conditions, such as: during the breakdown condition of the diode or diode-connected transistor used in the compensation network.

[0043] Figure 5 Is a circuit diagram illustrating the current distribution in a compensated RF switch device according to an embodiment. Figure 5 Shows the RF switch circuit components and biasing components previously shown with respect to Figure 1 Shown, the leakage current labels shown in Figure 2A And Figure 2B And the leakage current compensation circuit shown in Figure 3 In addition, Figure 5 Includes an illustration of the "error current" flowing through the bias resistor, which is ideally minimized as described in further detail below.

[0044] As shown in Figure 5 Shown, the characteristic of the compensation network C 1 Is configured such that for a given RF operating voltage, from the first transistor M 1The body terminal current flows to the second transistor M 2 The average current flowing to the drain terminal of leakd +i leaks ) is similar, so the leakage current from the body terminal is mainly transferred to the drain terminal of the second transistor, and only a part of the leakage current flows into the bias resistor.

[0045] The current compensation in the compensated RF switch device is summarized as follows: Each MOS transistor in the RF switch generates a leakage current of (i leakd +i leaks ); The compensation network bypasses the i 1 current between the body terminal of the first transistor M comp and the drain terminal of the second transistor M2; The error current i error ((the difference between (i leakd +i leaks ) and i comp ) flows into the bias resistor; The leakage current compensation network C1 can be optimized to provide |i error <|i leakd +i leaks |, ideally |i error | = 0. If the error current passing through the bias resistors R s2 and R b1 is minimized or reduced, the corresponding voltage drops across these bias resistors are also minimized or reduced, such that the shift of the operating point at high power (applying a high RF voltage) is smaller compared to an uncompensated RF switch device. The current compensation network can be configured to provide a compensation current i leakd +i leaks that exceeds the leakage current (i comp ), such that i error changes polarity and the RF switch becomes overcompensated, which means that the gate-source bias voltage of the RF switch device increases as the applied RF voltage increases.

[0046] Therefore, Figure 5 illustrates an example of a compensated RF switch device with a shunt body and a drain / source bias network according to the bias circuit shown in Figure 2A and Figure 2B . If needed, the leakage current compensation circuit C 1 can also be used with any other configuration of the bias network.

[0047] Figure 6 Illustrates an example of a specific implementation of the compensation network C 1 according to an embodiment.

[0048] Various implementations of the compensation network C1 can be used, and the response provided by the compensation network C1 generally satisfies the relationship shown in Equation [1] (except for abnormal operating conditions such as breakdown conditions). The network can be implemented using, for example, passive components (including diodes, multiple diodes, and resistors), transistors in diode configurations, and combinations of passive and active rectifying elements (including amplifiers, operational amplifiers in feedback loops), and other similar circuits. A list of possible implementations of the compensation network C1 includes, but is not limited to:

[0049] A semiconductor diode circuit 602 including a single diode 620, also referred to as a p-n junction;

[0050] A semiconductor circuit 606 including multiple serially-coupled semiconductor diodes 620 and 624;

[0051] A semiconductor diode circuit 604 including a semiconductor diode and a resistor 622;

[0052] A semiconductor diode circuit 608 including multiple semiconductor diodes 620 and 624 serially-coupled with a resistor 622;

[0053] A transistor circuit 610 including a diode-connected transistor 630 (diode-connected to the transistor);

[0054] A transistor circuit 612 including a diode-connected transistor 630 serially-coupled with a resistor 632;

[0055] A transistor circuit 614 including a diode-connected transistor 630 having a resistor 632 serially-coupled with the channel; and

[0056] A circuit including a diode-connected transistor 630, the transistor 630 including multiple serially-connected resistors 632 and 634.

[0057] In Figure 6The diodes in [the circuit] can be implemented by diffusion regions in silicon or other substrates, and can include polysilicon diodes, Zener diodes, Schottky diodes, or any other type of diode. Diode-connected transistors can include diode-connected MOSFETs, diode-connected bipolar devices (such as BJTs), junction field-effect transistors, and any other type of transistor. In one embodiment, the resistor can include an integrated circuit diffusion resistor or a metal resistor, and the resistor can be sized to match the peak leakage current. For example, for the leakage current circuit 604, the voltage across the resistor 622 is determined by measuring the voltage across the circuit 604 minus the voltage across the diode 620. The remaining voltage across the resistor 622 is divided by the peak leakage current to be compensated to determine the value of the resistor 622. Thus, the resistor 622 generates a matching current that is less than or equal to the peak leakage current. In the case of overcompensating the RF switch, the resistor 622 generates a matching current that exceeds the peak leakage current.

[0058] There are also other implementations of the previously described non-linear functions with rectifying characteristics that can be used, which allow bypassing larger currents in other directions than the opposite direction. Many integrated and discrete components can be used to implement the rectifying characteristics used in the leakage current compensation circuit described herein.

[0059] Figure 7 is a circuit diagram 700 of another RF switch device embodiment, which includes, for example, the leakage current compensation circuit C described previously with respect to Figure 3 1 . Although the bias circuit is not shown in Figure 7 for ease of understanding the circuit diagram 700, the bias circuit will be implemented in normal applications. The transistors M 1 and M 2 , the leakage current compensation circuit C 1 are shown in Figure 7 , and their interconnections have been described previously. However, in Figure 7 , note that an additional transistor M3 is inserted in series between the transistors M 1 and M 2 . That is, the drain node of the transistor M 3 is coupled to the source node of the transistor M 2 , and the source node of the transistor M 3 is coupled to the drain node of the transistor M 1 . In the configuration shown in Figure 7 , the leakage current flowing out of the body node of the transistor M 1 is bypassed by the operation of the leakage current compensation circuit C 1 and flows into the drain of the transistor M 2 . Such as the transistor M 3Additional transistors connected in series (one, two or more such transistors) can be inserted between transistor M 1 and M 2 .

[0060] Figure 8A and Figure 8B is a circuit diagram of another embodiment of an RF switch device, including a leakage current compensation circuit for compensating for leakage current generated during both the positive and negative half-cycles of a sinusoidal or other periodic RF signal waveform applied to the RF switch device. Similarly, for the sake of Figure 8A and 8B clarity, the biasing circuit is omitted, but the biasing circuit will be included in normal applications.

[0061] Figure 8A illustrates a circuit 800A including transistor M 1 , M 2 and a leakage current compensation circuit C 1 , all of which have been previously described with respect to, for example Figure 3 . Additionally Figure 8A shows a second leakage current compensation circuit C 1 coupled between the source node of transistor M 2 and the body node of transistor M 2 . In the configuration shown in Figure 8A , the leakage current flowing out of the body node of transistor M 1 is bypassed by the action of the leakage current compensation circuit C 1 and flows into the drain of transistor M 2 during the first half-cycle of the applied RF signal waveform. In the configuration shown in Figure 8A , the leakage current flowing out of the body node of transistor M 2 is bypassed by the action of the leakage current compensation circuit C 2 and flows into the drain of transistor M 1 during the second half-cycle of the applied RF signal waveform. The operation of the compensation circuits C Figure 8B and C 1 and C 2 will be further described in detail below with reference to a specific example shown in

[0062] Figure 8B illustrates a circuit 800B including transistors M Figure 8A and M 1 shown in 2 . As shown in Figure 8B , the leakage current compensation circuit C 1 includes, as a specific implementation, a diode D 1 and a resistor R 1 connected in series. As shown in Figure 8B , the leakage current compensation circuit C 2 includes, as a specific implementation, a diode D 2 and a resistor R connected in series 2 . During the positive half-cycle 802 of the applied RF voltage, the parasitic leakage currents i gidl and i gidl flow out from the body node of the transistor M 1 through the diode D 1 and the resistor R 2 and flow into the source node of the transistor M 1 . If the value of the resistor R 1 is correct, the current flowing out from the body node of the transistor M 2 will be zero. During the negative half-cycle 804 of the applied RF voltage, the parasitic leakage currents i gidl and i gisl flow out from the body node of the transistor M 2 through the diode D 2 and the resistor R 1 and flow into the drain node of the transistor M 2 . If the value of the resistor R 2 is correct, the current currently flowing out from the body of the transistor M 1 will be zero.

[0063] . Also illustrated in Figure 8B are exemplary DC bias voltages and peak AC applied RF voltages during the positive half-cycle 802 and the negative half-cycle 804. The DC bias voltages and peak AC applied RF voltages are only examples, and other voltages can be used in different applications. If other transistors (not shown) different from the transistors M 1 and M 2 in the RF switch stack are analyzed, different voltages will also occur.

[0064] . During the positive half-cycle 802, the peak AC voltage (V 2 ) at the drain node of the transistor M d2 is 6 volts, the peak AC voltage (V 2 ) at the body node of the transistor M b2 is 4.5 volts, the peak AC voltage (V 1 ) at the drain node of the transistor M d1 is 3 volts, and the peak AC voltage (V 1 ) at the body node of the transistor M b1 is 1.5 volts. In Figure 8B , the source of the transistor M 1 is coupled to ground. During the positive half-cycle 802, at the transistor M 2The DC bias voltage (V d2 ) at the drain node of, at the drain node of transistor M 1 the DC bias voltage (V d1 ) and at the source node of transistor M 1 the DC bias voltage (V s1 ) are all set to zero volts. The DC bias voltage (V 2 ) at the body node of transistor M b2 ) and the DC bias voltage (V 1 ) at the body node of transistor M b1 ) are both set to -2 volts. Therefore, the sum (V d2 ) of the AC and DC voltages at the drain of transistor M2 is 6 volts, the sum (V 2 ) of the AC and DC voltages at the body node of transistor M b2 ) is 2.5 volts, the sum (V 1 ) of the AC and DC voltages at the drain node of transistor M d1 ) is 3 volts, the sum (V 1 ) of the AC and DC voltages at the body node of transistor M b1 ) is -0.5 volts, and the sum of the AC and DC voltages at the source node of transistor M 1 is zero volts. Therefore, the voltage 806 across the first leakage current compensation circuit including diode D 1 and resistor R 1 is 2.5 volts. Therefore, resistor R 1 can be appropriately sized to generate a corresponding compensation current less than or equal to the sum of the parasitic leakage currents i gidl and i gisl such that only a small or error-free current flows into or out of the body node of transistor M 2 or from the body node of transistor M 2 .

[0065] During the negative half-cycle 804, the peak AC voltage (V 2 ) at the drain node of transistor M d2 ) is -6 volts, the peak AC voltage (V 2 ) at the body node of transistor M b2 ) is -4.5 volts, the peak AC voltage (V 1 ) at the drain node of transistor M d1 ) is -3 volts, and the peak AC voltage (V 1 ) at the body node of transistor M b1 ) is -1.5 volts. In Figure 8B transistor M 1The source of is coupled to ground. During the negative half-cycle 804, at the transistor M 2 , the DC bias voltage (V d2 ) at the drain node of the transistor M 1 , the DC bias voltage (V d1 ) at the drain node of the transistor M 1 , and the DC bias voltage (V s1 ) at the source node of the transistor M 2 are all set to zero volts. The DC bias voltage (V b2 ) at the body node of the transistor M 1 and the DC bias voltage (V b1 ) at the body node of the transistor M 2 are both set to -2 volts. Thus, the sum (V d2 ) of the AC and DC voltages at the drain of the transistor M 2 is -6 volts, the sum (V b2 ) of the AC and DC voltages at the body node of the transistor M 1 is -6.5 volts, the sum (V d1 ) of the AC and DC voltages at the drain node of the transistor M 1 is -3 volts, the sum (V b1 ) of the AC and DC voltages at the body node of the transistor M 1 is -3.5 volts, and the sum of the AC and DC voltages at the source node of the transistor M 2 and the resistor R 2 is -2.5 volts. Thus, the resistor R 2 can be appropriately sized to generate a corresponding compensation current that is less than or equal to the sum of the parasitic leakage currents i gidl and i gisl , such that only a small or error-free current flows into or out of the body node of the transistor M 1 or from the body node of the transistor M 1 .

[0066] Figure 9A and Figure 9B are circuit diagrams of another embodiment of an RF switch device that includes multiple transistors and includes corresponding multiple leakage current compensation circuits. In Figure 9A and Figure 9B , the bias circuits are not shown for clarity, but the bias circuits will typically be included in a normal operating configuration.

[0067] Figure 9A illustrates an RF switch device 900A that includes multiple transistors M 1, M 2 , M 3 , M 4 and M 5 , and a corresponding plurality of compensation networks C coupled between the body terminals of the corresponding transistors and the drain terminals of adjacent transistors in the RF stack 11 , C 12 , C 13 and C 14 . In Figure 9A , any number of transistors may be used. The drain node of transistor M 5 may be coupled to an RF voltage source or to an additional series transistor that in turn is connected to the RF voltage source. Similarly, the source node of transistor M 1 may be coupled to another RF voltage source or to ground, or to an additional series transistor that in turn is connected to another RF voltage source or to ground. In Figure 9A , the leakage current flowing out of the body node of the transistor (e.g., the negative half-cycle of the RF voltage source) flows through the corresponding compensation network and returns to the RF stack such that the leakage current cannot flow into the bias circuit as described previously (not shown in Figure 9A ).

[0068] Figure 9B Illustrates an RF switch device 900B similar to the RF switch device shown in FIG. 9(a), but further including a plurality of anti-parallel compensation networks C coupled between the body nodes of the corresponding transistors and the drain nodes of adjacent transistors in the RF stack 21 , C 22 , C 23 and C 24 . In Figure 9B , the leakage current flowing out of the body node of the transistor (e.g., the positive half-cycle of the RF voltage source) flows through the corresponding compensation network and back into the RF stack such that the leakage current cannot flow into the bias circuit as described previously (not shown in Figure 9B ). Thus, the RF switch device 900B shown in Figure 9B is configured to compensate for the leakage current in both half-cycles of a sinusoidal or other periodic waveform of the applied RF voltage. Additionally, in the RF switch device 900B of Figure 9B , two leakage current paths (one per half-cycle) correspond to each transistor in the RF stack. The configuration shown in Figure 9B provides the maximum compensation effect for the generated leakage current.

[0069] Figure 10A , Figure 10B and Figure 11is a circuit diagram of an embodiment of another RF switch device. The other RF switch device embodiment includes a plurality of transistors and includes at least one leakage current compensation circuit. As previously described, although in an embodiment, one or two leakage current compensation circuits per transistor can provide a maximum leakage current cancellation effect, any number of leakage current compensation circuits less than one or two per transistor can be used. When compared to an uncompensated RF switch, even one leakage current compensation circuit per RF switch will provide the benefit of leakage current cancellation and a corresponding improvement in maintaining the bias voltage. Similarly, although for clarity Figure 10A , Figure 10B and Figure 11 do not include a bias circuit, a bias circuit will typically be included in normal applications.

[0070] Figure 10A and Figure 10B show an RF switch device similar to the RF switch device shown in Figure 9A and Figure 9B , but with fewer compensation networks coupled to a subset of the transistors from the same plurality of transistors in the RF switch device. For example, in Figure 10A , the switch device 1000A corresponds to Figure 9A 's switch device 900A, but only uses one compensation network C 12 , and this compensation network C 12 is coupled between the body node of transistor M2 and the drain node of transistor M 3 . In Figure 10B , the switch device 1000B corresponds to Figure 9B 's switch device 900B, but only uses two compensation networks C 12 and C 22 . The compensation network C 12 is coupled between the body node of transistor M 2 and the drain node of transistor M 3 , while the compensation network C 22 is coupled between the body node of transistor M 3 and the source node of transistor M 2 . Other subsets of the compensation networks from the group of all the compensation networks shown in Figure 9A and Figure 9B can be used. For example, although only the compensation network C 12 is depicted, only the compensation network C 11 or C 13 can be used. Alternatively, only the compensation networks C 11 and C 14 can be used, or the compensation networks C 12 and C 13A regularly repeating compensation network pattern or randomly scattered compensation networks can be used to improve the leakage current characteristics of the RF switch.

[0071] Another RF switch device 1100 is shown in Figure 11 where at least one first compensation network (C 12 ) is coupled to a subset of transistors (transistors M 2 and M 3 ) from a plurality of transistors in the RF switch device, and at least one second compensation network (C 24 ) is coupled to another subset of transistors (transistors M 4 and M 5 ) from the plurality of transistors in the RF switch device. The switch device 1100 also generally corresponds to Figure 9B 's switch device 900B (except for only using compensation networks C 12 and C 24 ). Other patterns of compensation networks and corresponding subsets of transistors can be used if needed. For example, certain patterns of compensation networks can be used to accommodate constraints on the integrated circuit layout. Although compensation networks C Figure 11 and C 12 are shown in 24 , other compensation networks can be used (e.g., compensation networks C 11 and C 22 , or compensation networks C 13 and C 22 ). Many other subsets of compensation networks can be used in Figure 11 , which are selected from the maximum number of compensation networks shown in Figure 9B .

[0072] Figure 12 is a circuit diagram of a PMOS-based RF switch device 1200 according to an embodiment. The PMOS-based RF switch device 1200 includes a leakage current compensation circuit C 1 . All of the embodiments described above relate to RF switch devices implemented using NMOS switching transistors, which is an ideal way to implement RF switches. However, if it is necessary to accommodate a specific application, the RF switch device can also be implemented using PMOS transistors. Therefore, the switch device 1200 includes a first PMOS transistor P 1 and a second PMOS transistor P 2 . The drain node of transistor P1 is coupled to the source node of transistor P 2 . The compensation network C 1 is coupled between the drain node of transistor P 2 and the body node of transistor P 1 . In Figure 12The bias network and additional transistors (if any) in the switching device 1200 are not shown. The previous description of how the compensation network C 1 operates also applies to the PMOS RF switch embodiment shown in Figure 12 , except that the compensation network polarity is reversed and the current direction is opposite. Therefore, Figure 12 demonstrates the implementation of a compensated RF switch using PMOS transistors.

[0073] Although a bias network for an RF switch has been shown and depicted with respect to Figure 2A and Figure 2B , various other possible arrangements of the bias network can be used, including but not limited to:

[0074] As shown in Figure 2A and Figure 2B , high-ohmic resistors and bias DC voltages V g , V b , V s coupled between the gate nodes, source-drain nodes, and body nodes of the corresponding transistors in the stack; as shown in Figure 13 , high-ohmic resistors coupled between the gate nodes, source-drain nodes, and body nodes of the individual transistors in the stack form a series of bias resistor chains, and the series of bias resistor chains are tapped to bias the voltage at one or more points along the chain; any combination of the bias circuit arrangements shown in Figure 2A , Figure 2B and Figure 13 for a single high-voltage RF switch; or, any combination of the bias circuit arrangements shown in Figure 2A , Figure 2B and Figure 13 for a single high-voltage RF switch, where V b and / or V s is a feedback-regulated bias voltage, as described in the co-pending patent application Ser. No. 15 / 644435, titled "Systems and Methods for RF Switch Biasing", the entire content of which is incorporated herein by reference and fully set forth herein.

[0075] Figure 13 shows an exemplary circuit portion 1300 of a high-voltage RF switch that includes a first NMOS transistor M 1 in series with a second NMOS transistor M2 and includes an alternative bias circuit. In the series connection, the source node of transistor M 1 is coupled to the drain node of transistor M 2 . The source node of transistor M 2The drain node of [device] is directly coupled to an RF high voltage source, or indirectly coupled to an RF high voltage source through one or more transistors (also connected in series). Transistor M 1 's source node is directly coupled to ground or another RF high voltage source, or indirectly coupled to another RF high voltage source through one or more transistors (also connected in series). Transistor M 1 's gate node is coupled to a gate bias voltage V gc through a bias resistor R g , and transistor M 2 's gate node is coupled to a gate bias voltage V gg1 and R gc through bias resistors R g . Transistor M 1 's body node is coupled to a body bias voltage V bc through a bias resistor R b , and transistor M 2 's body node is coupled to a body bias voltage V bb1 and R bc through bias resistors R b . Transistor M 1 's source node is coupled to a V sdc bias voltage through a resistor R s . The source-drain node between transistors M 1 and M 2 is coupled to a V sdc bias voltage through resistors Rsd1 and R s . Transistor M 2 's drain node is coupled to a V sd2 , R sd1 and R sdc bias voltage through resistors R s . The above bias circuit can be repeated and used for any additional series transistors not shown in Figure 13 . Any leakage current compensation circuit described herein can be used in conjunction with the bias circuit shown in Figure 13 .

[0076] Circuits using RF switches with the leakage current compensation circuits described herein have advantages compared to circuits using uncompensated RF switches. The advantages include, but are not limited to, introducing less signal distortion, achieving good performance at higher operating voltages, improving reliability by avoiding "hot spots" within the RF switch due to excessive local voltage across a single switching transistor, and generally better achieving the designed operating conditions despite the presence of leakage current.

[0077] As described herein, while it is desirable for the leakage current in the RF switch transistor to match the equivalent compensation current generated by the leakage current compensation circuit, overcompensating or undercompensating these leakage currents with the leakage current compensation circuit will still provide benefits when compared to an uncompensated RF switch.

[0078] Although the present invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments of the present invention, as well as other embodiments of the present invention, will be apparent to those skilled in the art. Accordingly, the appended claims encompass any such modifications or embodiments.

Claims

1. An RF switch device, comprising: a first transistor and a second transistor, wherein the first transistor and the second transistor are coupled in series to establish a switchable RF path; and a first compensation network coupled between a body terminal of the first transistor and a source / drain terminal of the second transistor, wherein the first compensation network is configured to establish a path for current flow in a first direction between the body terminal of the first transistor and the source / drain terminal of the second transistor, and the first compensation network is configured to block current flow in a second direction, opposite to the first direction, between the body terminal of the first transistor and the source / drain terminal of the second transistor, and wherein the RF switch device further comprises a second compensation network coupled between a body terminal of the second transistor and a source / drain terminal of the first transistor.

2. The RF switch device according to claim 1, wherein the current flow in the first direction is configured to be less than or equal to a leakage current associated with the body terminal of the first transistor.

3. The RF switch device according to claim 1, wherein the leakage current associated with the body terminal of the first transistor comprises gate-induced source leakage current or gate-induced drain leakage current.

4. The RF switch device according to claim 1, wherein the first compensation network comprises a diode circuit.

5. The RF switch device according to claim 4, wherein the diode circuit comprises a diode.

6. The RF switch device according to claim 4, wherein the diode circuit comprises a diode coupled in series with a resistor.

7. The RF switch device according to claim 4, wherein the diode circuit comprises a first diode coupled in series with a second diode.

8. The RF switch device according to claim 4, wherein the diode circuit comprises a first diode, a second diode, and a resistor coupled in series.

9. The RF switch device according to claim 1, wherein the first compensation network comprises a diode-connected transistor circuit.

10. The RF switch device according to claim 9, wherein the diode-connected transistor circuit comprises a diode-connected transistor.

11. The RF switch device according to claim 9, wherein the diode-connected transistor circuit comprises a diode-connected transistor coupled in series with a resistor.

12. The RF switch device according to claim 9, wherein the diode-connected transistor circuit comprises a diode-connected transistor having a resistor coupled between a drain terminal and a gate terminal of the diode-connected transistor.

13. The RF switch device according to claim 9, wherein the diode-connected transistor circuit includes a diode-connected transistor having a first resistor coupled between the drain terminal and the gate terminal of the diode-connected transistor and a second resistor coupled in series with the source terminal of the diode-connected transistor.

14. The RF switch device according to claim 1, further comprising a third transistor having a drain terminal coupled to the source terminal of the second transistor and a source terminal coupled to the drain terminal of the first transistor.

15. The RF switch device according to claim 1, wherein the second compensation network includes a rectifying element.

16. The RF switch device according to claim 1, wherein the current flowing through the second compensation network is configured to be less than or equal to the leakage current associated with the body terminal of the second transistor.

17. A radio frequency (RF) switch device comprising: a plurality of transistors connected in series to form a switchable current path; and a plurality of first compensation networks coupled between the body terminal of the Nth transistor of the plurality of transistors and the drain terminal of the (N + 1)th transistor of the plurality of transistors, wherein each of the first compensation networks of the first compensation networks includes a rectifying element, wherein the plurality of first compensation networks is less than the plurality of transistors, and wherein N is a positive integer.

18. The RF switch device according to claim 17, further comprising a plurality of second compensation networks coupled between the body terminal of the (M + 1)th transistor of the plurality of transistors and the source terminal of the Mth transistor of the plurality of transistors, wherein each of the second compensation networks of the second compensation networks includes a rectifying element, and wherein M is a positive integer.

19. The RF switch device according to claim 18, wherein the plurality of second compensation networks is less than the plurality of transistors.

20. A method of operating a radio frequency (RF) switch device, the RF switch device including a first transistor and a second transistor, wherein the first transistor and the second transistor are coupled in series to establish a switchable RF path, the method comprising: causing a first leakage current to flow between the body terminal of the first transistor and the source / drain terminal of the second transistor during the first half cycle of an RF signal communicated with the RF switch; and causing a second leakage current to flow between the body terminal of the second transistor and the source / drain terminal of the first transistor during the second half cycle of the RF signal communicated with the RF switch.

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