A high-bandwidth loopback circuit in a high-speed SerDes

Abstract

The object of the present invention is to provide a high-bandwidth loopback circuit in a high-speed SerDes. The circuit includes: a T-coil module, an IOpad path, a loopback path, and an ESD capacitor; the T-coil module is connected to the IOpad path, the ESD capacitor, and the loopback path for eliminating the influence of the ESD capacitor on the circuit; the IOpad path is disconnected when the loopback path is turned on. The present invention utilizes the bandwidth expansion advantage brought by putting the loopback circuit into the ESD shared T-coil, so that the influence of the loopback switch on the signal path is reduced, and an additional inductor is added on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a high-bandwidth loopback circuit in a high-speed serdes. Background Art

[0002] Loopback testing is a communications technology that sends an electronic signal or data stream back to its sender in its original form, primarily used to test communication functionality. It can be a communication channel with only one endpoint; any message sent is immediately and exclusively received by that same channel. The basic principle of loopback testing is to redirect outgoing electronic signals and digital data streams back to their source, thereby simulating a network connection. Loopback testing is a common transmission system testing method, typically used to verify and analyze the correctness of chip transceiver module interface circuits, internal logic, and transmission line hardware implementations. Loopback testing is used during logic simulation to verify the correctness of transceiver module logic design and loopback design functionality. During the debugging phase, loopback testing is primarily used to quickly locate and locate transmission faults, especially during FPGA debugging or die testing. Loopback testing can save significant time and labor costs in chip development. Loopback testing includes both inner and outer loop testing. The inner loop tests the transmitter (TX) and receiver (RX) of the transceiver module itself; the outer loop tests the transmit and receive loops of the transceiver module and an external remote module. During the inner loop test, the loopback control logic configures the system loopback register to put the transceiver module into loopback mode, that is, the data or message can be directly looped back to its own receiver RX through its own transmitter TX; during the outer loop test, the loopback register is configured by sending a loopback protocol message to control the remote external module to enter the loopback mode. The data or message is looped back to the near-end receiver RX after passing through the external remote module from the near-end transmitter TX. By checking and analyzing the difference between the received data or message and the sent data or message, the correctness of the chip transmitter, receiver and internal interconnection logic is determined to locate the fault point.

[0003] With the continuous increase in wired communication data rates and advancements in integrated circuit technology, high-speed serial data interface (SerDes) technology has widely replaced traditional parallel interface technology. SerDes interfaces solve the problem of parallel data asynchrony at high speeds, significantly reduce the number of I / O interfaces, and improve electromagnetic compatibility. In SerDes designs, loopback circuits are essential and can effectively identify many problems during testing. However, as speeds increase in high-speed designs, sensitivity to parasitics also increases. The parasitic capacitance on the switches associated with loopback circuits can reduce signal bandwidth. Summary of the Invention

[0004] The object of the present invention is to provide a high-bandwidth loopback circuit in a high-speed SerDes. This circuit incorporates the bandwidth expansion advantage brought by placing the loopback circuit into an ESD-shared T-coil, reducing the impact of the loopback switch on the signal path and additionally adding an inductor on the loopback path to reduce the attenuation caused by large parasitics in the ESD branch.

[0005] A high-bandwidth loopback circuit in a high-speed SerDes, comprising: a T-coil module, an IOpad path, a loopback path, and an ESD capacitor;

[0006] The T-coil module is connected to the IOpad path, the ESD capacitor, and the loopback path, and is used to eliminate the influence of the ESD capacitor on the circuit;

[0007] The IOpad path is disconnected when the loopback path is turned on.

[0008] Preferably, the T-coil module comprises: a first capacitor, a first inductor, and a second inductor;

[0009] The first plate of the first capacitor is connected to the first end of the first inductor, and the second plate is connected to the second end of the second inductor;

[0010] The second end of the first inductor is connected to the first end of the second inductor.

[0011] Preferably, the IOpad path is connected to the second end of the second inductor.

[0012] Preferably, the loopback path comprises: a third inductor, a fourth inductor, a first switch, and a second switch;

[0013] The first end of the first switch is connected to the first end of the second inductor, and the second end is connected to the first end of the third inductor;

[0014] The second end of the third inductor is connected to the first end of the fourth inductor;

[0015] The second end of the fourth inductor is connected to the first end of the second switch;

[0016] The loopback path is connected in parallel with the IOpad path.

[0017] Preferably, it further comprises: a first resistor and a second resistor;

[0018] The second end of the first resistor is connected to the first end of the first inductor;

[0019] The first end of the second resistor is connected to the second end of the second switch.

[0020] A method for implementing a high - bandwidth loopback circuit in a high - speed SerDes, comprising:

[0021] Placing the loopback circuit into a T - coil module;

[0022] Adding an inductor module to the loopback circuit.

[0023] Preferably, the step of placing the loopback circuit into the T - coil module includes:

[0024] Connecting the loopback circuit between two inductors in the T - coil module.

[0025] Preferably, the step of adding an inductor module to the loopback circuit includes:

[0026] Adding an inductor to the branch between the loopback circuit and the two inductors in the T - coil module to balance the influence of the ESD capacitance parasitics on the signal bandwidth.

[0027] An electronic device, comprising: a chip, a processor, and a memory. The memory is used to store computer program code, and the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a method for implementing a high - bandwidth loopback circuit in a high - speed SerDes.

[0028] A computer - readable storage medium stores a computer program. The computer program includes program instructions. When the program instructions are executed by a processor of an electronic device, the processor is caused to execute a method for implementing a high - bandwidth loopback circuit in a high - speed SerDes.

[0029] The beneficial effects of the present invention are as follows: 1. The present invention brings the bandwidth expansion advantage of putting the loopback circuit into the ESD - shared T - coil, reducing the influence of the loopback switch on the signal path. 2. The present invention additionally adds an inductor on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings herein are incorporated into the specification and form a part of the specification, showing the embodiments consistent with the present invention and used together with the specification to explain the principles of the present invention.

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for describing the embodiments or the prior art. Obviously, for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0032] Figure 1A high-bandwidth loopback circuit diagram in a high-speed SerDes of the present invention;

[0033] Figure 2 A schematic diagram for analyzing the T-coil model of the present invention;

[0034] Figure 3 A bandwidth comparison diagram of the new loopback path and the old loopback path of the present invention;

[0035] Figure 4 A schematic diagram of the hardware structure of an electronic device of the present invention. Detailed implementation manners

[0036] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0037] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0038] In addition, the descriptions involving "first", "second", etc. in the present invention are only for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions appears to be contradictory or unable to be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0039] With the continuous improvement of the data rate of wired communication and the continuous progress of integrated circuit technology, the high-speed serial data interface (SerDes) technology has widely replaced the traditional parallel interface technology. The SerDes interface solves the problem of asynchronous parallel data under high-speed conditions, and at the same time can greatly reduce the number of I / O interfaces and has better electromagnetic compatibility. In SerDes design, the implementation of the loopback circuit is necessary, which can effectively locate many problems in testing. With the increase in speed in high-speed design, the sensitivity to parasitics is also increasing, and the parasitic capacitance on the attached switch of the loopback circuit will reduce the signal bandwidth.

[0040] The present invention incorporates the bandwidth expansion advantage brought by placing the loopback circuit into the ESD - shared T - coil, reducing the impact of the loopback switch on the signal path. The present invention additionally adds an inductor on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

[0041] Embodiment 1

[0042] A high - bandwidth loopback circuit in a high - speed serdes, referring to Figure 1 , includes: a T - coil module, an IOpad path, a loopback path, and an ESD capacitor;

[0043] In a high - speed SerDes (Serializer / Deserializer) system, a high - bandwidth loopback circuit allows the signal at the transmitter (TX) to be directly looped back to the receiver (RX) to verify the functions and performance of the SerDes without relying on external devices. Functions of the high - bandwidth loopback circuit: Function testing: Verify whether the TX and RX circuits are working properly. Performance evaluation: Measure key parameters such as signal integrity, jitter, and bit error rate. Fault diagnosis: Locate possible hardware or signal integrity problems in the system. Self - calibration: Support internal calibration to optimize signal quality.

[0044] The T - coil module is connected to the IOpad path, the ESD capacitor, and the loopback path, and is used to eliminate the influence of the ESD capacitor on the circuit;

[0045] The T - coil circuit is a circuit structure for expanding bandwidth, widely used in high - speed circuit designs (such as amplifiers, drivers, and receivers), especially in scenarios that require high bandwidth and low noise. Functions of the T - coil circuit: Bandwidth expansion: By introducing an inductor (T - coil), counteract the influence of parasitic capacitance, thereby expanding the bandwidth of the circuit. Impedance matching: Provide good impedance matching, reducing signal reflection. Noise reduction: Optimize high - frequency performance, reducing noise and distortion. Working principle of the T - coil circuit: Counteract parasitic capacitance: In high - speed circuits, parasitic capacitance limits bandwidth. The T - coil introduces an inductor to form resonance with the parasitic capacitance, thus counteracting its influence. Expand bandwidth: By optimizing the values of the inductor and capacitor, the T - coil can expand the bandwidth of the circuit far beyond the limit of traditional RC circuits. Impedance matching: The T - coil network can provide good impedance matching, reducing signal reflection and improving signal integrity. Advantages of the T - coil circuit: High bandwidth: Significantly expand the bandwidth of the circuit, suitable for high - speed signal processing. Low noise: Optimize high - frequency performance, reducing noise and distortion. Compact design: Compared with other bandwidth - expansion technologies, the T - coil structure is more compact and suitable for integrated circuit design.

[0046] The IOpad path is disconnected when the loopback path is conducting.

[0047] The IOpad path refers to the electrical path involved in the chip pin processing module (IOpad) when processing input and output signals. The main function of the IOpad is to process the signals of the chip pins and send them to the inside of the chip, or to process the signals output from the inside of the chip and send them to the chip pins. The IOpad involves various types of signal processing, including clock signals, reset signals, JTAG interface signals, etc.

[0048] Preferably, the T-coil module includes: a first capacitor, a first inductor, and a second inductor;

[0049] The first plate of the first capacitor is connected to the first end of the first inductor, and the second plate is connected to the second end of the second inductor;

[0050] The second end of the first inductor is connected to the first end of the second inductor.

[0051] Reference Figure 2 , in many high-speed designs, a T-coil is used to reduce the impact of ESD parasitics on the signal bandwidth. The Loopback circuit can be placed inside the T-coil together. However, placing the loopback circuit in the ESD branch has new additional problems. In the T-coil formula, the bandwidth extension for node B filters out C across the entire bandwidth. L The impact brought, but for node C, the introduction of the T-coil only brings better bandwidth extension than the conventional inductive peak. So only for the loopback path, the loss IL here becomes larger. Therefore, on this basis, the present invention adds an inductor, which can form a certain degree of filtering effect with the inductor on the left side of the T-coil. Effectively makes up for the shortcomings of placing the loopback circuit in the ESD path.

[0052] Preferably, the IOpad path is connected to the second end of the second inductor.

[0053] In the loopback circuit, the main function of the IOPad path is to implement the loopback test of the signal, which is used to verify whether the input and output functions of the chip or circuit are normal. The IOPad path allows the output signal to be directly looped back to the input port, thereby testing the input and output functions of the chip without relying on external devices.

[0054] In this way, the electrical characteristics of the IOPad (such as driving ability, level compatibility, etc.) and signal integrity can be verified. The loopback test can help quickly locate the fault point. If an abnormality occurs during the loopback of the signal, it can be determined whether it is a problem with the IOPad itself or the internal logic circuit. For example, if the output signal is normal but the input signal after loopback is abnormal, there may be a problem with the input path of the IOPad. Through the loopback test, it can be checked whether parameters such as signal delay, jitter, and noise are within the allowable range.

[0055] Preferably, the loopback path includes: a third inductor, a fourth inductor, a first switch, and a second switch;

[0056] The first end of the first switch is connected to the first end of the second inductor, and the second end is connected to the first end of the third inductor;

[0057] The second end of the third inductor is connected to the first end of the fourth inductor;

[0058] The second end of the fourth inductor is connected to the first end of the second switch;

[0059] The loopback path is connected in parallel with the IOpad path.

[0060] The loopback path directly returns the output signal to the input end through internal or external connection, forming a closed signal path. This design allows the system to test and verify itself without relying on external devices. In the loopback path, the signal is transmitted from the output end (such as TX, the transmitting end) to the input end (such as RX, the receiving end). The signal path can be a digital signal, an analog signal, or a mixed signal, depending on the circuit design. The loopback path is implemented by control logic (such as a multiplexer MUX) for selecting whether to enable the loopback mode. In the test mode, the control logic switches the signal from the output end to the input end; in the normal mode, the signal is normally transmitted to external devices. The loopback path forms a closed signal path by returning the output signal to the input end, which is used to test, diagnose, and verify the functions and performance of an electronic system or chip. Its main functions include functional testing, fault diagnosis, performance verification, simplifying the test process, and improving the test coverage.

[0061] Preferably, it further includes: a first resistor and a second resistor;

[0062] The second end of the first resistor is connected to the first end of the first inductor;

[0063] The first end of the second resistor is connected to the second end of the second switch.

[0064] Reference Figure 3 , the light color is the loopback path of the present invention, the dark color is the loopback path of the prior art, and the bandwidth of the light color is significantly larger than that of the dark color.

[0065] Embodiment 2

[0066] A method for implementing a high-bandwidth loopback circuit in a high-speed serdes, including:

[0067] S100, placing the loopback circuit into the T-coil module;

[0068] The main function of placing the loopback circuit into the T-coil module is to enhance signal integrity testing and fault diagnosis capabilities, while optimizing the transmission performance of high-frequency signals. The T-coil itself is an inductive structure used to improve bandwidth and signal integrity, and is commonly used in high-speed interfaces (such as SerDes). The T-coil module is used to improve the transmission quality of high-frequency signals, and the loopback circuit can return the output signal to the input terminal to verify whether the signal is transmitted completely in the T-coil module. Through the loopback test, problems such as signal attenuation, reflection, and distortion in the T-coil module can be detected to ensure signal integrity.

[0069] S200, add an inductance module to the loopback circuit.

[0070] For the high-frequency noise signals existing in the loopback circuit, the inductor presents a high impedance, which can prevent these high-frequency noises from passing through, enabling the DC component or low-frequency useful signal in the signal to pass through smoothly, thereby improving the purity of the signal. For example, in the loopback test circuit of communication equipment, it can prevent external high-frequency electromagnetic interference from entering the circuit and affecting the accuracy of test results.

[0071] During the operation of the loopback circuit, when there are instantaneous changes in energy demand or power supply voltage fluctuations, the inductor can store or release energy, playing the role of energy buffering. For example, in the power supply loopback detection circuit, when the power supply voltage drops instantaneously, the inductor releases the stored energy to maintain the normal operation of the circuit and prevent the circuit from malfunctioning due to voltage fluctuations.

[0072] Preferably, S100, placing the loopback circuit into the T-coil module includes:

[0073] Connect the loopback circuit between two inductors in the T-coil module.

[0074] In the embodiments of the present invention, the bandwidth expansion advantage brought by placing the loopback circuit into the ESD-shared T-coil reduces the influence of the loopback switch on the signal path. The T-coil module is usually used for high-frequency signal transmission (such as SerDes interfaces above 10 Gbps), and the loopback circuit can be used to verify the transmission performance of high-frequency signals. After integrating the loopback circuit into the T-coil module, signal testing can be completed inside the chip without relying on external testing equipment. The main functions of placing the loopback circuit into the T-coil module are to enhance signal integrity testing, support high-frequency performance verification, simplify the testing process, support fault diagnosis and location, and optimize design and debugging.

[0075] Preferably, S200, adding an inductance module to the loopback circuit includes:

[0076] Add an inductor on the branch between the loopback circuit and the two inductors in the T-coil module to balance the influence of the ESD capacitance parasitics on the signal bandwidth.

[0077] In the embodiment of the present invention, an additional inductor is added on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

[0078] Embodiment 3

[0079] An electronic device includes: a chip, a processor, and a memory. The memory is used to store computer program code, and the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a method for implementing a high-bandwidth loopback circuit in a high-speed serdes.

[0080] Reference Figure 4 , the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled through a connector, and the connector includes various interfaces, transmission lines, or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling means mutual connection through a specific manner, including direct connection or indirect connection through other devices. For example, they can be connected through various interfaces, transmission lines, buses, etc.

[0081] The processor 21 can be one or more graphics processors. When the processor 21 is a GPU, the GPU can be a single-core GPU or a multi-core GPU. Optionally, the processor 21 can be a processor group composed of multiple GPUs, and multiple processors are coupled to each other through one or more buses. Optionally, the processor can also be other types of processors, etc., which are not limited in the embodiments of the present invention.

[0082] The memory 22 can be used to store computer program instructions and various computer program codes including the program code for executing the solution of the present invention. Optionally, the memory includes, but is not limited to, a random access memory, a read-only memory, an erasable programmable read-only memory, or a portable read-only memory, and the memory is used for relevant instructions and data.

[0083] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 can be independent devices or an integrated device.

[0084] Embodiment 4

[0085] A computer-readable storage medium stores a computer program, and the computer program includes program instructions. When the program instructions are executed by a processor of an electronic device, the processor is caused to execute a method for implementing a high-bandwidth loopback circuit in a high-speed SERDES.

[0086] The present invention brings the bandwidth expansion advantage of putting the loopback circuit into the ESD-shared T-coil, reducing the influence of the loopback switch on the signal path. The present invention additionally adds an inductor on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

[0087] The above are only specific embodiments of the present invention, enabling those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown herein, but rather will be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A high-bandwidth loopback circuit in a high-speed SerDes, characterized in that, Comprising: A T-coil module, an I / O pad path, a loopback path, and an ESD capacitor; The T-coil module is connected to the I / O pad path, the ESD capacitor, and the loopback path, and is used to eliminate the influence of the ESD capacitor on the circuit; The I / O pad path is disconnected when the loopback path is conducting; The T-coil module includes: a first capacitor, a first inductor, and a second inductor; The first plate of the first capacitor is connected to the first end of the first inductor, and the second plate is connected to the second end of the second inductor; The second end of the first inductor is connected to the first end of the second inductor; The loopback path includes: a third inductor, a fourth inductor, a first switch, and a second switch; The first end of the first switch is connected to the first end of the second inductor, and the second end is connected to the first end of the third inductor; The second end of the third inductor is connected to the first end of the fourth inductor; The second end of the fourth inductor is connected to the first end of the second switch; The loopback path is connected in parallel with the I / O pad path.

2. The high-bandwidth loopback circuit in a high-speed SerDes according to claim 1, wherein The I / O pad path is connected to the second end of the second inductor.

3. The high-bandwidth loopback circuit in a high-speed SerDes according to claim 1, characterized in that, Further comprising: A first resistor and a second resistor; The second end of the first resistor is connected to the first end of the first inductor; The first end of the second resistor is connected to the second end of the second switch.

4. A method for implementing a high - bandwidth loop - back circuit in a high - speed SerDes, which is applied to the high - bandwidth loop - back circuit in a high - speed SerDes according to any one of claims 1 - 3, characterized in that, Comprising: Placing a loopback circuit into the T-coil module; Adding an inductor module to the loopback circuit.

5. The implementation method of a high-bandwidth loopback circuit in a high-speed SerDes according to claim 4, wherein The placing the loopback circuit into the T-coil module includes: Connecting the loopback circuit between two inductors in the T-coil module.

6. The method for implementing a high-bandwidth loopback circuit in a high-speed SerDes according to claim 4, wherein The adding an inductor module to the loopback circuit includes: Adding an inductor to the branch between the loopback circuit and the two inductors in the T-coil module to balance the influence of the ESD capacitor parasitics on the signal bandwidth.

7. An electronic device, characterized in that, Comprising: A chip, a processor, and a memory. The memory is used to store computer program code, and the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a method for implementing a high-bandwidth loopback circuit in a high-speed serdes as described in any one of claims 4 to 6.

8. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by the processor of the electronic device, the processor is caused to execute a method for implementing a high-bandwidth loopback circuit in a high-speed serdes as described in any one of claims 4 to 6.

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