A preparation method for a transition region of a thick film epitaxial gradient layer

Abstract

The present invention relates to a method for preparing a transition zone of a thick-film epitaxial graded layer, comprising: S100, performing surface pretreatment on a heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pretreated substrate to an epitaxial cavity, and forming a stable lattice interface by gradient heating; S300, introducing epitaxial gas and doping gas in a transition zone growth stage, dynamically adjusting the doping gas flow rate, and monitoring the resistivity in real time to ensure that the resistivity of the transition zone matches that of the flat zone; S400, switching to the flat zone growth stage, maintaining a constant doping gas flow rate, and adjusting epitaxial parameters until the total thickness meets a standard; S500, performing gradient cooling and post-treatment on the substrate after the epitaxy is completed, dynamically adjusting the doping gas flow rate, controlling the epitaxy time, and monitoring the resistivity in real time to ensure that the resistivity between the transition zone and the flat zone matches, thereby improving the overall quality of the epitaxial layer, and accurately controlling the transition zone length and resistivity changes to be more stable, thereby reducing performance fluctuations caused by resistivity mismatch.

Description

Technical Field

[0001] The present invention relates to semiconductor manufacturing technology, in particular to a method for preparing a transition zone of a thick film epitaxial gradient layer. Background Art

[0002] In the field of semiconductor manufacturing, epitaxial growth technology is one of the key steps in preparing high-performance electronic devices. The thick-film epitaxial growth method usually uses a single epitaxial parameter for the entire growth process. Although this method can achieve the growth of epitaxial layers of a certain thickness, it has significant limitations in transition zone control and resistivity consistency.

[0003] Traditional methods make it difficult to precisely control the length and resistivity changes of the transition zone, resulting in a resistivity mismatch between the transition zone and the flat zone, affecting key electrical parameters such as the breakdown voltage (BV) of the final device. In addition, due to the lack of a dynamic adjustment mechanism, traditional methods are unable to monitor and adjust the resistivity in real time, resulting in large resistivity fluctuations in different batches or on the same wafer, affecting the quality stability of the product. In order to achieve the required electrical parameters, traditional methods often require multiple experiments and complex process adjustments, increasing production costs and time. Although some improvement schemes such as multi-step epitaxy and fixed parameter methods attempt to solve these problems, they either increase process complexity and operational difficulty, or have poor flexibility and are unable to cope with different customer needs and product specification changes. Summary of the Invention

[0004] The present invention aims to solve the problems existing in the above-mentioned prior art and provides a method for preparing the transition zone of a thick-film epitaxial gradient layer. By dynamically adjusting the doping gas flow rate and real-time monitoring the resistivity, the resistivity of the transition zone is matched with that of the flat zone, thereby improving the quality of the epitaxial wafer and the consistency of the electrical parameters.

[0005] The present invention solves the technical problem by adopting a technical solution: the method for preparing a transition zone of a thick-film epitaxial gradient layer comprises:

[0006] S100, performing surface pretreatment on the heavily doped N-type silicon substrate to reduce interface defects;

[0007] S200, transferring the pre-treated substrate to an epitaxial chamber, and forming a stable lattice interface by gradient heating;

[0008] S300, during the transition zone growth stage, introducing epitaxial gas and doping gas, dynamically adjusting the doping gas flow rate and monitoring the resistivity in real time, so that the resistivity of the transition zone matches that of the flat zone;

[0009] S400, switching to the flat region growth stage, maintaining a constant doping gas flow rate and adjusting epitaxial parameters until the total thickness reaches the standard;

[0010] S500: After the epitaxy is completed, the substrate is subjected to gradient cooling and post-processing.

[0011] Preferably, the surface pretreatment in step S100 includes the following steps:

[0012] S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate;

[0013] S102, performing high temperature annealing in a hydrogen atmosphere, the annealing temperature is 1100-1150°C, the hydrogen purity is ≥99.9999%, and the annealing time is 30-60 minutes;

[0014] S103. After annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

[0015] Preferably, the gradient heating in step 200 includes:

[0016] S201, heating from 650°C to 1180°C at a rate of 10-15°C / s;

[0017] S202, maintaining a constant temperature of 1180°C for 180 seconds while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface;

[0018] S203, during the constant temperature stage, the pressure in the chamber is maintained at 100-300 Torr to suppress the diffusion of impurities.

[0019] Preferably, the method of dynamically adjusting the doping gas flow rate in step S300 is:

[0020] S301, the initial flow rate is set to 290 sccm, and then gradually decreased to the final flow rate of 33.3 sccm;

[0021] S302, monitor the film thickness in real time using a non-contact laser interferometer, and link it with the resistivity data to correct the flow curve to ensure that the transition zone length deviation is ≤±5%;

[0022] S303. The resistivity gradient of the transition zone ranges from 10-3Ω·cm to 10-1Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

[0023] Preferably, the flat region growth stage in step S400 includes:

[0024] S401, maintain the doping gas flow rate at 33.3 sccm and the TCS flow rate at 7-10 g / min;

[0025] S402, real-time monitoring of resistivity using the four-probe method, and adjustment of the TCS flow rate to ensure that the resistivity fluctuation in the flat zone is ≤±0.3%;

[0026] S403, after each 5 μm epitaxial layer is grown, a high concentration phosphine pulse of 500-800 sccm is injected for 10-20 seconds to form a longitudinal gradient doping structure.

[0027] Preferably, the gradient cooling in step S500 includes:

[0028] S501, cooling to room temperature at a rate of 5-8°C / min;

[0029] S502, during the cooling process, introduce argon gas with a purity of ≥99.999% to prevent oxidation of the epitaxial layer;

[0030] S503. After cooling, verify the steepness of the transition zone by using the spread resistance profile (SRP) test.

[0031] Preferably, the heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation of <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

[0032] Preferably, the total thickness of the epitaxial layer is 50-100 μm, the length of the transition region accounts for 5%-20%, the breakdown voltage (BV) is ≥2000 V, and a silicon nitride passivation film (thickness 50-100 nm) is deposited on the surface, and the surface state density after passivation is ≤1×10¹¹ surface states per square centimeter per electron volt.

[0033] Preferably, the preparation method is applicable to the preparation of epitaxial wafers of Si substrate FRD devices, and the transition region steepness and breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

[0034] Preferably, the growth parameters of the transition zone and the flat zone are linked through a central control system to form a closed-loop feedback loop for the entire process, and the process data is stored in a cloud database in real time for yield analysis.

[0035] The beneficial effects of the present invention are: by dynamically adjusting the doping gas flow rate and controlling the epitaxial time, real-time monitoring of the resistivity, ensuring the resistivity matching between the transition zone and the flat zone, the overall quality of the epitaxial layer is improved, precise control makes the transition zone length and resistivity changes more stable, reducing performance fluctuations caused by resistivity mismatch, and real-time monitoring and dynamic adjustment of the doping gas flow rate ensure the resistivity consistency of different batches or the same wafer, reducing resistivity fluctuations, and improving the stability of key electrical parameters such as the breakdown voltage (BV) of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a flowchart of the solution from S100 to S130 in the present invention;

[0037] Figure 2 It is a flowchart of the solution from S200 to S230 in the present invention;

[0038] Figure 3 It is a flowchart of the solution from S300 to S330 in the present invention;

[0039] Figure 4 Flowchart of the solution from S400 to S430 in the present invention;

[0040] Figure 5 Flowchart of the solution from S500 to S530 in the present invention;

[0041] Figure 6 Schematic diagram of the change of resistivity with the thickness of the epitaxial layer in the present invention. DETAILED DESCRIPTION

[0042] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the specific implementation methods, structures, features and effects of the present invention are described in detail below in conjunction with the accompanying drawings and preferred embodiments.

[0043] like Figures 1 to 5 As shown, a method for preparing a transition zone of a thick film epitaxial gradient layer is characterized in that it includes: S100, performing surface pretreatment on a heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pretreated substrate to an epitaxial chamber, and forming a stable lattice interface by gradient heating; S300, in the transition zone growth stage, introducing epitaxial gas and doping gas, dynamically adjusting the doping gas flow rate and monitoring the resistivity in real time to make the resistivity of the transition zone match that of the flat zone; S400, switching to the flat zone growth stage, maintaining a constant doping gas flow rate and adjusting the epitaxial parameters until the total thickness meets the standard; S500, performing gradient cooling and post-processing on the substrate after the epitaxy is completed.

[0044] In this embodiment, in step S100, the heavily doped N-type silicon liner substrate is surface pretreated, and hydrofluoric acid polishing and high-temperature annealing are used to remove the oxide layer and residual particles and reduce interface defects, thereby improving the surface quality of the substrate. In step S200, the pretreated substrate is transferred to the epitaxial chamber, and a stable lattice interface is formed by precisely controlling the gradient temperature increase process (from 650°C to 1180°C at a rate of 10-15°C / s and maintained at this temperature for 180 seconds), laying the foundation for subsequent growth. In step S300, during the transition zone growth stage, epitaxial gas and doping gas are introduced. The process switches to the flat zone growth stage in step S400, maintains a constant doping gas flow rate, and adjusts the epitaxial parameters until the required total thickness is reached, further ensuring the quality of the epitaxial layer. Finally, in step S500, the substrate is subjected to a gradient cooling treatment after the epitaxy is completed to prevent oxidation of the epitaxial layer and reduce stress. The entire process optimizes the process flow and improves the yield and device performance by implementing closed-loop feedback throughout the entire process.

[0045] Specifically, the surface pretreatment in step S100 includes the following steps: S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate; S102, performing high-temperature annealing in a hydrogen atmosphere, the annealing temperature is 1100-1150°C, the hydrogen purity is ≥99.9999%, and the annealing time is 30-60min; S103, after annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

[0046] The surface pretreatment in step S100 is mainly aimed at significantly improving the quality of the substrate surface, and specifically includes the following three key technical steps: in step S101, hydrofluoric acid polishing technology is used to remove the oxide layer and residual particles on the substrate surface. This process can effectively remove surface impurities and ensure the purity of the subsequent growth environment; in step S102, the polished substrate is placed in a hydrogen atmosphere with a purity of ≥99.9999% for high-temperature annealing. The annealing temperature is controlled in the range of 1100-1150℃ and the duration is 30-60 minutes. In this way, the substrate lattice structure can be repaired, interface defects can be reduced and the crystallization quality can be improved; in step S103, after the above treatment, the surface roughness of the substrate can be reduced to ≤0.2nm, and the lattice defect density is reduced to ≤1×10³cm﹣², which not only greatly improves the smoothness and flatness of the substrate surface, but also significantly reduces potential lattice defects, laying a solid foundation for the subsequent high-quality growth of the epitaxial layer.

[0047] Specifically, the gradient heating in step S200 includes: S201, heating from 650°C to 1180°C at a rate of 10-15°C / s; S202, maintaining a constant temperature at 1180°C for 180 seconds, while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface; S203, maintaining the pressure in the chamber at 100-300 torr during the constant temperature stage to suppress impurity diffusion.

[0048] The gradient heating process in step S200 ensures the formation of a high-quality stable lattice interface on the substrate surface by precisely controlling the temperature and environmental conditions. Specifically, it includes the following key technical steps: In step S201, the substrate is rapidly heated from 650°C to 1180°C at a rate of 10-15°C / s. This rapid and uniform heating rate helps to avoid deformation or cracking of the substrate caused by thermal stress, while providing ideal initial conditions for subsequent growth; in step S202, the substrate is kept at a constant temperature of 1180°C for 180 seconds, and hydrogen with a purity of ≥99.9999% is introduced during this process. This step is not only It helps to further repair the lattice defects on the substrate surface and effectively reduce the introduction of impurities, thereby stabilizing the lattice interface; in step S203, the pressure in the chamber is maintained in the range of 100-300 Torr during the constant temperature stage. By precisely controlling the pressure in the chamber, the diffusion of impurities can be suppressed and the gas flow state can be optimized, ensuring the high purity and stability of the epitaxial layer growth environment. The entire gradient heating process is strictly controlled by process parameters to effectively improve and stabilize the surface quality of the substrate, lay the foundation for high-quality epitaxial growth in the subsequent transition zone and flat zone, and improve the electrical performance and reliability of the final product.

[0049] Specifically, if Figure 6 As shown, the method for dynamically adjusting the doping gas flow rate in step S300 is as follows: S301, the initial flow rate is set to 290 sccm, and then gradually decreases to a final flow rate of 33.3 sccm; S302, the film thickness is monitored in real time by a non-contact laser interferometer, and the flow curve is corrected in conjunction with the resistivity data to ensure that the transition zone length deviation is ≤±5%; S303, the resistivity gradient of the transition zone changes in the range of 10-3Ω·cm to 10-1Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

[0050] The dynamic adjustment of the dopant gas flow rate in step S300 ensures high-quality growth and consistent electrical properties in the transition zone through precise control and real-time monitoring. In step S301, the initial dopant gas flow rate is set to 290 sccm and exponentially decreases to a final flow rate of 33.3 sccm, with the exponential coefficient k ranging from 0.02 to 0.05 s-1. This dynamic adjustment method accurately controls the doping concentration distribution of the epitaxial layer, thereby achieving precise control of the resistivity of the transition zone. In step S302, a non-contact laser interferometer is used to monitor the film thickness in real time, and the data is linked to the resistivity to correct the flow rate curve. This not only avoids the contamination problems caused by traditional contact measurement, but also dynamically adjusts the dopant gas flow rate based on real-time feedback to ensure that the transition zone length deviation is controlled within ±5%. In step S303, the resistivity gradient of the transition zone is set to vary from 10-3 Ω·cm to 10-1 Ω·cm, and the deviation from the resistivity of the flat zone is controlled within 1%, ensuring a high degree of electrical parameter matching between the transition zone and the flat zone.

[0051] In this embodiment, the resistivity is relatively stable in the range of 0 to 80 microns, and there are two ranges of value changes between 80 and 110 microns. The resistivity drops sharply from 110 to 120 microns, and after exceeding 120 microns, the resistivity approaches a lower stable value of only about 0.006.

[0052] Specifically, the flat region growth stage in step S400 includes: S401, maintaining the doping gas flow rate at 33.3 sccm and the TCS flow rate at 7-10 g / min; S402, monitoring the resistivity in real time by the four-probe method, and adjusting the TCS flow rate so that the flat region resistivity fluctuation is ≤±0.3%; S403, injecting a high-concentration phosphine pulse of 500-800 sccm after each 5 μm epitaxial layer is grown, and the injection duration is 10-20 s to form a longitudinal gradient doping structure.

[0053] During the flat region growth phase in step S400, the high quality of the epitaxial layer and the consistency of the resistivity in the flat region are ensured by precisely controlling the doping gas flow rate and the TCS flow rate, combined with real-time monitoring and adjustment technology. In this embodiment, step S401 maintains the doping gas flow rate at 33.3 sccm, while setting the TCS flow rate between 7 and 10 g / min. This constant flow setting helps maintain a uniform doping concentration and film thickness growth rate. In step S402, as shown in Table 1 below, the resistivity is monitored in real time using the four-probe method, and the TCS flow rate is dynamically adjusted based on the measurement results, so that the resistivity fluctuation in the flat region is controlled within ±0.3%. This can effectively compensate for the resistivity changes caused by process fluctuations and ensure the high consistency of electrical parameters; in step S403, a high-concentration phosphine pulse (500-800 sccm, lasting 10-20 seconds) is injected after each 5μm epitaxial layer is grown to form a longitudinal gradient doping structure. This method not only optimizes the doping distribution, but also further improves the electrical performance and uniformity of the epitaxial layer. The entire flat area growth process is carried out through strict process parameter control, real-time monitoring and feedback adjustment, achieving a high degree of optimization of the epitaxial layer growth environment, significantly improving the quality of the flat area and the consistency of electrical performance, and ensuring the stability and reliability of the final product.

[0054] Table 1:

[0055]

[0056] Specifically, the gradient cooling in step S500 includes: S501, cooling to room temperature at a rate of 5-8°C / min; S502, introducing argon gas (purity ≥99.999%) during the cooling process to prevent oxidation of the epitaxial layer; S503, after cooling, verifying the steepness of the transition region through a spread resistance profile (SRP) test.

[0057] The gradient cooling process in step S500 ensures the quality and electrical properties of the epitaxial layer by precisely controlling the cooling rate and ambient gas, and verifies its effect through rigorous testing. In step S501, the substrate is cooled to room temperature at a rate of 5-8°C / min. This slow and uniform cooling rate can effectively prevent thermal stress and cracks caused by rapid cooling and maintain the structural integrity of the epitaxial layer. In step S502, argon gas with a purity of ≥99.999% is introduced during the cooling process to prevent oxidation of the epitaxial layer. This measure not only protects the surface of the epitaxial layer from oxidation, but also maintains The growth environment is kept highly pure. In step S503, after cooling is completed, the steepness of the transition zone is verified by the spread resistance profile (SRP) test, requiring Δρ / ΔL ≥ 15Ω•cm / μm and the interface lattice defect density ≤ 5×10²cm﹣². This step ensures that the electrical characteristics of the transition zone meet the design requirements and verifies the interface quality. The entire gradient cooling process effectively guarantees the integrity and electrical performance of the epitaxial layer through precise control of the cooling rate, the use of high-purity inert gas protection, and rigorous testing and verification, ensuring the high quality and reliability of the final product.

[0058] Furthermore, the heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation of <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

[0059] The heavily doped N-type silicon substrate is an 8-inch wafer with a specific crystal orientation. <100> The off-angle setting of 2-4° helps optimize lattice matching and defect control during epitaxial growth. Its resistivity is ≤0.0008Ω•cm, indicating that the substrate has a high doping concentration and is suitable for applications requiring low resistance. Furthermore, a superlattice buffer layer is placed on the back of the substrate. By introducing periodically arranged layers of different materials, the dislocation density is reduced, effectively reducing crystal defects within the substrate and improving overall material quality. This superlattice buffer layer not only enhances the mechanical stability of the substrate but also significantly improves the interface between the epitaxial layer and the substrate, thereby enhancing the electrical performance and reliability of the final product.

[0060] Furthermore, the total thickness of the epitaxial layer is 50-100μm, the length of the transition zone accounts for 5%-20%, the breakdown voltage (BV) is ≥2000V, and the thickness of the silicon nitride passivation film deposited on the surface is 50-100nm. After passivation, the surface state density is ≤1×10¹¹ surface states per square centimeter per electron volt.

[0061] The total thickness of the epitaxial layer in this invention is controlled between 50-100 μm, with the transition region length accounting for 5%-20%, ensuring an optimal balance between electrical performance and structural stability. To meet the requirements of high-voltage applications, the epitaxial layer achieves a breakdown voltage (BV) of 2000 V or greater. This high breakdown voltage enables stable device operation under high-voltage conditions. Furthermore, a 50-100 nm thick silicon nitride passivation film is deposited on the epitaxial layer surface. This passivation treatment not only effectively prevents oxidation and contamination of the epitaxial layer surface, but also significantly reduces the surface state density to ≤ 1×10¹¹cm²•eV-¹, thereby reducing the negative impact of interface states on device performance. The silicon nitride passivation film, deposited using techniques such as chemical vapor deposition (CVD), exhibits excellent insulation and stability, effectively protecting the epitaxial layer surface and improving the long-term reliability of the device. The entire process achieves highly optimized electrical performance and surface quality of the epitaxial layer through precise control of the epitaxial layer thickness, transition region length ratio, and surface passivation.

[0062] The preparation method is applicable to the preparation of epitaxial wafers of Si substrate FRD devices, and the transition region steepness and breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

[0063] The epitaxial wafer preparation of Si substrate FRD devices ensures that the breakdown voltage (BV) meets the specific relationship by precisely controlling the steepness of the transition region and the change in resistivity: Breakdown voltage (BV) ≥ (1450 to 1550) × The steepness of the transition zone is finely controlled by dynamically adjusting the doping gas flow rate and combining it with real-time monitoring of film thickness and resistivity, so that the transition zone length accounts for 5%-20%, ensuring the consistency and stability of electrical parameters. This fine control not only optimizes the resistivity gradient change in the transition zone, but also significantly improves the breakdown voltage (BV) to reach or exceed 2000V, thereby meeting the needs of high-voltage applications. In addition, the surface of the epitaxial layer is further protected by depositing a silicon nitride passivation film, reducing the surface state density and improving the reliability of the overall device. The entire process is highly optimized for the epitaxial layer growth environment through strict process parameter control, real-time monitoring and feedback adjustment, ensuring the ideal relationship between the steepness of the transition zone and the breakdown voltage, and improving the electrical performance and long-term stability of the FRD device.

[0064] It is worth mentioning that the preparation method is also applicable to the preparation of epitaxial wafers of SiC-based high-voltage IGBT devices. Based on the Si substrate FRD device, adaptive modifications are made according to the needs of SiC-based high-voltage IGBT devices to obtain SiC-based high-voltage IGBT devices.

[0065] Specifically, the growth parameters of the transition zone and the flat zone are linked through a central control system to form a closed-loop feedback loop for the entire process, and the process data is stored in a cloud database in real time for yield analysis.

[0066] The central control system realizes the linkage control of the growth parameters of the transition zone and the flat zone, forming a closed-loop feedback mechanism for the entire process, ensuring the high consistency and accuracy of the epitaxial wafer growth process. During the growth process, key parameters such as the doping gas flow rate, TCS flow rate and temperature are dynamically adjusted, and feedback adjustment is performed through real-time monitoring of data such as film thickness and resistivity, so that the electrical properties of the transition zone and the flat zone are optimally matched. The steepness and resistivity gradient changes in the transition zone are achieved by precisely controlling the doping gas flow rate, while the flat zone maintains resistivity consistency through constant doping gas flow rate and real-time adjustment of TCS flow rate. All data in the entire process are stored in real time in the cloud database to facilitate subsequent yield analysis and quality traceability. This full-process closed-loop feedback mechanism not only improves production efficiency, but also significantly improves product quality and consistency.

[0067] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as above in terms of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can, without departing from the scope of the technical solution of the present invention, make some changes or modifications to equivalent embodiments using the technical contents disclosed above. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A method for preparing a transition zone of a thick film epitaxial gradient layer, characterized in that: include: S100, performing surface pretreatment on the heavily doped N-type silicon substrate to reduce interface defects; S200, transferring the pre-treated substrate to an epitaxial chamber, and forming a stable lattice interface by gradient heating; S300: During the transition zone growth phase, epitaxial gas and doping gas are introduced, the doping gas flow rate is dynamically adjusted, and the resistivity is monitored in real time to match the resistivity of the transition zone with that of the flat zone. The doping gas flow rate is adjusted exponentially, with the exponential coefficient k ranging from 0.02 to 0.05 s-¹. S301: The initial flow rate is set at 290 sccm and is gradually reduced to a final flow rate of 33.3 sccm. S302: The film thickness is monitored in real time using a non-contact laser interferometer, and the flow rate curve is corrected in conjunction with the resistivity data to ensure that the transition zone length deviation is ≤±5%. S400: Switch to the flat region growth stage, maintain a constant doping gas flow rate and adjust the epitaxial parameters until the total thickness meets the standard; S401: Maintain the doping gas flow rate at 33.3 sccm and the TCS flow rate at 7-10 g / min; S402: Monitor the resistivity in real time using the four-probe method and adjust the TCS flow rate so that the flat region resistivity fluctuation is ≤±0.3%; S403: After each 5 μm epitaxial layer is grown, inject a high-concentration phosphine pulse of 500-800 sccm for 10-20 seconds to form a longitudinal gradient doping structure; S500. After the epitaxy is completed, the substrate is subjected to gradient cooling and post-processing. The gradient cooling in step S500 includes: S501. Cooling to room temperature at a rate of 5-8°C / min; S502. Introducing argon gas with a purity of ≥99.999% during the cooling process to prevent oxidation of the epitaxial layer; S503. After cooling, verifying the steepness of the transition zone through a spread resistance profile (SRP) test; the growth parameters of the transition zone and the flat zone are linked through a central control system to form a closed-loop feedback loop for the entire process, and the process data is stored in real time in a cloud database for yield analysis. After cooling, the steepness of the transition zone is verified through a spread resistance profile (SRP) test, requiring Δρ / ΔL ≥15Ω•cm / μm and the interface lattice defect density ≤5×10²cm﹣².

2. The method for preparing a thick film epitaxial gradient layer transition zone according to claim 1, wherein: The surface pretreatment in step S100 includes the following steps: S101, using hydrofluoric acid polishing to remove the oxide layer and residual particles on the surface of the substrate; S102, performing high temperature annealing in a hydrogen atmosphere, the annealing temperature is 1100-1150°C, the hydrogen purity is ≥99.9999%, and the annealing time is 30-60 minutes; S103. After annealing, the surface roughness of the substrate is ≤0.2nm, and the lattice defect density is ≤1×10³cm﹣².

3. The method for preparing a transition zone of a thick film epitaxial graded layer according to claim 1, wherein: The gradient heating in step S200 includes: S201, heating from 650°C to 1180°C at a rate of 10-15°C / s; S202, maintaining a constant temperature of 1180°C for 180 seconds while introducing hydrogen with a purity of ≥99.9999% to stabilize the lattice interface; S203, during the constant temperature stage, the pressure in the chamber is maintained at 100-300 Torr to suppress the diffusion of impurities.

4. The method for preparing a transition zone of a thick film epitaxial graded layer according to claim 1, wherein: The method of dynamically adjusting the doping gas flow rate in step S300 is: S303. The resistivity gradient of the transition zone ranges from 10-3Ω·cm to 10-1Ω·cm, and the resistivity deviation from the flat zone is ≤1%.

5. The method for preparing a transition zone of a thick film epitaxial graded layer according to claim 1, wherein: The heavily doped N-type silicon substrate is an 8-inch wafer with a crystal orientation of <100> The bias angle is 2-4°, the resistivity is ≤0.0008Ω·cm, and a superlattice buffer layer is provided on the back to reduce the dislocation density.

6. The method for preparing a transition zone of a thick film epitaxial graded layer according to claim 1, wherein: The total thickness of the epitaxial layer is 50-100 μm, the length of the transition zone accounts for 5%-20%, the breakdown voltage (BV) is ≥2000 V, and the thickness of the silicon nitride passivation film deposited on the surface is 50-100 nm. After passivation, the surface state density is ≤1×10¹¹ surface states per square centimeter per electron volt.

7. The method for preparing a transition zone of a thick film epitaxial graded layer according to claim 1, wherein: The preparation method is applicable to the preparation of epitaxial wafers of Si substrate FRD devices, and the transition region steepness and breakdown voltage (BV) satisfy the following relationship: breakdown voltage (BV) ≥ (1450 to 1550)·resistivity variation at different positions.

Images