Thin film inductor with high self-resonant frequency and manufacturing method thereof

Abstract

The invention relates to the technical field of inductance elements, in particular to a thin-film inductor with high self-resonant frequency and a manufacturing method of the thin-film inductor. A film inductor with high self-resonant frequency comprises an upper substrate insulating layer, a lower substrate insulating layer, a plurality of internal coil insulating layers, internal coils, conductive through holes, a first external electrode and a second external electrode, and the internal coil insulating layers are located between the upper substrate insulating layer and the lower substrate insulating layer. The internal coil comprises a plurality of coil layers, and the two ends of the first external electrode and the two ends of the second external electrode are connected with the lower substrate insulating layer and the upper substrate insulating layer respectively. According to the invention, the width of the coil is sequentially reduced in a stepped manner in the x direction from the lowest layer to the uppermost layer, so that the parasitic capacitance is reduced, and the self-resonant frequency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of inductor components, and in particular to a thin film inductor with a high self-resonance frequency and a manufacturing method thereof. Background Art

[0002] At present, in order to meet the requirements of large capacity and small size, the first thing that comes to mind when using inductors in circuits is to increase the height of the inductor. This will increase the width of the lead end, which will increase the current flow path, resulting in an increase in the capacitance of the inductor itself, ultimately limiting the reliability of the inductor in high-frequency situations and restricting the development of the electronics industry.

[0003] Any actual inductor is not an ideal inductor. In addition to the inductance characteristics, there is also distributed capacitance, which is sometimes called stray capacitance or parasitic capacitance. It has a great influence on the inductance and impedance at high frequencies. Distributed capacitance includes: coil capacitance, coil opposite electrode capacitance, coil to ground capacitance, etc. In this way, at a certain frequency, the inductor and distributed capacitance will form an oscillation loop and produce self-resonance. We call this frequency the self-resonant frequency (SRF) of the inductor. At SRF, the inductor behaves as a pure energy-consuming element without any energy storage effect. Inductors are usually required to be used under the condition that they have a certain inductance, so the self-resonant frequency is an important indicator, and it is generally required that the operating frequency is far before the SRF. As one of the important parameters, SRF determines the working characteristics of the inductor in the RF band. That is, in the frequency band below SRF, the actual characteristics of the inductor are characterized by inductance, while in the frequency band above SRF, its actual characteristics are characterized by capacitance. The closer the actual working frequency of an inductor is to SRF, the more unstable its inductance and Q value characteristics are, and the more likely it is to flip between inductance and capacitance. The relationship between the self-resonant frequency and the parasitic capacitance is: , where C is the size of the parasitic capacitance. If the size of the parasitic capacitance can be reduced, the self-resonant frequency of the inductor can be increased, thereby having a larger operating frequency range.

[0004] In view of the above problems, the present invention proposes an inductor with a high self-resonant frequency, which can significantly reduce the stray capacitance generated between adjacent coils of the coil pattern, thereby increasing the self-resonant frequency of the inductor, so that the actual operating frequency of the inductor is much lower than the SRF. Summary of the invention

[0005] In order to solve the above problems, an inductor is provided which can significantly reduce the stray capacitance generated between adjacent coils of a coil pattern, thereby increasing the self-resonant frequency of the inductor and making the actual operating frequency of the inductor far lower than the SRF. The present invention adopts the following technical solution.

[0006] A thin film inductor with a high self-resonant frequency comprises an upper substrate insulating layer, a lower substrate insulating layer, a plurality of internal coil insulating layers, an internal coil, a conductive through hole, a first external electrode and a second external electrode, wherein the internal coil insulating layer is located between the upper substrate insulating layer and the lower substrate insulating layer, the internal coil comprises a plurality of coil layers, and the first external electrode and the second external electrode are connected at both ends to the lower substrate insulating layer and the upper substrate insulating layer, respectively.

[0007] Preferably, the internal coil insulation layer includes a first internal coil insulation layer and a second internal coil insulation layer, the first internal coil insulation layer and the second internal coil insulation layer are alternately arranged, the coil layers are distributed on the first internal coil insulation layer, conductive through holes are arranged between adjacent coil layers, the conductive through holes are arranged on the second internal coil insulation layer, and the coil layers connect the internal coils into complete spiral coils through the conductive through holes.

[0008] Preferably, a first identification layer is provided above the upper substrate insulation layer, and a second identification layer is provided above the lower substrate insulation layer.

[0009] Preferably, the coil layers of the internal coil include a top coil layer, a middle coil layer and a bottom coil layer, the lead end of the top coil layer is connected to the second external electrode, and the lead end of the bottom coil layer is connected to the first external electrode.

[0010] Preferably, the intermediate coil layers are parallel to each other.

[0011] Preferably, the inner diameter of the coil of the coil layer decreases in a step-like manner from bottom to top.

[0012] Preferably, the coil layers include odd-numbered layers and even-numbered layers, and the coil enclosing area of ​​the odd-numbered layers is larger than the coil enclosing area of ​​the even-numbered layers.

[0013] Preferably, the electrode width of the coil layer is 20-45 microns. When the electrode width of the coil layer is 20-25μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.5. When the electrode width of the coil layer is 25-35μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.4. When the electrode width of the coil layer is 35-45μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.3.

[0014] Preferably, the thickness of the second internal coil insulation layer is 3-4 times that of the coil layer.

[0015] Preferably, the external electrodes are all L-shaped, and the first external electrode and the second external electrode are respectively connected to two ends of the internal coil.

[0016] Preferably, the first external electrode and the second external electrode are both cubes, and the first external electrode and the second external electrode are respectively connected to two ends of the internal coil.

[0017] A method for manufacturing a thin film inductor with a high self-resonance frequency comprises the following steps: Step 1: Make the first logo layer first; Step 2: making a plurality of lower substrate insulating layers, with the number of layers being at least 1 layer and at most 3 layers; Step 3: Make multiple lower substrate insulating layers with external electrodes. The lower substrate insulating layer with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step at least once.

[0018] Step 4: Install an internal coil insulation layer on the above step, carve out external electrodes on the internal insulation layer, and install the first layer of conductive materials required for the internal coil and external electrodes on the grooves.

[0019] Step 5: Install an internal coil insulation layer on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves.

[0020] Step 6: Repeat steps 4 and 5 according to a predetermined design, so that the number of coil layers is 7-14.

[0021] Step 7: Make multiple upper substrate insulating layers with external electrodes. The upper substrate insulating layer with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step at least once.

[0022] Step 8: Making multiple upper substrate insulating layers, with the number of layers being at least 1 and at most 3; Step 9: Make the second logo layer; Step 10: sintering the multilayer chip inductor at high temperature.

[0023] The beneficial effects of the present invention are as follows: 1. The present invention adopts a method in which the coil width decreases in a step-like manner from the bottom layer to the top layer in the x direction, thereby reducing parasitic capacitance and increasing the self-resonant frequency. 2. The present invention has the advantages of simple manufacturing, easy processing, and low cost. 3. The present invention has the advantage of stable structure. 4. The present invention adopts a staggered arrangement of coils so that the coil enclosed area of ​​the odd-numbered layers is larger than the coil enclosed area of ​​the even-numbered layers, thereby reducing parasitic capacitance. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a structural schematic diagram of Example 1; Figure 2 is a top view of Example 1; Figure 3 It is a front view of Example 1; Figure 4 It is an exploded view of Example 1; Figure 5 is a schematic diagram of the structure of Example 2, Figure 6 is a top view of Example 2; Figure 7 It is a front view of Example 2; Figure 8 It is a structural schematic diagram of Example 3; Fig. 9 It is a structural schematic diagram of Example 4; Fig.10 It is the Q value spectrum curve. DETAILED DESCRIPTION

[0025] The present invention will be further explained below in conjunction with specific implementation cases.

[0026] Example 1 A thin film inductor with a high self-resonant frequency comprises an upper substrate insulating layer 1, a lower substrate insulating layer 2, several layers of internal coil insulating layers 3, an internal coil 4, a conductive through hole 5, a first external electrode 6 and a second external electrode 7, wherein the internal coil insulating layer 3 is located between the upper substrate insulating layer 1 and the lower substrate insulating layer 2, the internal coil 4 comprises several coil layers 8, and the two ends of the first external electrode 6 and the second external electrode 7 are respectively connected to the lower substrate insulating layer 2 and the upper substrate insulating layer 1. The internal coil insulating layer 3 comprises a first internal coil insulating layer 31 and a second internal coil insulating layer 32, the first internal coil insulating layer 31 and the second internal coil insulating layer 32 are arranged alternately, the coil layers 8 are distributed on the first internal coil insulating layer 31, conductive through holes 5 are arranged between adjacent coil layers 8, the conductive through holes 5 are arranged on the second internal coil insulating layer 32, and the coil layers 8 connect the internal coil 4 to a complete spiral coil through the conductive through holes 5. A first identification layer 9 is arranged above the upper substrate insulating layer 1, and a second identification layer 10 is arranged above the lower substrate insulating layer 2. The coil layer 8 of the internal coil 4 includes a top coil layer 81, an intermediate coil layer 82 and a bottom coil layer 83. The lead end of the top coil layer 81 is connected to the second external electrode 7, and the lead end of the bottom coil layer 83 is connected to the first external electrode 6. The intermediate coil layers 82 are parallel to each other. The inner diameter of the coil of the coil layer 8 decreases in a step-like manner from bottom to top. The electrode width of the coil layer 8 is 25 microns, and the thickness-to-width ratio formed by the electrode thickness and the electrode width is 0.6. The thickness of the second internal coil insulation layer 32 is 4 times that of the coil layer 8. The first external electrode 6 and the second external electrode 7 are both L-shaped, and the first external electrode 6 and the second external electrode 7 are respectively connected to the two ends of the internal coil 4.

[0027] A method for manufacturing a thin film inductor with a high self-resonance frequency comprises the following steps: Step 1: First, make the first identification layer 9; Step 2: making a plurality of lower substrate insulating layers 2, with the number of layers being 2; Step 3: Make multiple lower substrate insulating layers 2 with external electrodes. The lower substrate insulating layer 2 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once.

[0028] Step 4: Install an internal coil insulation layer 3 on the above step, carve out external electrodes on the internal insulation layer, and install the first layer of internal coil 4 and the conductive material required for the external electrodes on the grooves.

[0029] Step 5: Install an internal coil insulation layer 3 on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves.

[0030] Step 6: Repeat steps 4 and 5 according to a predetermined design so that the number of coil layers 8 is 10.

[0031] Step 7: Make multiple upper substrate insulating layers 1 with external electrodes. The upper substrate insulating layer 1 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step 3 times.

[0032] Step 8: manufacturing a plurality of upper substrate insulating layers 1, with the number of layers being at least 1 layer and at most 3 layers; Step 9: Making a second identification layer 10; Step 10: sintering the multilayer chip inductor at high temperature.

[0033] The internal coil 4 of this embodiment is conical. As the manufacturing direction goes upward, the coils are stacked in a conical shape, and the inner diameters of two adjacent layers of coils gradually decrease, so that the surrounding area of ​​the coils gradually decreases. Figure 2 and Figure 3 As shown, the bottom coil lead-in end is connected to the first external electrode 6, the top lead-out end is connected to the second external electrode 7, and the adjacent layers are connected through conductive through holes 55. A fixed angle is formed between the conductive through holes 55 of each layer, and the angle of the fixed angle is 45°, which can ensure that the internal capacitance distribution is more stable, that is, according to the manufacturing direction, the coil of the upper layer as a whole will shrink inwards than the coil of the lower layer as a whole, including the x direction and the y direction. By analogy, a certain regular coil arrangement is formed between adjacent layers along the z direction. From the main view, the coil width decreases in a step-like manner from the bottom layer to the top layer in the x direction. This ensures that the present embodiment has low stray capacitance and high self-resonant frequency.

[0034] Example 2 A thin film inductor with a high self-resonant frequency comprises an upper substrate insulating layer 1, a lower substrate insulating layer 2, several layers of internal coil insulating layers 3, an internal coil 4, a conductive through hole 5, a first external electrode 6 and a second external electrode 7, wherein the internal coil insulating layer 3 is located between the upper substrate insulating layer 1 and the lower substrate insulating layer 2, the internal coil 4 comprises several coil layers 8, and the two ends of the first external electrode 6 and the second external electrode 7 are respectively connected to the lower substrate insulating layer 2 and the upper substrate insulating layer 1. The internal coil insulating layer 3 comprises a first internal coil insulating layer 31 and a second internal coil insulating layer 32, the first internal coil insulating layer 31 and the second internal coil insulating layer 32 are arranged alternately, the coil layers 8 are distributed on the first internal coil insulating layer 31, conductive through holes 5 are arranged between adjacent coil layers 8, the conductive through holes 5 are arranged on the second internal coil insulating layer 32, and the coil layers 8 connect the internal coil 4 to a complete spiral coil through the conductive through holes 5. A first identification layer 9 is arranged above the upper substrate insulating layer 1, and a second identification layer 10 is arranged above the lower substrate insulating layer 2. The coil layer 8 of the internal coil 4 includes a top coil layer 81, an intermediate coil layer 82 and a bottom coil layer 83. The lead end of the top coil layer 81 is connected to the second external electrode 7, and the lead end of the bottom coil layer 83 is connected to the first external electrode 6. The intermediate coil layers 82 are parallel to each other. The coil layer 8 includes an odd layer 11 and an even layer 12. The coil enclosing area of ​​the odd layer 11 is larger than the coil enclosing area of ​​the even layer 12. The electrode width of the coil layer 8 is 25 microns, and the thickness-to-width ratio formed by the electrode thickness and the electrode width is 0.6. The thickness of the second internal coil insulation layer 32 is 4 times that of the coil layer 8. The first external electrode 6 and the second external electrode 7 are both L-shaped, and the first external electrode 6 and the second external electrode 7 are respectively connected to the two ends of the internal coil 4.

[0035] A method for manufacturing a thin film inductor with a high self-resonance frequency comprises the following steps: Step 1: First, make the first identification layer 9; Step 2: making a plurality of lower substrate insulating layers 2, with the number of layers being 2; Step 3: Make multiple lower substrate insulating layers 2 with external electrodes. The lower substrate insulating layer 2 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once.

[0036] Step 4: Install an internal coil insulation layer 3 on the above step, carve out external electrodes on the internal insulation layer, and install the first layer of internal coil 4 and the conductive material required for the external electrodes on the grooves.

[0037] Step 5: Install an internal coil insulation layer 3 on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves.

[0038] Step 6: Repeat steps 4 and 5 according to a predetermined design so that the number of coil layers 8 is 10.

[0039] Step 7: Make multiple upper substrate insulating layers 1 with external electrodes. The upper substrate insulating layer 1 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step 3 times.

[0040] Step 8: manufacturing a plurality of upper substrate insulating layers 1, with the number of layers being at least 1 layer and at most 3 layers; Step 9: Making a second identification layer 10; Step 10: sintering the multilayer chip inductor at high temperature.

[0041] The internal coil 4 is staggered. There is a misalignment between the two adjacent layers of coils in the manufacturing direction. That is, the coil width of the odd-numbered layer of coils in the x direction is greater than the coil width of the even-numbered layer of coils in the x direction, and the same is true in the y direction. This makes the coil enclosing area of ​​the odd-numbered layer greater than the coil enclosing area of ​​the even-numbered layer, thereby reducing parasitic capacitance.

[0042] Example 3 A thin film inductor with a high self-resonant frequency comprises an upper substrate insulating layer 1, a lower substrate insulating layer 2, several layers of internal coil insulating layers 3, an internal coil 4, a conductive through hole 5, a first external electrode 6 and a second external electrode 7, wherein the internal coil insulating layer 3 is located between the upper substrate insulating layer 1 and the lower substrate insulating layer 2, the internal coil 4 comprises several coil layers 8, and the two ends of the first external electrode 6 and the second external electrode 7 are respectively connected to the lower substrate insulating layer 2 and the upper substrate insulating layer 1. The internal coil insulating layer 3 comprises a first internal coil insulating layer 31 and a second internal coil insulating layer 32, the first internal coil insulating layer 31 and the second internal coil insulating layer 32 are arranged alternately, the coil layers 8 are distributed on the first internal coil insulating layer 31, conductive through holes 5 are arranged between adjacent coil layers 8, the conductive through holes 5 are arranged on the second internal coil insulating layer 32, and the coil layers 8 connect the internal coil 4 to a complete spiral coil through the conductive through holes 5. A first identification layer 9 is arranged above the upper substrate insulating layer 1, and a second identification layer 10 is arranged above the lower substrate insulating layer 2. The coil layer 8 of the internal coil 4 includes a top coil layer 81, an intermediate coil layer 82 and a bottom coil layer 83. The lead end of the top coil layer 81 is connected to the second external electrode 7, and the lead end of the bottom coil layer 83 is connected to the first external electrode 6. The intermediate coil layers 82 are parallel to each other. The inner diameter of the coil of the coil layer 8 decreases in a step-like manner from bottom to top. The electrode width of the coil layer 8 is 25 microns, and the thickness-to-width ratio formed by the electrode thickness and the electrode width is 0.6. The thickness of the second internal coil insulation layer 32 is 4 times that of the coil layer 8. The first external electrode 6 and the second external electrode 7 are both cubes, and the first external electrode 6 and the second external electrode 7 are respectively connected to the two ends of the internal coil 4.

[0043] A method for manufacturing a thin film inductor with a high self-resonance frequency comprises the following steps: Step 1: First, make the first identification layer 9; Step 2: making a plurality of lower substrate insulating layers 2, with the number of layers being 2; Step 3: Make multiple lower substrate insulating layers 2 with external electrodes. The lower substrate insulating layer 2 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once.

[0044] Step 4: Install an internal coil insulation layer 3 on the above step, carve out external electrodes on the internal insulation layer, and install the first layer of internal coil 4 and the conductive material required for the external electrodes on the grooves.

[0045] Step 5: Install an internal coil insulation layer 3 on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves.

[0046] Step 6: Repeat steps 4 and 5 according to a predetermined design so that the number of coil layers 8 is 10.

[0047] Step 7: Make multiple upper substrate insulating layers 1 with external electrodes. The upper substrate insulating layer 1 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step 3 times.

[0048] Step 8: manufacturing a plurality of upper substrate insulating layers 1, with the number of layers being at least 1 layer and at most 3 layers; Step 9: Making a second identification layer 10; Step 10: sintering the multilayer chip inductor at high temperature.

[0049] The internal coil 44 of this embodiment is conical. As the manufacturing direction goes upward, the coils are stacked in a conical shape, and the inner diameters of two adjacent layers of coils gradually decrease, so that the surrounding area of ​​the coils gradually decreases. Figure 2 and Figure 3 As shown, the bottom coil lead-in end is connected to the first external electrode 6, the top lead-out end is connected to the second external electrode 7, and the adjacent layers are connected through conductive through holes 55. A fixed angle is formed between the conductive through holes 55 of each layer, and the angle of the fixed angle is 45°, which can ensure that the internal capacitance distribution is more stable, that is, according to the manufacturing direction, the coil of the upper layer as a whole will shrink inwards than the coil of the lower layer as a whole, including the x direction and the y direction. By analogy, a certain regular coil arrangement is formed between adjacent layers along the z direction. From the main view, the coil width decreases in a step-like manner from the bottom layer to the top layer in the x direction. This ensures that the present embodiment has low stray capacitance and high self-resonant frequency.

[0050] Example 4 A thin film inductor with a high self-resonant frequency comprises an upper substrate insulating layer 1, a lower substrate insulating layer 2, several layers of internal coil insulating layers 3, an internal coil 4, a conductive through hole 5, a first external electrode 6 and a second external electrode 7, wherein the internal coil insulating layer 3 is located between the upper substrate insulating layer 1 and the lower substrate insulating layer 2, the internal coil 4 comprises several coil layers 8, and the two ends of the first external electrode 6 and the second external electrode 7 are respectively connected to the lower substrate insulating layer 2 and the upper substrate insulating layer 1. The internal coil insulating layer 3 comprises a first internal coil insulating layer 31 and a second internal coil insulating layer 32, the first internal coil insulating layer 31 and the second internal coil insulating layer 32 are arranged alternately, the coil layers 8 are distributed on the first internal coil insulating layer 31, conductive through holes 5 are arranged between adjacent coil layers 8, the conductive through holes 5 are arranged on the second internal coil insulating layer 32, and the coil layers 8 connect the internal coil 4 to a complete spiral coil through the conductive through holes 5. A first identification layer 9 is arranged above the upper substrate insulating layer 1, and a second identification layer 10 is arranged above the lower substrate insulating layer 2. The coil layer 8 of the internal coil 4 includes a top coil layer 81, an intermediate coil layer 82 and a bottom coil layer 83. The lead end of the top coil layer 81 is connected to the second external electrode 7, and the lead end of the bottom coil layer 83 is connected to the first external electrode 6. The intermediate coil layers 82 are parallel to each other. The coil layer 8 includes an odd layer 11 and an even layer 12. The coil enclosing area of ​​the odd layer is larger than the coil enclosing area of ​​the even layer. The electrode width of the coil layer 8 is 25 microns, and the thickness-to-width ratio formed by the electrode thickness and the electrode width is 0.6. The thickness of the second internal coil insulation layer 32 is 4 times that of the coil layer 8. The first external electrode 6 and the second external electrode 7 are both cubes, and the first external electrode 6 and the second external electrode 7 are respectively connected to the two ends of the internal coil 4.

[0051] A method for manufacturing a thin film inductor with a high self-resonance frequency comprises the following steps: Step 1: First, make the first identification layer 9; Step 2: making a plurality of lower substrate insulating layers 2, with the number of layers being 2; Step 3: Make multiple lower substrate insulating layers 2 with external electrodes. The lower substrate insulating layer 2 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once.

[0052] Step 4: Install an internal coil insulation layer 3 on the above step, carve out external electrodes on the internal insulation layer, and install the first layer of internal coil 4 and the conductive material required for the external electrodes on the grooves.

[0053] Step 5: Install an internal coil insulation layer 3 on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves.

[0054] Step 6: Repeat steps 4 and 5 according to a predetermined design so that the number of coil layers 8 is 10.

[0055] Step 7: Make multiple upper substrate insulating layers 1 with external electrodes. The upper substrate insulating layer 1 with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. Repeat this step 3 times.

[0056] Step 8: manufacturing a plurality of upper substrate insulating layers 1, with the number of layers being at least 1 layer and at most 3 layers; Step 9: Making a second identification layer 10; Step 10: sintering the multilayer chip inductor at high temperature.

[0057] The internal coil 4 is staggered. There is a misalignment between the two adjacent layers of coils in the manufacturing direction. That is, the coil width of the odd-numbered layer of coils in the x direction is greater than the coil width of the even-numbered layer of coils in the x direction, and the same is true in the y direction. This makes the coil enclosing area of ​​the odd-numbered layer greater than the coil enclosing area of ​​the even-numbered layer, thereby reducing parasitic capacitance.

Claims

1. A thin film inductor with a high self-resonant frequency, characterized in that: It includes an upper substrate insulating layer, a lower substrate insulating layer, several layers of internal coil insulating layers, an internal coil, a conductive through hole, a first external electrode and a second external electrode. The internal coil insulating layer is located between the upper substrate insulating layer and the lower substrate insulating layer. The internal coil includes several coil layers. The two ends of the first external electrode and the second external electrode are respectively connected to the lower substrate insulating layer and the upper substrate insulating layer.

2. The thin film inductor with high self-resonance frequency according to claim 1, characterized in that: The internal coil insulation layer includes a first internal coil insulation layer and a second internal coil insulation layer, the first internal coil insulation layer and the second internal coil insulation layer are alternately arranged, the coil layer is distributed on the first internal coil insulation layer, conductive through holes are arranged between adjacent coil layers, the conductive through holes are arranged on the second internal coil insulation layer, and the coil layer connects the internal coil into a complete spiral coil through the conductive through holes.

3. The thin film inductor with high self-resonance frequency according to claim 1, characterized in that: A first identification layer is arranged above the upper substrate insulation layer, and a second identification layer is arranged above the lower substrate insulation layer.

4. The thin film inductor with high self-resonance frequency according to claim 2, characterized in that: The coil layers of the internal coil include a top coil layer, a middle coil layer and a bottom coil layer. The lead-out end of the top coil layer is connected to the second external electrode, and the lead-out end of the bottom coil layer is connected to the first external electrode.

5. The thin film inductor with high self-resonance frequency according to claim 4, characterized in that: The intermediate coil layers are parallel to each other.

6. The thin film inductor with high self-resonance frequency according to claim 5, characterized in that: The inner diameter of the coil of the coil layer decreases in a step-like manner from bottom to top.

7. The thin film inductor with high self-resonance frequency according to claim 5, characterized in that: The coil layers include odd-numbered layers and even-numbered layers, and the coil enclosing area of ​​the odd-numbered layers is larger than the coil enclosing area of ​​the even-numbered layers.

8. A thin film inductor with high self-resonance frequency according to claim 6 or 7, characterized in that: The electrode width of the coil layer is 20-45 microns. When the electrode width of the coil layer is 20-25μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.

5. When the electrode width of the coil layer is 25-35μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.

4. When the electrode width of the coil layer is 35-45μm, the thickness-to-width ratio formed by the electrode thickness and the electrode width is at least 0.

3.

9. The thin film inductor with high self-resonance frequency according to claim 8, characterized in that: The thickness of the second inner coil insulation layer is 3-4 times that of the coil layer.

10. A method for manufacturing a multilayer chip inductor component according to any one of claims 1 to 9, characterized in that: The following steps are involved: Step 1: Make the first logo layer first; Step 2: making a plurality of lower substrate insulating layers, with the number of layers being at least 1 layer and at most 3 layers; Step 3: making a plurality of lower substrate insulating layers with external electrodes. The lower substrate insulating layer with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once. Step 4: Install an internal coil insulation layer on the above step, carve out external electrodes on the internal insulation layer, and install the conductive materials required for the first layer of internal coil and external electrodes on the grooves; Step 5: Install an internal coil insulation layer on the above step 4, carve grooves for external electrodes and internal connection holes on the internal insulation layer, and install conductive materials required for connection holes and external electrodes on the grooves; Step 6: Repeat steps 4 and 5 according to the predetermined design, so that the number of coil layers is 7-14; Step 7: making multiple upper substrate insulating layers with external electrodes. The upper substrate insulating layer with external electrodes should first make an insulating layer, carve external electrode grooves on the insulating layer, and install the conductive material required for the external electrodes on the grooves. This step is repeated at least once. Step 8: Making multiple upper substrate insulating layers, with the number of layers being at least 1 and at most 3; Step 9: Make the second logo layer; Step 10: sintering the multilayer chip inductor at high temperature.

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