Electronic packaging structure

Abstract

The invention provides an electronic packaging structure. The electronic packaging structure comprises a first circuit structure, a second circuit structure and an electronic component, the electronic component is located between the first circuit structure and the second circuit structure. At least one of the first circuit structure and the second circuit structure (such as the second circuit structure) is provided with a cavity. The electronic component is embedded in the cavity and can be encapsulated between the first circuit structure and the second circuit structure.

Description

Technical Field

[0001] The invention relates to an electronic packaging structure, in particular to an electronic packaging structure with electronic components embedded between a plurality of circuit structures. Background Art

[0002] With the advancement of technology, the functions of electronic products are becoming more and more abundant, and they are increasingly dependent on electronic mobile devices. In response to the demand for miniaturization and lightweight of electronic products, the integration of antenna structure and chip packaging structure is conducive to the miniaturization and lightweight of electronic products. Generally speaking, for the current chip packaging structure with an antenna structure, the chip is usually set on a circuit substrate, and a film sealing material is covered on the chip to form a chip packaging structure. The antenna structure is set on the chip packaging structure, and the antenna structure is electrically connected to the circuit substrate through a conductive column or conductive ball that penetrates the film sealing material in the chip packaging structure. However, in the above-mentioned packaging structure, the electronic components may be more difficult to be well protected; and / or the above-mentioned packaging structure may not be able to effectively reduce or prevent the radio frequency signal from being diverged during the transmission process, and has a larger volume. Summary of the invention

[0003] The invention provides an electronic packaging structure, wherein the electronic components included in the electronic packaging structure can be well protected.

[0004] An electronic packaging structure of the present invention includes a first circuit structure, a second circuit structure and a first electronic component. The first electronic component is located between the first circuit structure and the second circuit structure. At least one of the first circuit structure or the second circuit structure (such as the second circuit structure) has a cavity. The first electronic component is embedded in the cavity and can be encapsulated between the first circuit structure and the second circuit structure.

[0005] Based on the above, in the electronic packaging structure, since the electronic component (such as the first electronic component) is located between the first circuit structure and the second circuit structure, and at least part of the electronic component can be located in the cavity of a certain circuit structure, the electronic component can be better protected, and the possibility of damage or destruction of the electronic component can be reduced, thereby improving the quality of the electronic packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figures 1A to 1D A partial cross-sectional schematic diagram of a partial manufacturing method of an electronic packaging structure according to a first embodiment of the present invention;

[0007] Figure 2 is a partial cross-sectional schematic diagram of an electronic packaging structure according to a second embodiment of the present invention;

[0008] Figure 3FIG. 4 is a partial cross-sectional schematic diagram of an electronic packaging structure according to a third embodiment of the present invention.

[0009] Description of Reference Numerals

[0010] 100, 200, 300: electronic packaging structure

[0011] 110, 301: first circuit structure

[0012] 111: first core layer

[0013] 112: first upper insulating layer

[0014] 113: first lower insulating layer

[0015] 114: second upper insulating layer

[0016] 115, 142: Redistribution layer

[0017] 116: second lower insulating layer

[0018] 120: Coaxial conductive through hole

[0019] 121: Outer conductive layer

[0020] 122: Inner conductive layer

[0021] 123: Second dielectric layer

[0022] 124: first dielectric layer

[0023] 125: First upper circuit layer

[0024] 126: first lower circuit layer

[0025] 127: Second upper circuit layer

[0026] 128: Second lower circuit layer

[0027] 129, 161: Opening

[0028] 130, 170: Electronic components

[0029] 131: Conductive pad

[0030] 132: Conductive connector

[0031] 140: Second circuit structure

[0032] 141: Second core layer

[0033] 143: Conductive via

[0034] 144: third upper insulating layer

[0035] 145: third lower insulating layer

[0036] 150: Cavity

[0037] 151: Thermal interface materials

[0038] 152: Dielectric materials

[0039] 162, 382: Conductive adhesive

[0040] 171, 262: Conductive terminals

[0041] 301a: First substructure

[0042] 301b: Second substructure

[0043] 381:Filling glue

[0044] AN1, AN2, AN3, AN4: Antenna

[0045] SH1, SH2, SH3, SH4: Shielding lines

[0046] CV1, CV2: vias DETAILED DESCRIPTION

[0047] The following examples are listed and described in detail with the accompanying drawings, but the examples provided are not intended to limit the scope of the present invention. In addition, the drawings are for illustration purposes only and are not drawn to their original size.

[0048] In addition, the terms "including", "having", etc. used in this document are all open terms, which means "including but not limited to".

[0049] It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various components, parts, regions, layers and / or parts, these components, parts, regions, and / or parts should not be limited by these terms. These terms are only used to distinguish one component, part, region, layer or part from another component, part, region, layer or part. Therefore, the "first component", "component", "region", "layer" or "part" discussed below may be referred to as a second component, part, region, layer or part without departing from the teachings of this article.

[0050] The directional terms mentioned herein, such as "upper", "lower", "top", "bottom", etc., are only used to refer to the directions of the drawings. Therefore, the directional terms used are used for illustration, not for limiting the present invention.

[0051] In the drawings, the drawings illustrate the general characteristics of the methods, structures and / or materials used in a particular embodiment. However, these drawings should not be interpreted as defining or limiting the scope or nature covered by these embodiments. For example, for clarity, the relative size, thickness and position of each film layer, region and / or structure may be reduced or enlarged.

[0052] In the following embodiments, the same or similar components will be denoted by the same or similar reference numerals, and their redundant description will be omitted. In addition, the features in different embodiments can be combined with each other without conflict, and simple equivalent changes and modifications made according to the scope of this specification or claims are still within the scope of this patent.

[0053] Figures 1A to 1D It is a partial cross-sectional schematic diagram of a partial manufacturing method of an electronic packaging structure according to a first embodiment of the present invention.

[0054] <First Circuit Structure>

[0055] Figure 1A FIG. 4 is a schematic diagram of a first circuit structure according to a first embodiment of the present invention.

[0056] Please refer to Figure 1A The first circuit structure 110 may include a first core layer 111. The first core layer 111 may include a polymer glass fiber composite substrate, a glass substrate, an insulating silicon substrate, a polyimide (PI) film or a glass fiber composite substrate, but the present invention is not limited thereto.

[0057] The first core layer 111 may include at least one coaxial conductive via 120. In one embodiment, the coaxial conductive via 120 may include an outer conductive layer 121, a first dielectric layer 124, and an inner conductive layer 122. The first dielectric layer 124 is located between the outer conductive layer 121 and the inner conductive layer 122. The outer conductive layer 121 at least surrounds a portion of the inner conductive layer 122. The outer conductive layer 121 and the inner conductive layer 122 are electrically separated from each other. In one embodiment, the coaxial conductive via 120 may also include a second dielectric layer 123. The inner conductive layer 122 may be located between the first dielectric layer 124 and the second dielectric layer 123. In one embodiment, the first core layer 111 may also include other conductive vias (not shown), and the other conductive vias may include solid metal columns or hollow metal columns with insulating materials filled in the hollow metal columns, but the present invention is not limited thereto.

[0058] In one embodiment, the first circuit structure 110 may include a first core layer 111, corresponding circuit layers and corresponding insulation layers located on the upper and lower sides of the first core layer 111. In one embodiment, the first circuit structure 110 may further include a redistribution layer 115. The coaxial conductive via 120 penetrates the first core layer 111 to electrically connect the circuits in the aforementioned circuit layer and / or the circuits in the redistribution layer 115.

[0059] In one embodiment, the first circuit structure 110 may include a second upper insulating layer 114, a second upper wiring layer 127, a first upper insulating layer 112, a first upper wiring layer 125, a first lower wiring layer 126, a first lower insulating layer 113, a redistribution layer 115, a second lower wiring layer 128, and a second lower insulating layer 116. The inner conductive layer 122 of the coaxial conductive via 120 is electrically connected to the corresponding circuit in the second upper wiring layer 127 and the corresponding circuit in the second lower wiring layer 128. The outer conductive layer 121 of the coaxial conductive via 120 is electrically connected to the corresponding circuit in the first upper wiring layer 125 and the corresponding circuit in the first lower wiring layer 126. The first upper insulating layer 112 is disposed between the first upper wiring layer 125 and the second upper wiring layer 127, and has a conductive via CV1 disposed in the first upper insulating layer 112 to electrically connect the corresponding circuit in the first upper wiring layer 125 with the corresponding circuit in the second upper wiring layer 127. The first lower insulating layer 113 is disposed between the first lower circuit layer 126 and the second lower circuit layer 128, and has a via hole CV2 disposed in the first lower insulating layer 113 to electrically connect the corresponding circuit in the first lower circuit layer 126 with the corresponding circuit in the second lower circuit layer 128. When the via hole CV2 is electrically connected to the second lower circuit layer 128, the electrical signal can be connected to the redistribution layer 115.

[0060] In one embodiment, the second upper wiring layer 127 , the first upper wiring layer 125 , the first lower wiring layer 126 , the redistribution layer 115 , and the second lower wiring layer 128 may include conductive materials such as copper, titanium, tungsten, aluminum, combinations thereof, or the like.

[0061] In one embodiment, the insulating layer (not shown) may cover the corresponding circuit layer, such as the insulating layer covering the first upper circuit layer 125 and the insulating layer covering the first lower circuit layer 126. In one embodiment, the insulating layer (not shown) may include Bismaleimide Triazine resin (BT resin), Epoxy Glass Fiber Unclad Laminate (such as FR4), polyimide coating layer or polyimide dry film.

[0062] In one embodiment, the outermost insulating layer (e.g., the second upper insulating layer 114 and / or the second lower insulating layer 116) may be referred to as a solder mask to reduce or minimize oxidation and to avoid the formation of solder bridges between closely spaced pads. The outermost insulating layer (e.g., the second upper insulating layer 114 and / or the second lower insulating layer 116) may include epoxy resin.

[0063] In one embodiment, the bottom surface of the first circuit structure 110 may include at least one opening 129 , and the opening 129 exposes a portion of the corresponding circuit in the second lower circuit layer 128 .

[0064] Please understand, Figure 1A The insulating layer, circuit layer and conductive vias of the first circuit structure 110 are only schematically shown, but are not used to limit the present invention. The number, position and pattern design (such as wiring design) of the insulating layer, circuit layer and conductive vias can be adjusted according to actual needs.

[0065] <Integration of the First Circuit Structure and Electronic Components>

[0066] Figure 1B FIG. 4 is a schematic diagram of integration of a first circuit structure and an electronic component according to a first embodiment of the present invention.

[0067] Please refer to Figure 1B At least one electronic component 130 may be disposed on the bottom surface of the first circuit structure 110 (eg, below in the drawing), and the electronic component 130 may be electrically connected to the corresponding circuit in the second lower circuit layer 128 exposed by the opening 129 .

[0068] In one embodiment, the electronic component 130 can be electrically connected to the corresponding circuit in the second lower circuit layer 128 through the corresponding conductive pad 131 and the conductive connector 132. The conductive connector 132 can include a conductive column (such as a copper column), solder (such as a solder ball), a conductive glue (such as silver paste or solder paste) or other suitable conductive members.

[0069] In one embodiment, the electronic component 130 may be electrically connected to the corresponding circuit in the second lower circuit layer 128 by flip-chip bonding.

[0070] In one embodiment, the electronic component 130 may include a chip. In one embodiment, the aforementioned chip may include a communication chip or a chip with a communication module. In one embodiment, the electronic component 130 is suitable for receiving and / or transmitting signals through a corresponding antenna. In one embodiment, the electronic component 130 may be a packaged component (e.g., a system on chip (SoC)) that integrates several active components.

[0071] In one embodiment, the electronic component 130 may include a passive component, such as a resistor, a capacitor, an inductor, and / or a fuse.

[0072] <Second Circuit Structure>

[0073] Figure 1C FIG. 4 is a schematic diagram of a second circuit structure according to the first embodiment of the present invention.

[0074] Please refer to Figure 1C The second circuit structure 140 may include a second core layer 141. The second core layer 141 may include a metal substrate including copper, aluminum, iron, steel alloy, a combination thereof, or a similar conductive material, but the present invention is not limited thereto.

[0075] In one embodiment, the second circuit structure 140 may include a second core layer 141, corresponding circuit layers and corresponding insulation layers located on the upper and lower sides of the second core layer 141, and an outermost third upper insulation layer 144 and a third lower insulation layer 145. In one embodiment, the circuit structure 110 may further include a redistribution layer 142. In one embodiment, the second circuit structure 140 may include at least one conductive via 143. The conductive via 143 penetrates the second core layer 141 to electrically connect the corresponding circuit in the circuit layer and the corresponding circuit in the redistribution layer 142.

[0076] In a possible embodiment, the conductive via 143 may be a coaxial conductive via, and the structure of the coaxial conductive via may be the same as or similar to the structure of the aforementioned coaxial conductive via 120 .

[0077] In a possible embodiment, the conductive via 143 may also be a conductive via including a solid metal column or a hollow metal column with an insulating material filled in the hollow metal column, but the present invention is not limited thereto.

[0078] In one embodiment, the redistribution layer 142 and the corresponding circuit layers located on the upper side and the lower side of the second core layer 141 may include a conductive material, such as copper, titanium, tungsten, aluminum, a combination thereof, or the like.

[0079] In one embodiment, the corresponding insulating layers on the upper and lower sides of the second core layer 141 may cover the corresponding circuit layers. In one embodiment, the insulating layers may include bismaleimide triazine resin (BT resin), epoxy glass fiber unclad laminate (such as FR4), polyimide coating or polyimide dry film.

[0080] In one embodiment, the third upper insulating layer 144 and the third lower insulating layer 145 may be referred to as a solder mask to reduce or mitigate oxidation and avoid the formation of solder bridges between closely spaced pads. The outermost third upper insulating layer 144 and the third lower insulating layer 145 may include epoxy resin.

[0081] In one embodiment, a cavity 150 may be included on the top surface of the second circuit structure 140. The cavity 150 is a blind hole and does not penetrate the second core layer 141.

[0082] In one embodiment, the top surface of the second circuit structure 140 may further include at least one opening 161, and the opening 129 exposes a portion of the corresponding circuit in the circuit layer. In one embodiment, the bottom surface of the second circuit structure 140 may include at least one opening (not shown), and the opening exposes a portion of the corresponding circuit in the redistribution layer 142.

[0083] Please understand, Figure 1C The insulating layer, the circuit layer and the conductive vias of the second circuit structure 140 are only schematically shown, but are not used to limit the present invention. The number, position and pattern design of the insulating layer, the circuit layer and the conductive vias can be adjusted according to actual needs.

[0084] <Integration of the Second Circuit Structure and Electronic Components>

[0085] Figure 1D FIG. 1 is a schematic diagram of an electronic packaging structure according to a first embodiment of the present invention.

[0086] Please refer to Figure 1D At least one electronic component 170 may be disposed below the bottom surface of the second circuit structure 140 , and the electronic component 170 may be electrically connected to a corresponding circuit in the circuit layer exposed by the opening (not shown).

[0087] In one embodiment, the electronic component 170 may be electrically connected to the corresponding circuit in the circuit layer through a conductive connector (not shown). The conductive connector may include a conductive column (e.g., a copper column), solder (e.g., a solder ball), a conductive adhesive (e.g., silver paste or solder paste), or other suitable conductive components.

[0088] In one embodiment, the electronic component 170 may include a chip. In one embodiment, the aforementioned chip may include a communication chip or a chip with a communication module. In one embodiment, the electronic component 170 is suitable for receiving and / or transmitting signals through a corresponding antenna. In one embodiment, the electronic component 170 may be a packaged component (e.g., a system on chip (SoC)) that integrates several active components.

[0089] In one embodiment, the electronic component 170 may include a passive component, such as a resistor, a capacitor, an inductor, and / or a fuse.

[0090] <Electronic packaging structure>

[0091] Please refer to Figure 1D , an electronic package structure 100 is provided. The electronic package structure 100 may be a package structure that combines a first circuit structure 110 with a second circuit structure 140, but the present invention is not limited thereto.

[0092] The electronic component 130 may be disposed in the cavity 150. In one embodiment, since there may be a gap between the electronic component 130 and the cavity 150, a thermal interface material 151 may be filled in the gap. The thermal interface material 151 may fill a portion of the gap between the electronic component 130 and the bottom surface of the cavity 150. In addition, in one embodiment using a metal substrate as the second core layer 141, the heat conduction efficiency may be improved and the interface thermal resistance may be reduced.

[0093] In one embodiment, the thermal interface material 151 may include a thermally conductive adhesive, a thermally conductive paste, a thermally conductive adhesive film, or a thermally conductive adhesive tape having a thermally conductive material (eg, thermally conductive particles), but the present invention is not limited thereto.

[0094] In one embodiment, after the gap between the electronic component 130 and the bottom surface of the cavity 150 is filled with the thermal interface material 151, the gap may be filled with a dielectric material 152. The dielectric material 152 may fill the gap between the electronic component 130 and the cavity 150 to avoid the possibility of a short circuit.

[0095] In one embodiment, the dielectric material 152 may include a resin material, but the invention is not limited thereto.

[0096] In one embodiment, conductive glue 162 is applied to at least one opening 129 in the first circuit structure 110 and at least one opening 161 in the second circuit structure 140. The conductive glue 162 is used to bond the first circuit structure 110 and the second circuit structure 140 and electrically connect the corresponding circuits.

[0097] In one embodiment, the conductive adhesive 162 may include metal alloy, solder paste, silver adhesive or other suitable conductive adhesives, but the invention is not limited thereto.

[0098] In one embodiment, at least one opening (not shown) on the bottom surface of the second circuit structure 140 may be provided with a conductive terminal 171 . The conductive terminal 171 is electrically connected to a corresponding circuit in the redistribution layer 142 .

[0099] Please refer to Figure 1D , the electronic packaging structure 100 includes a first circuit structure 110, a second circuit structure 140 and a first electronic component 130. The first electronic component 130 is located between the first circuit structure 110 and the second circuit structure 140. At least one of the first circuit structure 110 or the second circuit structure 140 (such as the second circuit structure 140) has a cavity 150. The first electronic component 130 is embedded in the cavity 150 and can be encapsulated between the first circuit structure 110 and the second circuit structure 140. The first circuit structure 110 includes a coaxial conductive via 120. The coaxial conductive via 120 includes an inner conductive layer 122, an outer conductive layer 121 and a first dielectric layer 124. The first dielectric layer 124 is located between the inner conductive layer 122 and the outer conductive layer 121.

[0100] In one embodiment, the inner conductive layer 122 and the outer conductive layer 121 are electrically separated from each other.

[0101] In one embodiment, the inner conductive layer 122 may be electrically connected to corresponding circuits and / or electronic components (eg, the first electronic component 130 or the second electronic component 170) in the second upper circuit layer 127. In one embodiment, the inner conductive layer 122 may be suitable for signal transmission.

[0102] In one embodiment, some of the circuits in the second upper circuit layer 127 may include antennas AN1, AN2, AN3, and AN4. Figure 1D In the cross-section shown in the drawings or other similar figures, antenna AN1, antenna AN2, antenna AN3, and antenna AN4 appear to be separated from each other, but they may actually be different parts of the same antenna. For example, in a top view, the antenna may be spiral-shaped, and the spiral-shaped antenna may be as shown in a cross-section. Figure 1D shown.

[0103] In one embodiment, the outer conductive layer 121 may be grounded. The grounding may include a floating ground or a physical ground.

[0104] In one embodiment, if the inner conductive layer 122 is used for signal transmission (e.g., to connect the aforementioned antenna and the first electronic component 130 to each other), the grounded outer conductive layer 121 can be regarded as an electromagnetic interference mask (EMI shielding) layer. In this way, when performing signal transmission, the aforementioned transmitted signal can be reduced from interfering with other components; and / or, the possibility of the aforementioned transmitted signal being interfered with by other components can be reduced, thereby improving the signal quality.

[0105] In one embodiment, the electronic component 100 further includes shielding circuits SH1, SH2, SH3, and SH4. Figure 1D In the cross-section shown in the drawings or other similar figures, the shielding circuit SH1, the shielding circuit SH2, the shielding circuit SH3, and the shielding circuit SH4 appear to be separated from each other, but they may actually be different parts of the same shielding circuit. For example, in a top view, the antenna may be spiral-shaped, and the spiral-shaped shielding circuit may be as follows in a cross-section. Figure 1D shown.

[0106] In one embodiment, the shielding circuits SH1, SH2, SH3, SH4 may be disposed in the first circuit structure 110. In one embodiment, the antennas AN1, AN2, AN3, AN4 and the shielding circuits SH1, SH2, SH3, SH4 may be located on opposite sides of the first core layer 111 (e.g., Figure 1D In one embodiment, the shielding lines SH1, SH2, SH3, SH4 may be part of the lines in the redistribution layer 115 of the first circuit structure 110.

[0107] In one embodiment, the antennas AN1, AN2, AN3, AN4 and the shielding circuits SH1, SH2, SH3, SH4 at least partially overlap along a direction parallel to the thickness of the first circuit structure 100. In one embodiment, the antennas AN1, AN2, AN3, AN4 substantially completely overlap the shielding circuits SH1, SH2, SH3, SH4 along a direction parallel to the thickness of the first circuit structure 100; that is, in the aforementioned direction, the projected outer contours of the patterns of the antennas AN1, AN2, AN3, AN4 substantially overlap the projected outer contours of the patterns of the shielding circuits SH1, SH2, SH3, SH4; or, the projected outer contours of the patterns of the antennas AN1, AN2, AN3, AN4 are located within the projected outer contours of the patterns of the shielding circuits SH1, SH2, SH3, SH4.

[0108] In one embodiment, the shielding lines SH1, SH2, SH3, and SH4 may be grounded. In one embodiment, the shielding lines may be used as dummy patterns for no signal transmission.

[0109] In one embodiment, there is no other conductor used for electrical transmission (such as signal transmission or power transmission) between the antennas AN1, AN2, AN3, AN4 and the shielding wires SH1, SH2, SH3, SH4 along a direction parallel to the thickness of the first circuit structure 100. In an embodiment not shown, there may be other conductors for grounding between the antennas AN1, AN2, AN3, AN4 and the shielding wires SH1, SH2, SH3, SH4.

[0110] In one embodiment, if the antennas AN1, AN2, AN3, AN4 are used for signal transmission, and there is no other conductor used for electrical transmission between the antennas AN1, AN2, AN3, AN4 and the shielding lines SH1, SH2, SH3, SH4, then the grounded shielding lines SH1, SH2, SH3, SH4 can be regarded as electromagnetic interference mask layers. In this way, when signal transmission is performed, the interference of the aforementioned transmitted signal with other components can be reduced; and / or the possibility of the aforementioned transmitted signal being interfered with by other components can be reduced, thereby improving the signal quality.

[0111] In one embodiment, the shielding circuits SH1, SH2, SH3, SH4 are not arranged in a sheet or full-surface configuration. In one embodiment, along a direction parallel to the thickness of the first circuit structure 100, the patterns of the antennas AN1, AN2, AN3, AN4 and the patterns of the shielding circuits SH1, SH2, SH3, SH4 may be substantially the same or similar. Therefore, the first core layer 111 may have two sides (e.g.: Figure 1D Thus, during the manufacturing process of the electronic package structure 100, the possibility of warpage caused by large difference in thermal expansion between the two sides due to large difference in metal pattern density can be reduced.

[0112] Figure 2 FIG. 4 is a schematic diagram of an electronic packaging structure according to a second embodiment of the present invention.

[0113] Please refer to Figure 2 , providing an electronic packaging structure 200. Please refer to Figure 2, the electronic package structure 200 includes a first circuit structure 110, a second circuit structure 140, and a first electronic component 130. The first electronic component 130 is located between the first circuit structure 110 and the second circuit structure 140. At least one of the first circuit structure 110 or the second circuit structure 140 (e.g., the second circuit structure 140) has a cavity 150. The first electronic component 130 is embedded in the cavity 150 and can be encapsulated between the first circuit structure 110 and the second circuit structure 140. The first circuit structure 110 includes a coaxial conductive via 120. The coaxial conductive via 120 includes an inner conductive layer 122, an outer conductive layer 121, and a first dielectric layer 124. The first dielectric layer 124 is located between the inner conductive layer 122 and the outer conductive layer 121. The electronic package structure 200 is similar to the electronic package structure 100, except that the way of bonding the first circuit structure 110 to the second circuit structure 140 is different.

[0114] In one embodiment, a conductive terminal 262 is disposed in at least one opening 129 in the first circuit structure 110 and in at least one opening 161 in the second circuit structure 140. Through the conductive terminal 262, the first circuit structure 110 and the second circuit structure 140 are joined and electrically connected.

[0115] Figure 3 FIG. 4 is a schematic diagram of an electronic packaging structure according to a third embodiment of the present invention.

[0116] Please refer to Figure 3 , providing an electronic packaging structure 300. Please refer to Figure 3 , the electronic package structure 300 includes a first circuit structure 301, a second circuit structure 140 and a first electronic component 130. The first electronic component 130 is located between the first circuit structure 301 and the second circuit structure 140. At least one of the first circuit structure 301 or the second circuit structure 140 (e.g., the second circuit structure 140) has a cavity 150. The first electronic component 130 is embedded in the cavity 150 and can be encapsulated between the first circuit structure 301 and the second circuit structure 140. The first circuit structure 301 includes a coaxial conductive via 120. The coaxial conductive via 120 includes an inner conductive layer 122, an outer conductive layer 121 and a first dielectric layer 124. The first dielectric layer 124 is located between the inner conductive layer 122 and the outer conductive layer 121. The electronic package structure 300 is similar to the electronic package structure 100 or the electronic package structure 200, except that the first circuit structure 301 of the electronic package structure 300 is different from the first circuit structure 110 of the electronic package structures 100 and 200.

[0117] The first circuit structure 301 includes a first substructure 301a and a second substructure 301b. The first substructure 301a and the second substructure 301b can be considered as different structures in structure. For example, during the manufacturing process of the electronic packaging structure 300, the first substructure 301a and the second substructure 301b can be formed or provided separately, and then combined with each other.

[0118] In one embodiment, the first substructure 301a may include a first core layer 111, corresponding circuit layers and corresponding insulating layers located on the upper and lower sides of the first core layer 111, and an insulating layer 114 located on the outermost side of the first circuit structure 301. The first core layer 111 may include at least one coaxial conductive via 120 penetrating the first core layer 111. In one embodiment, the coaxial conductive via 120 may include an outer conductive layer 121, a first dielectric layer 124, a second dielectric layer 123, and an inner conductive layer 122. In one embodiment, the first core layer 111 may also include other conductive vias, and the other conductive vias may include solid metal columns or hollow metal columns with insulating materials filled in the hollow metal columns, but the present invention is not limited thereto.

[0119] In one embodiment, the second substructure 301 b may include a redistribution layer 115 and an insulating layer 116 located at the outermost side of the first circuit structure 301 .

[0120] In one embodiment, the second substructure 301 b may be referred to as an interposer, but the invention is not limited thereto.

[0121] In one embodiment, the outermost insulating layers 114 and 116 of the first circuit structure 301 may be referred to as solder resist layers to reduce or mitigate oxidation and prevent solder bridges from forming between closely spaced pads. The outermost insulating layers 114 and 116 of the first circuit structure 301 may include epoxy resin.

[0122] The first substructure 301a and the second substructure 301b may be bonded by a conductive adhesive 382. The filling layer 381 may fill a bonding gap between a bottom surface of the first substructure 301a and a top surface of the second substructure 301b.

[0123] In one embodiment, the conductive adhesive 382 may include metal alloy, solder paste, silver adhesive or other suitable conductive adhesives, but the invention is not limited thereto.

[0124] In one embodiment, the filling layer 381 may include underfill, but the invention is not limited thereto.

[0125] In one embodiment, the aforementioned coaxial conductive via (e.g., coaxial conductive via 120) can be referred to as a coaxial conductive element. In one embodiment, the aforementioned coaxial conductive via (e.g., coaxial conductive via 120) can be regarded as a conductive via including different circuit layers (e.g., outer conductive layer 121 or inner conductive layer 122).

[0126] In the aforementioned embodiments, the conductive layer or circuit layer may be a single layer or a multi-layer structure. If the conductive layer or circuit layer is a multi-layer structure, there may be no insulating material or dielectric material between the aforementioned multi-layer structures. In addition, in terms of structure, if the conductive layer or circuit layer is a multi-layer structure, even if the aforementioned multi-layer structure is formed by different processes, it can still be (but not limited to) represented by the same terms and / or symbols. In addition, if the conductive layer or circuit layer is a multi-layer structure, the interface between the corresponding film layers in the multi-layer structure may be omitted.

[0127] In the aforementioned embodiments, the insulating layer or dielectric layer may be a single layer or a multi-layer structure. If the insulating layer or dielectric layer is a multi-layer structure, there may be no conductive material between the aforementioned multi-layer structures. In addition, in terms of structure, if the insulating layer or dielectric layer is a multi-layer structure, even if the aforementioned multi-layer structure is formed by different processes, it can still be (but not limited to) represented by the same terms and / or symbols. In addition, if the insulating layer or dielectric layer is a multi-layer structure, the interface between the corresponding film layers in the multi-layer structure may be omitted.

[0128] In the aforementioned embodiments, corresponding circuits in one circuit layer and corresponding circuits in another circuit layer can be electrically connected to each other through corresponding conductive elements (e.g., conductive vias). That is, unless otherwise specified or implied, even if corresponding circuits in one circuit layer and corresponding circuits in another circuit layer are not shown in the drawings to be electrically connected to each other, corresponding circuits in the aforementioned circuit layer and corresponding circuits in the aforementioned another circuit layer can still be electrically connected to each other through conductive elements not shown in the drawings or on cross-sections not shown.

[0129] In summary, in the electronic packaging structure, since the electronic component is located between the first circuit structure and the second circuit structure, and at least part of the electronic component can be located in the cavity of a certain circuit structure (such as the second circuit structure), the electronic component can be better protected, and the possibility of damage or destruction of the electronic component can be reduced, thereby improving the quality of the electronic packaging structure.

[0130] On the other hand, a certain circuit structure (e.g., the first circuit structure) of the electronic packaging structure may further include a coaxial conductive via. The electronic component may be electrically connected to a corresponding circuit (e.g., an antenna) through the coaxial conductive via. In this way, the interference of the signal may be reduced and / or the quality of the signal may be improved.

Claims

1. An electronic packaging structure, characterized in that: include: A first circuit structure; a second circuit structure; as well as A first electronic component is located between the first circuit structure and the second circuit structure, wherein: At least one of the first circuit structure or the second circuit structure has a cavity, and the first electronic component is embedded in the cavity.

2. The electronic packaging structure according to claim 1, characterized in that: The second circuit structure further includes a conductive core layer.

3. The electronic packaging structure according to claim 1, characterized in that: Also includes: A thermal interface material fills the cavity and contacts the first electronic component.

4. The electronic packaging structure according to claim 1, characterized in that: Also includes: The second electronic component is disposed on the bottom surface of the second circuit structure.

5. The electronic packaging structure according to claim 1, characterized in that: in: The first circuit structure includes a first redistribution layer; The second circuit structure includes a second redistribution layer; and The first redistribution layer and the second redistribution layer face the same side of the electronic packaging structure.

6. The electronic packaging structure according to claim 1, characterized in that: Also includes: The conductive connecting member is located between the first circuit structure and the second circuit structure and electrically connects them.

7. The electronic packaging structure according to claim 1, characterized in that: The first circuit structure includes a coaxial conductive through hole, and the coaxial conductive through hole includes: Inner conductive layer; an outer conductive layer; and The first dielectric layer is located between the inner conductive layer and the outer conductive layer.

8. The electronic packaging structure according to claim 7, characterized in that: The outer conductive layer is grounded.

9. The electronic packaging structure according to claim 7, characterized in that: The coaxial conductive via also includes a second dielectric layer, wherein the inner conductive layer is located between the first dielectric layer and the second dielectric layer.

10. The electronic packaging structure according to claim 7, characterized in that: The first circuit structure further includes a first substructure and a second substructure electrically connected to the first substructure, wherein the first substructure includes the coaxial conductive via, and the second substructure includes a first redistribution layer.

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