Adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment

Abstract

The invention relates to an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment, and the circuit is characterized in that a non-uniform sampling Fourier transform module and an adjustable amplifier are connected to a signal receiving end; the non-uniform sampling Fourier transform module is electrically connected with the adjustable amplifier self-adaptive controller, and the non-uniform sampling Fourier transform module supports discrete Fourier transform on a non-uniform sampling signal to obtain a frequency domain signal and outputs the frequency domain signal to the adjustable amplifier self-adaptive controller; the output end of the adjustable amplifier is connected with the analog-to-digital converter, the input end or the output end of the adjustable amplifier is connected with the signal peak feedback circuit, and the signal peak feedback circuit is electrically connected with the adjustable amplifier self-adaptive controller and feeds back input or output signal time domain amplitude. And the adaptive controller of the adjustable amplifier adjusts the gain and bandwidth of the adjustable amplifier according to the time domain amplitude of the frequency domain signal and the input or output signal so as to adapt to the signal frequency and amplitude condition to amplify the signal.

Description

Technical Field

[0001] The present invention relates to the technical field of adaptive adjustment amplifier circuits, and in particular to an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment. Background Art

[0002] Programmable gain amplifiers are widely used in various sensor chips. Traditional programmable gain amplifiers usually need to adjust the amplification gain or bandwidth through external settings. The programmable gain amplifier cooperates with the feedback loop to realize the automatic gain control circuit. The strength of the input signal of the automatic gain control circuit may vary, and the automatic gain control circuit provides different gains according to the different strengths of the input signal, so that the output signal can maintain a stable amplitude. The feedback loop provides feedback according to the strength of the output signal, converts it into an appropriate control signal, and adjusts the gain provided by the variable gain amplifier. When the output signal strength is low, a larger gain is provided; when the output signal is high, the provided gain is reduced, and through continuous feedback adjustment, the output can be stable within the preset amplitude range. In addition to the gain control requirement, automatic bandwidth control is also one of the important requirements. In the prior art, the frequency of the input signal is measured by the FFT operation module, and the bandwidth of the programmable gain amplifier is adaptively adjusted according to the frequency of the input signal. The current FFT operation module supports uniform discrete Fourier transform calculation, and the applicable scenarios are limited. Summary of the invention

[0003] In order to solve the above technical problem or at least partially solve the above technical problem, the present invention provides an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment.

[0004] The present invention provides an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment, comprising:

[0005] An adjustable amplifier adaptive controller, a non-uniform sampling Fourier transform module, a signal peak feedback circuit, an adjustable amplifier and an analog-to-digital converter;

[0006] The non-uniform sampling Fourier transform module and the adjustable amplifier are connected to the signal receiving end; the non-uniform sampling Fourier transform module is electrically connected to the adjustable amplifier adaptive controller, and the non-uniform sampling Fourier transform module supports discrete Fourier transform of the non-uniformly sampled signal to obtain a frequency domain signal, and outputs it to the adjustable amplifier adaptive controller;

[0007] The output end of the adjustable amplifier is connected to the analog-to-digital converter, the input end or the output end of the adjustable amplifier is connected to the signal peak feedback circuit, the signal peak feedback circuit is electrically connected to the adjustable amplifier adaptive controller, and feeds back the time domain amplitude of the input or output signal.

[0008] The adjustable amplifier adaptive controller adjusts the gain and bandwidth of the adjustable amplifier according to the frequency domain signal and the time domain amplitude of the input or output signal, and amplifies the signal in accordance with the adaptive signal frequency and amplitude.

[0009] Furthermore, the method in which the non-uniform sampling Fourier transform module performs discrete Fourier transform on the non-uniformly sampled signal includes:

[0010] The form of the non-uniform sampling Fourier transform is:

[0011]

[0012] Among them, t m ,0≤m≤M-1 is the time domain sampling point, the time domain sampling points can be non-uniform, x m ,0≤m≤M-1 is the signal,ω n is the frequency domain sampling point, and M=N is taken for the convenience of subsequent calculations;

[0013] The non-uniform sampling Fourier transform is processed into the form of transformation matrix and vector product f = FX, where f is the frequency domain signal vector, f = {f n |0≤n≤N-1}, the transformation matrix F is a two-dimensional matrix of N×M, X is the vector formed by the signal X={x m |0≤m≤M-1};

[0014] Set the time domain sampling point t 0 ,t 1 ,t 2 ,…t M-1 is an arbitrary distribution; the elements in the transformation matrix F is a complex exponential function. Using the periodicity of the complex exponential, we assume that the signal time domain sampling points are in the range of [0,1) without loss of generality. The predefined sequence τ 0 ,τ 1 ,τ 2 ,...τ M-1 , takes integer values ​​in the range of 0 to M, so that τ m / M is the closest t among the equally spaced reference nodes with dimension M+1 m , then |t m -τ j / M|≤1 / (2M);

[0015] The elements in the transformation matrix can be written as:

[0016] is the discrete Fourier transform matrix of uniform sampling points;

[0017] Then the transformation matrix W is W n,m The two-dimensional matrix composed of for The two-dimensional matrix W is constructed by expanding the two-dimensional matrix W through Chebyshev polynomials. K replace;

[0018] Then the transformation matrix and vector product of the non-uniform sampling Fourier transform f=FX can be expressed as:

[0019]

[0020] is the low-rank approximation matrix W K The diagonal matrix of the corresponding basis vectors.

[0021] Furthermore, W K By basis vector u 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 Composition, basis vector u 0 ,u 1 ,u 2 ,…u K-1 and v 0 ,v 1 ,v 2 ,…v K-1 The composition is precomputed via a three-term recursion of the Chebyshev polynomial expansion.

[0022] Furthermore, the non-uniform sampling Fourier transform module of the discrete Fourier transform method adapted to the non-uniform sampling signal adopts a complex programmable logic device or a programmable logic device, including: a non-uniform Fourier transform control unit for controlling the operation process;

[0023] The low-rank approximation unit, under the control of the non-uniform Fourier transform control unit, constructs a low-rank approximation matrix W by expanding the two-dimensional matrix W involved in the transformation matrix F through Chebyshev polynomials. K Instead, W K By basis vector u 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 constitute;

[0024] The diagonal matrix generating unit, under the control of the non-uniform Fourier transform control unit, generates a diagonal matrix according to the basis vector u provided by the low-rank approximation unit. 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 Generate the corresponding diagonal matrix;

[0025] The uniform sampling point discrete Fourier transform matrix operation unit, under the control of the non-uniform Fourier transform control unit, calculates the corresponding uniform sampling point discrete Fourier transform matrix according to a predefined sequence, and forms the uniform sampling point discrete Fourier transform matrix into a two-dimensional matrix that will participate in the transformation matrix F operation.

[0026] Parallel multiplication and accumulation operators for matrix multiplication, each multiplication and accumulation operator is connected to an adder, and under the control of the non-uniform Fourier transform control unit, the multiplication and accumulation operator obtains the diagonal matrix of the basis vector, the input signal and the two-dimensional matrix formed by the discrete Fourier transform matrix of each uniform sampling point, and cooperates with the adder to perform the following calculation process:

[0027]

[0028] Furthermore, the adjustable amplifier includes: a first-stage differential amplifier formed by an N-type field effect transistor Q1 and an N-type field effect transistor Q3 connected to a drain and source, and an N-type field effect transistor Q2 and an N-type field effect transistor Q4 connected to a drain and source; in the first-stage differential amplifier, the drain of the N-type field effect transistor Q1 is connected to the gate of the N-type field effect transistor Q3, the drain of the N-type field effect transistor Q2 is connected to the gate of the N-type field effect transistor Q4, a common-mode feedback circuit is connected between the drains of the N-type field effect transistor Q1 and the N-type field effect transistor Q2 and the output end; the output of the first-stage differential amplifier is connected to a second-stage differential amplifier formed by an N-type field effect transistor Q5 and a P-type field effect transistor Q9 connected to the drain, and an N-type field effect transistor Q6 and a P-type field effect transistor Q10 connected to the drain; the first-stage differential amplifier is connected to an RC adjustment circuit, and the output end of the second-stage differential amplifier is connected to an adjustable load resistor array.

[0029] Furthermore, the common mode feedback circuit includes:

[0030] The drains of the P-type field effect transistor Q11 and the N-type field effect transistor Q13 are connected, the drains of the P-type field effect transistor Q12 and the N-type field effect transistor Q14 are connected, the sources of the N-type field effect transistor Q13 and the N-type field effect transistor Q14 are connected to the drain of the N-type field effect transistor Q15, the source of the N-type field effect transistor Q15 is grounded, the gate of the N-type field effect transistor Q15 is connected to the bias voltage Vb2, the sources of the P-type field effect transistor Q11 and the P-type field effect transistor Q12 are connected to the power supply VDD, and the gates of the P-type field effect transistor Q11 and the P-type field effect transistor Q12 are connected to the drain of the P-type field effect transistor Q12;

[0031] The gate of the N-type field effect transistor Q13 is connected to the output voltage, and the gate of the N-type field effect transistor Q14 is connected to the reference voltage REF.

[0032] Furthermore, the adjustable load resistor array includes: a plurality of resistor pairs connected in series, the resistor pairs are connected in parallel with each other, and each group of resistor pairs is configured with a corresponding digital switch.

[0033] Furthermore, the RC regulation circuit includes: a plurality of pairs of capacitors connected in series, the capacitor pairs are connected in parallel with each other, and each group of capacitor pairs is configured with a corresponding digital switch, the parallel capacitor pairs are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2, and the regulation resistors R1 and R2 are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2.

[0034] Furthermore, the signal peak feedback circuit includes: a peak detection circuit, a logarithmic amplifier and a loop filter. The peak detection circuit is used to detect the signal amplitude. After the signal amplitude is detected by the logarithmic amplifier to obtain the amplitude level, it is then compared with the set reference level. The difference between the two signals is amplified and filtered through the loop filter to generate a control voltage for adjusting the gain. The adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the control voltage.

[0035] Furthermore, the signal peak feedback circuit includes: a peak detection circuit, the peak detection circuit is connected to a plurality of parallel comparators with different reference voltages, and the output of the comparator is connected to an adjustable amplifier adaptive controller; the peak detection circuit is used to detect the signal amplitude, and the signal amplitude is compared with the comparators with multiple different reference voltage inputs to determine the range of the signal amplitude, and the adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the range of the signal amplitude.

[0036] The above technical solution provided by the embodiment of the present invention has the following advantages compared with the prior art:

[0037] In the present invention, a non-uniform sampling Fourier transform module and an adjustable amplifier are connected to a signal receiving end; the non-uniform sampling Fourier transform module is electrically connected to an adjustable amplifier adaptive controller, the non-uniform sampling Fourier transform module supports discrete Fourier transform of non-uniformly sampled signals to obtain frequency domain signals, and outputs them to the adjustable amplifier adaptive controller; the output end of the adjustable amplifier is connected to an analog-to-digital converter, the input end or output end of the adjustable amplifier is connected to a signal peak feedback circuit, the signal peak feedback circuit is electrically connected to the adjustable amplifier adaptive controller, and the input or output signal time domain amplitude is fed back, and the adjustable amplifier adaptive controller adjusts the gain and bandwidth of the adjustable amplifier according to the frequency domain signal and the input or output signal time domain amplitude, and performs signal amplification according to the adaptive signal frequency and amplitude conditions. Compared with the existing circuit structure that only supports uniform sampling time-frequency conversion, the scope of application is wider. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0040] Figure 1 An architecture diagram of an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment provided by an embodiment of the present invention;

[0041] Figure 2 A schematic diagram of an adjustable amplifier provided by an embodiment of the present invention;

[0042] Figure 3 A schematic diagram of an adjustable amplifier provided by an embodiment of the present invention;

[0043] Figure 4 A schematic diagram of a signal peak feedback circuit provided by an embodiment of the present invention;

[0044] Figure 5 A schematic diagram of another signal peak feedback circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0047] like Figure 1 As shown, the technology of the present invention realizes an adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment, including: an adjustable amplifier adaptive controller, a non-uniform sampling Fourier transform module, a signal peak feedback circuit, an adjustable amplifier and an analog-to-digital converter;

[0048] The non-uniform sampling Fourier transform module and the adjustable amplifier are connected to the signal receiving end; the non-uniform sampling Fourier transform module is electrically connected to the adjustable amplifier adaptive controller, and the non-uniform sampling Fourier transform module supports discrete Fourier transform of the non-uniformly sampled signal to obtain a frequency domain signal, and outputs it to the adjustable amplifier adaptive controller;

[0049] The output end of the adjustable amplifier is connected to the analog-to-digital converter, the input end or the output end of the adjustable amplifier is connected to the signal peak feedback circuit, and the signal peak feedback circuit is electrically connected to the adjustable amplifier adaptive controller to feed back the time domain amplitude of the input or output signal.

[0050] The adjustable amplifier adaptive controller adjusts the gain and bandwidth of the adjustable amplifier according to the frequency domain signal and the time domain amplitude of the input or output signal, and amplifies the signal in accordance with the adaptive signal frequency and amplitude.

[0051] In a specific implementation process, the method in which the non-uniform sampling Fourier transform module performs discrete Fourier transform on the non-uniformly sampled signal includes:

[0052] The form of the non-uniform sampling Fourier transform is:

[0053]

[0054] Among them, t m ,0≤m≤M-1 is the time domain sampling point, the time domain sampling points can be non-uniform, x m ,0≤m≤M-1 is the signal,ω n is the frequency domain sampling point, and M=N is taken to facilitate subsequent calculations.

[0055] The non-uniform sampling Fourier transform is processed into the form of transformation matrix and vector product f = FX, where f is the frequency domain signal vector, f = {f n |0≤n≤N-1}, the transformation matrix F is a two-dimensional matrix of N×M, X is the vector formed by the signal X={x m |0≤m≤M-1};

[0056] Set the time domain sampling point t 0 ,t 1 ,t 2 ,...t M-1 is a real number of arbitrary distribution; is a complex exponential function. Using the periodicity of the complex exponential, without loss of generality, assume that the signal time domain sampling points are in the range of [0,1). The predefined sequence τ 0 ,τ 1 ,τ 2 ,...τ M-1 , takes integer values ​​in the range of 0 to M, so that τ m / M is the closest t among the equally spaced reference nodes with dimension M+1 m , then |t m -τ j / M|≤1 / (2M);

[0057] The elements in the transformation matrix can be written as:

[0058] is the discrete Fourier transform matrix of uniform sampling points.

[0059] Then the transformation matrix W is W n,m The two-dimensional matrix composed of for The two-dimensional matrix W is expanded by Chebyshev polynomials to construct a low-rank approximate matrix W K Replace; W K By basis vector u 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...vK-1 Composition, basis vector u 0 ,u 1 ,u 2 ,…u K-1 and v 0 ,v 1 ,v 2 ,…v K-1 The composition is pre-calculated through three recurrence relations expanded by Chebyshev polynomials;

[0060] Then the transformation matrix and vector product of the non-uniform sampling Fourier transform f=FX can be expressed as:

[0061]

[0062] is the low-rank approximation matrix W K The diagonal matrix of the corresponding basis vectors.

[0063] The method of the present application implements the process of non-uniform sampling Fourier transform through discrete Fourier transform and low-rank approximation of pre-processed W. Compared with low-rank approximation by singular decomposition, the amount of calculation is greatly reduced, the operation speed is faster, and it can better adapt to the delay control requirements of signal gain adjustment.

[0064] In hardware design, the non-uniform sampling Fourier transform module of the method for adapting the discrete Fourier transform of the non-uniform sampling signal is implemented by CPLD or FPGA, such as Figure 2 As shown, including:

[0065] Non-uniform Fourier transform control unit; the order of operation of each operation unit and the allocation of data read and write addresses need to be coordinated and processed by the non-uniform Fourier transform control unit to realize the control of the control operation process. The non-uniform Fourier transform control unit is connected to the data storage unit through a read-write bus.

[0066] Low-rank approximation unit, used to precompute the low-rank approximation matrix W through the three-term recursion of Chebyshev polynomial expansion K The basis vector u 0 ,u 1 ,u 2 ,…u K-1 and v 0 ,v 1 ,v 2 ,…v K-1 ; Under the control of the non-uniform Fourier transform control unit, the low-rank approximation unit constructs a low-rank approximation matrix W by expanding the two-dimensional matrix W involved in the transformation matrix F through Chebyshev polynomials K Replace; W K By basis vector u 0 ,u 1,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 Composition, basis vector u 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 It is precomputed through the three-term recurrence relation of Chebyshev polynomial expansion.

[0067] The diagonal matrix generating unit, under the control of the non-uniform Fourier transform control unit, generates a diagonal matrix according to the basis vector u provided by the low-rank approximation unit. 0 ,u 1 ,u 2 ,...u K-1 and v 0 ,v 1 ,v 2 ,...v K-1 Generate the corresponding diagonal matrix.

[0068] The uniform sampling point discrete Fourier transform matrix operation unit, under the control of the non-uniform Fourier transform control unit, the second operation unit calculates the corresponding uniform sampling point discrete Fourier transform matrix according to the predefined sequence, and forms the uniform sampling point discrete Fourier transform matrix into a two-dimensional matrix that will participate in the transformation matrix F operation

[0069] Parallel multiplication and accumulation operators for matrix multiplication, each multiplication and accumulation operator is connected to an adder, and under the control of the non-uniform Fourier transform control unit, the multiplication and accumulation operator obtains the diagonal matrix of the basis vector, the input signal and the two-dimensional matrix formed by the discrete Fourier transform matrix of each uniform sampling point, and cooperates with the adder to perform the following calculation process:

[0070]

[0071] In the specific implementation process, Figure 3As shown, the adjustable amplifier includes: an N-type field effect transistor Q1 and an N-type field effect transistor Q3 connected with a drain source, and an N-type field effect transistor Q2 and an N-type field effect transistor Q4 connected with a drain source to form a first-stage differential amplifier, the gates of the N-type field effect transistor Q1 and the N-type field effect transistor Q2 are differential inputs, and in the first-stage differential amplifier, the drain of the N-type field effect transistor Q1 is connected to the gate of the N-type field effect transistor Q3, and the drain of the N-type field effect transistor Q2 is connected to the gate of the N-type field effect transistor Q4, forming a differential output. A common-mode feedback circuit is connected between the drains of the N-type field effect transistors Q1 and Q2 and the output end, and the common-mode feedback circuit includes: a P-type field effect transistor Q11 and an N-type field effect transistor Q13 whose drains are connected, a P-type field effect transistor Q12 and an N-type field effect transistor Q14 whose drains are connected, the sources of the N-type field effect transistors Q13 and Q14 are connected to the drain of the N-type field effect transistor Q15, the source of the N-type field effect transistor Q15 is grounded, the gate of the N-type field effect transistor Q15 is connected to the bias voltage Vb2, the sources of the P-type field effect transistors Q11 and Q12 are connected to the power supply VDD, the gates of the P-type field effect transistors Q11 and Q12 are connected to the drain of the P-type field effect transistor Q12; the gate of the N-type field effect transistor Q13 is connected to the output voltage of the adjustable amplifier, and the gate of the N-type field effect transistor Q14 is connected to the reference voltage REF. The common-mode feedback circuit is introduced to ensure the normal operation of each field effect tube. The output of the first-stage differential amplifier is connected to the drain-connected N-type field effect tube Q5 and P-type field effect tube Q9, and the drain-connected N-type field effect tube Q6 and P-type field effect tube Q10 form a second-stage differential amplifier. Specifically, the output of the first-stage differential amplifier is connected to the gate of the N-type field effect tube Q5 and the N-type field effect tube Q6, the source of the N-type field effect tube Q5 and the N-type field effect tube Q6 is grounded, the drain of the N-type field effect tube Q5 and the N-type field effect tube Q6 is respectively connected to the drain of the P-type field effect tube Q9 and the P-type field effect tube Q10, the source of the P-type field effect tube Q9 and the P-type field effect tube Q10 is connected to the power supply VDD, and the gate of the P-type field effect tube Q9 and the P-type field effect tube Q10 is connected to the bias voltage Vb1.

[0072] The output end of the second-stage differential amplifier is connected to an adjustable load resistor array.

[0073] The adjustable load resistor array includes: a plurality of resistor pairs connected in series, the resistor pairs are connected in parallel with each other, and each group of resistor pairs is configured with a corresponding digital switch.

[0074] Figure 2 The given example includes n pairs of resistors connected in series, namely, a resistor pair formed by a resistor R1L and a resistor R10L, a resistor pair formed by a resistor R2L and a resistor R20L, ... a resistor pair formed by a resistor RnL and a resistor Rn0L, and each group of resistor pairs is configured with corresponding digital switches S1A, S2A and SnA.

[0075] The first-stage differential amplifier is connected to an RC regulating circuit, which includes: a plurality of pairs of capacitor pairs connected in series, the capacitor pairs are connected in parallel with each other, and each group of capacitor pairs is configured with a corresponding digital switch, the parallel capacitor pairs are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2, and the regulating resistors R1 and R2 are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2.

[0076] Figure 2 The given example includes m pairs of capacitors connected in series, namely, a capacitor pair formed by capacitor C1 and capacitor C10, a capacitor pair formed by capacitor C2 and capacitor C20, ... a capacitor pair formed by capacitor Cm and capacitor Cm0, and each group of resistor pairs is configured with corresponding digital switches S1B, digital switches S2B and digital switches SmB.

[0077] The gain of the adjustable amplifier is proportional to the ratio of the resistance of the left half of the resistor pair to the equivalent resistance and the adjustment resistor R1. The equivalent resistance is adjusted by changing the number of resistors added by the digital switch, thereby changing the gain. The frequency response to the signal is:

[0078]

[0079] Among them, A is the gain, C is the equivalent capacitance of the capacitor part in the RC adjustment circuit, R L is the equivalent resistance of the load, C L is the load equivalent capacitance, g 1 It is the transconductance of N-type field effect transistor Q1.

[0080] like Figure 4 As shown, a signal peak feedback circuit includes: a peak detection circuit, a logarithmic amplifier and a loop filter. The peak detection circuit is used to detect the signal amplitude. After the signal amplitude is detected by the logarithmic amplifier to obtain the amplitude level, it is compared with the set reference level. The difference between the two signals is amplified and filtered by the loop filter to generate a control voltage for adjusting the gain. The adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the control voltage.

[0081] like Figure 5 As shown, another signal peak feedback circuit includes: a peak detection circuit, the peak detection circuit is connected to a plurality of parallel comparators with different reference voltages, and the output of the comparator is connected to an adjustable amplifier adaptive controller; the peak detection circuit is used to detect the signal amplitude, and the signal amplitude is compared with the comparators with multiple different reference voltage inputs to determine the range of the signal amplitude, and the adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the range of the signal amplitude.

[0082] In the embodiments provided by the present invention, it should be understood that the disclosed structures and methods can be implemented in other ways. For example, the structural embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, structures or units, which can be electrical, mechanical or other forms.

[0083] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0084] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0085] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. An adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment, characterized in that: include: An adjustable amplifier adaptive controller, a non-uniform sampling Fourier transform module, a signal peak feedback circuit, an adjustable amplifier and an analog-to-digital converter; The non-uniform sampling Fourier transform module and the adjustable amplifier are connected to the signal receiving end; the non-uniform sampling Fourier transform module is electrically connected to the adjustable amplifier adaptive controller, and the non-uniform sampling Fourier transform module supports discrete Fourier transform of the non-uniformly sampled signal to obtain a frequency domain signal, and outputs it to the adjustable amplifier adaptive controller; The output end of the adjustable amplifier is connected to the analog-to-digital converter, the input end or the output end of the adjustable amplifier is connected to the signal peak feedback circuit, the signal peak feedback circuit is electrically connected to the adjustable amplifier adaptive controller, and feeds back the time domain amplitude of the input or output signal. The adjustable amplifier adaptive controller adjusts the gain and bandwidth of the adjustable amplifier according to the frequency domain signal and the time domain amplitude of the input or output signal, and amplifies the signal in accordance with the adaptive signal frequency and amplitude.

2. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 1, characterized in that: The method for the non-uniform sampling Fourier transform module to perform discrete Fourier transform on the non-uniformly sampled signal comprises: The form of the non-uniform sampling Fourier transform is: Among them, t m ,0≤m≤M-1 is the time domain sampling point, the time domain sampling points can be non-uniform, x m ,0≤m≤M-1 is the signal,ω n is the frequency domain sampling point, and M=N is taken to facilitate subsequent calculations; The non-uniform sampling Fourier transform is processed into the form of transformation matrix and vector product f = FX, where f is the frequency domain signal vector, f = {f n |0≤n≤N-1}, the transformation matrix F is a two-dimensional matrix of N×M, X is the vector formed by the signal X={x m |0≤m≤M-1}; Set the time domain sampling points t0, t1, t2, ... t M-1 is an arbitrary distribution; the elements in the transformation matrix F is a complex exponential function. Using the periodicity of the complex exponential, we assume that the signal time domain sampling points are in the range of [0,1) without loss of generality. The predefined sequence τ0, τ1, τ2, … τ M-1 , takes integer values ​​in the range of 0 to M, so that τ m / M is the closest t among the equally spaced reference nodes with dimension M+1 m , then |t m -τ j / M|≤1 / (2M); The elements in the transformation matrix can be written as: is the discrete Fourier transform matrix of uniform sampling points; Then the transformation matrix W is W n,m The two-dimensional matrix composed of for The two-dimensional matrix W is constructed by expanding the two-dimensional matrix W through Chebyshev polynomials. K replace; Then the transformation matrix and vector product of the non-uniform sampling Fourier transform f=FX can be expressed as: is the low-rank approximation matrix W K The diagonal matrix of the corresponding basis vectors.

3. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 2, characterized in that: W K By basis vectors u0,u1,u2,...u K-1 and v0,v1,v2,…v K-1 The basis vectors u0,u1,u2,…u K-1 and v0,v1,v2,…v K-1 The composition is precomputed via a three-term recursion of Chebyshev polynomial expansion.

4. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 2, characterized in that: The non-uniform sampling Fourier transform module of the discrete Fourier transform method adapted to the non-uniform sampling signal adopts a complex programmable logic device or a programmable logic device, including: a non-uniform Fourier transform control unit for controlling the operation process; The low-rank approximation unit, under the control of the non-uniform Fourier transform control unit, constructs a low-rank approximation matrix W by expanding the two-dimensional matrix W involved in the transformation matrix F through Chebyshev polynomials. K Instead, W K From the basis vectors u0,u1,u2,…u K-1 and v0,v1,v2,…v K-1 constitute; The diagonal matrix generating unit, under the control of the non-uniform Fourier transform control unit, generates the diagonal matrix according to the basis vectors u0,u1,u2,…u provided by the low-rank approximation unit. K-1 and v0,v1,v2,…v K-1 Generate the corresponding diagonal matrix; The uniform sampling point discrete Fourier transform matrix operation unit, under the control of the non-uniform Fourier transform control unit, calculates the corresponding uniform sampling point discrete Fourier transform matrix according to a predefined sequence, and forms the uniform sampling point discrete Fourier transform matrix into a two-dimensional matrix that will participate in the transformation matrix F operation. Parallel multiplication and accumulation operators for matrix multiplication, each multiplication and accumulation operator is connected to an adder, and under the control of the non-uniform Fourier transform control unit, the multiplication and accumulation operator obtains the diagonal matrix of the basis vector, the input signal and the two-dimensional matrix formed by the discrete Fourier transform matrix of each uniform sampling point, and cooperates with the adder to perform the following calculation process:

5. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 1, characterized in that: The adjustable amplifier comprises: a first-stage differential amplifier formed by drain-source connected N-type field effect transistor Q1 and N-type field effect transistor Q3, and drain-source connected N-type field effect transistor Q2 and N-type field effect transistor Q4; in the first-stage differential amplifier, the drain of N-type field effect transistor Q1 is connected to the gate of N-type field effect transistor Q3, the drain of N-type field effect transistor Q2 is connected to the gate of N-type field effect transistor Q4, a common-mode feedback circuit is connected between the drains of N-type field effect transistor Q1 and N-type field effect transistor Q2 and the output end; the output of the first-stage differential amplifier is connected to a second-stage differential amplifier formed by drain-connected N-type field effect transistor Q5 and P-type field effect transistor Q9, and drain-connected N-type field effect transistor Q6 and P-type field effect transistor Q10; the first-stage differential amplifier is connected to an RC regulating circuit, and the output end of the second-stage differential amplifier is connected to an adjustable load resistor array.

6. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 5, characterized in that: The common mode feedback circuit comprises: The drains of the P-type field effect transistor Q11 and the N-type field effect transistor Q13 are connected, the drains of the P-type field effect transistor Q12 and the N-type field effect transistor Q14 are connected, the sources of the N-type field effect transistor Q13 and the N-type field effect transistor Q14 are connected to the drain of the N-type field effect transistor Q15, the source of the N-type field effect transistor Q15 is grounded, the gate of the N-type field effect transistor Q15 is connected to the bias voltage Vb2, the sources of the P-type field effect transistor Q11 and the P-type field effect transistor Q12 are connected to the power supply VDD, and the gates of the P-type field effect transistor Q11 and the P-type field effect transistor Q12 are connected to the drain of the P-type field effect transistor Q12; The gate of the N-type field effect transistor Q13 is connected to the output voltage, and the gate of the N-type field effect transistor Q14 is connected to the reference voltage REF.

7. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 5, characterized in that: The adjustable load resistor array includes: a plurality of resistor pairs connected in series, the resistor pairs are connected in parallel with each other, and each group of resistor pairs is configured with a corresponding digital switch.

8. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 5, characterized in that: The RC regulating circuit includes: a plurality of paired capacitor pairs connected in series, the capacitor pairs are connected in parallel with each other, and each group of capacitor pairs is configured with a corresponding digital switch, the parallel capacitor pairs are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2, and the regulating resistors R1 and R2 are arranged between the source electrodes of the N-type field effect transistor Q1 and the N-type field effect transistor Q2.

9. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 1, characterized in that: The signal peak feedback circuit includes: a peak detection circuit, a logarithmic amplifier and a loop filter. The peak detection circuit is used to detect the signal amplitude. After the signal amplitude is detected by the logarithmic amplifier to obtain the amplitude level, it is then compared with the set reference level. The difference between the two signals is amplified and filtered by the loop filter to generate a control voltage for adjusting the gain. The adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the control voltage.

10. The adjustable amplifier circuit supporting non-uniform sampling adaptive adjustment according to claim 1, characterized in that: The signal peak feedback circuit includes: a peak detection circuit, the peak detection circuit is connected to a plurality of parallel comparators with different reference voltages, and the output of the comparator is connected to an adjustable amplifier adaptive controller; the peak detection circuit is used to detect the signal amplitude, and the signal amplitude is compared with the comparators with multiple different reference voltage inputs to determine the range of the signal amplitude, and the adjustable amplifier adaptive controller changes the gain of the adjustable amplifier according to the range of the signal amplitude.

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