Power-controllable switch Hall chip and power control method
By introducing an enable logic unit and an external signal control mechanism into the switch Hall chip, the power consumption of the chip is dynamically adjusted, solving the limitations of fixed power consumption and frequency of the traditional chip, and achieving more efficient energy consumption control and flexible applications.
Patent Information
- Application Number
- CN202510226430.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-06-06
AI Technical Summary
Traditional switching Hall chips have limitations in applications with fixed operating frequency and power consumption, which is difficult to meet the flexible needs of diverse application scenarios, especially in scenarios where precise energy consumption is required and system efficiency is improved.
A power-controllable switching Hall chip is designed, including a magnetic induction unit, a signal processing unit, a signal output unit and an enable logic unit. The enable logic unit controls the working state of the chip through external signals and dynamically adjusts the power consumption of the chip through the frequency and duty cycle of the external signals.
Dynamic adjustment of chip power consumption is achieved, flexible requirements in different application scenarios, and the accuracy of system efficiency and energy consumption control is improved.
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Figure CN120110370A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of chip power control methods, and in particular relates to a power-controllable switch Hall chip. The present invention also relates to a power control method for the power-controllable switch Hall chip. Background Art
[0002] Traditional switch Hall chips have the limitations of fixed operating frequency and power consumption in applications, making it difficult to meet the flexible needs of diverse application scenarios. Especially in scenarios that require precise control of energy consumption and improved system efficiency, this fixed parameter chip design is particularly insufficient. Summary of the invention
[0003] The purpose of the present invention is to provide a power-controllable switch Hall chip, which solves the problem in the prior art that the power and power consumption of the switch Hall chip cannot be dynamically controlled by an external signal.
[0004] Another object of the present invention is to provide a power control method for the above-mentioned power-controllable switch Hall chip, which solves the problem in the prior art that the switch Hall chip cannot flexibly control the working state of the chip by external signals when working.
[0005] The technical solution adopted by the present invention is a power-controllable switch Hall chip, including a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence, and is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0006] The present invention is also characterized in that: It also includes an enable pin PD and an output pin OUT.
[0007] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0008] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0009] The signal output unit is used to output the optimal signal through the output pin OUT.
[0010] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to the external signal connected to the enable pin PD; the enable pin PD is a bidirectional control interface.
[0011] Another technical solution adopted by the present invention is a power control method of a power-controllable switch Hall chip, using a power-controllable switch Hall chip, specifically comprising the following steps: Step 1, obtain the period T of the external signal, connect the enable pin PD to the external signal, and obtain the optimal signal; Step 2: Calculate the duty cycle of the low level according to the period of the external signal; Step 3: Calculate the average power consumption of the chip based on the duty cycle; Step 4: Adjust the duty cycle of the external signal to control the average power consumption of the chip.
[0012] Another technical solution of the present invention is also characterized in that: In step 1, the external signal includes low level and high level. When the external signal is at low level, the chip works and the power consumption is , get the optimal signal; when the external signal is at a high level, the chip does not work.
[0013] The period T is:
[0014] In the formula, Indicates the high level time, Indicates the low level time; The duty cycle of the low level is:
[0015] Where D is the duty cycle.
[0016] The average power consumption in step 3 is:
[0017] In the formula, represents the total power consumption within period T, Indicates the average power consumption.
[0018] The beneficial effects of the present invention are as follows: a power-controllable switch Hall chip is provided with a magnetic induction unit, a signal processing unit and a signal output unit; and an enabling logic unit is also provided, which controls the working states of the magnetic induction unit, the signal processing unit and the signal output unit through an external signal, and can control the working frequency of the chip through the frequency of the external signal, thereby realizing dynamic adjustment of the chip power consumption. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 It is a schematic diagram of the internal structure of the power-controllable switch Hall chip of the present invention; Figure 2 It is a pin diagram of the power controllable switch Hall chip of the present invention. DETAILED DESCRIPTION
[0020] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.
[0021] Power controllable switch Hall chip, such as Figure 1 As shown, it includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence. The magnetic induction unit is also connected to an enabling logic unit, which is connected to the signal processing unit and the signal output unit respectively; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0022] It also includes an enable pin PD and an output pin OUT, such as Figure 2 shown.
[0023] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0024] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0025] The signal output unit is used to output the optimal signal through the output pin OUT.
[0026] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to the external signal connected to the enable pin PD; the enable pin PD is a bidirectional control interface.
[0027] A power control method for a power-controllable switch Hall chip, using a power-controllable switch Hall chip, specifically includes the following steps: Step 1, obtain the period T of the external signal, connect the enable pin PD to the external signal, and obtain the optimal signal; Step 2: Calculate the duty cycle of the low level according to the period of the external signal; Step 3: Calculate the average power consumption of the chip based on the duty cycle; Step 4: Adjust the duty cycle of the external signal to control the average power consumption of the chip.
[0028] In step 1, the external signal includes low level and high level. When the external signal is at low level, the chip works and the power consumption is , get the optimal signal; when the external signal is at a high level, the chip does not work.
[0029] The period T is:
[0030] In the formula, Indicates the high level time, Indicates the low level time; The duty cycle of the low level is:
[0031] Where D is the duty cycle.
[0032] The average power consumption in step 3 is:
[0033] In the formula, represents the total power consumption within period T, Indicates the average power consumption.
[0034] Among them, the enable pin PD of the power-controllable switch Hall chip is a bidirectional control interface, which can control the working state of the chip through the high level or low level of the external signal, and can also control the working frequency of the chip through the duty cycle or frequency of the received external signal, thereby realizing dynamic adjustment of the chip power consumption.
[0035] When the external signal is at a low level, the chip is in working state; when the external signal is at a high level, the chip is in non-working state; the chip is configured through communication interfaces such as I2C and SPI, the frequency range is preset, and reference data of chip power consumption is obtained.
[0036] Example 1 A power-controllable switch Hall chip includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence. The magnetic induction unit is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0037] Example 2 The power controllable switch Hall chip includes a magnetic induction unit, which is sequentially connected to a signal processing unit and a signal output unit, and is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal, and also includes a power pin VCC and a ground pin GND. It also includes an enabling pin PD and an output pin OUT.
[0038] Example 3 A power-controllable switch Hall chip includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence. The magnetic induction unit is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0039] It also includes an enable pin PD and an output pin OUT.
[0040] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0041] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0042] The signal output unit is used to output the optimal signal through the output pin OUT.
[0043] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to an external signal connected to the enable pin PD.
[0044] Example 4 The power controllable switch Hall chip includes a magnetic induction unit, which is sequentially connected to a signal processing unit and a signal output unit, and is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal, and also includes a power pin VCC and a ground pin GND. It also includes an enabling pin PD and an output pin OUT.
[0045] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0046] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0047] The signal output unit is used to output the optimal signal through the output pin OUT.
[0048] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to an external signal connected to the enable pin PD.
[0049] The enable pin PD is a bidirectional control interface.
[0050] Example 5 A power-controllable switch Hall chip includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence. The magnetic induction unit is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0051] It also includes an enable pin PD and an output pin OUT.
[0052] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0053] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0054] The signal output unit is used to output the optimal signal through the output pin OUT.
[0055] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to an external signal connected to the enable pin PD.
[0056] The enable pin PD is a bidirectional control interface.
[0057] A power control method for a power-controllable switch Hall chip, using a power-controllable switch Hall chip, specifically includes the following steps: Step 1, obtain the period T of the external signal, connect the enable pin PD to the external signal, and obtain the optimal signal; Step 2: Calculate the duty cycle of the low level according to the period of the external signal; Step 3: Calculate the average power consumption of the chip based on the duty cycle; Step 4: Adjust the duty cycle of the external signal to control the average power consumption of the chip.
[0058] Example 6 A power-controllable switch Hall chip includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence. The magnetic induction unit is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
[0059] It also includes an enable pin PD and an output pin OUT.
[0060] The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
[0061] The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain the optimal signal.
[0062] The signal output unit is used to output the optimal signal through the output pin OUT.
[0063] The enable logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to an external signal connected to the enable pin PD.
[0064] The enable pin PD is a bidirectional control interface.
[0065] A power control method for a power-controllable switch Hall chip, using a power-controllable switch Hall chip, specifically includes the following steps: Step 1, obtain the period T of the external signal, connect the enable pin PD to the external signal, and obtain the optimal signal; Step 2: Calculate the duty cycle of the low level according to the period of the external signal; Step 3: Calculate the average power consumption of the chip based on the duty cycle; Step 4: Adjust the duty cycle of the external signal to control the average power consumption of the chip.
[0066] In step 1, the external signal includes low level and high level. When the external signal is at low level, the chip works and the power consumption is , get the optimal signal; when the external signal is at a high level, the chip does not work.
[0067] The period T is:
[0068] In the formula, Indicates the high level time, Indicates the low level time; The duty cycle of the low level is:
[0069] Where D is the duty cycle.
[0070] The average power consumption in step 3 is:
[0071] In the formula, represents the total power consumption within period T, Indicates the average power consumption.
[0072] Average Power Consumption vs. Duty Cycle The smaller the duty cycle (the longer the low level time), the higher the average power consumption. By adjusting the duty cycle of the PWM signal, the average power consumption of the chip can be dynamically controlled.
Claims
1. A power-controllable switch Hall chip, characterized in that: It includes a magnetic induction unit, which is connected to a signal processing unit and a signal output unit in sequence, and is also connected to an enabling logic unit, which is respectively connected to the signal processing unit and the signal output unit; the enabling logic unit is connected to an external signal and also includes a power pin VCC and a ground pin GND.
2. The power controllable switch Hall chip according to claim 1, characterized in that: It also includes an enable pin PD and an output pin OUT.
3. The power controllable switch Hall chip according to claim 2, characterized in that: The magnetic induction unit is used to convert the detected magnetic field changes into electrical signals.
4. The power controllable switch Hall chip according to claim 3, characterized in that: The signal processing unit is used to amplify, filter and digitize the electrical signal to obtain an optimal signal.
5. The power controllable switch Hall chip according to claim 4, characterized in that: The signal output unit is used to output the optimal signal through the output pin OUT.
6. The power controllable switch Hall chip according to claim 5, characterized in that: The enabling logic unit is used to control the operation of the magnetic sensing unit, the signal processing unit and the signal output unit according to an external signal connected to the enabling pin PD; the enabling pin PD is a bidirectional control interface.
7. A power control method for a power-controllable switch Hall chip, characterized in that: Using the power controllable switch Hall chip according to claim 6 specifically comprises the following steps: Step 1, obtain the period T of the external signal, connect the enable pin PD to the external signal, and obtain the optimal signal; Step 2: Calculate the duty cycle of the low level according to the period of the external signal; Step 3: Calculate the average power consumption of the chip based on the duty cycle; Step 4: Adjust the duty cycle of the external signal to control the average power consumption of the chip.
8. The power control method of the power-controllable switch Hall chip according to claim 7, characterized in that: The external signal in step 1 includes a low level and a high level; when the external signal is at a low level, the chip works and the power consumption is , get the optimal signal; when the external signal is at a high level, the chip does not work.
9. The power control method of the power-controllable switch Hall chip according to claim 8, characterized in that: The period T is: In the formula, Indicates the high level time, Indicates the low level time; The duty cycle of the low level is: Where D is the duty cycle.
10. The power control method of the power-controllable switch Hall chip according to claim 9, characterized in that: The average power consumption described in step 3 is: In the formula, represents the total power consumption within period T, Indicates the average power consumption.